llvm/llvm/test/Transforms/InstCombine/bitcast-bfloat-half-mixing.ll

; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 4
; RUN: opt -passes=instcombine -S %s | FileCheck %s

define double @F0(bfloat %P0) {
; CHECK-LABEL: define double @F0(
; CHECK-SAME: bfloat [[P0:%.*]]) {
; CHECK-NEXT:  entry:
; CHECK-NEXT:    [[CONV0:%.*]] = bitcast bfloat [[P0]] to half
; CHECK-NEXT:    [[TMP0:%.*]] = fpext half [[CONV0]] to double
; CHECK-NEXT:    ret double [[TMP0]]
;
entry:
  %conv0 = bitcast bfloat %P0 to half
  %0 = fpext half %conv0 to double
  ret double %0
}

define double @F1(half %P1) {
; CHECK-LABEL: define double @F1(
; CHECK-SAME: half [[P1:%.*]]) {
; CHECK-NEXT:  entry:
; CHECK-NEXT:    [[CONV1:%.*]] = bitcast half [[P1]] to bfloat
; CHECK-NEXT:    [[TMP0:%.*]] = fpext bfloat [[CONV1]] to double
; CHECK-NEXT:    ret double [[TMP0]]
;
entry:
  %conv1 = bitcast half %P1 to bfloat
  %0 = fpext bfloat %conv1 to double
  ret double %0
}

define i32 @F2(bfloat %P2) {
; CHECK-LABEL: define i32 @F2(
; CHECK-SAME: bfloat [[P2:%.*]]) {
; CHECK-NEXT:  entry:
; CHECK-NEXT:    [[CONV2:%.*]] = bitcast bfloat [[P2]] to half
; CHECK-NEXT:    [[TMP0:%.*]] = fptoui half [[CONV2]] to i32
; CHECK-NEXT:    ret i32 [[TMP0]]
;
entry:
  %conv2 = bitcast bfloat %P2 to half
  %0 = fptoui half %conv2 to i32
  ret i32 %0
}

define i32 @F3(half %P3) {
; CHECK-LABEL: define i32 @F3(
; CHECK-SAME: half [[P3:%.*]]) {
; CHECK-NEXT:  entry:
; CHECK-NEXT:    [[CONV3:%.*]] = bitcast half [[P3]] to bfloat
; CHECK-NEXT:    [[TMP0:%.*]] = fptoui bfloat [[CONV3]] to i32
; CHECK-NEXT:    ret i32 [[TMP0]]
;
entry:
  %conv3 = bitcast half %P3 to bfloat
  %0 = fptoui bfloat %conv3 to i32
  ret i32 %0
}

define i32 @F4(bfloat %P4) {
; CHECK-LABEL: define i32 @F4(
; CHECK-SAME: bfloat [[P4:%.*]]) {
; CHECK-NEXT:  entry:
; CHECK-NEXT:    [[CONV4:%.*]] = bitcast bfloat [[P4]] to half
; CHECK-NEXT:    [[TMP0:%.*]] = fptosi half [[CONV4]] to i32
; CHECK-NEXT:    ret i32 [[TMP0]]
;
entry:
  %conv4 = bitcast bfloat %P4 to half
  %0 = fptosi half %conv4 to i32
  ret i32 %0
}

define i32 @F5(half %P5) {
; CHECK-LABEL: define i32 @F5(
; CHECK-SAME: half [[P5:%.*]]) {
; CHECK-NEXT:  entry:
; CHECK-NEXT:    [[CONV5:%.*]] = bitcast half [[P5]] to bfloat
; CHECK-NEXT:    [[TMP0:%.*]] = fptosi bfloat [[CONV5]] to i32
; CHECK-NEXT:    ret i32 [[TMP0]]
;
entry:
  %conv5 = bitcast half %P5 to bfloat
  %0 = fptosi bfloat %conv5 to i32
  ret i32 %0
}