llvm/llvm/test/Transforms/InstCombine/pr75369.ll

; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 4
; RUN: opt -passes=instcombine -S < %s | FileCheck %s

define i32 @main(ptr %a, i8 %a0, i32 %conv, i8 %a1) {
; CHECK-LABEL: define i32 @main(
; CHECK-SAME: ptr [[A:%.*]], i8 [[A0:%.*]], i32 [[CONV:%.*]], i8 [[A1:%.*]]) {
; CHECK-NEXT:    [[A3:%.*]] = trunc i32 [[CONV]] to i8
; CHECK-NEXT:    [[OR11:%.*]] = or i8 [[A0]], [[A3]]
; CHECK-NEXT:    store i8 [[OR11]], ptr [[A]], align 1
; CHECK-NEXT:    [[CMP:%.*]] = icmp slt i8 [[A1]], 0
; CHECK-NEXT:    call void @llvm.assume(i1 [[CMP]])
; CHECK-NEXT:    ret i32 [[CONV]]
;
  %conv1 = sext i8 %a1 to i32
  %a2 = xor i32 %conv, 1
  %or = or i32 %conv1, %conv
  %not = xor i32 %or, -1
  %shr = lshr i32 %not, 1
  %add.neg3 = sub i32 %a2, %shr
  %conv24 = trunc i32 %add.neg3 to i8
  store i8 %conv24, ptr %a, align 1
  %sext = shl i32 %conv, 0
  %conv3 = ashr i32 %sext, 0
  %a3 = trunc i32 %conv to i8
  %conv5 = or i8 %a3, 0
  %xor6 = xor i8 %conv5, 0
  %xor816 = xor i8 %a0, 0
  %a4 = xor i8 %xor816, 0
  %or11 = or i8 %xor6, %a4
  store i8 %or11, ptr %a, align 1
  %cmp = icmp slt i8 %a1, 0
  call void @llvm.assume(i1 %cmp)
  ret i32 %conv3
}

declare void @llvm.assume(i1)