; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 5
; RUN: opt < %s -loop-reduce -S | FileCheck %s
target datalayout = "e-m:e-p:64:64-i64:64-i128:128-n64-S128"
target triple = "riscv64"
; This test was added as example motivation for the changes in #89927, which
; causes LSR to drop solutions if deemed to be less profitable than the
; starting point. At the time of adding this test, LSR's search heuristics
; best identified solution was an unprofitable one. This could of course
; change with future LSR improvements.
%struct = type { i64, i32, i32, i32, i32, i32, i32, i32, i32, i64, i32, i64, i64, i32, i64 }
define i32 @main() {
; CHECK-LABEL: define i32 @main() {
; CHECK-NEXT: [[CALL:%.*]] = tail call ptr null(i64 0)
; CHECK-NEXT: br label %[[BB2:.*]]
; CHECK: [[BB1:.*:]]
; CHECK-NEXT: [[LOAD:%.*]] = load i32, ptr [[CALL]], align 4
; CHECK-NEXT: ret i32 0
; CHECK: [[BB2]]:
; CHECK-NEXT: [[LSR_IV30:%.*]] = phi i64 [ [[LSR_IV_NEXT31:%.*]], %[[BB2]] ], [ 8, [[BB:%.*]] ]
; CHECK-NEXT: [[LSR_IV27:%.*]] = phi i64 [ [[LSR_IV_NEXT28:%.*]], %[[BB2]] ], [ 12, [[BB]] ]
; CHECK-NEXT: [[LSR_IV24:%.*]] = phi i64 [ [[LSR_IV_NEXT25:%.*]], %[[BB2]] ], [ 16, [[BB]] ]
; CHECK-NEXT: [[LSR_IV21:%.*]] = phi i64 [ [[LSR_IV_NEXT22:%.*]], %[[BB2]] ], [ 20, [[BB]] ]
; CHECK-NEXT: [[LSR_IV18:%.*]] = phi i64 [ [[LSR_IV_NEXT19:%.*]], %[[BB2]] ], [ 24, [[BB]] ]
; CHECK-NEXT: [[LSR_IV15:%.*]] = phi i64 [ [[LSR_IV_NEXT16:%.*]], %[[BB2]] ], [ 28, [[BB]] ]
; CHECK-NEXT: [[LSR_IV12:%.*]] = phi i64 [ [[LSR_IV_NEXT13:%.*]], %[[BB2]] ], [ 32, [[BB]] ]
; CHECK-NEXT: [[LSR_IV9:%.*]] = phi i64 [ [[LSR_IV_NEXT10:%.*]], %[[BB2]] ], [ 36, [[BB]] ]
; CHECK-NEXT: [[LSR_IV4:%.*]] = phi i64 [ [[LSR_IV_NEXT5:%.*]], %[[BB2]] ], [ 40, [[BB]] ]
; CHECK-NEXT: [[LSR_IV1:%.*]] = phi i64 [ [[LSR_IV_NEXT2:%.*]], %[[BB2]] ], [ 48, [[BB]] ]
; CHECK-NEXT: [[LSR_IV:%.*]] = phi i64 [ [[LSR_IV_NEXT:%.*]], %[[BB2]] ], [ 72, [[BB]] ]
; CHECK-NEXT: [[SCEVGEP32:%.*]] = getelementptr i8, ptr [[CALL]], i64 [[LSR_IV30]]
; CHECK-NEXT: store i32 0, ptr [[SCEVGEP32]], align 8
; CHECK-NEXT: [[SCEVGEP29:%.*]] = getelementptr i8, ptr [[CALL]], i64 [[LSR_IV27]]
; CHECK-NEXT: store i32 0, ptr [[SCEVGEP29]], align 4
; CHECK-NEXT: [[SCEVGEP26:%.*]] = getelementptr i8, ptr [[CALL]], i64 [[LSR_IV24]]
; CHECK-NEXT: store i32 0, ptr [[SCEVGEP26]], align 8
; CHECK-NEXT: [[SCEVGEP23:%.*]] = getelementptr i8, ptr [[CALL]], i64 [[LSR_IV21]]
; CHECK-NEXT: store i32 0, ptr [[SCEVGEP23]], align 4
; CHECK-NEXT: [[SCEVGEP20:%.*]] = getelementptr i8, ptr [[CALL]], i64 [[LSR_IV18]]
; CHECK-NEXT: store i32 0, ptr [[SCEVGEP20]], align 8
; CHECK-NEXT: [[SCEVGEP17:%.*]] = getelementptr i8, ptr [[CALL]], i64 [[LSR_IV15]]
; CHECK-NEXT: store i32 0, ptr [[SCEVGEP17]], align 4
; CHECK-NEXT: [[SCEVGEP14:%.*]] = getelementptr i8, ptr [[CALL]], i64 [[LSR_IV12]]
; CHECK-NEXT: store i32 0, ptr [[SCEVGEP14]], align 8
; CHECK-NEXT: [[SCEVGEP11:%.*]] = getelementptr i8, ptr [[CALL]], i64 [[LSR_IV9]]
; CHECK-NEXT: store i32 0, ptr [[SCEVGEP11]], align 4
; CHECK-NEXT: [[SCEVGEP6:%.*]] = getelementptr i8, ptr [[CALL]], i64 [[LSR_IV4]]
; CHECK-NEXT: store i64 0, ptr [[SCEVGEP6]], align 8
; CHECK-NEXT: [[SCEVGEP3:%.*]] = getelementptr i8, ptr [[CALL]], i64 [[LSR_IV1]]
; CHECK-NEXT: store i32 0, ptr [[SCEVGEP3]], align 8
; CHECK-NEXT: [[SCEVGEP:%.*]] = getelementptr i8, ptr [[CALL]], i64 [[LSR_IV]]
; CHECK-NEXT: store i32 0, ptr [[SCEVGEP]], align 8
; CHECK-NEXT: [[SCEVGEP7:%.*]] = getelementptr i8, ptr [[CALL]], i64 [[LSR_IV4]]
; CHECK-NEXT: [[SCEVGEP8:%.*]] = getelementptr i8, ptr [[SCEVGEP7]], i64 40
; CHECK-NEXT: store i64 0, ptr [[SCEVGEP8]], align 8
; CHECK-NEXT: [[LSR_IV_NEXT]] = add i64 [[LSR_IV]], 88
; CHECK-NEXT: [[LSR_IV_NEXT2]] = add i64 [[LSR_IV1]], 88
; CHECK-NEXT: [[LSR_IV_NEXT5]] = add i64 [[LSR_IV4]], 88
; CHECK-NEXT: [[LSR_IV_NEXT10]] = add i64 [[LSR_IV9]], 88
; CHECK-NEXT: [[LSR_IV_NEXT13]] = add i64 [[LSR_IV12]], 88
; CHECK-NEXT: [[LSR_IV_NEXT16]] = add i64 [[LSR_IV15]], 88
; CHECK-NEXT: [[LSR_IV_NEXT19]] = add i64 [[LSR_IV18]], 88
; CHECK-NEXT: [[LSR_IV_NEXT22]] = add i64 [[LSR_IV21]], 88
; CHECK-NEXT: [[LSR_IV_NEXT25]] = add i64 [[LSR_IV24]], 88
; CHECK-NEXT: [[LSR_IV_NEXT28]] = add i64 [[LSR_IV27]], 88
; CHECK-NEXT: [[LSR_IV_NEXT31]] = add i64 [[LSR_IV30]], 88
; CHECK-NEXT: br label %[[BB2]]
;
0:
%call = tail call ptr null(i64 0)
br label %2
1:
%load = load i32, ptr %call, align 4
ret i32 0
2:
%phi = phi i64 [ 0, %0 ], [ %add, %2 ]
%getelementptr = getelementptr %struct, ptr %call, i64 %phi
%getelementptr3 = getelementptr i8, ptr %getelementptr, i64 8
store i32 0, ptr %getelementptr3, align 8
%getelementptr4 = getelementptr i8, ptr %getelementptr, i64 12
store i32 0, ptr %getelementptr4, align 4
%getelementptr5 = getelementptr i8, ptr %getelementptr, i64 16
store i32 0, ptr %getelementptr5, align 8
%getelementptr6 = getelementptr i8, ptr %getelementptr, i64 20
store i32 0, ptr %getelementptr6, align 4
%getelementptr7 = getelementptr i8, ptr %getelementptr, i64 24
store i32 0, ptr %getelementptr7, align 8
%getelementptr8 = getelementptr i8, ptr %getelementptr, i64 28
store i32 0, ptr %getelementptr8, align 4
%getelementptr9 = getelementptr i8, ptr %getelementptr, i64 32
store i32 0, ptr %getelementptr9, align 8
%getelementptr10 = getelementptr i8, ptr %getelementptr, i64 36
store i32 0, ptr %getelementptr10, align 4
%getelementptr11 = getelementptr i8, ptr %getelementptr, i64 40
store i64 0, ptr %getelementptr11, align 8
%getelementptr12 = getelementptr i8, ptr %getelementptr, i64 48
store i32 0, ptr %getelementptr12, align 8
%getelementptr13 = getelementptr i8, ptr %getelementptr, i64 72
store i32 0, ptr %getelementptr13, align 8
%getelementptr14 = getelementptr i8, ptr %getelementptr, i64 80
store i64 0, ptr %getelementptr14, align 8
%add = add i64 %phi, 1
br label %2
}
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