# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
# RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx90a -verify-regalloc --stress-regalloc=2 -start-before=greedy,0 -stop-after=virtregrewriter,1 -o - %s | FileCheck -check-prefix=GCN %s
---
name: test_remat_v_mov_b32_e32
tracksRegLiveness: true
body: |
bb.0:
; GCN-LABEL: name: test_remat_v_mov_b32_e32
; GCN: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 1, implicit $exec
; GCN-NEXT: [[V_MOV_B32_e32_1:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 2, implicit $exec
; GCN-NEXT: [[V_MOV_B32_e32_2:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 3, implicit $exec
; GCN-NEXT: S_NOP 0, implicit [[V_MOV_B32_e32_]]
; GCN-NEXT: S_NOP 0, implicit [[V_MOV_B32_e32_1]]
; GCN-NEXT: S_NOP 0, implicit [[V_MOV_B32_e32_2]]
; GCN-NEXT: S_ENDPGM 0
%0:vgpr_32 = V_MOV_B32_e32 1, implicit $exec
%1:vgpr_32 = V_MOV_B32_e32 2, implicit $exec
%2:vgpr_32 = V_MOV_B32_e32 3, implicit $exec
S_NOP 0, implicit %0
S_NOP 0, implicit %1
S_NOP 0, implicit %2
S_ENDPGM 0
...
---
name: test_no_remat_v_mov_b32_e32_impuse
tracksRegLiveness: true
machineFunctionInfo:
stackPtrOffsetReg: $sgpr32
body: |
bb.0:
; GCN-LABEL: name: test_no_remat_v_mov_b32_e32_impuse
; GCN: $m0 = IMPLICIT_DEF
; GCN-NEXT: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 1, implicit $exec, implicit $m0
; GCN-NEXT: [[V_MOV_B32_e32_1:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 2, implicit $exec, implicit $m0
; GCN-NEXT: [[V_MOV_B32_e32_2:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 3, implicit $exec, implicit $m0
; GCN-NEXT: S_NOP 0, implicit [[V_MOV_B32_e32_]]
; GCN-NEXT: S_NOP 0, implicit [[V_MOV_B32_e32_1]]
; GCN-NEXT: S_NOP 0, implicit [[V_MOV_B32_e32_2]]
; GCN-NEXT: S_ENDPGM 0
$m0 = IMPLICIT_DEF
%0:vgpr_32 = V_MOV_B32_e32 1, implicit $exec, implicit $m0
%1:vgpr_32 = V_MOV_B32_e32 2, implicit $exec, implicit $m0
%2:vgpr_32 = V_MOV_B32_e32 3, implicit $exec, implicit $m0
S_NOP 0, implicit %0
S_NOP 0, implicit %1
S_NOP 0, implicit %2
S_ENDPGM 0
...
---
name: test_remat_v_mov_b32_e32_exec_def
tracksRegLiveness: true
machineFunctionInfo:
stackPtrOffsetReg: $sgpr32
body: |
bb.0:
; GCN-LABEL: name: test_remat_v_mov_b32_e32_exec_def
; GCN: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 1, implicit $exec
; GCN-NEXT: [[V_MOV_B32_e32_1:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 2, implicit $exec
; GCN-NEXT: [[V_MOV_B32_e32_2:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 3, implicit $exec
; GCN-NEXT: S_NOP 0, implicit [[V_MOV_B32_e32_]]
; GCN-NEXT: S_NOP 0, implicit [[V_MOV_B32_e32_1]]
; GCN-NEXT: S_NOP 0, implicit [[V_MOV_B32_e32_2]]
; GCN-NEXT: $exec = S_ANDN2_B64_term $exec, undef renamable $sgpr0_sgpr1, implicit-def $scc
; GCN-NEXT: S_ENDPGM 0
%0:vgpr_32 = V_MOV_B32_e32 1, implicit $exec
%1:vgpr_32 = V_MOV_B32_e32 2, implicit $exec
%2:vgpr_32 = V_MOV_B32_e32 3, implicit $exec
S_NOP 0, implicit %0
S_NOP 0, implicit %1
S_NOP 0, implicit %2
$exec = S_ANDN2_B64_term $exec, undef %4:sreg_64, implicit-def $scc
S_ENDPGM 0
...
---
name: test_remat_v_mov_b32_e64
tracksRegLiveness: true
body: |
bb.0:
; GCN-LABEL: name: test_remat_v_mov_b32_e64
; GCN: [[V_MOV_B32_e64_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e64 1, implicit $exec
; GCN-NEXT: [[V_MOV_B32_e64_1:%[0-9]+]]:vgpr_32 = V_MOV_B32_e64 2, implicit $exec
; GCN-NEXT: [[V_MOV_B32_e64_2:%[0-9]+]]:vgpr_32 = V_MOV_B32_e64 3, implicit $exec
; GCN-NEXT: S_NOP 0, implicit [[V_MOV_B32_e64_]]
; GCN-NEXT: S_NOP 0, implicit [[V_MOV_B32_e64_1]]
; GCN-NEXT: S_NOP 0, implicit [[V_MOV_B32_e64_2]]
; GCN-NEXT: S_ENDPGM 0
%0:vgpr_32 = V_MOV_B32_e64 1, implicit $exec
%1:vgpr_32 = V_MOV_B32_e64 2, implicit $exec
%2:vgpr_32 = V_MOV_B32_e64 3, implicit $exec
S_NOP 0, implicit %0
S_NOP 0, implicit %1
S_NOP 0, implicit %2
S_ENDPGM 0
...
---
name: test_no_remat_v_mov_b32_dpp
tracksRegLiveness: true
machineFunctionInfo:
stackPtrOffsetReg: $sgpr32
body: |
bb.0:
; GCN-LABEL: name: test_no_remat_v_mov_b32_dpp
; GCN: [[V_MOV_B32_dpp:%[0-9]+]]:vgpr_32 = V_MOV_B32_dpp undef [[V_MOV_B32_dpp]], undef %1:vgpr_32, 1, 15, 15, 1, implicit $exec
; GCN-NEXT: [[V_MOV_B32_dpp1:%[0-9]+]]:vgpr_32 = V_MOV_B32_dpp undef [[V_MOV_B32_dpp1]], undef %1:vgpr_32, 1, 15, 15, 1, implicit $exec
; GCN-NEXT: [[V_MOV_B32_dpp2:%[0-9]+]]:vgpr_32 = V_MOV_B32_dpp undef [[V_MOV_B32_dpp2]], undef %1:vgpr_32, 1, 15, 15, 1, implicit $exec
; GCN-NEXT: S_NOP 0, implicit [[V_MOV_B32_dpp]]
; GCN-NEXT: S_NOP 0, implicit [[V_MOV_B32_dpp1]]
; GCN-NEXT: S_NOP 0, implicit [[V_MOV_B32_dpp2]]
; GCN-NEXT: S_ENDPGM 0
%1:vgpr_32 = V_MOV_B32_dpp undef %1:vgpr_32, undef %0:vgpr_32, 1, 15, 15, 1, implicit $exec
%2:vgpr_32 = V_MOV_B32_dpp undef %2:vgpr_32, undef %0:vgpr_32, 1, 15, 15, 1, implicit $exec
%3:vgpr_32 = V_MOV_B32_dpp undef %3:vgpr_32, undef %0:vgpr_32, 1, 15, 15, 1, implicit $exec
S_NOP 0, implicit %1
S_NOP 0, implicit %2
S_NOP 0, implicit %3
S_ENDPGM 0
...
---
name: test_remat_v_accvgpr_read_b32
tracksRegLiveness: true
body: |
bb.0:
; GCN-LABEL: name: test_remat_v_accvgpr_read_b32
; GCN: [[V_ACCVGPR_READ_B32_e64_:%[0-9]+]]:vgpr_32 = V_ACCVGPR_READ_B32_e64 undef $agpr0, implicit $exec
; GCN-NEXT: [[V_ACCVGPR_READ_B32_e64_1:%[0-9]+]]:vgpr_32 = V_ACCVGPR_READ_B32_e64 undef $agpr0, implicit $exec
; GCN-NEXT: [[V_ACCVGPR_READ_B32_e64_2:%[0-9]+]]:vgpr_32 = V_ACCVGPR_READ_B32_e64 undef $agpr0, implicit $exec
; GCN-NEXT: S_NOP 0, implicit [[V_ACCVGPR_READ_B32_e64_]]
; GCN-NEXT: S_NOP 0, implicit [[V_ACCVGPR_READ_B32_e64_1]]
; GCN-NEXT: S_NOP 0, implicit [[V_ACCVGPR_READ_B32_e64_2]]
; GCN-NEXT: S_ENDPGM 0
%0:vgpr_32 = V_ACCVGPR_READ_B32_e64 undef $agpr0, implicit $exec
%1:vgpr_32 = V_ACCVGPR_READ_B32_e64 undef $agpr0, implicit $exec
%2:vgpr_32 = V_ACCVGPR_READ_B32_e64 undef $agpr0, implicit $exec
S_NOP 0, implicit %0
S_NOP 0, implicit %1
S_NOP 0, implicit %2
S_ENDPGM 0
...
---
name: test_remat_v_accvgpr_write_b32
tracksRegLiveness: true
body: |
bb.0:
; GCN-LABEL: name: test_remat_v_accvgpr_write_b32
; GCN: [[V_ACCVGPR_WRITE_B32_e64_:%[0-9]+]]:agpr_32 = V_ACCVGPR_WRITE_B32_e64 1, implicit $exec
; GCN-NEXT: [[V_ACCVGPR_WRITE_B32_e64_1:%[0-9]+]]:agpr_32 = V_ACCVGPR_WRITE_B32_e64 2, implicit $exec
; GCN-NEXT: [[V_ACCVGPR_WRITE_B32_e64_2:%[0-9]+]]:agpr_32 = V_ACCVGPR_WRITE_B32_e64 3, implicit $exec
; GCN-NEXT: S_NOP 0, implicit [[V_ACCVGPR_WRITE_B32_e64_]]
; GCN-NEXT: S_NOP 0, implicit [[V_ACCVGPR_WRITE_B32_e64_1]]
; GCN-NEXT: S_NOP 0, implicit [[V_ACCVGPR_WRITE_B32_e64_2]]
; GCN-NEXT: S_ENDPGM 0
%0:agpr_32 = V_ACCVGPR_WRITE_B32_e64 1, implicit $exec
%1:agpr_32 = V_ACCVGPR_WRITE_B32_e64 2, implicit $exec
%2:agpr_32 = V_ACCVGPR_WRITE_B32_e64 3, implicit $exec
S_NOP 0, implicit %0
S_NOP 0, implicit %1
S_NOP 0, implicit %2
S_ENDPGM 0
...
---
name: test_remat_v_mov_b64_pseudo
tracksRegLiveness: true
body: |
bb.0:
; GCN-LABEL: name: test_remat_v_mov_b64_pseudo
; GCN: [[V_MOV_B:%[0-9]+]]:vreg_64_align2 = V_MOV_B64_PSEUDO 1, implicit $exec
; GCN-NEXT: [[V_MOV_B1:%[0-9]+]]:vreg_64_align2 = V_MOV_B64_PSEUDO 2, implicit $exec
; GCN-NEXT: [[V_MOV_B2:%[0-9]+]]:vreg_64_align2 = V_MOV_B64_PSEUDO 3, implicit $exec
; GCN-NEXT: S_NOP 0, implicit [[V_MOV_B]]
; GCN-NEXT: S_NOP 0, implicit [[V_MOV_B1]]
; GCN-NEXT: S_NOP 0, implicit [[V_MOV_B2]]
; GCN-NEXT: S_ENDPGM 0
%0:vreg_64_align2 = V_MOV_B64_PSEUDO 1, implicit $exec
%1:vreg_64_align2 = V_MOV_B64_PSEUDO 2, implicit $exec
%2:vreg_64_align2 = V_MOV_B64_PSEUDO 3, implicit $exec
S_NOP 0, implicit %0
S_NOP 0, implicit %1
S_NOP 0, implicit %2
S_ENDPGM 0
...
---
name: test_remat_v_cvt_i32_f64_e32
tracksRegLiveness: true
body: |
bb.0:
; GCN-LABEL: name: test_remat_v_cvt_i32_f64_e32
; GCN: [[V_CVT_I32_F64_e32_:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 1, implicit $exec, implicit $mode
; GCN-NEXT: [[V_CVT_I32_F64_e32_1:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 2, implicit $exec, implicit $mode
; GCN-NEXT: [[V_CVT_I32_F64_e32_2:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 3, implicit $exec, implicit $mode
; GCN-NEXT: S_NOP 0, implicit [[V_CVT_I32_F64_e32_]]
; GCN-NEXT: S_NOP 0, implicit [[V_CVT_I32_F64_e32_1]]
; GCN-NEXT: S_NOP 0, implicit [[V_CVT_I32_F64_e32_2]]
; GCN-NEXT: S_ENDPGM 0
%0:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 1, implicit $exec, implicit $mode
%1:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 2, implicit $exec, implicit $mode
%2:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 3, implicit $exec, implicit $mode
S_NOP 0, implicit %0
S_NOP 0, implicit %1
S_NOP 0, implicit %2
S_ENDPGM 0
...
---
machineFunctionInfo:
stackPtrOffsetReg: $sgpr32
name: test_no_remat_v_cvt_i32_f64_e32_fp_except
tracksRegLiveness: true
body: |
bb.0:
; GCN-LABEL: name: test_no_remat_v_cvt_i32_f64_e32_fp_except
; GCN: [[V_CVT_I32_F64_e32_:%[0-9]+]]:vgpr_32 = V_CVT_I32_F64_e32 1, implicit $exec, implicit $mode
; GCN-NEXT: [[V_CVT_I32_F64_e32_1:%[0-9]+]]:vgpr_32 = V_CVT_I32_F64_e32 2, implicit $exec, implicit $mode
; GCN-NEXT: [[V_CVT_I32_F64_e32_2:%[0-9]+]]:vgpr_32 = V_CVT_I32_F64_e32 3, implicit $exec, implicit $mode
; GCN-NEXT: S_NOP 0, implicit [[V_CVT_I32_F64_e32_]]
; GCN-NEXT: S_NOP 0, implicit [[V_CVT_I32_F64_e32_1]]
; GCN-NEXT: S_NOP 0, implicit [[V_CVT_I32_F64_e32_2]]
; GCN-NEXT: S_ENDPGM 0
%0:vgpr_32 = V_CVT_I32_F64_e32 1, implicit $exec, implicit $mode
%1:vgpr_32 = V_CVT_I32_F64_e32 2, implicit $exec, implicit $mode
%2:vgpr_32 = V_CVT_I32_F64_e32 3, implicit $exec, implicit $mode
S_NOP 0, implicit %0
S_NOP 0, implicit %1
S_NOP 0, implicit %2
S_ENDPGM 0
...
---
# Cannot rematerialize if MODE register is modified anywhere
name: test_no_remat_v_cvt_i32_f64_e32_mode_def
tracksRegLiveness: true
machineFunctionInfo:
stackPtrOffsetReg: $sgpr32
body: |
bb.0:
; GCN-LABEL: name: test_no_remat_v_cvt_i32_f64_e32_mode_def
; GCN: $mode = IMPLICIT_DEF
; GCN-NEXT: [[V_CVT_I32_F64_e32_:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 1, implicit $exec, implicit $mode
; GCN-NEXT: [[V_CVT_I32_F64_e32_1:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 2, implicit $exec, implicit $mode
; GCN-NEXT: [[V_CVT_I32_F64_e32_2:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 3, implicit $exec, implicit $mode
; GCN-NEXT: S_NOP 0, implicit [[V_CVT_I32_F64_e32_]]
; GCN-NEXT: S_NOP 0, implicit [[V_CVT_I32_F64_e32_1]]
; GCN-NEXT: S_NOP 0, implicit [[V_CVT_I32_F64_e32_2]]
; GCN-NEXT: S_ENDPGM 0
$mode = IMPLICIT_DEF
%0:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 1, implicit $exec, implicit $mode
%1:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 2, implicit $exec, implicit $mode
%2:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 3, implicit $exec, implicit $mode
S_NOP 0, implicit %0
S_NOP 0, implicit %1
S_NOP 0, implicit %2
S_ENDPGM 0
...
---
name: test_remat_v_cvt_i32_f64_e64
tracksRegLiveness: true
body: |
bb.0:
; GCN-LABEL: name: test_remat_v_cvt_i32_f64_e64
; GCN: [[V_CVT_I32_F64_e64_:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F64_e64 0, 1, 0, 0, implicit $exec, implicit $mode
; GCN-NEXT: [[V_CVT_I32_F64_e64_1:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F64_e64 0, 2, 0, 0, implicit $exec, implicit $mode
; GCN-NEXT: [[V_CVT_I32_F64_e64_2:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F64_e64 0, 3, 0, 0, implicit $exec, implicit $mode
; GCN-NEXT: S_NOP 0, implicit [[V_CVT_I32_F64_e64_]]
; GCN-NEXT: S_NOP 0, implicit [[V_CVT_I32_F64_e64_1]]
; GCN-NEXT: S_NOP 0, implicit [[V_CVT_I32_F64_e64_2]]
; GCN-NEXT: S_ENDPGM 0
%0:vgpr_32 = nofpexcept V_CVT_I32_F64_e64 0, 1, 0, 0, implicit $exec, implicit $mode
%1:vgpr_32 = nofpexcept V_CVT_I32_F64_e64 0, 2, 0, 0, implicit $exec, implicit $mode
%2:vgpr_32 = nofpexcept V_CVT_I32_F64_e64 0, 3, 0, 0, implicit $exec, implicit $mode
S_NOP 0, implicit %0
S_NOP 0, implicit %1
S_NOP 0, implicit %2
S_ENDPGM 0
...
---
name: test_remat_v_cvt_i32_f64_e64_undef
tracksRegLiveness: true
machineFunctionInfo:
stackPtrOffsetReg: $sgpr32
body: |
bb.0:
; GCN-LABEL: name: test_remat_v_cvt_i32_f64_e64_undef
; GCN: [[V_CVT_I32_F64_e64_:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F64_e64 0, undef %1:vreg_64, 0, 0, implicit $exec, implicit $mode
; GCN-NEXT: [[V_CVT_I32_F64_e64_1:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F64_e64 0, undef %1:vreg_64, 0, 0, implicit $exec, implicit $mode
; GCN-NEXT: [[V_CVT_I32_F64_e64_2:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F64_e64 0, undef %1:vreg_64, 0, 0, implicit $exec, implicit $mode
; GCN-NEXT: S_NOP 0, implicit [[V_CVT_I32_F64_e64_]]
; GCN-NEXT: S_NOP 0, implicit [[V_CVT_I32_F64_e64_1]]
; GCN-NEXT: S_NOP 0, implicit [[V_CVT_I32_F64_e64_2]]
; GCN-NEXT: S_ENDPGM 0
%1:vgpr_32 = nofpexcept V_CVT_I32_F64_e64 0, undef %0:vreg_64, 0, 0, implicit $exec, implicit $mode
%2:vgpr_32 = nofpexcept V_CVT_I32_F64_e64 0, undef %0:vreg_64, 0, 0, implicit $exec, implicit $mode
%3:vgpr_32 = nofpexcept V_CVT_I32_F64_e64 0, undef %0:vreg_64, 0, 0, implicit $exec, implicit $mode
S_NOP 0, implicit %1
S_NOP 0, implicit %2
S_NOP 0, implicit %3
S_ENDPGM 0
...
---
name: test_no_remat_v_cvt_i32_f64_dpp
tracksRegLiveness: true
machineFunctionInfo:
stackPtrOffsetReg: $sgpr32
body: |
bb.0:
; GCN-LABEL: name: test_no_remat_v_cvt_i32_f64_dpp
; GCN: [[V_CVT_I32_F64_dpp:%[0-9]+]]:vgpr_32 = V_CVT_I32_F64_dpp undef [[V_CVT_I32_F64_dpp]], 0, undef %1:vreg_64_align2, 336, 0, 0, 0, implicit $exec, implicit $mode
; GCN-NEXT: [[V_CVT_I32_F64_dpp1:%[0-9]+]]:vgpr_32 = V_CVT_I32_F64_dpp undef [[V_CVT_I32_F64_dpp1]], 0, undef %1:vreg_64_align2, 336, 0, 0, 0, implicit $exec, implicit $mode
; GCN-NEXT: [[V_CVT_I32_F64_dpp2:%[0-9]+]]:vgpr_32 = V_CVT_I32_F64_dpp undef [[V_CVT_I32_F64_dpp2]], 0, undef %1:vreg_64_align2, 336, 0, 0, 0, implicit $exec, implicit $mode
; GCN-NEXT: S_NOP 0, implicit [[V_CVT_I32_F64_dpp]]
; GCN-NEXT: S_NOP 0, implicit [[V_CVT_I32_F64_dpp1]]
; GCN-NEXT: S_NOP 0, implicit [[V_CVT_I32_F64_dpp2]]
; GCN-NEXT: S_ENDPGM 0
%1:vgpr_32 = V_CVT_I32_F64_dpp undef %1:vgpr_32, 0, undef %0:vreg_64_align2, 336, 0, 0, 0, implicit $exec, implicit $mode
%2:vgpr_32 = V_CVT_I32_F64_dpp undef %2:vgpr_32, 0, undef %0:vreg_64_align2, 336, 0, 0, 0, implicit $exec, implicit $mode
%3:vgpr_32 = V_CVT_I32_F64_dpp undef %3:vgpr_32, 0, undef %0:vreg_64_align2, 336, 0, 0, 0, implicit $exec, implicit $mode
S_NOP 0, implicit %1
S_NOP 0, implicit %2
S_NOP 0, implicit %3
S_ENDPGM 0
...
---
name: test_no_remat_v_cvt_i32_f64_e32_imp_def
tracksRegLiveness: true
machineFunctionInfo:
stackPtrOffsetReg: $sgpr32
body: |
bb.0:
; GCN-LABEL: name: test_no_remat_v_cvt_i32_f64_e32_imp_def
; GCN: [[V_CVT_I32_F64_e32_:%[0-9]+]]:vgpr_32 = V_CVT_I32_F64_e32 1, implicit $exec, implicit $mode, implicit-def $m0
; GCN-NEXT: [[V_CVT_I32_F64_e32_1:%[0-9]+]]:vgpr_32 = V_CVT_I32_F64_e32 2, implicit $exec, implicit $mode, implicit-def $m0
; GCN-NEXT: [[V_CVT_I32_F64_e32_2:%[0-9]+]]:vgpr_32 = V_CVT_I32_F64_e32 3, implicit $exec, implicit $mode, implicit-def $m0
; GCN-NEXT: S_NOP 0, implicit [[V_CVT_I32_F64_e32_]]
; GCN-NEXT: S_NOP 0, implicit [[V_CVT_I32_F64_e32_1]]
; GCN-NEXT: S_NOP 0, implicit [[V_CVT_I32_F64_e32_2]]
; GCN-NEXT: S_ENDPGM 0
%0:vgpr_32 = V_CVT_I32_F64_e32 1, implicit $exec, implicit $mode, implicit-def $m0
%1:vgpr_32 = V_CVT_I32_F64_e32 2, implicit $exec, implicit $mode, implicit-def $m0
%2:vgpr_32 = V_CVT_I32_F64_e32 3, implicit $exec, implicit $mode, implicit-def $m0
S_NOP 0, implicit %0
S_NOP 0, implicit %1
S_NOP 0, implicit %2
S_ENDPGM 0
...
---
name: test_no_remat_v_cvt_i32_f64_e32_imp_use
tracksRegLiveness: true
machineFunctionInfo:
stackPtrOffsetReg: $sgpr32
body: |
bb.0:
; GCN-LABEL: name: test_no_remat_v_cvt_i32_f64_e32_imp_use
; GCN: [[V_CVT_I32_F64_e32_:%[0-9]+]]:vgpr_32 = V_CVT_I32_F64_e32 1, implicit $exec, implicit $mode, implicit $m0
; GCN-NEXT: [[V_CVT_I32_F64_e32_1:%[0-9]+]]:vgpr_32 = V_CVT_I32_F64_e32 2, implicit $exec, implicit $mode, implicit $m0
; GCN-NEXT: [[V_CVT_I32_F64_e32_2:%[0-9]+]]:vgpr_32 = V_CVT_I32_F64_e32 3, implicit $exec, implicit $mode, implicit $m0
; GCN-NEXT: S_NOP 0, implicit [[V_CVT_I32_F64_e32_]]
; GCN-NEXT: S_NOP 0, implicit [[V_CVT_I32_F64_e32_1]]
; GCN-NEXT: S_NOP 0, implicit [[V_CVT_I32_F64_e32_2]]
; GCN-NEXT: S_ENDPGM 0
%0:vgpr_32 = V_CVT_I32_F64_e32 1, implicit $exec, implicit $mode, implicit $m0
%1:vgpr_32 = V_CVT_I32_F64_e32 2, implicit $exec, implicit $mode, implicit $m0
%2:vgpr_32 = V_CVT_I32_F64_e32 3, implicit $exec, implicit $mode, implicit $m0
S_NOP 0, implicit %0
S_NOP 0, implicit %1
S_NOP 0, implicit %2
S_ENDPGM 0
...
---
name: test_remat_v_cvt_f64_i32_e32
tracksRegLiveness: true
body: |
bb.0:
; GCN-LABEL: name: test_remat_v_cvt_f64_i32_e32
; GCN: [[V_CVT_F64_I32_e32_:%[0-9]+]]:vreg_64_align2 = V_CVT_F64_I32_e32 1, implicit $exec, implicit $mode
; GCN-NEXT: [[V_CVT_F64_I32_e32_1:%[0-9]+]]:vreg_64_align2 = V_CVT_F64_I32_e32 2, implicit $exec, implicit $mode
; GCN-NEXT: [[V_CVT_F64_I32_e32_2:%[0-9]+]]:vreg_64_align2 = V_CVT_F64_I32_e32 3, implicit $exec, implicit $mode
; GCN-NEXT: S_NOP 0, implicit [[V_CVT_F64_I32_e32_]]
; GCN-NEXT: S_NOP 0, implicit [[V_CVT_F64_I32_e32_1]]
; GCN-NEXT: S_NOP 0, implicit [[V_CVT_F64_I32_e32_2]]
; GCN-NEXT: S_ENDPGM 0
%0:vreg_64_align2 = V_CVT_F64_I32_e32 1, implicit $exec, implicit $mode
%1:vreg_64_align2 = V_CVT_F64_I32_e32 2, implicit $exec, implicit $mode
%2:vreg_64_align2 = V_CVT_F64_I32_e32 3, implicit $exec, implicit $mode
S_NOP 0, implicit %0
S_NOP 0, implicit %1
S_NOP 0, implicit %2
S_ENDPGM 0
...
---
name: test_remat_v_cvt_f32_f64_e32
tracksRegLiveness: true
body: |
bb.0:
; GCN-LABEL: name: test_remat_v_cvt_f32_f64_e32
; GCN: [[V_CVT_F32_F64_e32_:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_F32_F64_e32 1, implicit $exec, implicit $mode
; GCN-NEXT: [[V_CVT_F32_F64_e32_1:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_F32_F64_e32 2, implicit $exec, implicit $mode
; GCN-NEXT: [[V_CVT_F32_F64_e32_2:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_F32_F64_e32 3, implicit $exec, implicit $mode
; GCN-NEXT: S_NOP 0, implicit [[V_CVT_F32_F64_e32_]]
; GCN-NEXT: S_NOP 0, implicit [[V_CVT_F32_F64_e32_1]]
; GCN-NEXT: S_NOP 0, implicit [[V_CVT_F32_F64_e32_2]]
; GCN-NEXT: S_ENDPGM 0
%0:vgpr_32 = nofpexcept V_CVT_F32_F64_e32 1, implicit $exec, implicit $mode
%1:vgpr_32 = nofpexcept V_CVT_F32_F64_e32 2, implicit $exec, implicit $mode
%2:vgpr_32 = nofpexcept V_CVT_F32_F64_e32 3, implicit $exec, implicit $mode
S_NOP 0, implicit %0
S_NOP 0, implicit %1
S_NOP 0, implicit %2
S_ENDPGM 0
...
---
name: test_remat_v_cvt_f64_f32_e32
tracksRegLiveness: true
body: |
bb.0:
; GCN-LABEL: name: test_remat_v_cvt_f64_f32_e32
; GCN: [[V_CVT_F64_F32_e32_:%[0-9]+]]:vreg_64_align2 = nofpexcept V_CVT_F64_F32_e32 1, implicit $exec, implicit $mode
; GCN-NEXT: [[V_CVT_F64_F32_e32_1:%[0-9]+]]:vreg_64_align2 = nofpexcept V_CVT_F64_F32_e32 2, implicit $exec, implicit $mode
; GCN-NEXT: [[V_CVT_F64_F32_e32_2:%[0-9]+]]:vreg_64_align2 = nofpexcept V_CVT_F64_F32_e32 3, implicit $exec, implicit $mode
; GCN-NEXT: S_NOP 0, implicit [[V_CVT_F64_F32_e32_]]
; GCN-NEXT: S_NOP 0, implicit [[V_CVT_F64_F32_e32_1]]
; GCN-NEXT: S_NOP 0, implicit [[V_CVT_F64_F32_e32_2]]
; GCN-NEXT: S_ENDPGM 0
%0:vreg_64_align2 = nofpexcept V_CVT_F64_F32_e32 1, implicit $exec, implicit $mode
%1:vreg_64_align2 = nofpexcept V_CVT_F64_F32_e32 2, implicit $exec, implicit $mode
%2:vreg_64_align2 = nofpexcept V_CVT_F64_F32_e32 3, implicit $exec, implicit $mode
S_NOP 0, implicit %0
S_NOP 0, implicit %1
S_NOP 0, implicit %2
S_ENDPGM 0
...
---
name: test_remat_v_cvt_u32_f64_e32
tracksRegLiveness: true
body: |
bb.0:
; GCN-LABEL: name: test_remat_v_cvt_u32_f64_e32
; GCN: [[V_CVT_U32_F64_e32_:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_U32_F64_e32 1, implicit $exec, implicit $mode
; GCN-NEXT: [[V_CVT_U32_F64_e32_1:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_U32_F64_e32 2, implicit $exec, implicit $mode
; GCN-NEXT: [[V_CVT_U32_F64_e32_2:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_U32_F64_e32 3, implicit $exec, implicit $mode
; GCN-NEXT: S_NOP 0, implicit [[V_CVT_U32_F64_e32_]]
; GCN-NEXT: S_NOP 0, implicit [[V_CVT_U32_F64_e32_1]]
; GCN-NEXT: S_NOP 0, implicit [[V_CVT_U32_F64_e32_2]]
; GCN-NEXT: S_ENDPGM 0
%0:vgpr_32 = nofpexcept V_CVT_U32_F64_e32 1, implicit $exec, implicit $mode
%1:vgpr_32 = nofpexcept V_CVT_U32_F64_e32 2, implicit $exec, implicit $mode
%2:vgpr_32 = nofpexcept V_CVT_U32_F64_e32 3, implicit $exec, implicit $mode
S_NOP 0, implicit %0
S_NOP 0, implicit %1
S_NOP 0, implicit %2
S_ENDPGM 0
...
---
name: test_remat_v_cvt_f64_u32_e32
tracksRegLiveness: true
body: |
bb.0:
; GCN-LABEL: name: test_remat_v_cvt_f64_u32_e32
; GCN: [[V_CVT_F64_U32_e32_:%[0-9]+]]:vreg_64_align2 = V_CVT_F64_U32_e32 1, implicit $exec, implicit $mode
; GCN-NEXT: [[V_CVT_F64_U32_e32_1:%[0-9]+]]:vreg_64_align2 = V_CVT_F64_U32_e32 2, implicit $exec, implicit $mode
; GCN-NEXT: [[V_CVT_F64_U32_e32_2:%[0-9]+]]:vreg_64_align2 = V_CVT_F64_U32_e32 3, implicit $exec, implicit $mode
; GCN-NEXT: S_NOP 0, implicit [[V_CVT_F64_U32_e32_]]
; GCN-NEXT: S_NOP 0, implicit [[V_CVT_F64_U32_e32_1]]
; GCN-NEXT: S_NOP 0, implicit [[V_CVT_F64_U32_e32_2]]
; GCN-NEXT: S_ENDPGM 0
%0:vreg_64_align2 = V_CVT_F64_U32_e32 1, implicit $exec, implicit $mode
%1:vreg_64_align2 = V_CVT_F64_U32_e32 2, implicit $exec, implicit $mode
%2:vreg_64_align2 = V_CVT_F64_U32_e32 3, implicit $exec, implicit $mode
S_NOP 0, implicit %0
S_NOP 0, implicit %1
S_NOP 0, implicit %2
S_ENDPGM 0
...
---
name: test_remat_v_cvt_f32_i32_e32
tracksRegLiveness: true
body: |
bb.0:
; GCN-LABEL: name: test_remat_v_cvt_f32_i32_e32
; GCN: [[V_CVT_F32_I32_e32_:%[0-9]+]]:vgpr_32 = V_CVT_F32_I32_e32 1, implicit $exec, implicit $mode
; GCN-NEXT: [[V_CVT_F32_I32_e32_1:%[0-9]+]]:vgpr_32 = V_CVT_F32_I32_e32 2, implicit $exec, implicit $mode
; GCN-NEXT: [[V_CVT_F32_I32_e32_2:%[0-9]+]]:vgpr_32 = V_CVT_F32_I32_e32 3, implicit $exec, implicit $mode
; GCN-NEXT: S_NOP 0, implicit [[V_CVT_F32_I32_e32_]]
; GCN-NEXT: S_NOP 0, implicit [[V_CVT_F32_I32_e32_1]]
; GCN-NEXT: S_NOP 0, implicit [[V_CVT_F32_I32_e32_2]]
; GCN-NEXT: S_ENDPGM 0
%0:vgpr_32 = V_CVT_F32_I32_e32 1, implicit $exec, implicit $mode
%1:vgpr_32 = V_CVT_F32_I32_e32 2, implicit $exec, implicit $mode
%2:vgpr_32 = V_CVT_F32_I32_e32 3, implicit $exec, implicit $mode
S_NOP 0, implicit %0
S_NOP 0, implicit %1
S_NOP 0, implicit %2
S_ENDPGM 0
...
---
name: test_remat_v_cvt_f32_i32_sdwa
tracksRegLiveness: true
body: |
bb.0:
; GCN-LABEL: name: test_remat_v_cvt_f32_i32_sdwa
; GCN: [[V_CVT_F32_I32_sdwa:%[0-9]+]]:vgpr_32 = V_CVT_F32_I32_sdwa 0, undef %1:vgpr_32, 0, 0, 0, 0, 0, implicit $exec, implicit $mode
; GCN-NEXT: [[V_CVT_F32_I32_sdwa1:%[0-9]+]]:vgpr_32 = V_CVT_F32_I32_sdwa 0, undef %1:vgpr_32, 0, 0, 0, 0, 0, implicit $exec, implicit $mode
; GCN-NEXT: [[V_CVT_F32_I32_sdwa2:%[0-9]+]]:vgpr_32 = V_CVT_F32_I32_sdwa 0, undef %1:vgpr_32, 0, 0, 0, 0, 0, implicit $exec, implicit $mode
; GCN-NEXT: S_NOP 0, implicit [[V_CVT_F32_I32_sdwa]]
; GCN-NEXT: S_NOP 0, implicit [[V_CVT_F32_I32_sdwa1]]
; GCN-NEXT: S_NOP 0, implicit [[V_CVT_F32_I32_sdwa2]]
; GCN-NEXT: S_ENDPGM 0
%1:vgpr_32 = V_CVT_F32_I32_sdwa 0, undef %0:vgpr_32, 0, 0, 0, 0, 0, implicit $exec, implicit $mode
%2:vgpr_32 = V_CVT_F32_I32_sdwa 0, undef %0:vgpr_32, 0, 0, 0, 0, 0, implicit $exec, implicit $mode
%3:vgpr_32 = V_CVT_F32_I32_sdwa 0, undef %0:vgpr_32, 0, 0, 0, 0, 0, implicit $exec, implicit $mode
S_NOP 0, implicit %1
S_NOP 0, implicit %2
S_NOP 0, implicit %3
S_ENDPGM 0
...
---
# SDWA instruction with UNUSED_PRESERVE cannot be rematerialized due to partial
# dst write. This is handled because it always has a tied-def implicit operand.
name: test_no_remat_v_cvt_f32_i32_sdwa_dst_unused_preserve
tracksRegLiveness: true
machineFunctionInfo:
stackPtrOffsetReg: $sgpr32
body: |
bb.0:
; GCN-LABEL: name: test_no_remat_v_cvt_f32_i32_sdwa_dst_unused_preserve
; GCN: [[V_CVT_F32_I32_sdwa:%[0-9]+]]:vgpr_32 = V_CVT_F32_I32_sdwa 0, undef %1:vgpr_32, 0, 0, 0, 2, 0, implicit $exec, implicit $mode, implicit undef [[V_CVT_F32_I32_sdwa]](tied-def 0)
; GCN-NEXT: [[V_CVT_F32_I32_sdwa1:%[0-9]+]]:vgpr_32 = V_CVT_F32_I32_sdwa 0, undef %1:vgpr_32, 0, 0, 0, 2, 0, implicit $exec, implicit $mode, implicit undef [[V_CVT_F32_I32_sdwa1]](tied-def 0)
; GCN-NEXT: [[V_CVT_F32_I32_sdwa2:%[0-9]+]]:vgpr_32 = V_CVT_F32_I32_sdwa 0, undef %1:vgpr_32, 0, 0, 0, 2, 0, implicit $exec, implicit $mode, implicit undef [[V_CVT_F32_I32_sdwa2]](tied-def 0)
; GCN-NEXT: S_NOP 0, implicit [[V_CVT_F32_I32_sdwa]]
; GCN-NEXT: S_NOP 0, implicit [[V_CVT_F32_I32_sdwa1]]
; GCN-NEXT: S_NOP 0, implicit [[V_CVT_F32_I32_sdwa2]]
; GCN-NEXT: S_ENDPGM 0
%1:vgpr_32 = V_CVT_F32_I32_sdwa 0, undef %0:vgpr_32, 0, 0, 0, 2, 0, implicit $exec, implicit $mode, implicit undef %1:vgpr_32(tied-def 0)
%2:vgpr_32 = V_CVT_F32_I32_sdwa 0, undef %0:vgpr_32, 0, 0, 0, 2, 0, implicit $exec, implicit $mode, implicit undef %2:vgpr_32(tied-def 0)
%3:vgpr_32 = V_CVT_F32_I32_sdwa 0, undef %0:vgpr_32, 0, 0, 0, 2, 0, implicit $exec, implicit $mode, implicit undef %3:vgpr_32(tied-def 0)
S_NOP 0, implicit %1
S_NOP 0, implicit %2
S_NOP 0, implicit %3
S_ENDPGM 0
...
---
name: test_remat_v_cvt_f32_u32_e32
tracksRegLiveness: true
body: |
bb.0:
; GCN-LABEL: name: test_remat_v_cvt_f32_u32_e32
; GCN: [[V_CVT_F32_U32_e32_:%[0-9]+]]:vgpr_32 = V_CVT_F32_U32_e32 1, implicit $exec, implicit $mode
; GCN-NEXT: [[V_CVT_F32_U32_e32_1:%[0-9]+]]:vgpr_32 = V_CVT_F32_U32_e32 2, implicit $exec, implicit $mode
; GCN-NEXT: [[V_CVT_F32_U32_e32_2:%[0-9]+]]:vgpr_32 = V_CVT_F32_U32_e32 3, implicit $exec, implicit $mode
; GCN-NEXT: S_NOP 0, implicit [[V_CVT_F32_U32_e32_]]
; GCN-NEXT: S_NOP 0, implicit [[V_CVT_F32_U32_e32_1]]
; GCN-NEXT: S_NOP 0, implicit [[V_CVT_F32_U32_e32_2]]
; GCN-NEXT: S_ENDPGM 0
%0:vgpr_32 = V_CVT_F32_U32_e32 1, implicit $exec, implicit $mode
%1:vgpr_32 = V_CVT_F32_U32_e32 2, implicit $exec, implicit $mode
%2:vgpr_32 = V_CVT_F32_U32_e32 3, implicit $exec, implicit $mode
S_NOP 0, implicit %0
S_NOP 0, implicit %1
S_NOP 0, implicit %2
S_ENDPGM 0
...
---
name: test_remat_v_cvt_u32_f32_e32
tracksRegLiveness: true
body: |
bb.0:
; GCN-LABEL: name: test_remat_v_cvt_u32_f32_e32
; GCN: [[V_CVT_U32_F32_e32_:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_U32_F32_e32 1, implicit $exec, implicit $mode
; GCN-NEXT: [[V_CVT_U32_F32_e32_1:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_U32_F32_e32 2, implicit $exec, implicit $mode
; GCN-NEXT: [[V_CVT_U32_F32_e32_2:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_U32_F32_e32 3, implicit $exec, implicit $mode
; GCN-NEXT: S_NOP 0, implicit [[V_CVT_U32_F32_e32_]]
; GCN-NEXT: S_NOP 0, implicit [[V_CVT_U32_F32_e32_1]]
; GCN-NEXT: S_NOP 0, implicit [[V_CVT_U32_F32_e32_2]]
; GCN-NEXT: S_ENDPGM 0
%0:vgpr_32 = nofpexcept V_CVT_U32_F32_e32 1, implicit $exec, implicit $mode
%1:vgpr_32 = nofpexcept V_CVT_U32_F32_e32 2, implicit $exec, implicit $mode
%2:vgpr_32 = nofpexcept V_CVT_U32_F32_e32 3, implicit $exec, implicit $mode
S_NOP 0, implicit %0
S_NOP 0, implicit %1
S_NOP 0, implicit %2
S_ENDPGM 0
...
---
name: test_remat_v_cvt_i32_f32_e32
tracksRegLiveness: true
body: |
bb.0:
; GCN-LABEL: name: test_remat_v_cvt_i32_f32_e32
; GCN: [[V_CVT_I32_F32_e32_:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F32_e32 1, implicit $exec, implicit $mode
; GCN-NEXT: [[V_CVT_I32_F32_e32_1:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F32_e32 2, implicit $exec, implicit $mode
; GCN-NEXT: [[V_CVT_I32_F32_e32_2:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F32_e32 3, implicit $exec, implicit $mode
; GCN-NEXT: S_NOP 0, implicit [[V_CVT_I32_F32_e32_]]
; GCN-NEXT: S_NOP 0, implicit [[V_CVT_I32_F32_e32_1]]
; GCN-NEXT: S_NOP 0, implicit [[V_CVT_I32_F32_e32_2]]
; GCN-NEXT: S_ENDPGM 0
%0:vgpr_32 = nofpexcept V_CVT_I32_F32_e32 1, implicit $exec, implicit $mode
%1:vgpr_32 = nofpexcept V_CVT_I32_F32_e32 2, implicit $exec, implicit $mode
%2:vgpr_32 = nofpexcept V_CVT_I32_F32_e32 3, implicit $exec, implicit $mode
S_NOP 0, implicit %0
S_NOP 0, implicit %1
S_NOP 0, implicit %2
S_ENDPGM 0
...
---
name: test_remat_v_cvt_f32_f16_e32
tracksRegLiveness: true
body: |
bb.0:
; GCN-LABEL: name: test_remat_v_cvt_f32_f16_e32
; GCN: [[V_CVT_F32_F16_e32_:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_F32_F16_e32 1, implicit $exec, implicit $mode
; GCN-NEXT: [[V_CVT_F32_F16_e32_1:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_F32_F16_e32 2, implicit $exec, implicit $mode
; GCN-NEXT: [[V_CVT_F32_F16_e32_2:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_F32_F16_e32 3, implicit $exec, implicit $mode
; GCN-NEXT: S_NOP 0, implicit [[V_CVT_F32_F16_e32_]]
; GCN-NEXT: S_NOP 0, implicit [[V_CVT_F32_F16_e32_1]]
; GCN-NEXT: S_NOP 0, implicit [[V_CVT_F32_F16_e32_2]]
; GCN-NEXT: S_ENDPGM 0
%0:vgpr_32 = nofpexcept V_CVT_F32_F16_e32 1, implicit $exec, implicit $mode
%1:vgpr_32 = nofpexcept V_CVT_F32_F16_e32 2, implicit $exec, implicit $mode
%2:vgpr_32 = nofpexcept V_CVT_F32_F16_e32 3, implicit $exec, implicit $mode
S_NOP 0, implicit %0
S_NOP 0, implicit %1
S_NOP 0, implicit %2
S_ENDPGM 0
...
---
name: test_remat_v_cvt_rpi_i32_f32_e32
tracksRegLiveness: true
body: |
bb.0:
; GCN-LABEL: name: test_remat_v_cvt_rpi_i32_f32_e32
; GCN: [[V_CVT_RPI_I32_F32_e32_:%[0-9]+]]:vgpr_32 = V_CVT_RPI_I32_F32_e32 1, implicit $exec, implicit $mode
; GCN-NEXT: [[V_CVT_RPI_I32_F32_e32_1:%[0-9]+]]:vgpr_32 = V_CVT_RPI_I32_F32_e32 2, implicit $exec, implicit $mode
; GCN-NEXT: [[V_CVT_RPI_I32_F32_e32_2:%[0-9]+]]:vgpr_32 = V_CVT_RPI_I32_F32_e32 3, implicit $exec, implicit $mode
; GCN-NEXT: S_NOP 0, implicit [[V_CVT_RPI_I32_F32_e32_]]
; GCN-NEXT: S_NOP 0, implicit [[V_CVT_RPI_I32_F32_e32_1]]
; GCN-NEXT: S_NOP 0, implicit [[V_CVT_RPI_I32_F32_e32_2]]
; GCN-NEXT: S_ENDPGM 0
%0:vgpr_32 = V_CVT_RPI_I32_F32_e32 1, implicit $exec, implicit $mode
%1:vgpr_32 = V_CVT_RPI_I32_F32_e32 2, implicit $exec, implicit $mode
%2:vgpr_32 = V_CVT_RPI_I32_F32_e32 3, implicit $exec, implicit $mode
S_NOP 0, implicit %0
S_NOP 0, implicit %1
S_NOP 0, implicit %2
S_ENDPGM 0
...
---
name: test_remat_v_cvt_flr_i32_f32_e32
tracksRegLiveness: true
body: |
bb.0:
; GCN-LABEL: name: test_remat_v_cvt_flr_i32_f32_e32
; GCN: [[V_CVT_FLR_I32_F32_e32_:%[0-9]+]]:vgpr_32 = V_CVT_FLR_I32_F32_e32 1, implicit $exec, implicit $mode
; GCN-NEXT: [[V_CVT_FLR_I32_F32_e32_1:%[0-9]+]]:vgpr_32 = V_CVT_FLR_I32_F32_e32 2, implicit $exec, implicit $mode
; GCN-NEXT: [[V_CVT_FLR_I32_F32_e32_2:%[0-9]+]]:vgpr_32 = V_CVT_FLR_I32_F32_e32 3, implicit $exec, implicit $mode
; GCN-NEXT: S_NOP 0, implicit [[V_CVT_FLR_I32_F32_e32_]]
; GCN-NEXT: S_NOP 0, implicit [[V_CVT_FLR_I32_F32_e32_1]]
; GCN-NEXT: S_NOP 0, implicit [[V_CVT_FLR_I32_F32_e32_2]]
; GCN-NEXT: S_ENDPGM 0
%0:vgpr_32 = V_CVT_FLR_I32_F32_e32 1, implicit $exec, implicit $mode
%1:vgpr_32 = V_CVT_FLR_I32_F32_e32 2, implicit $exec, implicit $mode
%2:vgpr_32 = V_CVT_FLR_I32_F32_e32 3, implicit $exec, implicit $mode
S_NOP 0, implicit %0
S_NOP 0, implicit %1
S_NOP 0, implicit %2
S_ENDPGM 0
...
---
name: test_remat_v_cvt_off_f32_i4_e32
tracksRegLiveness: true
body: |
bb.0:
; GCN-LABEL: name: test_remat_v_cvt_off_f32_i4_e32
; GCN: [[V_CVT_OFF_F32_I4_e32_:%[0-9]+]]:vgpr_32 = V_CVT_OFF_F32_I4_e32 1, implicit $exec, implicit $mode
; GCN-NEXT: [[V_CVT_OFF_F32_I4_e32_1:%[0-9]+]]:vgpr_32 = V_CVT_OFF_F32_I4_e32 2, implicit $exec, implicit $mode
; GCN-NEXT: [[V_CVT_OFF_F32_I4_e32_2:%[0-9]+]]:vgpr_32 = V_CVT_OFF_F32_I4_e32 3, implicit $exec, implicit $mode
; GCN-NEXT: S_NOP 0, implicit [[V_CVT_OFF_F32_I4_e32_]]
; GCN-NEXT: S_NOP 0, implicit [[V_CVT_OFF_F32_I4_e32_1]]
; GCN-NEXT: S_NOP 0, implicit [[V_CVT_OFF_F32_I4_e32_2]]
; GCN-NEXT: S_ENDPGM 0
%0:vgpr_32 = V_CVT_OFF_F32_I4_e32 1, implicit $exec, implicit $mode
%1:vgpr_32 = V_CVT_OFF_F32_I4_e32 2, implicit $exec, implicit $mode
%2:vgpr_32 = V_CVT_OFF_F32_I4_e32 3, implicit $exec, implicit $mode
S_NOP 0, implicit %0
S_NOP 0, implicit %1
S_NOP 0, implicit %2
S_ENDPGM 0
...
---
name: test_remat_v_cvt_f32_ubyte0_e32
tracksRegLiveness: true
body: |
bb.0:
; GCN-LABEL: name: test_remat_v_cvt_f32_ubyte0_e32
; GCN: [[V_CVT_F32_UBYTE0_e32_:%[0-9]+]]:vgpr_32 = V_CVT_F32_UBYTE0_e32 1, implicit $exec, implicit $mode
; GCN-NEXT: [[V_CVT_F32_UBYTE0_e32_1:%[0-9]+]]:vgpr_32 = V_CVT_F32_UBYTE0_e32 2, implicit $exec, implicit $mode
; GCN-NEXT: [[V_CVT_F32_UBYTE0_e32_2:%[0-9]+]]:vgpr_32 = V_CVT_F32_UBYTE0_e32 3, implicit $exec, implicit $mode
; GCN-NEXT: S_NOP 0, implicit [[V_CVT_F32_UBYTE0_e32_]]
; GCN-NEXT: S_NOP 0, implicit [[V_CVT_F32_UBYTE0_e32_1]]
; GCN-NEXT: S_NOP 0, implicit [[V_CVT_F32_UBYTE0_e32_2]]
; GCN-NEXT: S_ENDPGM 0
%0:vgpr_32 = V_CVT_F32_UBYTE0_e32 1, implicit $exec, implicit $mode
%1:vgpr_32 = V_CVT_F32_UBYTE0_e32 2, implicit $exec, implicit $mode
%2:vgpr_32 = V_CVT_F32_UBYTE0_e32 3, implicit $exec, implicit $mode
S_NOP 0, implicit %0
S_NOP 0, implicit %1
S_NOP 0, implicit %2
S_ENDPGM 0
...
---
name: test_remat_v_fract_f32_e32
tracksRegLiveness: true
body: |
bb.0:
; GCN-LABEL: name: test_remat_v_fract_f32_e32
; GCN: [[V_FRACT_F32_e32_:%[0-9]+]]:vgpr_32 = nofpexcept V_FRACT_F32_e32 1, implicit $exec, implicit $mode
; GCN-NEXT: [[V_FRACT_F32_e32_1:%[0-9]+]]:vgpr_32 = nofpexcept V_FRACT_F32_e32 2, implicit $exec, implicit $mode
; GCN-NEXT: [[V_FRACT_F32_e32_2:%[0-9]+]]:vgpr_32 = nofpexcept V_FRACT_F32_e32 3, implicit $exec, implicit $mode
; GCN-NEXT: S_NOP 0, implicit [[V_FRACT_F32_e32_]]
; GCN-NEXT: S_NOP 0, implicit [[V_FRACT_F32_e32_1]]
; GCN-NEXT: S_NOP 0, implicit [[V_FRACT_F32_e32_2]]
; GCN-NEXT: S_ENDPGM 0
%0:vgpr_32 = nofpexcept V_FRACT_F32_e32 1, implicit $exec, implicit $mode
%1:vgpr_32 = nofpexcept V_FRACT_F32_e32 2, implicit $exec, implicit $mode
%2:vgpr_32 = nofpexcept V_FRACT_F32_e32 3, implicit $exec, implicit $mode
S_NOP 0, implicit %0
S_NOP 0, implicit %1
S_NOP 0, implicit %2
S_ENDPGM 0
...
---
name: test_remat_v_trunc_f32_e32
tracksRegLiveness: true
body: |
bb.0:
; GCN-LABEL: name: test_remat_v_trunc_f32_e32
; GCN: [[V_TRUNC_F32_e32_:%[0-9]+]]:vgpr_32 = nofpexcept V_TRUNC_F32_e32 1, implicit $exec, implicit $mode
; GCN-NEXT: [[V_TRUNC_F32_e32_1:%[0-9]+]]:vgpr_32 = nofpexcept V_TRUNC_F32_e32 2, implicit $exec, implicit $mode
; GCN-NEXT: [[V_TRUNC_F32_e32_2:%[0-9]+]]:vgpr_32 = nofpexcept V_TRUNC_F32_e32 3, implicit $exec, implicit $mode
; GCN-NEXT: S_NOP 0, implicit [[V_TRUNC_F32_e32_]]
; GCN-NEXT: S_NOP 0, implicit [[V_TRUNC_F32_e32_1]]
; GCN-NEXT: S_NOP 0, implicit [[V_TRUNC_F32_e32_2]]
; GCN-NEXT: S_ENDPGM 0
%0:vgpr_32 = nofpexcept V_TRUNC_F32_e32 1, implicit $exec, implicit $mode
%1:vgpr_32 = nofpexcept V_TRUNC_F32_e32 2, implicit $exec, implicit $mode
%2:vgpr_32 = nofpexcept V_TRUNC_F32_e32 3, implicit $exec, implicit $mode
S_NOP 0, implicit %0
S_NOP 0, implicit %1
S_NOP 0, implicit %2
S_ENDPGM 0
...
---
name: test_remat_v_ceil_f32_e32
tracksRegLiveness: true
body: |
bb.0:
; GCN-LABEL: name: test_remat_v_ceil_f32_e32
; GCN: [[V_CEIL_F32_e32_:%[0-9]+]]:vgpr_32 = nofpexcept V_CEIL_F32_e32 1, implicit $exec, implicit $mode
; GCN-NEXT: [[V_CEIL_F32_e32_1:%[0-9]+]]:vgpr_32 = nofpexcept V_CEIL_F32_e32 2, implicit $exec, implicit $mode
; GCN-NEXT: [[V_CEIL_F32_e32_2:%[0-9]+]]:vgpr_32 = nofpexcept V_CEIL_F32_e32 3, implicit $exec, implicit $mode
; GCN-NEXT: S_NOP 0, implicit [[V_CEIL_F32_e32_]]
; GCN-NEXT: S_NOP 0, implicit [[V_CEIL_F32_e32_1]]
; GCN-NEXT: S_NOP 0, implicit [[V_CEIL_F32_e32_2]]
; GCN-NEXT: S_ENDPGM 0
%0:vgpr_32 = nofpexcept V_CEIL_F32_e32 1, implicit $exec, implicit $mode
%1:vgpr_32 = nofpexcept V_CEIL_F32_e32 2, implicit $exec, implicit $mode
%2:vgpr_32 = nofpexcept V_CEIL_F32_e32 3, implicit $exec, implicit $mode
S_NOP 0, implicit %0
S_NOP 0, implicit %1
S_NOP 0, implicit %2
S_ENDPGM 0
...
---
name: test_remat_v_rndne_f32_e32
tracksRegLiveness: true
body: |
bb.0:
; GCN-LABEL: name: test_remat_v_rndne_f32_e32
; GCN: [[V_RNDNE_F32_e32_:%[0-9]+]]:vgpr_32 = nofpexcept V_RNDNE_F32_e32 1, implicit $exec, implicit $mode
; GCN-NEXT: [[V_RNDNE_F32_e32_1:%[0-9]+]]:vgpr_32 = nofpexcept V_RNDNE_F32_e32 2, implicit $exec, implicit $mode
; GCN-NEXT: [[V_RNDNE_F32_e32_2:%[0-9]+]]:vgpr_32 = nofpexcept V_RNDNE_F32_e32 3, implicit $exec, implicit $mode
; GCN-NEXT: S_NOP 0, implicit [[V_RNDNE_F32_e32_]]
; GCN-NEXT: S_NOP 0, implicit [[V_RNDNE_F32_e32_1]]
; GCN-NEXT: S_NOP 0, implicit [[V_RNDNE_F32_e32_2]]
; GCN-NEXT: S_ENDPGM 0
%0:vgpr_32 = nofpexcept V_RNDNE_F32_e32 1, implicit $exec, implicit $mode
%1:vgpr_32 = nofpexcept V_RNDNE_F32_e32 2, implicit $exec, implicit $mode
%2:vgpr_32 = nofpexcept V_RNDNE_F32_e32 3, implicit $exec, implicit $mode
S_NOP 0, implicit %0
S_NOP 0, implicit %1
S_NOP 0, implicit %2
S_ENDPGM 0
...
---
name: test_remat_v_floor_f32_e32
tracksRegLiveness: true
body: |
bb.0:
; GCN-LABEL: name: test_remat_v_floor_f32_e32
; GCN: [[V_FLOOR_F32_e32_:%[0-9]+]]:vgpr_32 = nofpexcept V_FLOOR_F32_e32 1, implicit $exec, implicit $mode
; GCN-NEXT: [[V_FLOOR_F32_e32_1:%[0-9]+]]:vgpr_32 = nofpexcept V_FLOOR_F32_e32 2, implicit $exec, implicit $mode
; GCN-NEXT: [[V_FLOOR_F32_e32_2:%[0-9]+]]:vgpr_32 = nofpexcept V_FLOOR_F32_e32 3, implicit $exec, implicit $mode
; GCN-NEXT: S_NOP 0, implicit [[V_FLOOR_F32_e32_]]
; GCN-NEXT: S_NOP 0, implicit [[V_FLOOR_F32_e32_1]]
; GCN-NEXT: S_NOP 0, implicit [[V_FLOOR_F32_e32_2]]
; GCN-NEXT: S_ENDPGM 0
%0:vgpr_32 = nofpexcept V_FLOOR_F32_e32 1, implicit $exec, implicit $mode
%1:vgpr_32 = nofpexcept V_FLOOR_F32_e32 2, implicit $exec, implicit $mode
%2:vgpr_32 = nofpexcept V_FLOOR_F32_e32 3, implicit $exec, implicit $mode
S_NOP 0, implicit %0
S_NOP 0, implicit %1
S_NOP 0, implicit %2
S_ENDPGM 0
...
---
name: test_remat_v_exp_f32_e32
tracksRegLiveness: true
body: |
bb.0:
; GCN-LABEL: name: test_remat_v_exp_f32_e32
; GCN: [[V_EXP_F32_e32_:%[0-9]+]]:vgpr_32 = nofpexcept V_EXP_F32_e32 1, implicit $exec, implicit $mode
; GCN-NEXT: [[V_EXP_F32_e32_1:%[0-9]+]]:vgpr_32 = nofpexcept V_EXP_F32_e32 2, implicit $exec, implicit $mode
; GCN-NEXT: [[V_EXP_F32_e32_2:%[0-9]+]]:vgpr_32 = nofpexcept V_EXP_F32_e32 3, implicit $exec, implicit $mode
; GCN-NEXT: S_NOP 0, implicit [[V_EXP_F32_e32_]]
; GCN-NEXT: S_NOP 0, implicit [[V_EXP_F32_e32_1]]
; GCN-NEXT: S_NOP 0, implicit [[V_EXP_F32_e32_2]]
; GCN-NEXT: S_ENDPGM 0
%0:vgpr_32 = nofpexcept V_EXP_F32_e32 1, implicit $exec, implicit $mode
%1:vgpr_32 = nofpexcept V_EXP_F32_e32 2, implicit $exec, implicit $mode
%2:vgpr_32 = nofpexcept V_EXP_F32_e32 3, implicit $exec, implicit $mode
S_NOP 0, implicit %0
S_NOP 0, implicit %1
S_NOP 0, implicit %2
S_ENDPGM 0
...
---
name: test_remat_v_log_f32_e32
tracksRegLiveness: true
body: |
bb.0:
; GCN-LABEL: name: test_remat_v_log_f32_e32
; GCN: [[V_LOG_F32_e32_:%[0-9]+]]:vgpr_32 = nofpexcept V_LOG_F32_e32 1, implicit $exec, implicit $mode
; GCN-NEXT: [[V_LOG_F32_e32_1:%[0-9]+]]:vgpr_32 = nofpexcept V_LOG_F32_e32 2, implicit $exec, implicit $mode
; GCN-NEXT: [[V_LOG_F32_e32_2:%[0-9]+]]:vgpr_32 = nofpexcept V_LOG_F32_e32 3, implicit $exec, implicit $mode
; GCN-NEXT: S_NOP 0, implicit [[V_LOG_F32_e32_]]
; GCN-NEXT: S_NOP 0, implicit [[V_LOG_F32_e32_1]]
; GCN-NEXT: S_NOP 0, implicit [[V_LOG_F32_e32_2]]
; GCN-NEXT: S_ENDPGM 0
%0:vgpr_32 = nofpexcept V_LOG_F32_e32 1, implicit $exec, implicit $mode
%1:vgpr_32 = nofpexcept V_LOG_F32_e32 2, implicit $exec, implicit $mode
%2:vgpr_32 = nofpexcept V_LOG_F32_e32 3, implicit $exec, implicit $mode
S_NOP 0, implicit %0
S_NOP 0, implicit %1
S_NOP 0, implicit %2
S_ENDPGM 0
...
---
name: test_remat_v_rcp_f32_e32
tracksRegLiveness: true
body: |
bb.0:
; GCN-LABEL: name: test_remat_v_rcp_f32_e32
; GCN: [[V_RCP_F32_e32_:%[0-9]+]]:vgpr_32 = nofpexcept V_RCP_F32_e32 1, implicit $exec, implicit $mode
; GCN-NEXT: [[V_RCP_F32_e32_1:%[0-9]+]]:vgpr_32 = nofpexcept V_RCP_F32_e32 2, implicit $exec, implicit $mode
; GCN-NEXT: [[V_RCP_F32_e32_2:%[0-9]+]]:vgpr_32 = nofpexcept V_RCP_F32_e32 3, implicit $exec, implicit $mode
; GCN-NEXT: S_NOP 0, implicit [[V_RCP_F32_e32_]]
; GCN-NEXT: S_NOP 0, implicit [[V_RCP_F32_e32_1]]
; GCN-NEXT: S_NOP 0, implicit [[V_RCP_F32_e32_2]]
; GCN-NEXT: S_ENDPGM 0
%0:vgpr_32 = nofpexcept V_RCP_F32_e32 1, implicit $exec, implicit $mode
%1:vgpr_32 = nofpexcept V_RCP_F32_e32 2, implicit $exec, implicit $mode
%2:vgpr_32 = nofpexcept V_RCP_F32_e32 3, implicit $exec, implicit $mode
S_NOP 0, implicit %0
S_NOP 0, implicit %1
S_NOP 0, implicit %2
S_ENDPGM 0
...
---
name: test_remat_v_rcp_iflag_f32_e32
tracksRegLiveness: true
body: |
bb.0:
; GCN-LABEL: name: test_remat_v_rcp_iflag_f32_e32
; GCN: [[V_RCP_IFLAG_F32_e32_:%[0-9]+]]:vgpr_32 = nofpexcept V_RCP_IFLAG_F32_e32 1, implicit $exec, implicit $mode
; GCN-NEXT: [[V_RCP_IFLAG_F32_e32_1:%[0-9]+]]:vgpr_32 = nofpexcept V_RCP_IFLAG_F32_e32 2, implicit $exec, implicit $mode
; GCN-NEXT: [[V_RCP_IFLAG_F32_e32_2:%[0-9]+]]:vgpr_32 = nofpexcept V_RCP_IFLAG_F32_e32 3, implicit $exec, implicit $mode
; GCN-NEXT: S_NOP 0, implicit [[V_RCP_IFLAG_F32_e32_]]
; GCN-NEXT: S_NOP 0, implicit [[V_RCP_IFLAG_F32_e32_1]]
; GCN-NEXT: S_NOP 0, implicit [[V_RCP_IFLAG_F32_e32_2]]
; GCN-NEXT: S_ENDPGM 0
%0:vgpr_32 = nofpexcept V_RCP_IFLAG_F32_e32 1, implicit $exec, implicit $mode
%1:vgpr_32 = nofpexcept V_RCP_IFLAG_F32_e32 2, implicit $exec, implicit $mode
%2:vgpr_32 = nofpexcept V_RCP_IFLAG_F32_e32 3, implicit $exec, implicit $mode
S_NOP 0, implicit %0
S_NOP 0, implicit %1
S_NOP 0, implicit %2
S_ENDPGM 0
...
---
name: test_remat_v_rsq_f32_e32
tracksRegLiveness: true
body: |
bb.0:
; GCN-LABEL: name: test_remat_v_rsq_f32_e32
; GCN: [[V_RSQ_F32_e32_:%[0-9]+]]:vgpr_32 = nofpexcept V_RSQ_F32_e32 1, implicit $exec, implicit $mode
; GCN-NEXT: [[V_RSQ_F32_e32_1:%[0-9]+]]:vgpr_32 = nofpexcept V_RSQ_F32_e32 2, implicit $exec, implicit $mode
; GCN-NEXT: [[V_RSQ_F32_e32_2:%[0-9]+]]:vgpr_32 = nofpexcept V_RSQ_F32_e32 3, implicit $exec, implicit $mode
; GCN-NEXT: S_NOP 0, implicit [[V_RSQ_F32_e32_]]
; GCN-NEXT: S_NOP 0, implicit [[V_RSQ_F32_e32_1]]
; GCN-NEXT: S_NOP 0, implicit [[V_RSQ_F32_e32_2]]
; GCN-NEXT: S_ENDPGM 0
%0:vgpr_32 = nofpexcept V_RSQ_F32_e32 1, implicit $exec, implicit $mode
%1:vgpr_32 = nofpexcept V_RSQ_F32_e32 2, implicit $exec, implicit $mode
%2:vgpr_32 = nofpexcept V_RSQ_F32_e32 3, implicit $exec, implicit $mode
S_NOP 0, implicit %0
S_NOP 0, implicit %1
S_NOP 0, implicit %2
S_ENDPGM 0
...
---
name: test_remat_v_sqrt_f32_e32
tracksRegLiveness: true
body: |
bb.0:
; GCN-LABEL: name: test_remat_v_sqrt_f32_e32
; GCN: [[V_SQRT_F32_e32_:%[0-9]+]]:vgpr_32 = nofpexcept V_SQRT_F32_e32 1, implicit $exec, implicit $mode
; GCN-NEXT: [[V_SQRT_F32_e32_1:%[0-9]+]]:vgpr_32 = nofpexcept V_SQRT_F32_e32 2, implicit $exec, implicit $mode
; GCN-NEXT: [[V_SQRT_F32_e32_2:%[0-9]+]]:vgpr_32 = nofpexcept V_SQRT_F32_e32 3, implicit $exec, implicit $mode
; GCN-NEXT: S_NOP 0, implicit [[V_SQRT_F32_e32_]]
; GCN-NEXT: S_NOP 0, implicit [[V_SQRT_F32_e32_1]]
; GCN-NEXT: S_NOP 0, implicit [[V_SQRT_F32_e32_2]]
; GCN-NEXT: S_ENDPGM 0
%0:vgpr_32 = nofpexcept V_SQRT_F32_e32 1, implicit $exec, implicit $mode
%1:vgpr_32 = nofpexcept V_SQRT_F32_e32 2, implicit $exec, implicit $mode
%2:vgpr_32 = nofpexcept V_SQRT_F32_e32 3, implicit $exec, implicit $mode
S_NOP 0, implicit %0
S_NOP 0, implicit %1
S_NOP 0, implicit %2
S_ENDPGM 0
...
---
name: test_remat_v_rcp_f64_e32
tracksRegLiveness: true
body: |
bb.0:
; GCN-LABEL: name: test_remat_v_rcp_f64_e32
; GCN: [[V_RCP_F64_e32_:%[0-9]+]]:vreg_64_align2 = nofpexcept V_RCP_F64_e32 1, implicit $exec, implicit $mode
; GCN-NEXT: [[V_RCP_F64_e32_1:%[0-9]+]]:vreg_64_align2 = nofpexcept V_RCP_F64_e32 2, implicit $exec, implicit $mode
; GCN-NEXT: [[V_RCP_F64_e32_2:%[0-9]+]]:vreg_64_align2 = nofpexcept V_RCP_F64_e32 3, implicit $exec, implicit $mode
; GCN-NEXT: S_NOP 0, implicit [[V_RCP_F64_e32_]]
; GCN-NEXT: S_NOP 0, implicit [[V_RCP_F64_e32_1]]
; GCN-NEXT: S_NOP 0, implicit [[V_RCP_F64_e32_2]]
; GCN-NEXT: S_ENDPGM 0
%0:vreg_64_align2 = nofpexcept V_RCP_F64_e32 1, implicit $exec, implicit $mode
%1:vreg_64_align2 = nofpexcept V_RCP_F64_e32 2, implicit $exec, implicit $mode
%2:vreg_64_align2 = nofpexcept V_RCP_F64_e32 3, implicit $exec, implicit $mode
S_NOP 0, implicit %0
S_NOP 0, implicit %1
S_NOP 0, implicit %2
S_ENDPGM 0
...
---
name: test_remat_v_rsq_f64_e32
tracksRegLiveness: true
body: |
bb.0:
; GCN-LABEL: name: test_remat_v_rsq_f64_e32
; GCN: [[V_RSQ_F64_e32_:%[0-9]+]]:vreg_64_align2 = nofpexcept V_RSQ_F64_e32 1, implicit $exec, implicit $mode
; GCN-NEXT: [[V_RSQ_F64_e32_1:%[0-9]+]]:vreg_64_align2 = nofpexcept V_RSQ_F64_e32 2, implicit $exec, implicit $mode
; GCN-NEXT: [[V_RSQ_F64_e32_2:%[0-9]+]]:vreg_64_align2 = nofpexcept V_RSQ_F64_e32 3, implicit $exec, implicit $mode
; GCN-NEXT: S_NOP 0, implicit [[V_RSQ_F64_e32_]]
; GCN-NEXT: S_NOP 0, implicit [[V_RSQ_F64_e32_1]]
; GCN-NEXT: S_NOP 0, implicit [[V_RSQ_F64_e32_2]]
; GCN-NEXT: S_ENDPGM 0
%0:vreg_64_align2 = nofpexcept V_RSQ_F64_e32 1, implicit $exec, implicit $mode
%1:vreg_64_align2 = nofpexcept V_RSQ_F64_e32 2, implicit $exec, implicit $mode
%2:vreg_64_align2 = nofpexcept V_RSQ_F64_e32 3, implicit $exec, implicit $mode
S_NOP 0, implicit %0
S_NOP 0, implicit %1
S_NOP 0, implicit %2
S_ENDPGM 0
...
---
name: test_remat_v_sqrt_f64_e32
tracksRegLiveness: true
body: |
bb.0:
; GCN-LABEL: name: test_remat_v_sqrt_f64_e32
; GCN: [[V_SQRT_F64_e32_:%[0-9]+]]:vreg_64_align2 = nofpexcept V_SQRT_F64_e32 1, implicit $exec, implicit $mode
; GCN-NEXT: [[V_SQRT_F64_e32_1:%[0-9]+]]:vreg_64_align2 = nofpexcept V_SQRT_F64_e32 2, implicit $exec, implicit $mode
; GCN-NEXT: [[V_SQRT_F64_e32_2:%[0-9]+]]:vreg_64_align2 = nofpexcept V_SQRT_F64_e32 3, implicit $exec, implicit $mode
; GCN-NEXT: S_NOP 0, implicit [[V_SQRT_F64_e32_]]
; GCN-NEXT: S_NOP 0, implicit [[V_SQRT_F64_e32_1]]
; GCN-NEXT: S_NOP 0, implicit [[V_SQRT_F64_e32_2]]
; GCN-NEXT: S_ENDPGM 0
%0:vreg_64_align2 = nofpexcept V_SQRT_F64_e32 1, implicit $exec, implicit $mode
%1:vreg_64_align2 = nofpexcept V_SQRT_F64_e32 2, implicit $exec, implicit $mode
%2:vreg_64_align2 = nofpexcept V_SQRT_F64_e32 3, implicit $exec, implicit $mode
S_NOP 0, implicit %0
S_NOP 0, implicit %1
S_NOP 0, implicit %2
S_ENDPGM 0
...
---
name: test_remat_v_sin_f32_e32
tracksRegLiveness: true
body: |
bb.0:
; GCN-LABEL: name: test_remat_v_sin_f32_e32
; GCN: [[V_SIN_F32_e32_:%[0-9]+]]:vgpr_32 = nofpexcept V_SIN_F32_e32 1, implicit $exec, implicit $mode
; GCN-NEXT: [[V_SIN_F32_e32_1:%[0-9]+]]:vgpr_32 = nofpexcept V_SIN_F32_e32 2, implicit $exec, implicit $mode
; GCN-NEXT: [[V_SIN_F32_e32_2:%[0-9]+]]:vgpr_32 = nofpexcept V_SIN_F32_e32 3, implicit $exec, implicit $mode
; GCN-NEXT: S_NOP 0, implicit [[V_SIN_F32_e32_]]
; GCN-NEXT: S_NOP 0, implicit [[V_SIN_F32_e32_1]]
; GCN-NEXT: S_NOP 0, implicit [[V_SIN_F32_e32_2]]
; GCN-NEXT: S_ENDPGM 0
%0:vgpr_32 = nofpexcept V_SIN_F32_e32 1, implicit $exec, implicit $mode
%1:vgpr_32 = nofpexcept V_SIN_F32_e32 2, implicit $exec, implicit $mode
%2:vgpr_32 = nofpexcept V_SIN_F32_e32 3, implicit $exec, implicit $mode
S_NOP 0, implicit %0
S_NOP 0, implicit %1
S_NOP 0, implicit %2
S_ENDPGM 0
...
---
name: test_remat_v_cos_f32_e32
tracksRegLiveness: true
body: |
bb.0:
; GCN-LABEL: name: test_remat_v_cos_f32_e32
; GCN: [[V_COS_F32_e32_:%[0-9]+]]:vgpr_32 = nofpexcept V_COS_F32_e32 1, implicit $exec, implicit $mode
; GCN-NEXT: [[V_COS_F32_e32_1:%[0-9]+]]:vgpr_32 = nofpexcept V_COS_F32_e32 2, implicit $exec, implicit $mode
; GCN-NEXT: [[V_COS_F32_e32_2:%[0-9]+]]:vgpr_32 = nofpexcept V_COS_F32_e32 3, implicit $exec, implicit $mode
; GCN-NEXT: S_NOP 0, implicit [[V_COS_F32_e32_]]
; GCN-NEXT: S_NOP 0, implicit [[V_COS_F32_e32_1]]
; GCN-NEXT: S_NOP 0, implicit [[V_COS_F32_e32_2]]
; GCN-NEXT: S_ENDPGM 0
%0:vgpr_32 = nofpexcept V_COS_F32_e32 1, implicit $exec, implicit $mode
%1:vgpr_32 = nofpexcept V_COS_F32_e32 2, implicit $exec, implicit $mode
%2:vgpr_32 = nofpexcept V_COS_F32_e32 3, implicit $exec, implicit $mode
S_NOP 0, implicit %0
S_NOP 0, implicit %1
S_NOP 0, implicit %2
S_ENDPGM 0
...
---
name: test_remat_v_not_b32_e32
tracksRegLiveness: true
body: |
bb.0:
; GCN-LABEL: name: test_remat_v_not_b32_e32
; GCN: [[V_NOT_B32_e32_:%[0-9]+]]:vgpr_32 = V_NOT_B32_e32 1, implicit $exec, implicit $mode
; GCN-NEXT: [[V_NOT_B32_e32_1:%[0-9]+]]:vgpr_32 = V_NOT_B32_e32 2, implicit $exec, implicit $mode
; GCN-NEXT: [[V_NOT_B32_e32_2:%[0-9]+]]:vgpr_32 = V_NOT_B32_e32 3, implicit $exec, implicit $mode
; GCN-NEXT: S_NOP 0, implicit [[V_NOT_B32_e32_]]
; GCN-NEXT: S_NOP 0, implicit [[V_NOT_B32_e32_1]]
; GCN-NEXT: S_NOP 0, implicit [[V_NOT_B32_e32_2]]
; GCN-NEXT: S_ENDPGM 0
%0:vgpr_32 = V_NOT_B32_e32 1, implicit $exec, implicit $mode
%1:vgpr_32 = V_NOT_B32_e32 2, implicit $exec, implicit $mode
%2:vgpr_32 = V_NOT_B32_e32 3, implicit $exec, implicit $mode
S_NOP 0, implicit %0
S_NOP 0, implicit %1
S_NOP 0, implicit %2
S_ENDPGM 0
...
---
name: test_remat_v_bfrev_b32_e32
tracksRegLiveness: true
body: |
bb.0:
; GCN-LABEL: name: test_remat_v_bfrev_b32_e32
; GCN: [[V_BFREV_B32_e32_:%[0-9]+]]:vgpr_32 = V_BFREV_B32_e32 1, implicit $exec, implicit $mode
; GCN-NEXT: [[V_BFREV_B32_e32_1:%[0-9]+]]:vgpr_32 = V_BFREV_B32_e32 2, implicit $exec, implicit $mode
; GCN-NEXT: [[V_BFREV_B32_e32_2:%[0-9]+]]:vgpr_32 = V_BFREV_B32_e32 3, implicit $exec, implicit $mode
; GCN-NEXT: S_NOP 0, implicit [[V_BFREV_B32_e32_]]
; GCN-NEXT: S_NOP 0, implicit [[V_BFREV_B32_e32_1]]
; GCN-NEXT: S_NOP 0, implicit [[V_BFREV_B32_e32_2]]
; GCN-NEXT: S_ENDPGM 0
%0:vgpr_32 = V_BFREV_B32_e32 1, implicit $exec, implicit $mode
%1:vgpr_32 = V_BFREV_B32_e32 2, implicit $exec, implicit $mode
%2:vgpr_32 = V_BFREV_B32_e32 3, implicit $exec, implicit $mode
S_NOP 0, implicit %0
S_NOP 0, implicit %1
S_NOP 0, implicit %2
S_ENDPGM 0
...
---
name: test_remat_v_ffbh_u32_e32
tracksRegLiveness: true
body: |
bb.0:
; GCN-LABEL: name: test_remat_v_ffbh_u32_e32
; GCN: [[V_FFBH_U32_e32_:%[0-9]+]]:vgpr_32 = V_FFBH_U32_e32 1, implicit $exec, implicit $mode
; GCN-NEXT: [[V_FFBH_U32_e32_1:%[0-9]+]]:vgpr_32 = V_FFBH_U32_e32 2, implicit $exec, implicit $mode
; GCN-NEXT: [[V_FFBH_U32_e32_2:%[0-9]+]]:vgpr_32 = V_FFBH_U32_e32 3, implicit $exec, implicit $mode
; GCN-NEXT: S_NOP 0, implicit [[V_FFBH_U32_e32_]]
; GCN-NEXT: S_NOP 0, implicit [[V_FFBH_U32_e32_1]]
; GCN-NEXT: S_NOP 0, implicit [[V_FFBH_U32_e32_2]]
; GCN-NEXT: S_ENDPGM 0
%0:vgpr_32 = V_FFBH_U32_e32 1, implicit $exec, implicit $mode
%1:vgpr_32 = V_FFBH_U32_e32 2, implicit $exec, implicit $mode
%2:vgpr_32 = V_FFBH_U32_e32 3, implicit $exec, implicit $mode
S_NOP 0, implicit %0
S_NOP 0, implicit %1
S_NOP 0, implicit %2
S_ENDPGM 0
...
---
name: test_remat_v_ffbl_b32_e32
tracksRegLiveness: true
body: |
bb.0:
; GCN-LABEL: name: test_remat_v_ffbl_b32_e32
; GCN: [[V_FFBL_B32_e32_:%[0-9]+]]:vgpr_32 = V_FFBL_B32_e32 1, implicit $exec, implicit $mode
; GCN-NEXT: [[V_FFBL_B32_e32_1:%[0-9]+]]:vgpr_32 = V_FFBL_B32_e32 2, implicit $exec, implicit $mode
; GCN-NEXT: [[V_FFBL_B32_e32_2:%[0-9]+]]:vgpr_32 = V_FFBL_B32_e32 3, implicit $exec, implicit $mode
; GCN-NEXT: S_NOP 0, implicit [[V_FFBL_B32_e32_]]
; GCN-NEXT: S_NOP 0, implicit [[V_FFBL_B32_e32_1]]
; GCN-NEXT: S_NOP 0, implicit [[V_FFBL_B32_e32_2]]
; GCN-NEXT: S_ENDPGM 0
%0:vgpr_32 = V_FFBL_B32_e32 1, implicit $exec, implicit $mode
%1:vgpr_32 = V_FFBL_B32_e32 2, implicit $exec, implicit $mode
%2:vgpr_32 = V_FFBL_B32_e32 3, implicit $exec, implicit $mode
S_NOP 0, implicit %0
S_NOP 0, implicit %1
S_NOP 0, implicit %2
S_ENDPGM 0
...
---
name: test_remat_v_ffbh_i32_e32
tracksRegLiveness: true
body: |
bb.0:
; GCN-LABEL: name: test_remat_v_ffbh_i32_e32
; GCN: [[V_FFBH_I32_e32_:%[0-9]+]]:vgpr_32 = V_FFBH_I32_e32 1, implicit $exec, implicit $mode
; GCN-NEXT: [[V_FFBH_I32_e32_1:%[0-9]+]]:vgpr_32 = V_FFBH_I32_e32 2, implicit $exec, implicit $mode
; GCN-NEXT: [[V_FFBH_I32_e32_2:%[0-9]+]]:vgpr_32 = V_FFBH_I32_e32 3, implicit $exec, implicit $mode
; GCN-NEXT: S_NOP 0, implicit [[V_FFBH_I32_e32_]]
; GCN-NEXT: S_NOP 0, implicit [[V_FFBH_I32_e32_1]]
; GCN-NEXT: S_NOP 0, implicit [[V_FFBH_I32_e32_2]]
; GCN-NEXT: S_ENDPGM 0
%0:vgpr_32 = V_FFBH_I32_e32 1, implicit $exec, implicit $mode
%1:vgpr_32 = V_FFBH_I32_e32 2, implicit $exec, implicit $mode
%2:vgpr_32 = V_FFBH_I32_e32 3, implicit $exec, implicit $mode
S_NOP 0, implicit %0
S_NOP 0, implicit %1
S_NOP 0, implicit %2
S_ENDPGM 0
...
---
name: test_remat_v_frexp_exp_i32_f64_e32
tracksRegLiveness: true
body: |
bb.0:
; GCN-LABEL: name: test_remat_v_frexp_exp_i32_f64_e32
; GCN: [[V_FREXP_EXP_I32_F64_e32_:%[0-9]+]]:vgpr_32 = nofpexcept V_FREXP_EXP_I32_F64_e32 1, implicit $exec, implicit $mode
; GCN-NEXT: [[V_FREXP_EXP_I32_F64_e32_1:%[0-9]+]]:vgpr_32 = nofpexcept V_FREXP_EXP_I32_F64_e32 2, implicit $exec, implicit $mode
; GCN-NEXT: [[V_FREXP_EXP_I32_F64_e32_2:%[0-9]+]]:vgpr_32 = nofpexcept V_FREXP_EXP_I32_F64_e32 3, implicit $exec, implicit $mode
; GCN-NEXT: S_NOP 0, implicit [[V_FREXP_EXP_I32_F64_e32_]]
; GCN-NEXT: S_NOP 0, implicit [[V_FREXP_EXP_I32_F64_e32_1]]
; GCN-NEXT: S_NOP 0, implicit [[V_FREXP_EXP_I32_F64_e32_2]]
; GCN-NEXT: S_ENDPGM 0
%0:vgpr_32 = nofpexcept V_FREXP_EXP_I32_F64_e32 1, implicit $exec, implicit $mode
%1:vgpr_32 = nofpexcept V_FREXP_EXP_I32_F64_e32 2, implicit $exec, implicit $mode
%2:vgpr_32 = nofpexcept V_FREXP_EXP_I32_F64_e32 3, implicit $exec, implicit $mode
S_NOP 0, implicit %0
S_NOP 0, implicit %1
S_NOP 0, implicit %2
S_ENDPGM 0
...
---
name: test_remat_v_frexp_mant_f64_e32
tracksRegLiveness: true
body: |
bb.0:
; GCN-LABEL: name: test_remat_v_frexp_mant_f64_e32
; GCN: [[V_FREXP_MANT_F64_e32_:%[0-9]+]]:vreg_64_align2 = nofpexcept V_FREXP_MANT_F64_e32 1, implicit $exec, implicit $mode
; GCN-NEXT: [[V_FREXP_MANT_F64_e32_1:%[0-9]+]]:vreg_64_align2 = nofpexcept V_FREXP_MANT_F64_e32 2, implicit $exec, implicit $mode
; GCN-NEXT: [[V_FREXP_MANT_F64_e32_2:%[0-9]+]]:vreg_64_align2 = nofpexcept V_FREXP_MANT_F64_e32 3, implicit $exec, implicit $mode
; GCN-NEXT: S_NOP 0, implicit [[V_FREXP_MANT_F64_e32_]]
; GCN-NEXT: S_NOP 0, implicit [[V_FREXP_MANT_F64_e32_1]]
; GCN-NEXT: S_NOP 0, implicit [[V_FREXP_MANT_F64_e32_2]]
; GCN-NEXT: S_ENDPGM 0
%0:vreg_64_align2 = nofpexcept V_FREXP_MANT_F64_e32 1, implicit $exec, implicit $mode
%1:vreg_64_align2 = nofpexcept V_FREXP_MANT_F64_e32 2, implicit $exec, implicit $mode
%2:vreg_64_align2 = nofpexcept V_FREXP_MANT_F64_e32 3, implicit $exec, implicit $mode
S_NOP 0, implicit %0
S_NOP 0, implicit %1
S_NOP 0, implicit %2
S_ENDPGM 0
...
---
name: test_remat_v_fract_f64_e32
tracksRegLiveness: true
body: |
bb.0:
; GCN-LABEL: name: test_remat_v_fract_f64_e32
; GCN: [[V_FRACT_F64_e32_:%[0-9]+]]:vreg_64_align2 = nofpexcept V_FRACT_F64_e32 1, implicit $exec, implicit $mode
; GCN-NEXT: [[V_FRACT_F64_e32_1:%[0-9]+]]:vreg_64_align2 = nofpexcept V_FRACT_F64_e32 2, implicit $exec, implicit $mode
; GCN-NEXT: [[V_FRACT_F64_e32_2:%[0-9]+]]:vreg_64_align2 = nofpexcept V_FRACT_F64_e32 3, implicit $exec, implicit $mode
; GCN-NEXT: S_NOP 0, implicit [[V_FRACT_F64_e32_]]
; GCN-NEXT: S_NOP 0, implicit [[V_FRACT_F64_e32_1]]
; GCN-NEXT: S_NOP 0, implicit [[V_FRACT_F64_e32_2]]
; GCN-NEXT: S_ENDPGM 0
%0:vreg_64_align2 = nofpexcept V_FRACT_F64_e32 1, implicit $exec, implicit $mode
%1:vreg_64_align2 = nofpexcept V_FRACT_F64_e32 2, implicit $exec, implicit $mode
%2:vreg_64_align2 = nofpexcept V_FRACT_F64_e32 3, implicit $exec, implicit $mode
S_NOP 0, implicit %0
S_NOP 0, implicit %1
S_NOP 0, implicit %2
S_ENDPGM 0
...
---
name: test_remat_v_frexp_exp_i32_f32_e32
tracksRegLiveness: true
body: |
bb.0:
; GCN-LABEL: name: test_remat_v_frexp_exp_i32_f32_e32
; GCN: [[V_FREXP_EXP_I32_F32_e32_:%[0-9]+]]:vgpr_32 = nofpexcept V_FREXP_EXP_I32_F32_e32 1, implicit $exec, implicit $mode
; GCN-NEXT: [[V_FREXP_EXP_I32_F32_e32_1:%[0-9]+]]:vgpr_32 = nofpexcept V_FREXP_EXP_I32_F32_e32 2, implicit $exec, implicit $mode
; GCN-NEXT: [[V_FREXP_EXP_I32_F32_e32_2:%[0-9]+]]:vgpr_32 = nofpexcept V_FREXP_EXP_I32_F32_e32 3, implicit $exec, implicit $mode
; GCN-NEXT: S_NOP 0, implicit [[V_FREXP_EXP_I32_F32_e32_]]
; GCN-NEXT: S_NOP 0, implicit [[V_FREXP_EXP_I32_F32_e32_1]]
; GCN-NEXT: S_NOP 0, implicit [[V_FREXP_EXP_I32_F32_e32_2]]
; GCN-NEXT: S_ENDPGM 0
%0:vgpr_32 = nofpexcept V_FREXP_EXP_I32_F32_e32 1, implicit $exec, implicit $mode
%1:vgpr_32 = nofpexcept V_FREXP_EXP_I32_F32_e32 2, implicit $exec, implicit $mode
%2:vgpr_32 = nofpexcept V_FREXP_EXP_I32_F32_e32 3, implicit $exec, implicit $mode
S_NOP 0, implicit %0
S_NOP 0, implicit %1
S_NOP 0, implicit %2
S_ENDPGM 0
...
---
name: test_remat_v_frexp_mant_f32_e32
tracksRegLiveness: true
body: |
bb.0:
; GCN-LABEL: name: test_remat_v_frexp_mant_f32_e32
; GCN: [[V_FREXP_MANT_F32_e32_:%[0-9]+]]:vgpr_32 = nofpexcept V_FREXP_MANT_F32_e32 1, implicit $exec, implicit $mode
; GCN-NEXT: [[V_FREXP_MANT_F32_e32_1:%[0-9]+]]:vgpr_32 = nofpexcept V_FREXP_MANT_F32_e32 2, implicit $exec, implicit $mode
; GCN-NEXT: [[V_FREXP_MANT_F32_e32_2:%[0-9]+]]:vgpr_32 = nofpexcept V_FREXP_MANT_F32_e32 3, implicit $exec, implicit $mode
; GCN-NEXT: S_NOP 0, implicit [[V_FREXP_MANT_F32_e32_]]
; GCN-NEXT: S_NOP 0, implicit [[V_FREXP_MANT_F32_e32_1]]
; GCN-NEXT: S_NOP 0, implicit [[V_FREXP_MANT_F32_e32_2]]
; GCN-NEXT: S_ENDPGM 0
%0:vgpr_32 = nofpexcept V_FREXP_MANT_F32_e32 1, implicit $exec, implicit $mode
%1:vgpr_32 = nofpexcept V_FREXP_MANT_F32_e32 2, implicit $exec, implicit $mode
%2:vgpr_32 = nofpexcept V_FREXP_MANT_F32_e32 3, implicit $exec, implicit $mode
S_NOP 0, implicit %0
S_NOP 0, implicit %1
S_NOP 0, implicit %2
S_ENDPGM 0
...
---
name: test_remat_v_exp_legacy_f32_e32
tracksRegLiveness: true
body: |
bb.0:
; GCN-LABEL: name: test_remat_v_exp_legacy_f32_e32
; GCN: [[V_EXP_LEGACY_F32_e32_:%[0-9]+]]:vgpr_32 = nofpexcept V_EXP_LEGACY_F32_e32 1, implicit $exec, implicit $mode
; GCN-NEXT: [[V_EXP_LEGACY_F32_e32_1:%[0-9]+]]:vgpr_32 = nofpexcept V_EXP_LEGACY_F32_e32 2, implicit $exec, implicit $mode
; GCN-NEXT: [[V_EXP_LEGACY_F32_e32_2:%[0-9]+]]:vgpr_32 = nofpexcept V_EXP_LEGACY_F32_e32 3, implicit $exec, implicit $mode
; GCN-NEXT: S_NOP 0, implicit [[V_EXP_LEGACY_F32_e32_]]
; GCN-NEXT: S_NOP 0, implicit [[V_EXP_LEGACY_F32_e32_1]]
; GCN-NEXT: S_NOP 0, implicit [[V_EXP_LEGACY_F32_e32_2]]
; GCN-NEXT: S_ENDPGM 0
%0:vgpr_32 = nofpexcept V_EXP_LEGACY_F32_e32 1, implicit $exec, implicit $mode
%1:vgpr_32 = nofpexcept V_EXP_LEGACY_F32_e32 2, implicit $exec, implicit $mode
%2:vgpr_32 = nofpexcept V_EXP_LEGACY_F32_e32 3, implicit $exec, implicit $mode
S_NOP 0, implicit %0
S_NOP 0, implicit %1
S_NOP 0, implicit %2
S_ENDPGM 0
...
---
name: test_remat_v_log_legacy_f32_e32
tracksRegLiveness: true
body: |
bb.0:
; GCN-LABEL: name: test_remat_v_log_legacy_f32_e32
; GCN: [[V_LOG_LEGACY_F32_e32_:%[0-9]+]]:vgpr_32 = nofpexcept V_LOG_LEGACY_F32_e32 1, implicit $exec, implicit $mode
; GCN-NEXT: [[V_LOG_LEGACY_F32_e32_1:%[0-9]+]]:vgpr_32 = nofpexcept V_LOG_LEGACY_F32_e32 2, implicit $exec, implicit $mode
; GCN-NEXT: [[V_LOG_LEGACY_F32_e32_2:%[0-9]+]]:vgpr_32 = nofpexcept V_LOG_LEGACY_F32_e32 3, implicit $exec, implicit $mode
; GCN-NEXT: S_NOP 0, implicit [[V_LOG_LEGACY_F32_e32_]]
; GCN-NEXT: S_NOP 0, implicit [[V_LOG_LEGACY_F32_e32_1]]
; GCN-NEXT: S_NOP 0, implicit [[V_LOG_LEGACY_F32_e32_2]]
; GCN-NEXT: S_ENDPGM 0
%0:vgpr_32 = nofpexcept V_LOG_LEGACY_F32_e32 1, implicit $exec, implicit $mode
%1:vgpr_32 = nofpexcept V_LOG_LEGACY_F32_e32 2, implicit $exec, implicit $mode
%2:vgpr_32 = nofpexcept V_LOG_LEGACY_F32_e32 3, implicit $exec, implicit $mode
S_NOP 0, implicit %0
S_NOP 0, implicit %1
S_NOP 0, implicit %2
S_ENDPGM 0
...
---
name: test_remat_v_sat_pk_u8_i16_e32
tracksRegLiveness: true
body: |
bb.0:
; GCN-LABEL: name: test_remat_v_sat_pk_u8_i16_e32
; GCN: [[V_SAT_PK_U8_I16_e32_:%[0-9]+]]:vgpr_32 = V_SAT_PK_U8_I16_e32 1, implicit $exec, implicit $mode
; GCN-NEXT: [[V_SAT_PK_U8_I16_e32_1:%[0-9]+]]:vgpr_32 = V_SAT_PK_U8_I16_e32 2, implicit $exec, implicit $mode
; GCN-NEXT: [[V_SAT_PK_U8_I16_e32_2:%[0-9]+]]:vgpr_32 = V_SAT_PK_U8_I16_e32 3, implicit $exec, implicit $mode
; GCN-NEXT: S_NOP 0, implicit [[V_SAT_PK_U8_I16_e32_]]
; GCN-NEXT: S_NOP 0, implicit [[V_SAT_PK_U8_I16_e32_1]]
; GCN-NEXT: S_NOP 0, implicit [[V_SAT_PK_U8_I16_e32_2]]
; GCN-NEXT: S_ENDPGM 0
%0:vgpr_32 = V_SAT_PK_U8_I16_e32 1, implicit $exec, implicit $mode
%1:vgpr_32 = V_SAT_PK_U8_I16_e32 2, implicit $exec, implicit $mode
%2:vgpr_32 = V_SAT_PK_U8_I16_e32 3, implicit $exec, implicit $mode
S_NOP 0, implicit %0
S_NOP 0, implicit %1
S_NOP 0, implicit %2
S_ENDPGM 0
...
---
name: test_remat_v_accvgpr_mov_b32
tracksRegLiveness: true
body: |
bb.0:
; GCN-LABEL: name: test_remat_v_accvgpr_mov_b32
; GCN: [[V_ACCVGPR_MOV_B32_:%[0-9]+]]:agpr_32 = V_ACCVGPR_MOV_B32 undef $agpr0, implicit $exec
; GCN-NEXT: [[V_ACCVGPR_MOV_B32_1:%[0-9]+]]:agpr_32 = V_ACCVGPR_MOV_B32 undef $agpr0, implicit $exec
; GCN-NEXT: [[V_ACCVGPR_MOV_B32_2:%[0-9]+]]:agpr_32 = V_ACCVGPR_MOV_B32 undef $agpr0, implicit $exec
; GCN-NEXT: S_NOP 0, implicit [[V_ACCVGPR_MOV_B32_]]
; GCN-NEXT: S_NOP 0, implicit [[V_ACCVGPR_MOV_B32_1]]
; GCN-NEXT: S_NOP 0, implicit [[V_ACCVGPR_MOV_B32_2]]
; GCN-NEXT: S_ENDPGM 0
%0:agpr_32 = V_ACCVGPR_MOV_B32 undef $agpr0, implicit $exec
%1:agpr_32 = V_ACCVGPR_MOV_B32 undef $agpr0, implicit $exec
%2:agpr_32 = V_ACCVGPR_MOV_B32 undef $agpr0, implicit $exec
S_NOP 0, implicit %0
S_NOP 0, implicit %1
S_NOP 0, implicit %2
S_ENDPGM 0
...
---
name: test_no_remat_v_cndmask_b32_e32
tracksRegLiveness: true
machineFunctionInfo:
stackPtrOffsetReg: $sgpr32
body: |
bb.0:
; GCN-LABEL: name: test_no_remat_v_cndmask_b32_e32
; GCN: [[V_CNDMASK_B32_e32_:%[0-9]+]]:vgpr_32 = V_CNDMASK_B32_e32 1, undef %1:vgpr_32, implicit $exec, implicit undef $vcc
; GCN-NEXT: [[V_CNDMASK_B32_e32_1:%[0-9]+]]:vgpr_32 = V_CNDMASK_B32_e32 1, undef %1:vgpr_32, implicit $exec, implicit undef $vcc
; GCN-NEXT: [[V_CNDMASK_B32_e32_2:%[0-9]+]]:vgpr_32 = V_CNDMASK_B32_e32 1, undef %1:vgpr_32, implicit $exec, implicit undef $vcc
; GCN-NEXT: S_NOP 0, implicit [[V_CNDMASK_B32_e32_]]
; GCN-NEXT: S_NOP 0, implicit [[V_CNDMASK_B32_e32_1]]
; GCN-NEXT: S_NOP 0, implicit [[V_CNDMASK_B32_e32_2]]
; GCN-NEXT: S_ENDPGM 0
%1:vgpr_32 = V_CNDMASK_B32_e32 1, undef %0:vgpr_32, implicit $exec, implicit undef $vcc
%2:vgpr_32 = V_CNDMASK_B32_e32 1, undef %0:vgpr_32, implicit $exec, implicit undef $vcc
%3:vgpr_32 = V_CNDMASK_B32_e32 1, undef %0:vgpr_32, implicit $exec, implicit undef $vcc
S_NOP 0, implicit %1
S_NOP 0, implicit %2
S_NOP 0, implicit %3
S_ENDPGM 0
...
---
name: test_no_remat_v_cndmask_b32_sdwa
tracksRegLiveness: true
machineFunctionInfo:
stackPtrOffsetReg: $sgpr32
body: |
bb.0:
; GCN-LABEL: name: test_no_remat_v_cndmask_b32_sdwa
; GCN: [[V_CNDMASK_B32_sdwa:%[0-9]+]]:vgpr_32 = V_CNDMASK_B32_sdwa 0, undef %1:vgpr_32, 0, undef %1:vgpr_32, 0, 0, 0, 0, 0, implicit $exec, implicit undef $vcc
; GCN-NEXT: [[V_CNDMASK_B32_sdwa1:%[0-9]+]]:vgpr_32 = V_CNDMASK_B32_sdwa 0, undef %1:vgpr_32, 0, undef %1:vgpr_32, 0, 0, 0, 0, 0, implicit $exec, implicit undef $vcc
; GCN-NEXT: [[V_CNDMASK_B32_sdwa2:%[0-9]+]]:vgpr_32 = V_CNDMASK_B32_sdwa 0, undef %1:vgpr_32, 0, undef %1:vgpr_32, 0, 0, 0, 0, 0, implicit $exec, implicit undef $vcc
; GCN-NEXT: S_NOP 0, implicit [[V_CNDMASK_B32_sdwa]]
; GCN-NEXT: S_NOP 0, implicit [[V_CNDMASK_B32_sdwa1]]
; GCN-NEXT: S_NOP 0, implicit [[V_CNDMASK_B32_sdwa2]]
; GCN-NEXT: S_ENDPGM 0
%1:vgpr_32 = V_CNDMASK_B32_sdwa 0, undef %0:vgpr_32, 0, undef %0:vgpr_32, 0, 0, 0, 0, 0, implicit $exec, implicit undef $vcc
%2:vgpr_32 = V_CNDMASK_B32_sdwa 0, undef %0:vgpr_32, 0, undef %0:vgpr_32, 0, 0, 0, 0, 0, implicit $exec, implicit undef $vcc
%3:vgpr_32 = V_CNDMASK_B32_sdwa 0, undef %0:vgpr_32, 0, undef %0:vgpr_32, 0, 0, 0, 0, 0, implicit $exec, implicit undef $vcc
S_NOP 0, implicit %1
S_NOP 0, implicit %2
S_NOP 0, implicit %3
S_ENDPGM 0
...
---
name: test_no_remat_v_cndmask_b32_dpp
tracksRegLiveness: true
machineFunctionInfo:
stackPtrOffsetReg: $sgpr32
body: |
bb.0:
; GCN-LABEL: name: test_no_remat_v_cndmask_b32_dpp
; GCN: [[V_CNDMASK_B32_dpp:%[0-9]+]]:vgpr_32 = V_CNDMASK_B32_dpp undef [[V_CNDMASK_B32_dpp]], 0, undef %1:vgpr_32, 0, undef %1:vgpr_32, 1, 15, 15, 10, implicit $exec, implicit undef $vcc
; GCN-NEXT: [[V_CNDMASK_B32_dpp1:%[0-9]+]]:vgpr_32 = V_CNDMASK_B32_dpp undef [[V_CNDMASK_B32_dpp1]], 0, undef %1:vgpr_32, 0, undef %1:vgpr_32, 1, 15, 15, 10, implicit $exec, implicit undef $vcc
; GCN-NEXT: [[V_CNDMASK_B32_dpp2:%[0-9]+]]:vgpr_32 = V_CNDMASK_B32_dpp undef [[V_CNDMASK_B32_dpp2]], 0, undef %1:vgpr_32, 0, undef %1:vgpr_32, 1, 15, 15, 10, implicit $exec, implicit undef $vcc
; GCN-NEXT: S_NOP 0, implicit [[V_CNDMASK_B32_dpp]]
; GCN-NEXT: S_NOP 0, implicit [[V_CNDMASK_B32_dpp1]]
; GCN-NEXT: S_NOP 0, implicit [[V_CNDMASK_B32_dpp2]]
; GCN-NEXT: S_ENDPGM 0
%1:vgpr_32 = V_CNDMASK_B32_dpp undef %1:vgpr_32, 0, undef %0:vgpr_32, 0, undef %0:vgpr_32, 1, 15, 15, 10, implicit $exec, implicit undef $vcc
%2:vgpr_32 = V_CNDMASK_B32_dpp undef %2:vgpr_32, 0, undef %0:vgpr_32, 0, undef %0:vgpr_32, 1, 15, 15, 10, implicit $exec, implicit undef $vcc
%3:vgpr_32 = V_CNDMASK_B32_dpp undef %3:vgpr_32, 0, undef %0:vgpr_32, 0, undef %0:vgpr_32, 1, 15, 15, 10, implicit $exec, implicit undef $vcc
S_NOP 0, implicit %1
S_NOP 0, implicit %2
S_NOP 0, implicit %3
S_ENDPGM 0
...
---
name: test_remat_v_cndmask_b32_e64
tracksRegLiveness: true
body: |
bb.0:
; GCN-LABEL: name: test_remat_v_cndmask_b32_e64
; GCN: [[V_CNDMASK_B32_e64_:%[0-9]+]]:vgpr_32 = V_CNDMASK_B32_e64 0, 1, 0, 2, undef $sgpr0_sgpr1, implicit $exec
; GCN-NEXT: [[V_CNDMASK_B32_e64_1:%[0-9]+]]:vgpr_32 = V_CNDMASK_B32_e64 0, 1, 0, 2, undef $sgpr0_sgpr1, implicit $exec
; GCN-NEXT: [[V_CNDMASK_B32_e64_2:%[0-9]+]]:vgpr_32 = V_CNDMASK_B32_e64 0, 1, 0, 2, undef $sgpr0_sgpr1, implicit $exec
; GCN-NEXT: S_NOP 0, implicit [[V_CNDMASK_B32_e64_]]
; GCN-NEXT: S_NOP 0, implicit [[V_CNDMASK_B32_e64_1]]
; GCN-NEXT: S_NOP 0, implicit [[V_CNDMASK_B32_e64_2]]
; GCN-NEXT: S_ENDPGM 0
%1:vgpr_32 = V_CNDMASK_B32_e64 0, 1, 0, 2, undef %0:sreg_64_xexec, implicit $exec
%2:vgpr_32 = V_CNDMASK_B32_e64 0, 1, 0, 2, undef %0:sreg_64_xexec, implicit $exec
%3:vgpr_32 = V_CNDMASK_B32_e64 0, 1, 0, 2, undef %0:sreg_64_xexec, implicit $exec
S_NOP 0, implicit %1
S_NOP 0, implicit %2
S_NOP 0, implicit %3
S_ENDPGM 0
...
---
name: test_remat_v_madmk_f32
tracksRegLiveness: true
body: |
bb.0:
; GCN-LABEL: name: test_remat_v_madmk_f32
; GCN: [[V_MADMK_F32_:%[0-9]+]]:vgpr_32 = nofpexcept V_MADMK_F32 1, 1, undef %1:vgpr_32, implicit $exec, implicit $mode
; GCN-NEXT: [[V_MADMK_F32_1:%[0-9]+]]:vgpr_32 = nofpexcept V_MADMK_F32 2, 2, undef %1:vgpr_32, implicit $exec, implicit $mode
; GCN-NEXT: [[V_MADMK_F32_2:%[0-9]+]]:vgpr_32 = nofpexcept V_MADMK_F32 3, 3, undef %1:vgpr_32, implicit $exec, implicit $mode
; GCN-NEXT: S_NOP 0, implicit [[V_MADMK_F32_]]
; GCN-NEXT: S_NOP 0, implicit [[V_MADMK_F32_1]]
; GCN-NEXT: S_NOP 0, implicit [[V_MADMK_F32_2]]
; GCN-NEXT: S_ENDPGM 0
%1:vgpr_32 = nofpexcept V_MADMK_F32 1, 1, undef %0:vgpr_32, implicit $exec, implicit $mode
%2:vgpr_32 = nofpexcept V_MADMK_F32 2, 2, undef %0:vgpr_32, implicit $exec, implicit $mode
%3:vgpr_32 = nofpexcept V_MADMK_F32 3, 3, undef %0:vgpr_32, implicit $exec, implicit $mode
S_NOP 0, implicit %1
S_NOP 0, implicit %2
S_NOP 0, implicit %3
S_ENDPGM 0
...
---
name: test_remat_v_add_f32_e32
tracksRegLiveness: true
body: |
bb.0:
; GCN-LABEL: name: test_remat_v_add_f32_e32
; GCN: [[V_ADD_F32_e32_:%[0-9]+]]:vgpr_32 = nofpexcept V_ADD_F32_e32 1, undef %1:vgpr_32, implicit $exec, implicit $mode
; GCN-NEXT: [[V_ADD_F32_e32_1:%[0-9]+]]:vgpr_32 = nofpexcept V_ADD_F32_e32 2, undef %1:vgpr_32, implicit $exec, implicit $mode
; GCN-NEXT: [[V_ADD_F32_e32_2:%[0-9]+]]:vgpr_32 = nofpexcept V_ADD_F32_e32 3, undef %1:vgpr_32, implicit $exec, implicit $mode
; GCN-NEXT: S_NOP 0, implicit [[V_ADD_F32_e32_]]
; GCN-NEXT: S_NOP 0, implicit [[V_ADD_F32_e32_1]]
; GCN-NEXT: S_NOP 0, implicit [[V_ADD_F32_e32_2]]
; GCN-NEXT: S_ENDPGM 0
%1:vgpr_32 = nofpexcept V_ADD_F32_e32 1, undef %0:vgpr_32, implicit $exec, implicit $mode
%2:vgpr_32 = nofpexcept V_ADD_F32_e32 2, undef %0:vgpr_32, implicit $exec, implicit $mode
%3:vgpr_32 = nofpexcept V_ADD_F32_e32 3, undef %0:vgpr_32, implicit $exec, implicit $mode
S_NOP 0, implicit %1
S_NOP 0, implicit %2
S_NOP 0, implicit %3
S_ENDPGM 0
...
---
name: test_remat_v_add_f32_e64
tracksRegLiveness: true
body: |
bb.0:
; GCN-LABEL: name: test_remat_v_add_f32_e64
; GCN: [[V_ADD_F32_e64_:%[0-9]+]]:vgpr_32 = nofpexcept V_ADD_F32_e64 0, 1, 0, undef %1:vgpr_32, 0, 0, implicit $exec, implicit $mode
; GCN-NEXT: [[V_ADD_F32_e64_1:%[0-9]+]]:vgpr_32 = nofpexcept V_ADD_F32_e64 0, 2, 0, undef %1:vgpr_32, 0, 0, implicit $exec, implicit $mode
; GCN-NEXT: [[V_ADD_F32_e64_2:%[0-9]+]]:vgpr_32 = nofpexcept V_ADD_F32_e64 0, 3, 0, undef %1:vgpr_32, 0, 0, implicit $exec, implicit $mode
; GCN-NEXT: S_NOP 0, implicit [[V_ADD_F32_e64_]]
; GCN-NEXT: S_NOP 0, implicit [[V_ADD_F32_e64_1]]
; GCN-NEXT: S_NOP 0, implicit [[V_ADD_F32_e64_2]]
; GCN-NEXT: S_ENDPGM 0
%1:vgpr_32 = nofpexcept V_ADD_F32_e64 0, 1, 0, undef %0:vgpr_32, 0, 0, implicit $exec, implicit $mode
%2:vgpr_32 = nofpexcept V_ADD_F32_e64 0, 2, 0, undef %0:vgpr_32, 0, 0, implicit $exec, implicit $mode
%3:vgpr_32 = nofpexcept V_ADD_F32_e64 0, 3, 0, undef %0:vgpr_32, 0, 0, implicit $exec, implicit $mode
S_NOP 0, implicit %1
S_NOP 0, implicit %2
S_NOP 0, implicit %3
S_ENDPGM 0
...
---
name: test_remat_v_add_f32_sdwa
tracksRegLiveness: true
body: |
bb.0:
; GCN-LABEL: name: test_remat_v_add_f32_sdwa
; GCN: [[V_ADD_F32_sdwa:%[0-9]+]]:vgpr_32 = nofpexcept V_ADD_F32_sdwa 0, undef %1:vgpr_32, 0, undef %1:vgpr_32, 0, 0, 0, 0, 0, 0, implicit $exec, implicit $mode
; GCN-NEXT: [[V_ADD_F32_sdwa1:%[0-9]+]]:vgpr_32 = nofpexcept V_ADD_F32_sdwa 0, undef %1:vgpr_32, 0, undef %1:vgpr_32, 0, 0, 0, 0, 0, 0, implicit $exec, implicit $mode
; GCN-NEXT: [[V_ADD_F32_sdwa2:%[0-9]+]]:vgpr_32 = nofpexcept V_ADD_F32_sdwa 0, undef %1:vgpr_32, 0, undef %1:vgpr_32, 0, 0, 0, 0, 0, 0, implicit $exec, implicit $mode
; GCN-NEXT: S_NOP 0, implicit [[V_ADD_F32_sdwa]]
; GCN-NEXT: S_NOP 0, implicit [[V_ADD_F32_sdwa1]]
; GCN-NEXT: S_NOP 0, implicit [[V_ADD_F32_sdwa2]]
; GCN-NEXT: S_ENDPGM 0
%1:vgpr_32 = nofpexcept V_ADD_F32_sdwa 0, undef %0:vgpr_32, 0, undef %0:vgpr_32, 0, 0, 0, 0, 0, 0, implicit $exec, implicit $mode
%2:vgpr_32 = nofpexcept V_ADD_F32_sdwa 0, undef %0:vgpr_32, 0, undef %0:vgpr_32, 0, 0, 0, 0, 0, 0, implicit $exec, implicit $mode
%3:vgpr_32 = nofpexcept V_ADD_F32_sdwa 0, undef %0:vgpr_32, 0, undef %0:vgpr_32, 0, 0, 0, 0, 0, 0, implicit $exec, implicit $mode
S_NOP 0, implicit %1
S_NOP 0, implicit %2
S_NOP 0, implicit %3
S_ENDPGM 0
...
---
name: test_no_remat_v_add_f32_dpp
tracksRegLiveness: true
machineFunctionInfo:
stackPtrOffsetReg: $sgpr32
body: |
bb.0:
; GCN-LABEL: name: test_no_remat_v_add_f32_dpp
; GCN: [[V_ADD_F32_dpp:%[0-9]+]]:vgpr_32 = nofpexcept V_ADD_F32_dpp undef [[V_ADD_F32_dpp]], 0, undef %1:vgpr_32, 0, undef %1:vgpr_32, 1, 15, 15, 10, implicit $exec, implicit $mode
; GCN-NEXT: [[V_ADD_F32_dpp1:%[0-9]+]]:vgpr_32 = nofpexcept V_ADD_F32_dpp undef [[V_ADD_F32_dpp1]], 0, undef %1:vgpr_32, 0, undef %1:vgpr_32, 1, 15, 15, 10, implicit $exec, implicit $mode
; GCN-NEXT: [[V_ADD_F32_dpp2:%[0-9]+]]:vgpr_32 = nofpexcept V_ADD_F32_dpp undef [[V_ADD_F32_dpp2]], 0, undef %1:vgpr_32, 0, undef %1:vgpr_32, 1, 15, 15, 10, implicit $exec, implicit $mode
; GCN-NEXT: S_NOP 0, implicit [[V_ADD_F32_dpp]]
; GCN-NEXT: S_NOP 0, implicit [[V_ADD_F32_dpp1]]
; GCN-NEXT: S_NOP 0, implicit [[V_ADD_F32_dpp2]]
; GCN-NEXT: S_ENDPGM 0
%1:vgpr_32 = nofpexcept V_ADD_F32_dpp undef %1:vgpr_32, 0, undef %0:vgpr_32, 0, undef %0:vgpr_32, 1, 15, 15, 10, implicit $exec, implicit $mode
%2:vgpr_32 = nofpexcept V_ADD_F32_dpp undef %2:vgpr_32, 0, undef %0:vgpr_32, 0, undef %0:vgpr_32, 1, 15, 15, 10, implicit $exec, implicit $mode
%3:vgpr_32 = nofpexcept V_ADD_F32_dpp undef %3:vgpr_32, 0, undef %0:vgpr_32, 0, undef %0:vgpr_32, 1, 15, 15, 10, implicit $exec, implicit $mode
S_NOP 0, implicit %1
S_NOP 0, implicit %2
S_NOP 0, implicit %3
S_ENDPGM 0
...
---
name: test_remat_v_sub_f32_e32
tracksRegLiveness: true
body: |
bb.0:
; GCN-LABEL: name: test_remat_v_sub_f32_e32
; GCN: [[V_SUB_F32_e32_:%[0-9]+]]:vgpr_32 = nofpexcept V_SUB_F32_e32 1, undef %1:vgpr_32, implicit $exec, implicit $mode
; GCN-NEXT: [[V_SUB_F32_e32_1:%[0-9]+]]:vgpr_32 = nofpexcept V_SUB_F32_e32 2, undef %1:vgpr_32, implicit $exec, implicit $mode
; GCN-NEXT: [[V_SUB_F32_e32_2:%[0-9]+]]:vgpr_32 = nofpexcept V_SUB_F32_e32 3, undef %1:vgpr_32, implicit $exec, implicit $mode
; GCN-NEXT: S_NOP 0, implicit [[V_SUB_F32_e32_]]
; GCN-NEXT: S_NOP 0, implicit [[V_SUB_F32_e32_1]]
; GCN-NEXT: S_NOP 0, implicit [[V_SUB_F32_e32_2]]
; GCN-NEXT: S_ENDPGM 0
%1:vgpr_32 = nofpexcept V_SUB_F32_e32 1, undef %0:vgpr_32, implicit $exec, implicit $mode
%2:vgpr_32 = nofpexcept V_SUB_F32_e32 2, undef %0:vgpr_32, implicit $exec, implicit $mode
%3:vgpr_32 = nofpexcept V_SUB_F32_e32 3, undef %0:vgpr_32, implicit $exec, implicit $mode
S_NOP 0, implicit %1
S_NOP 0, implicit %2
S_NOP 0, implicit %3
S_ENDPGM 0
...
---
name: test_remat_v_subrev_f32_e32
tracksRegLiveness: true
body: |
bb.0:
; GCN-LABEL: name: test_remat_v_subrev_f32_e32
; GCN: [[V_SUBREV_F32_e32_:%[0-9]+]]:vgpr_32 = nofpexcept V_SUBREV_F32_e32 1, undef %1:vgpr_32, implicit $exec, implicit $mode
; GCN-NEXT: [[V_SUBREV_F32_e32_1:%[0-9]+]]:vgpr_32 = nofpexcept V_SUBREV_F32_e32 2, undef %1:vgpr_32, implicit $exec, implicit $mode
; GCN-NEXT: [[V_SUBREV_F32_e32_2:%[0-9]+]]:vgpr_32 = nofpexcept V_SUBREV_F32_e32 3, undef %1:vgpr_32, implicit $exec, implicit $mode
; GCN-NEXT: S_NOP 0, implicit [[V_SUBREV_F32_e32_]]
; GCN-NEXT: S_NOP 0, implicit [[V_SUBREV_F32_e32_1]]
; GCN-NEXT: S_NOP 0, implicit [[V_SUBREV_F32_e32_2]]
; GCN-NEXT: S_ENDPGM 0
%1:vgpr_32 = nofpexcept V_SUBREV_F32_e32 1, undef %0:vgpr_32, implicit $exec, implicit $mode
%2:vgpr_32 = nofpexcept V_SUBREV_F32_e32 2, undef %0:vgpr_32, implicit $exec, implicit $mode
%3:vgpr_32 = nofpexcept V_SUBREV_F32_e32 3, undef %0:vgpr_32, implicit $exec, implicit $mode
S_NOP 0, implicit %1
S_NOP 0, implicit %2
S_NOP 0, implicit %3
S_ENDPGM 0
...
---
name: test_remat_v_mul_legacy_f32_e32
tracksRegLiveness: true
body: |
bb.0:
; GCN-LABEL: name: test_remat_v_mul_legacy_f32_e32
; GCN: [[V_MUL_LEGACY_F32_e32_:%[0-9]+]]:vgpr_32 = nofpexcept V_MUL_LEGACY_F32_e32 1, undef %1:vgpr_32, implicit $exec, implicit $mode
; GCN-NEXT: [[V_MUL_LEGACY_F32_e32_1:%[0-9]+]]:vgpr_32 = nofpexcept V_MUL_LEGACY_F32_e32 2, undef %1:vgpr_32, implicit $exec, implicit $mode
; GCN-NEXT: [[V_MUL_LEGACY_F32_e32_2:%[0-9]+]]:vgpr_32 = nofpexcept V_MUL_LEGACY_F32_e32 3, undef %1:vgpr_32, implicit $exec, implicit $mode
; GCN-NEXT: S_NOP 0, implicit [[V_MUL_LEGACY_F32_e32_]]
; GCN-NEXT: S_NOP 0, implicit [[V_MUL_LEGACY_F32_e32_1]]
; GCN-NEXT: S_NOP 0, implicit [[V_MUL_LEGACY_F32_e32_2]]
; GCN-NEXT: S_ENDPGM 0
%1:vgpr_32 = nofpexcept V_MUL_LEGACY_F32_e32 1, undef %0:vgpr_32, implicit $exec, implicit $mode
%2:vgpr_32 = nofpexcept V_MUL_LEGACY_F32_e32 2, undef %0:vgpr_32, implicit $exec, implicit $mode
%3:vgpr_32 = nofpexcept V_MUL_LEGACY_F32_e32 3, undef %0:vgpr_32, implicit $exec, implicit $mode
S_NOP 0, implicit %1
S_NOP 0, implicit %2
S_NOP 0, implicit %3
S_ENDPGM 0
...
---
name: test_remat_v_mul_f32_e32
tracksRegLiveness: true
body: |
bb.0:
; GCN-LABEL: name: test_remat_v_mul_f32_e32
; GCN: [[V_MUL_F32_e32_:%[0-9]+]]:vgpr_32 = nofpexcept V_MUL_F32_e32 1, undef %1:vgpr_32, implicit $exec, implicit $mode
; GCN-NEXT: [[V_MUL_F32_e32_1:%[0-9]+]]:vgpr_32 = nofpexcept V_MUL_F32_e32 2, undef %1:vgpr_32, implicit $exec, implicit $mode
; GCN-NEXT: [[V_MUL_F32_e32_2:%[0-9]+]]:vgpr_32 = nofpexcept V_MUL_F32_e32 3, undef %1:vgpr_32, implicit $exec, implicit $mode
; GCN-NEXT: S_NOP 0, implicit [[V_MUL_F32_e32_]]
; GCN-NEXT: S_NOP 0, implicit [[V_MUL_F32_e32_1]]
; GCN-NEXT: S_NOP 0, implicit [[V_MUL_F32_e32_2]]
; GCN-NEXT: S_ENDPGM 0
%1:vgpr_32 = nofpexcept V_MUL_F32_e32 1, undef %0:vgpr_32, implicit $exec, implicit $mode
%2:vgpr_32 = nofpexcept V_MUL_F32_e32 2, undef %0:vgpr_32, implicit $exec, implicit $mode
%3:vgpr_32 = nofpexcept V_MUL_F32_e32 3, undef %0:vgpr_32, implicit $exec, implicit $mode
S_NOP 0, implicit %1
S_NOP 0, implicit %2
S_NOP 0, implicit %3
S_ENDPGM 0
...
---
name: test_remat_v_mul_i32_i24_e32
tracksRegLiveness: true
body: |
bb.0:
; GCN-LABEL: name: test_remat_v_mul_i32_i24_e32
; GCN: [[V_MUL_I32_I24_e32_:%[0-9]+]]:vgpr_32 = V_MUL_I32_I24_e32 1, undef %1:vgpr_32, implicit $exec
; GCN-NEXT: [[V_MUL_I32_I24_e32_1:%[0-9]+]]:vgpr_32 = V_MUL_I32_I24_e32 2, undef %1:vgpr_32, implicit $exec
; GCN-NEXT: [[V_MUL_I32_I24_e32_2:%[0-9]+]]:vgpr_32 = V_MUL_I32_I24_e32 3, undef %1:vgpr_32, implicit $exec
; GCN-NEXT: S_NOP 0, implicit [[V_MUL_I32_I24_e32_]]
; GCN-NEXT: S_NOP 0, implicit [[V_MUL_I32_I24_e32_1]]
; GCN-NEXT: S_NOP 0, implicit [[V_MUL_I32_I24_e32_2]]
; GCN-NEXT: S_ENDPGM 0
%1:vgpr_32 = V_MUL_I32_I24_e32 1, undef %0:vgpr_32, implicit $exec
%2:vgpr_32 = V_MUL_I32_I24_e32 2, undef %0:vgpr_32, implicit $exec
%3:vgpr_32 = V_MUL_I32_I24_e32 3, undef %0:vgpr_32, implicit $exec
S_NOP 0, implicit %1
S_NOP 0, implicit %2
S_NOP 0, implicit %3
S_ENDPGM 0
...
---
name: test_remat_v_mul_hi_i32_i24_e32
tracksRegLiveness: true
body: |
bb.0:
; GCN-LABEL: name: test_remat_v_mul_hi_i32_i24_e32
; GCN: [[V_MUL_HI_I32_I24_e32_:%[0-9]+]]:vgpr_32 = V_MUL_HI_I32_I24_e32 1, undef %1:vgpr_32, implicit $exec
; GCN-NEXT: [[V_MUL_HI_I32_I24_e32_1:%[0-9]+]]:vgpr_32 = V_MUL_HI_I32_I24_e32 2, undef %1:vgpr_32, implicit $exec
; GCN-NEXT: [[V_MUL_HI_I32_I24_e32_2:%[0-9]+]]:vgpr_32 = V_MUL_HI_I32_I24_e32 3, undef %1:vgpr_32, implicit $exec
; GCN-NEXT: S_NOP 0, implicit [[V_MUL_HI_I32_I24_e32_]]
; GCN-NEXT: S_NOP 0, implicit [[V_MUL_HI_I32_I24_e32_1]]
; GCN-NEXT: S_NOP 0, implicit [[V_MUL_HI_I32_I24_e32_2]]
; GCN-NEXT: S_ENDPGM 0
%1:vgpr_32 = V_MUL_HI_I32_I24_e32 1, undef %0:vgpr_32, implicit $exec
%2:vgpr_32 = V_MUL_HI_I32_I24_e32 2, undef %0:vgpr_32, implicit $exec
%3:vgpr_32 = V_MUL_HI_I32_I24_e32 3, undef %0:vgpr_32, implicit $exec
S_NOP 0, implicit %1
S_NOP 0, implicit %2
S_NOP 0, implicit %3
S_ENDPGM 0
...
---
name: test_remat_v_mul_u32_u24_e32
tracksRegLiveness: true
body: |
bb.0:
; GCN-LABEL: name: test_remat_v_mul_u32_u24_e32
; GCN: [[V_MUL_U32_U24_e32_:%[0-9]+]]:vgpr_32 = V_MUL_U32_U24_e32 1, undef %1:vgpr_32, implicit $exec
; GCN-NEXT: [[V_MUL_U32_U24_e32_1:%[0-9]+]]:vgpr_32 = V_MUL_U32_U24_e32 2, undef %1:vgpr_32, implicit $exec
; GCN-NEXT: [[V_MUL_U32_U24_e32_2:%[0-9]+]]:vgpr_32 = V_MUL_U32_U24_e32 3, undef %1:vgpr_32, implicit $exec
; GCN-NEXT: S_NOP 0, implicit [[V_MUL_U32_U24_e32_]]
; GCN-NEXT: S_NOP 0, implicit [[V_MUL_U32_U24_e32_1]]
; GCN-NEXT: S_NOP 0, implicit [[V_MUL_U32_U24_e32_2]]
; GCN-NEXT: S_ENDPGM 0
%1:vgpr_32 = V_MUL_U32_U24_e32 1, undef %0:vgpr_32, implicit $exec
%2:vgpr_32 = V_MUL_U32_U24_e32 2, undef %0:vgpr_32, implicit $exec
%3:vgpr_32 = V_MUL_U32_U24_e32 3, undef %0:vgpr_32, implicit $exec
S_NOP 0, implicit %1
S_NOP 0, implicit %2
S_NOP 0, implicit %3
S_ENDPGM 0
...
---
name: test_remat_v_mul_hi_u32_u24_e32
tracksRegLiveness: true
body: |
bb.0:
; GCN-LABEL: name: test_remat_v_mul_hi_u32_u24_e32
; GCN: [[V_MUL_HI_U32_U24_e32_:%[0-9]+]]:vgpr_32 = V_MUL_HI_U32_U24_e32 1, undef %1:vgpr_32, implicit $exec
; GCN-NEXT: [[V_MUL_HI_U32_U24_e32_1:%[0-9]+]]:vgpr_32 = V_MUL_HI_U32_U24_e32 2, undef %1:vgpr_32, implicit $exec
; GCN-NEXT: [[V_MUL_HI_U32_U24_e32_2:%[0-9]+]]:vgpr_32 = V_MUL_HI_U32_U24_e32 3, undef %1:vgpr_32, implicit $exec
; GCN-NEXT: S_NOP 0, implicit [[V_MUL_HI_U32_U24_e32_]]
; GCN-NEXT: S_NOP 0, implicit [[V_MUL_HI_U32_U24_e32_1]]
; GCN-NEXT: S_NOP 0, implicit [[V_MUL_HI_U32_U24_e32_2]]
; GCN-NEXT: S_ENDPGM 0
%1:vgpr_32 = V_MUL_HI_U32_U24_e32 1, undef %0:vgpr_32, implicit $exec
%2:vgpr_32 = V_MUL_HI_U32_U24_e32 2, undef %0:vgpr_32, implicit $exec
%3:vgpr_32 = V_MUL_HI_U32_U24_e32 3, undef %0:vgpr_32, implicit $exec
S_NOP 0, implicit %1
S_NOP 0, implicit %2
S_NOP 0, implicit %3
S_ENDPGM 0
...
---
name: test_remat_v_min_f32_e32
tracksRegLiveness: true
body: |
bb.0:
; GCN-LABEL: name: test_remat_v_min_f32_e32
; GCN: [[V_MIN_F32_e32_:%[0-9]+]]:vgpr_32 = nofpexcept V_MIN_F32_e32 1, undef %1:vgpr_32, implicit $exec, implicit $mode
; GCN-NEXT: [[V_MIN_F32_e32_1:%[0-9]+]]:vgpr_32 = nofpexcept V_MIN_F32_e32 2, undef %1:vgpr_32, implicit $exec, implicit $mode
; GCN-NEXT: [[V_MIN_F32_e32_2:%[0-9]+]]:vgpr_32 = nofpexcept V_MIN_F32_e32 3, undef %1:vgpr_32, implicit $exec, implicit $mode
; GCN-NEXT: S_NOP 0, implicit [[V_MIN_F32_e32_]]
; GCN-NEXT: S_NOP 0, implicit [[V_MIN_F32_e32_1]]
; GCN-NEXT: S_NOP 0, implicit [[V_MIN_F32_e32_2]]
; GCN-NEXT: S_ENDPGM 0
%1:vgpr_32 = nofpexcept V_MIN_F32_e32 1, undef %0:vgpr_32, implicit $exec, implicit $mode
%2:vgpr_32 = nofpexcept V_MIN_F32_e32 2, undef %0:vgpr_32, implicit $exec, implicit $mode
%3:vgpr_32 = nofpexcept V_MIN_F32_e32 3, undef %0:vgpr_32, implicit $exec, implicit $mode
S_NOP 0, implicit %1
S_NOP 0, implicit %2
S_NOP 0, implicit %3
S_ENDPGM 0
...
---
name: test_remat_v_max_f32_e32
tracksRegLiveness: true
body: |
bb.0:
; GCN-LABEL: name: test_remat_v_max_f32_e32
; GCN: [[V_MAX_F32_e32_:%[0-9]+]]:vgpr_32 = nofpexcept V_MAX_F32_e32 1, undef %1:vgpr_32, implicit $exec, implicit $mode
; GCN-NEXT: [[V_MAX_F32_e32_1:%[0-9]+]]:vgpr_32 = nofpexcept V_MAX_F32_e32 2, undef %1:vgpr_32, implicit $exec, implicit $mode
; GCN-NEXT: [[V_MAX_F32_e32_2:%[0-9]+]]:vgpr_32 = nofpexcept V_MAX_F32_e32 3, undef %1:vgpr_32, implicit $exec, implicit $mode
; GCN-NEXT: S_NOP 0, implicit [[V_MAX_F32_e32_]]
; GCN-NEXT: S_NOP 0, implicit [[V_MAX_F32_e32_1]]
; GCN-NEXT: S_NOP 0, implicit [[V_MAX_F32_e32_2]]
; GCN-NEXT: S_ENDPGM 0
%1:vgpr_32 = nofpexcept V_MAX_F32_e32 1, undef %0:vgpr_32, implicit $exec, implicit $mode
%2:vgpr_32 = nofpexcept V_MAX_F32_e32 2, undef %0:vgpr_32, implicit $exec, implicit $mode
%3:vgpr_32 = nofpexcept V_MAX_F32_e32 3, undef %0:vgpr_32, implicit $exec, implicit $mode
S_NOP 0, implicit %1
S_NOP 0, implicit %2
S_NOP 0, implicit %3
S_ENDPGM 0
...
---
name: test_remat_v_min_i32_e32
tracksRegLiveness: true
body: |
bb.0:
; GCN-LABEL: name: test_remat_v_min_i32_e32
; GCN: [[V_MIN_I32_e32_:%[0-9]+]]:vgpr_32 = V_MIN_I32_e32 1, undef %1:vgpr_32, implicit $exec
; GCN-NEXT: [[V_MIN_I32_e32_1:%[0-9]+]]:vgpr_32 = V_MIN_I32_e32 2, undef %1:vgpr_32, implicit $exec
; GCN-NEXT: [[V_MIN_I32_e32_2:%[0-9]+]]:vgpr_32 = V_MIN_I32_e32 3, undef %1:vgpr_32, implicit $exec
; GCN-NEXT: S_NOP 0, implicit [[V_MIN_I32_e32_]]
; GCN-NEXT: S_NOP 0, implicit [[V_MIN_I32_e32_1]]
; GCN-NEXT: S_NOP 0, implicit [[V_MIN_I32_e32_2]]
; GCN-NEXT: S_ENDPGM 0
%1:vgpr_32 = V_MIN_I32_e32 1, undef %0:vgpr_32, implicit $exec
%2:vgpr_32 = V_MIN_I32_e32 2, undef %0:vgpr_32, implicit $exec
%3:vgpr_32 = V_MIN_I32_e32 3, undef %0:vgpr_32, implicit $exec
S_NOP 0, implicit %1
S_NOP 0, implicit %2
S_NOP 0, implicit %3
S_ENDPGM 0
...
---
name: test_remat_v_max_i32_e32
tracksRegLiveness: true
body: |
bb.0:
; GCN-LABEL: name: test_remat_v_max_i32_e32
; GCN: [[V_MAX_I32_e32_:%[0-9]+]]:vgpr_32 = V_MAX_I32_e32 1, undef %1:vgpr_32, implicit $exec
; GCN-NEXT: [[V_MAX_I32_e32_1:%[0-9]+]]:vgpr_32 = V_MAX_I32_e32 2, undef %1:vgpr_32, implicit $exec
; GCN-NEXT: [[V_MAX_I32_e32_2:%[0-9]+]]:vgpr_32 = V_MAX_I32_e32 3, undef %1:vgpr_32, implicit $exec
; GCN-NEXT: S_NOP 0, implicit [[V_MAX_I32_e32_]]
; GCN-NEXT: S_NOP 0, implicit [[V_MAX_I32_e32_1]]
; GCN-NEXT: S_NOP 0, implicit [[V_MAX_I32_e32_2]]
; GCN-NEXT: S_ENDPGM 0
%1:vgpr_32 = V_MAX_I32_e32 1, undef %0:vgpr_32, implicit $exec
%2:vgpr_32 = V_MAX_I32_e32 2, undef %0:vgpr_32, implicit $exec
%3:vgpr_32 = V_MAX_I32_e32 3, undef %0:vgpr_32, implicit $exec
S_NOP 0, implicit %1
S_NOP 0, implicit %2
S_NOP 0, implicit %3
S_ENDPGM 0
...
---
name: test_remat_v_min_u32_e32
tracksRegLiveness: true
body: |
bb.0:
; GCN-LABEL: name: test_remat_v_min_u32_e32
; GCN: [[V_MIN_U32_e32_:%[0-9]+]]:vgpr_32 = V_MIN_U32_e32 1, undef %1:vgpr_32, implicit $exec
; GCN-NEXT: [[V_MIN_U32_e32_1:%[0-9]+]]:vgpr_32 = V_MIN_U32_e32 2, undef %1:vgpr_32, implicit $exec
; GCN-NEXT: [[V_MIN_U32_e32_2:%[0-9]+]]:vgpr_32 = V_MIN_U32_e32 3, undef %1:vgpr_32, implicit $exec
; GCN-NEXT: S_NOP 0, implicit [[V_MIN_U32_e32_]]
; GCN-NEXT: S_NOP 0, implicit [[V_MIN_U32_e32_1]]
; GCN-NEXT: S_NOP 0, implicit [[V_MIN_U32_e32_2]]
; GCN-NEXT: S_ENDPGM 0
%1:vgpr_32 = V_MIN_U32_e32 1, undef %0:vgpr_32, implicit $exec
%2:vgpr_32 = V_MIN_U32_e32 2, undef %0:vgpr_32, implicit $exec
%3:vgpr_32 = V_MIN_U32_e32 3, undef %0:vgpr_32, implicit $exec
S_NOP 0, implicit %1
S_NOP 0, implicit %2
S_NOP 0, implicit %3
S_ENDPGM 0
...
---
name: test_remat_v_max_u32_e32
tracksRegLiveness: true
body: |
bb.0:
; GCN-LABEL: name: test_remat_v_max_u32_e32
; GCN: [[V_MAX_U32_e32_:%[0-9]+]]:vgpr_32 = V_MAX_U32_e32 1, undef %1:vgpr_32, implicit $exec
; GCN-NEXT: [[V_MAX_U32_e32_1:%[0-9]+]]:vgpr_32 = V_MAX_U32_e32 2, undef %1:vgpr_32, implicit $exec
; GCN-NEXT: [[V_MAX_U32_e32_2:%[0-9]+]]:vgpr_32 = V_MAX_U32_e32 3, undef %1:vgpr_32, implicit $exec
; GCN-NEXT: S_NOP 0, implicit [[V_MAX_U32_e32_]]
; GCN-NEXT: S_NOP 0, implicit [[V_MAX_U32_e32_1]]
; GCN-NEXT: S_NOP 0, implicit [[V_MAX_U32_e32_2]]
; GCN-NEXT: S_ENDPGM 0
%1:vgpr_32 = V_MAX_U32_e32 1, undef %0:vgpr_32, implicit $exec
%2:vgpr_32 = V_MAX_U32_e32 2, undef %0:vgpr_32, implicit $exec
%3:vgpr_32 = V_MAX_U32_e32 3, undef %0:vgpr_32, implicit $exec
S_NOP 0, implicit %1
S_NOP 0, implicit %2
S_NOP 0, implicit %3
S_ENDPGM 0
...
---
name: test_remat_v_lshrrev_b32_e32
tracksRegLiveness: true
body: |
bb.0:
; GCN-LABEL: name: test_remat_v_lshrrev_b32_e32
; GCN: [[V_LSHRREV_B32_e32_:%[0-9]+]]:vgpr_32 = V_LSHRREV_B32_e32 1, undef %1:vgpr_32, implicit $exec
; GCN-NEXT: [[V_LSHRREV_B32_e32_1:%[0-9]+]]:vgpr_32 = V_LSHRREV_B32_e32 2, undef %1:vgpr_32, implicit $exec
; GCN-NEXT: [[V_LSHRREV_B32_e32_2:%[0-9]+]]:vgpr_32 = V_LSHRREV_B32_e32 3, undef %1:vgpr_32, implicit $exec
; GCN-NEXT: S_NOP 0, implicit [[V_LSHRREV_B32_e32_]]
; GCN-NEXT: S_NOP 0, implicit [[V_LSHRREV_B32_e32_1]]
; GCN-NEXT: S_NOP 0, implicit [[V_LSHRREV_B32_e32_2]]
; GCN-NEXT: S_ENDPGM 0
%1:vgpr_32 = V_LSHRREV_B32_e32 1, undef %0:vgpr_32, implicit $exec
%2:vgpr_32 = V_LSHRREV_B32_e32 2, undef %0:vgpr_32, implicit $exec
%3:vgpr_32 = V_LSHRREV_B32_e32 3, undef %0:vgpr_32, implicit $exec
S_NOP 0, implicit %1
S_NOP 0, implicit %2
S_NOP 0, implicit %3
S_ENDPGM 0
...
---
name: test_remat_v_lshlrev_b32_e32
tracksRegLiveness: true
body: |
bb.0:
; GCN-LABEL: name: test_remat_v_lshlrev_b32_e32
; GCN: [[V_LSHLREV_B32_e32_:%[0-9]+]]:vgpr_32 = V_LSHLREV_B32_e32 1, undef %1:vgpr_32, implicit $exec
; GCN-NEXT: [[V_LSHLREV_B32_e32_1:%[0-9]+]]:vgpr_32 = V_LSHLREV_B32_e32 2, undef %1:vgpr_32, implicit $exec
; GCN-NEXT: [[V_LSHLREV_B32_e32_2:%[0-9]+]]:vgpr_32 = V_LSHLREV_B32_e32 3, undef %1:vgpr_32, implicit $exec
; GCN-NEXT: S_NOP 0, implicit [[V_LSHLREV_B32_e32_]]
; GCN-NEXT: S_NOP 0, implicit [[V_LSHLREV_B32_e32_1]]
; GCN-NEXT: S_NOP 0, implicit [[V_LSHLREV_B32_e32_2]]
; GCN-NEXT: S_ENDPGM 0
%1:vgpr_32 = V_LSHLREV_B32_e32 1, undef %0:vgpr_32, implicit $exec
%2:vgpr_32 = V_LSHLREV_B32_e32 2, undef %0:vgpr_32, implicit $exec
%3:vgpr_32 = V_LSHLREV_B32_e32 3, undef %0:vgpr_32, implicit $exec
S_NOP 0, implicit %1
S_NOP 0, implicit %2
S_NOP 0, implicit %3
S_ENDPGM 0
...
---
name: test_remat_v_ashrrev_i32_e32
tracksRegLiveness: true
body: |
bb.0:
; GCN-LABEL: name: test_remat_v_ashrrev_i32_e32
; GCN: [[V_ASHRREV_I32_e32_:%[0-9]+]]:vgpr_32 = V_ASHRREV_I32_e32 1, undef %1:vgpr_32, implicit $exec
; GCN-NEXT: [[V_ASHRREV_I32_e32_1:%[0-9]+]]:vgpr_32 = V_ASHRREV_I32_e32 2, undef %1:vgpr_32, implicit $exec
; GCN-NEXT: [[V_ASHRREV_I32_e32_2:%[0-9]+]]:vgpr_32 = V_ASHRREV_I32_e32 3, undef %1:vgpr_32, implicit $exec
; GCN-NEXT: S_NOP 0, implicit [[V_ASHRREV_I32_e32_]]
; GCN-NEXT: S_NOP 0, implicit [[V_ASHRREV_I32_e32_1]]
; GCN-NEXT: S_NOP 0, implicit [[V_ASHRREV_I32_e32_2]]
; GCN-NEXT: S_ENDPGM 0
%1:vgpr_32 = V_ASHRREV_I32_e32 1, undef %0:vgpr_32, implicit $exec
%2:vgpr_32 = V_ASHRREV_I32_e32 2, undef %0:vgpr_32, implicit $exec
%3:vgpr_32 = V_ASHRREV_I32_e32 3, undef %0:vgpr_32, implicit $exec
S_NOP 0, implicit %1
S_NOP 0, implicit %2
S_NOP 0, implicit %3
S_ENDPGM 0
...
---
name: test_remat_v_and_b32_e32
tracksRegLiveness: true
body: |
bb.0:
; GCN-LABEL: name: test_remat_v_and_b32_e32
; GCN: [[V_AND_B32_e32_:%[0-9]+]]:vgpr_32 = V_AND_B32_e32 1, undef %1:vgpr_32, implicit $exec
; GCN-NEXT: [[V_AND_B32_e32_1:%[0-9]+]]:vgpr_32 = V_AND_B32_e32 2, undef %1:vgpr_32, implicit $exec
; GCN-NEXT: [[V_AND_B32_e32_2:%[0-9]+]]:vgpr_32 = V_AND_B32_e32 3, undef %1:vgpr_32, implicit $exec
; GCN-NEXT: S_NOP 0, implicit [[V_AND_B32_e32_]]
; GCN-NEXT: S_NOP 0, implicit [[V_AND_B32_e32_1]]
; GCN-NEXT: S_NOP 0, implicit [[V_AND_B32_e32_2]]
; GCN-NEXT: S_ENDPGM 0
%1:vgpr_32 = V_AND_B32_e32 1, undef %0:vgpr_32, implicit $exec
%2:vgpr_32 = V_AND_B32_e32 2, undef %0:vgpr_32, implicit $exec
%3:vgpr_32 = V_AND_B32_e32 3, undef %0:vgpr_32, implicit $exec
S_NOP 0, implicit %1
S_NOP 0, implicit %2
S_NOP 0, implicit %3
S_ENDPGM 0
...
---
name: test_remat_v_or_b32_e32
tracksRegLiveness: true
body: |
bb.0:
; GCN-LABEL: name: test_remat_v_or_b32_e32
; GCN: [[V_OR_B32_e32_:%[0-9]+]]:vgpr_32 = V_OR_B32_e32 1, undef %1:vgpr_32, implicit $exec
; GCN-NEXT: [[V_OR_B32_e32_1:%[0-9]+]]:vgpr_32 = V_OR_B32_e32 2, undef %1:vgpr_32, implicit $exec
; GCN-NEXT: [[V_OR_B32_e32_2:%[0-9]+]]:vgpr_32 = V_OR_B32_e32 3, undef %1:vgpr_32, implicit $exec
; GCN-NEXT: S_NOP 0, implicit [[V_OR_B32_e32_]]
; GCN-NEXT: S_NOP 0, implicit [[V_OR_B32_e32_1]]
; GCN-NEXT: S_NOP 0, implicit [[V_OR_B32_e32_2]]
; GCN-NEXT: S_ENDPGM 0
%1:vgpr_32 = V_OR_B32_e32 1, undef %0:vgpr_32, implicit $exec
%2:vgpr_32 = V_OR_B32_e32 2, undef %0:vgpr_32, implicit $exec
%3:vgpr_32 = V_OR_B32_e32 3, undef %0:vgpr_32, implicit $exec
S_NOP 0, implicit %1
S_NOP 0, implicit %2
S_NOP 0, implicit %3
S_ENDPGM 0
...
---
name: test_remat_v_xor_b32_e32
tracksRegLiveness: true
body: |
bb.0:
; GCN-LABEL: name: test_remat_v_xor_b32_e32
; GCN: [[V_XOR_B32_e32_:%[0-9]+]]:vgpr_32 = V_XOR_B32_e32 1, undef %1:vgpr_32, implicit $exec
; GCN-NEXT: [[V_XOR_B32_e32_1:%[0-9]+]]:vgpr_32 = V_XOR_B32_e32 2, undef %1:vgpr_32, implicit $exec
; GCN-NEXT: [[V_XOR_B32_e32_2:%[0-9]+]]:vgpr_32 = V_XOR_B32_e32 3, undef %1:vgpr_32, implicit $exec
; GCN-NEXT: S_NOP 0, implicit [[V_XOR_B32_e32_]]
; GCN-NEXT: S_NOP 0, implicit [[V_XOR_B32_e32_1]]
; GCN-NEXT: S_NOP 0, implicit [[V_XOR_B32_e32_2]]
; GCN-NEXT: S_ENDPGM 0
%1:vgpr_32 = V_XOR_B32_e32 1, undef %0:vgpr_32, implicit $exec
%2:vgpr_32 = V_XOR_B32_e32 2, undef %0:vgpr_32, implicit $exec
%3:vgpr_32 = V_XOR_B32_e32 3, undef %0:vgpr_32, implicit $exec
S_NOP 0, implicit %1
S_NOP 0, implicit %2
S_NOP 0, implicit %3
S_ENDPGM 0
...
---
name: test_remat_v_madak_f32
tracksRegLiveness: true
body: |
bb.0:
; GCN-LABEL: name: test_remat_v_madak_f32
; GCN: [[V_MADAK_F32_:%[0-9]+]]:vgpr_32 = nofpexcept V_MADAK_F32 1, undef %1:vgpr_32, 1, implicit $exec, implicit $mode
; GCN-NEXT: [[V_MADAK_F32_1:%[0-9]+]]:vgpr_32 = nofpexcept V_MADAK_F32 2, undef %1:vgpr_32, 2, implicit $exec, implicit $mode
; GCN-NEXT: [[V_MADAK_F32_2:%[0-9]+]]:vgpr_32 = nofpexcept V_MADAK_F32 3, undef %1:vgpr_32, 3, implicit $exec, implicit $mode
; GCN-NEXT: S_NOP 0, implicit [[V_MADAK_F32_]]
; GCN-NEXT: S_NOP 0, implicit [[V_MADAK_F32_1]]
; GCN-NEXT: S_NOP 0, implicit [[V_MADAK_F32_2]]
; GCN-NEXT: S_ENDPGM 0
%1:vgpr_32 = nofpexcept V_MADAK_F32 1, undef %0:vgpr_32, 1, implicit $exec, implicit $mode
%2:vgpr_32 = nofpexcept V_MADAK_F32 2, undef %0:vgpr_32, 2, implicit $exec, implicit $mode
%3:vgpr_32 = nofpexcept V_MADAK_F32 3, undef %0:vgpr_32, 3, implicit $exec, implicit $mode
S_NOP 0, implicit %1
S_NOP 0, implicit %2
S_NOP 0, implicit %3
S_ENDPGM 0
...
---
name: test_remat_v_add_u32_e32
tracksRegLiveness: true
body: |
bb.0:
; GCN-LABEL: name: test_remat_v_add_u32_e32
; GCN: [[V_ADD_U32_e32_:%[0-9]+]]:vgpr_32 = V_ADD_U32_e32 1, undef %1:vgpr_32, implicit $exec
; GCN-NEXT: [[V_ADD_U32_e32_1:%[0-9]+]]:vgpr_32 = V_ADD_U32_e32 2, undef %1:vgpr_32, implicit $exec
; GCN-NEXT: [[V_ADD_U32_e32_2:%[0-9]+]]:vgpr_32 = V_ADD_U32_e32 3, undef %1:vgpr_32, implicit $exec
; GCN-NEXT: S_NOP 0, implicit [[V_ADD_U32_e32_]]
; GCN-NEXT: S_NOP 0, implicit [[V_ADD_U32_e32_1]]
; GCN-NEXT: S_NOP 0, implicit [[V_ADD_U32_e32_2]]
; GCN-NEXT: S_ENDPGM 0
%1:vgpr_32 = V_ADD_U32_e32 1, undef %0:vgpr_32, implicit $exec
%2:vgpr_32 = V_ADD_U32_e32 2, undef %0:vgpr_32, implicit $exec
%3:vgpr_32 = V_ADD_U32_e32 3, undef %0:vgpr_32, implicit $exec
S_NOP 0, implicit %1
S_NOP 0, implicit %2
S_NOP 0, implicit %3
S_ENDPGM 0
...
---
name: test_remat_v_sub_u32_e32
tracksRegLiveness: true
body: |
bb.0:
; GCN-LABEL: name: test_remat_v_sub_u32_e32
; GCN: [[V_SUB_U32_e32_:%[0-9]+]]:vgpr_32 = V_SUB_U32_e32 1, undef %1:vgpr_32, implicit $exec
; GCN-NEXT: [[V_SUB_U32_e32_1:%[0-9]+]]:vgpr_32 = V_SUB_U32_e32 2, undef %1:vgpr_32, implicit $exec
; GCN-NEXT: [[V_SUB_U32_e32_2:%[0-9]+]]:vgpr_32 = V_SUB_U32_e32 3, undef %1:vgpr_32, implicit $exec
; GCN-NEXT: S_NOP 0, implicit [[V_SUB_U32_e32_]]
; GCN-NEXT: S_NOP 0, implicit [[V_SUB_U32_e32_1]]
; GCN-NEXT: S_NOP 0, implicit [[V_SUB_U32_e32_2]]
; GCN-NEXT: S_ENDPGM 0
%1:vgpr_32 = V_SUB_U32_e32 1, undef %0:vgpr_32, implicit $exec
%2:vgpr_32 = V_SUB_U32_e32 2, undef %0:vgpr_32, implicit $exec
%3:vgpr_32 = V_SUB_U32_e32 3, undef %0:vgpr_32, implicit $exec
S_NOP 0, implicit %1
S_NOP 0, implicit %2
S_NOP 0, implicit %3
S_ENDPGM 0
...
---
name: test_remat_v_subrev_u32_e32
tracksRegLiveness: true
body: |
bb.0:
; GCN-LABEL: name: test_remat_v_subrev_u32_e32
; GCN: [[V_SUBREV_U32_e32_:%[0-9]+]]:vgpr_32 = V_SUBREV_U32_e32 1, undef %1:vgpr_32, implicit $exec
; GCN-NEXT: [[V_SUBREV_U32_e32_1:%[0-9]+]]:vgpr_32 = V_SUBREV_U32_e32 2, undef %1:vgpr_32, implicit $exec
; GCN-NEXT: [[V_SUBREV_U32_e32_2:%[0-9]+]]:vgpr_32 = V_SUBREV_U32_e32 3, undef %1:vgpr_32, implicit $exec
; GCN-NEXT: S_NOP 0, implicit [[V_SUBREV_U32_e32_]]
; GCN-NEXT: S_NOP 0, implicit [[V_SUBREV_U32_e32_1]]
; GCN-NEXT: S_NOP 0, implicit [[V_SUBREV_U32_e32_2]]
; GCN-NEXT: S_ENDPGM 0
%1:vgpr_32 = V_SUBREV_U32_e32 1, undef %0:vgpr_32, implicit $exec
%2:vgpr_32 = V_SUBREV_U32_e32 2, undef %0:vgpr_32, implicit $exec
%3:vgpr_32 = V_SUBREV_U32_e32 3, undef %0:vgpr_32, implicit $exec
S_NOP 0, implicit %1
S_NOP 0, implicit %2
S_NOP 0, implicit %3
S_ENDPGM 0
...
---
name: test_remat_v_bfm_b32_e32
tracksRegLiveness: true
body: |
bb.0:
; GCN-LABEL: name: test_remat_v_bfm_b32_e32
; GCN: [[V_BFM_B32_e32_:%[0-9]+]]:vgpr_32 = V_BFM_B32_e32 1, undef %1:vgpr_32, implicit $exec
; GCN-NEXT: [[V_BFM_B32_e32_1:%[0-9]+]]:vgpr_32 = V_BFM_B32_e32 2, undef %1:vgpr_32, implicit $exec
; GCN-NEXT: [[V_BFM_B32_e32_2:%[0-9]+]]:vgpr_32 = V_BFM_B32_e32 3, undef %1:vgpr_32, implicit $exec
; GCN-NEXT: S_NOP 0, implicit [[V_BFM_B32_e32_]]
; GCN-NEXT: S_NOP 0, implicit [[V_BFM_B32_e32_1]]
; GCN-NEXT: S_NOP 0, implicit [[V_BFM_B32_e32_2]]
; GCN-NEXT: S_ENDPGM 0
%1:vgpr_32 = V_BFM_B32_e32 1, undef %0:vgpr_32, implicit $exec
%2:vgpr_32 = V_BFM_B32_e32 2, undef %0:vgpr_32, implicit $exec
%3:vgpr_32 = V_BFM_B32_e32 3, undef %0:vgpr_32, implicit $exec
S_NOP 0, implicit %1
S_NOP 0, implicit %2
S_NOP 0, implicit %3
S_ENDPGM 0
...
---
name: test_remat_v_bcnt_u32_b32_e32
tracksRegLiveness: true
body: |
bb.0:
; GCN-LABEL: name: test_remat_v_bcnt_u32_b32_e32
; GCN: [[V_BCNT_U32_B32_e32_:%[0-9]+]]:vgpr_32 = V_BCNT_U32_B32_e32 1, undef %1:vgpr_32, implicit $exec
; GCN-NEXT: [[V_BCNT_U32_B32_e32_1:%[0-9]+]]:vgpr_32 = V_BCNT_U32_B32_e32 2, undef %1:vgpr_32, implicit $exec
; GCN-NEXT: [[V_BCNT_U32_B32_e32_2:%[0-9]+]]:vgpr_32 = V_BCNT_U32_B32_e32 3, undef %1:vgpr_32, implicit $exec
; GCN-NEXT: S_NOP 0, implicit [[V_BCNT_U32_B32_e32_]]
; GCN-NEXT: S_NOP 0, implicit [[V_BCNT_U32_B32_e32_1]]
; GCN-NEXT: S_NOP 0, implicit [[V_BCNT_U32_B32_e32_2]]
; GCN-NEXT: S_ENDPGM 0
%1:vgpr_32 = V_BCNT_U32_B32_e32 1, undef %0:vgpr_32, implicit $exec
%2:vgpr_32 = V_BCNT_U32_B32_e32 2, undef %0:vgpr_32, implicit $exec
%3:vgpr_32 = V_BCNT_U32_B32_e32 3, undef %0:vgpr_32, implicit $exec
S_NOP 0, implicit %1
S_NOP 0, implicit %2
S_NOP 0, implicit %3
S_ENDPGM 0
...
---
name: test_remat_v_mbcnt_lo_u32_b32_e32
tracksRegLiveness: true
body: |
bb.0:
; GCN-LABEL: name: test_remat_v_mbcnt_lo_u32_b32_e32
; GCN: [[V_MBCNT_LO_U32_B32_e32_:%[0-9]+]]:vgpr_32 = V_MBCNT_LO_U32_B32_e32 1, undef %1:vgpr_32, implicit $exec
; GCN-NEXT: [[V_MBCNT_LO_U32_B32_e32_1:%[0-9]+]]:vgpr_32 = V_MBCNT_LO_U32_B32_e32 2, undef %1:vgpr_32, implicit $exec
; GCN-NEXT: [[V_MBCNT_LO_U32_B32_e32_2:%[0-9]+]]:vgpr_32 = V_MBCNT_LO_U32_B32_e32 3, undef %1:vgpr_32, implicit $exec
; GCN-NEXT: S_NOP 0, implicit [[V_MBCNT_LO_U32_B32_e32_]]
; GCN-NEXT: S_NOP 0, implicit [[V_MBCNT_LO_U32_B32_e32_1]]
; GCN-NEXT: S_NOP 0, implicit [[V_MBCNT_LO_U32_B32_e32_2]]
; GCN-NEXT: S_ENDPGM 0
%1:vgpr_32 = V_MBCNT_LO_U32_B32_e32 1, undef %0:vgpr_32, implicit $exec
%2:vgpr_32 = V_MBCNT_LO_U32_B32_e32 2, undef %0:vgpr_32, implicit $exec
%3:vgpr_32 = V_MBCNT_LO_U32_B32_e32 3, undef %0:vgpr_32, implicit $exec
S_NOP 0, implicit %1
S_NOP 0, implicit %2
S_NOP 0, implicit %3
S_ENDPGM 0
...
---
name: test_remat_v_mbcnt_hi_u32_b32_e32
tracksRegLiveness: true
body: |
bb.0:
; GCN-LABEL: name: test_remat_v_mbcnt_hi_u32_b32_e32
; GCN: [[V_MBCNT_HI_U32_B32_e32_:%[0-9]+]]:vgpr_32 = V_MBCNT_HI_U32_B32_e32 1, undef %1:vgpr_32, implicit $exec
; GCN-NEXT: [[V_MBCNT_HI_U32_B32_e32_1:%[0-9]+]]:vgpr_32 = V_MBCNT_HI_U32_B32_e32 2, undef %1:vgpr_32, implicit $exec
; GCN-NEXT: [[V_MBCNT_HI_U32_B32_e32_2:%[0-9]+]]:vgpr_32 = V_MBCNT_HI_U32_B32_e32 3, undef %1:vgpr_32, implicit $exec
; GCN-NEXT: S_NOP 0, implicit [[V_MBCNT_HI_U32_B32_e32_]]
; GCN-NEXT: S_NOP 0, implicit [[V_MBCNT_HI_U32_B32_e32_1]]
; GCN-NEXT: S_NOP 0, implicit [[V_MBCNT_HI_U32_B32_e32_2]]
; GCN-NEXT: S_ENDPGM 0
%1:vgpr_32 = V_MBCNT_HI_U32_B32_e32 1, undef %0:vgpr_32, implicit $exec
%2:vgpr_32 = V_MBCNT_HI_U32_B32_e32 2, undef %0:vgpr_32, implicit $exec
%3:vgpr_32 = V_MBCNT_HI_U32_B32_e32 3, undef %0:vgpr_32, implicit $exec
S_NOP 0, implicit %1
S_NOP 0, implicit %2
S_NOP 0, implicit %3
S_ENDPGM 0
...
---
name: test_remat_v_ldexp_f32_e32
tracksRegLiveness: true
body: |
bb.0:
; GCN-LABEL: name: test_remat_v_ldexp_f32_e32
; GCN: [[V_LDEXP_F32_e32_:%[0-9]+]]:vgpr_32 = nofpexcept V_LDEXP_F32_e32 1, undef %1:vgpr_32, implicit $exec, implicit $mode
; GCN-NEXT: [[V_LDEXP_F32_e32_1:%[0-9]+]]:vgpr_32 = nofpexcept V_LDEXP_F32_e32 2, undef %1:vgpr_32, implicit $exec, implicit $mode
; GCN-NEXT: [[V_LDEXP_F32_e32_2:%[0-9]+]]:vgpr_32 = nofpexcept V_LDEXP_F32_e32 3, undef %1:vgpr_32, implicit $exec, implicit $mode
; GCN-NEXT: S_NOP 0, implicit [[V_LDEXP_F32_e32_]]
; GCN-NEXT: S_NOP 0, implicit [[V_LDEXP_F32_e32_1]]
; GCN-NEXT: S_NOP 0, implicit [[V_LDEXP_F32_e32_2]]
; GCN-NEXT: S_ENDPGM 0
%1:vgpr_32 = nofpexcept V_LDEXP_F32_e32 1, undef %0:vgpr_32, implicit $exec, implicit $mode
%2:vgpr_32 = nofpexcept V_LDEXP_F32_e32 2, undef %0:vgpr_32, implicit $exec, implicit $mode
%3:vgpr_32 = nofpexcept V_LDEXP_F32_e32 3, undef %0:vgpr_32, implicit $exec, implicit $mode
S_NOP 0, implicit %1
S_NOP 0, implicit %2
S_NOP 0, implicit %3
S_ENDPGM 0
...
---
name: test_remat_v_cvt_pknorm_i16_f32_e32
tracksRegLiveness: true
body: |
bb.0:
; GCN-LABEL: name: test_remat_v_cvt_pknorm_i16_f32_e32
; GCN: [[V_CVT_PKNORM_I16_F32_e32_:%[0-9]+]]:vgpr_32 = V_CVT_PKNORM_I16_F32_e32 1, undef %1:vgpr_32, implicit $exec
; GCN-NEXT: [[V_CVT_PKNORM_I16_F32_e32_1:%[0-9]+]]:vgpr_32 = V_CVT_PKNORM_I16_F32_e32 2, undef %1:vgpr_32, implicit $exec
; GCN-NEXT: [[V_CVT_PKNORM_I16_F32_e32_2:%[0-9]+]]:vgpr_32 = V_CVT_PKNORM_I16_F32_e32 3, undef %1:vgpr_32, implicit $exec
; GCN-NEXT: S_NOP 0, implicit [[V_CVT_PKNORM_I16_F32_e32_]]
; GCN-NEXT: S_NOP 0, implicit [[V_CVT_PKNORM_I16_F32_e32_1]]
; GCN-NEXT: S_NOP 0, implicit [[V_CVT_PKNORM_I16_F32_e32_2]]
; GCN-NEXT: S_ENDPGM 0
%1:vgpr_32 = V_CVT_PKNORM_I16_F32_e32 1, undef %0:vgpr_32, implicit $exec
%2:vgpr_32 = V_CVT_PKNORM_I16_F32_e32 2, undef %0:vgpr_32, implicit $exec
%3:vgpr_32 = V_CVT_PKNORM_I16_F32_e32 3, undef %0:vgpr_32, implicit $exec
S_NOP 0, implicit %1
S_NOP 0, implicit %2
S_NOP 0, implicit %3
S_ENDPGM 0
...
---
name: test_remat_v_cvt_pknorm_u16_f32_e32
tracksRegLiveness: true
body: |
bb.0:
; GCN-LABEL: name: test_remat_v_cvt_pknorm_u16_f32_e32
; GCN: [[V_CVT_PKNORM_U16_F32_e32_:%[0-9]+]]:vgpr_32 = V_CVT_PKNORM_U16_F32_e32 1, undef %1:vgpr_32, implicit $exec
; GCN-NEXT: [[V_CVT_PKNORM_U16_F32_e32_1:%[0-9]+]]:vgpr_32 = V_CVT_PKNORM_U16_F32_e32 2, undef %1:vgpr_32, implicit $exec
; GCN-NEXT: [[V_CVT_PKNORM_U16_F32_e32_2:%[0-9]+]]:vgpr_32 = V_CVT_PKNORM_U16_F32_e32 3, undef %1:vgpr_32, implicit $exec
; GCN-NEXT: S_NOP 0, implicit [[V_CVT_PKNORM_U16_F32_e32_]]
; GCN-NEXT: S_NOP 0, implicit [[V_CVT_PKNORM_U16_F32_e32_1]]
; GCN-NEXT: S_NOP 0, implicit [[V_CVT_PKNORM_U16_F32_e32_2]]
; GCN-NEXT: S_ENDPGM 0
%1:vgpr_32 = V_CVT_PKNORM_U16_F32_e32 1, undef %0:vgpr_32, implicit $exec
%2:vgpr_32 = V_CVT_PKNORM_U16_F32_e32 2, undef %0:vgpr_32, implicit $exec
%3:vgpr_32 = V_CVT_PKNORM_U16_F32_e32 3, undef %0:vgpr_32, implicit $exec
S_NOP 0, implicit %1
S_NOP 0, implicit %2
S_NOP 0, implicit %3
S_ENDPGM 0
...
---
name: test_remat_v_cvt_pkrtz_f16_f32_e32
tracksRegLiveness: true
body: |
bb.0:
; GCN-LABEL: name: test_remat_v_cvt_pkrtz_f16_f32_e32
; GCN: [[V_CVT_PKRTZ_F16_F32_e32_:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_PKRTZ_F16_F32_e32 1, undef %1:vgpr_32, implicit $exec, implicit $mode
; GCN-NEXT: [[V_CVT_PKRTZ_F16_F32_e32_1:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_PKRTZ_F16_F32_e32 2, undef %1:vgpr_32, implicit $exec, implicit $mode
; GCN-NEXT: [[V_CVT_PKRTZ_F16_F32_e32_2:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_PKRTZ_F16_F32_e32 3, undef %1:vgpr_32, implicit $exec, implicit $mode
; GCN-NEXT: S_NOP 0, implicit [[V_CVT_PKRTZ_F16_F32_e32_]]
; GCN-NEXT: S_NOP 0, implicit [[V_CVT_PKRTZ_F16_F32_e32_1]]
; GCN-NEXT: S_NOP 0, implicit [[V_CVT_PKRTZ_F16_F32_e32_2]]
; GCN-NEXT: S_ENDPGM 0
%1:vgpr_32 = nofpexcept V_CVT_PKRTZ_F16_F32_e32 1, undef %0:vgpr_32, implicit $exec, implicit $mode
%2:vgpr_32 = nofpexcept V_CVT_PKRTZ_F16_F32_e32 2, undef %0:vgpr_32, implicit $exec, implicit $mode
%3:vgpr_32 = nofpexcept V_CVT_PKRTZ_F16_F32_e32 3, undef %0:vgpr_32, implicit $exec, implicit $mode
S_NOP 0, implicit %1
S_NOP 0, implicit %2
S_NOP 0, implicit %3
S_ENDPGM 0
...
---
name: test_remat_v_cvt_pk_u16_u32_e32
tracksRegLiveness: true
body: |
bb.0:
; GCN-LABEL: name: test_remat_v_cvt_pk_u16_u32_e32
; GCN: [[V_CVT_PK_U16_U32_e32_:%[0-9]+]]:vgpr_32 = V_CVT_PK_U16_U32_e32 1, undef %1:vgpr_32, implicit $exec
; GCN-NEXT: [[V_CVT_PK_U16_U32_e32_1:%[0-9]+]]:vgpr_32 = V_CVT_PK_U16_U32_e32 2, undef %1:vgpr_32, implicit $exec
; GCN-NEXT: [[V_CVT_PK_U16_U32_e32_2:%[0-9]+]]:vgpr_32 = V_CVT_PK_U16_U32_e32 3, undef %1:vgpr_32, implicit $exec
; GCN-NEXT: S_NOP 0, implicit [[V_CVT_PK_U16_U32_e32_]]
; GCN-NEXT: S_NOP 0, implicit [[V_CVT_PK_U16_U32_e32_1]]
; GCN-NEXT: S_NOP 0, implicit [[V_CVT_PK_U16_U32_e32_2]]
; GCN-NEXT: S_ENDPGM 0
%1:vgpr_32 = V_CVT_PK_U16_U32_e32 1, undef %0:vgpr_32, implicit $exec
%2:vgpr_32 = V_CVT_PK_U16_U32_e32 2, undef %0:vgpr_32, implicit $exec
%3:vgpr_32 = V_CVT_PK_U16_U32_e32 3, undef %0:vgpr_32, implicit $exec
S_NOP 0, implicit %1
S_NOP 0, implicit %2
S_NOP 0, implicit %3
S_ENDPGM 0
...
---
name: test_remat_v_cvt_pk_i16_i32_e32
tracksRegLiveness: true
body: |
bb.0:
; GCN-LABEL: name: test_remat_v_cvt_pk_i16_i32_e32
; GCN: [[V_CVT_PK_I16_I32_e32_:%[0-9]+]]:vgpr_32 = V_CVT_PK_I16_I32_e32 1, undef %1:vgpr_32, implicit $exec
; GCN-NEXT: [[V_CVT_PK_I16_I32_e32_1:%[0-9]+]]:vgpr_32 = V_CVT_PK_I16_I32_e32 2, undef %1:vgpr_32, implicit $exec
; GCN-NEXT: [[V_CVT_PK_I16_I32_e32_2:%[0-9]+]]:vgpr_32 = V_CVT_PK_I16_I32_e32 3, undef %1:vgpr_32, implicit $exec
; GCN-NEXT: S_NOP 0, implicit [[V_CVT_PK_I16_I32_e32_]]
; GCN-NEXT: S_NOP 0, implicit [[V_CVT_PK_I16_I32_e32_1]]
; GCN-NEXT: S_NOP 0, implicit [[V_CVT_PK_I16_I32_e32_2]]
; GCN-NEXT: S_ENDPGM 0
%1:vgpr_32 = V_CVT_PK_I16_I32_e32 1, undef %0:vgpr_32, implicit $exec
%2:vgpr_32 = V_CVT_PK_I16_I32_e32 2, undef %0:vgpr_32, implicit $exec
%3:vgpr_32 = V_CVT_PK_I16_I32_e32 3, undef %0:vgpr_32, implicit $exec
S_NOP 0, implicit %1
S_NOP 0, implicit %2
S_NOP 0, implicit %3
S_ENDPGM 0
...
---
name: test_remat_v_min_legacy_f32_e32
tracksRegLiveness: true
body: |
bb.0:
; GCN-LABEL: name: test_remat_v_min_legacy_f32_e32
; GCN: [[V_MIN_LEGACY_F32_e32_:%[0-9]+]]:vgpr_32 = nofpexcept V_MIN_LEGACY_F32_e32 1, undef %1:vgpr_32, implicit $exec, implicit $mode
; GCN-NEXT: [[V_MIN_LEGACY_F32_e32_1:%[0-9]+]]:vgpr_32 = nofpexcept V_MIN_LEGACY_F32_e32 2, undef %1:vgpr_32, implicit $exec, implicit $mode
; GCN-NEXT: [[V_MIN_LEGACY_F32_e32_2:%[0-9]+]]:vgpr_32 = nofpexcept V_MIN_LEGACY_F32_e32 3, undef %1:vgpr_32, implicit $exec, implicit $mode
; GCN-NEXT: S_NOP 0, implicit [[V_MIN_LEGACY_F32_e32_]]
; GCN-NEXT: S_NOP 0, implicit [[V_MIN_LEGACY_F32_e32_1]]
; GCN-NEXT: S_NOP 0, implicit [[V_MIN_LEGACY_F32_e32_2]]
; GCN-NEXT: S_ENDPGM 0
%1:vgpr_32 = nofpexcept V_MIN_LEGACY_F32_e32 1, undef %0:vgpr_32, implicit $exec, implicit $mode
%2:vgpr_32 = nofpexcept V_MIN_LEGACY_F32_e32 2, undef %0:vgpr_32, implicit $exec, implicit $mode
%3:vgpr_32 = nofpexcept V_MIN_LEGACY_F32_e32 3, undef %0:vgpr_32, implicit $exec, implicit $mode
S_NOP 0, implicit %1
S_NOP 0, implicit %2
S_NOP 0, implicit %3
S_ENDPGM 0
...
---
name: test_remat_v_max_legacy_f32_e32
tracksRegLiveness: true
body: |
bb.0:
; GCN-LABEL: name: test_remat_v_max_legacy_f32_e32
; GCN: [[V_MAX_LEGACY_F32_e32_:%[0-9]+]]:vgpr_32 = nofpexcept V_MAX_LEGACY_F32_e32 1, undef %1:vgpr_32, implicit $exec, implicit $mode
; GCN-NEXT: [[V_MAX_LEGACY_F32_e32_1:%[0-9]+]]:vgpr_32 = nofpexcept V_MAX_LEGACY_F32_e32 2, undef %1:vgpr_32, implicit $exec, implicit $mode
; GCN-NEXT: [[V_MAX_LEGACY_F32_e32_2:%[0-9]+]]:vgpr_32 = nofpexcept V_MAX_LEGACY_F32_e32 3, undef %1:vgpr_32, implicit $exec, implicit $mode
; GCN-NEXT: S_NOP 0, implicit [[V_MAX_LEGACY_F32_e32_]]
; GCN-NEXT: S_NOP 0, implicit [[V_MAX_LEGACY_F32_e32_1]]
; GCN-NEXT: S_NOP 0, implicit [[V_MAX_LEGACY_F32_e32_2]]
; GCN-NEXT: S_ENDPGM 0
%1:vgpr_32 = nofpexcept V_MAX_LEGACY_F32_e32 1, undef %0:vgpr_32, implicit $exec, implicit $mode
%2:vgpr_32 = nofpexcept V_MAX_LEGACY_F32_e32 2, undef %0:vgpr_32, implicit $exec, implicit $mode
%3:vgpr_32 = nofpexcept V_MAX_LEGACY_F32_e32 3, undef %0:vgpr_32, implicit $exec, implicit $mode
S_NOP 0, implicit %1
S_NOP 0, implicit %2
S_NOP 0, implicit %3
S_ENDPGM 0
...
---
name: test_remat_v_lshr_b32_e32
tracksRegLiveness: true
body: |
bb.0:
; GCN-LABEL: name: test_remat_v_lshr_b32_e32
; GCN: [[V_LSHR_B32_e32_:%[0-9]+]]:vgpr_32 = V_LSHR_B32_e32 1, undef %1:vgpr_32, implicit $exec
; GCN-NEXT: [[V_LSHR_B32_e32_1:%[0-9]+]]:vgpr_32 = V_LSHR_B32_e32 2, undef %1:vgpr_32, implicit $exec
; GCN-NEXT: [[V_LSHR_B32_e32_2:%[0-9]+]]:vgpr_32 = V_LSHR_B32_e32 3, undef %1:vgpr_32, implicit $exec
; GCN-NEXT: S_NOP 0, implicit [[V_LSHR_B32_e32_]]
; GCN-NEXT: S_NOP 0, implicit [[V_LSHR_B32_e32_1]]
; GCN-NEXT: S_NOP 0, implicit [[V_LSHR_B32_e32_2]]
; GCN-NEXT: S_ENDPGM 0
%1:vgpr_32 = V_LSHR_B32_e32 1, undef %0:vgpr_32, implicit $exec
%2:vgpr_32 = V_LSHR_B32_e32 2, undef %0:vgpr_32, implicit $exec
%3:vgpr_32 = V_LSHR_B32_e32 3, undef %0:vgpr_32, implicit $exec
S_NOP 0, implicit %1
S_NOP 0, implicit %2
S_NOP 0, implicit %3
S_ENDPGM 0
...
---
name: test_remat_v_lshl_b32_e32
tracksRegLiveness: true
body: |
bb.0:
; GCN-LABEL: name: test_remat_v_lshl_b32_e32
; GCN: [[V_LSHL_B32_e32_:%[0-9]+]]:vgpr_32 = V_LSHL_B32_e32 1, undef %1:vgpr_32, implicit $exec
; GCN-NEXT: [[V_LSHL_B32_e32_1:%[0-9]+]]:vgpr_32 = V_LSHL_B32_e32 2, undef %1:vgpr_32, implicit $exec
; GCN-NEXT: [[V_LSHL_B32_e32_2:%[0-9]+]]:vgpr_32 = V_LSHL_B32_e32 3, undef %1:vgpr_32, implicit $exec
; GCN-NEXT: S_NOP 0, implicit [[V_LSHL_B32_e32_]]
; GCN-NEXT: S_NOP 0, implicit [[V_LSHL_B32_e32_1]]
; GCN-NEXT: S_NOP 0, implicit [[V_LSHL_B32_e32_2]]
; GCN-NEXT: S_ENDPGM 0
%1:vgpr_32 = V_LSHL_B32_e32 1, undef %0:vgpr_32, implicit $exec
%2:vgpr_32 = V_LSHL_B32_e32 2, undef %0:vgpr_32, implicit $exec
%3:vgpr_32 = V_LSHL_B32_e32 3, undef %0:vgpr_32, implicit $exec
S_NOP 0, implicit %1
S_NOP 0, implicit %2
S_NOP 0, implicit %3
S_ENDPGM 0
...
---
name: test_remat_v_ashr_i32_e32
tracksRegLiveness: true
body: |
bb.0:
; GCN-LABEL: name: test_remat_v_ashr_i32_e32
; GCN: [[V_ASHR_I32_e32_:%[0-9]+]]:vgpr_32 = V_ASHR_I32_e32 1, undef %1:vgpr_32, implicit $exec
; GCN-NEXT: [[V_ASHR_I32_e32_1:%[0-9]+]]:vgpr_32 = V_ASHR_I32_e32 2, undef %1:vgpr_32, implicit $exec
; GCN-NEXT: [[V_ASHR_I32_e32_2:%[0-9]+]]:vgpr_32 = V_ASHR_I32_e32 3, undef %1:vgpr_32, implicit $exec
; GCN-NEXT: S_NOP 0, implicit [[V_ASHR_I32_e32_]]
; GCN-NEXT: S_NOP 0, implicit [[V_ASHR_I32_e32_1]]
; GCN-NEXT: S_NOP 0, implicit [[V_ASHR_I32_e32_2]]
; GCN-NEXT: S_ENDPGM 0
%1:vgpr_32 = V_ASHR_I32_e32 1, undef %0:vgpr_32, implicit $exec
%2:vgpr_32 = V_ASHR_I32_e32 2, undef %0:vgpr_32, implicit $exec
%3:vgpr_32 = V_ASHR_I32_e32 3, undef %0:vgpr_32, implicit $exec
S_NOP 0, implicit %1
S_NOP 0, implicit %2
S_NOP 0, implicit %3
S_ENDPGM 0
...
---
name: test_remat_v_xnor_b32_e32
tracksRegLiveness: true
body: |
bb.0:
; GCN-LABEL: name: test_remat_v_xnor_b32_e32
; GCN: [[V_XNOR_B32_e32_:%[0-9]+]]:vgpr_32 = V_XNOR_B32_e32 1, undef %1:vgpr_32, implicit $exec
; GCN-NEXT: [[V_XNOR_B32_e32_1:%[0-9]+]]:vgpr_32 = V_XNOR_B32_e32 2, undef %1:vgpr_32, implicit $exec
; GCN-NEXT: [[V_XNOR_B32_e32_2:%[0-9]+]]:vgpr_32 = V_XNOR_B32_e32 3, undef %1:vgpr_32, implicit $exec
; GCN-NEXT: S_NOP 0, implicit [[V_XNOR_B32_e32_]]
; GCN-NEXT: S_NOP 0, implicit [[V_XNOR_B32_e32_1]]
; GCN-NEXT: S_NOP 0, implicit [[V_XNOR_B32_e32_2]]
; GCN-NEXT: S_ENDPGM 0
%1:vgpr_32 = V_XNOR_B32_e32 1, undef %0:vgpr_32, implicit $exec
%2:vgpr_32 = V_XNOR_B32_e32 2, undef %0:vgpr_32, implicit $exec
%3:vgpr_32 = V_XNOR_B32_e32 3, undef %0:vgpr_32, implicit $exec
S_NOP 0, implicit %1
S_NOP 0, implicit %2
S_NOP 0, implicit %3
S_ENDPGM 0
...
---
name: test_remat_v_fmamk_f32
tracksRegLiveness: true
body: |
bb.0:
; GCN-LABEL: name: test_remat_v_fmamk_f32
; GCN: [[V_FMAMK_F32_:%[0-9]+]]:vgpr_32 = nofpexcept V_FMAMK_F32 1, 1, undef %1:vgpr_32, implicit $exec, implicit $mode
; GCN-NEXT: [[V_FMAMK_F32_1:%[0-9]+]]:vgpr_32 = nofpexcept V_FMAMK_F32 2, 2, undef %1:vgpr_32, implicit $exec, implicit $mode
; GCN-NEXT: [[V_FMAMK_F32_2:%[0-9]+]]:vgpr_32 = nofpexcept V_FMAMK_F32 3, 3, undef %1:vgpr_32, implicit $exec, implicit $mode
; GCN-NEXT: S_NOP 0, implicit [[V_FMAMK_F32_]]
; GCN-NEXT: S_NOP 0, implicit [[V_FMAMK_F32_1]]
; GCN-NEXT: S_NOP 0, implicit [[V_FMAMK_F32_2]]
; GCN-NEXT: S_ENDPGM 0
%1:vgpr_32 = nofpexcept V_FMAMK_F32 1, 1, undef %0:vgpr_32, implicit $exec, implicit $mode
%2:vgpr_32 = nofpexcept V_FMAMK_F32 2, 2, undef %0:vgpr_32, implicit $exec, implicit $mode
%3:vgpr_32 = nofpexcept V_FMAMK_F32 3, 3, undef %0:vgpr_32, implicit $exec, implicit $mode
S_NOP 0, implicit %1
S_NOP 0, implicit %2
S_NOP 0, implicit %3
S_ENDPGM 0
...
---
name: test_remat_v_fmaak_f32
tracksRegLiveness: true
body: |
bb.0:
; GCN-LABEL: name: test_remat_v_fmaak_f32
; GCN: [[V_FMAAK_F32_:%[0-9]+]]:vgpr_32 = nofpexcept V_FMAAK_F32 1, undef %1:vgpr_32, 1, implicit $exec, implicit $mode
; GCN-NEXT: [[V_FMAAK_F32_1:%[0-9]+]]:vgpr_32 = nofpexcept V_FMAAK_F32 2, undef %1:vgpr_32, 2, implicit $exec, implicit $mode
; GCN-NEXT: [[V_FMAAK_F32_2:%[0-9]+]]:vgpr_32 = nofpexcept V_FMAAK_F32 3, undef %1:vgpr_32, 3, implicit $exec, implicit $mode
; GCN-NEXT: S_NOP 0, implicit [[V_FMAAK_F32_]]
; GCN-NEXT: S_NOP 0, implicit [[V_FMAAK_F32_1]]
; GCN-NEXT: S_NOP 0, implicit [[V_FMAAK_F32_2]]
; GCN-NEXT: S_ENDPGM 0
%1:vgpr_32 = nofpexcept V_FMAAK_F32 1, undef %0:vgpr_32, 1, implicit $exec, implicit $mode
%2:vgpr_32 = nofpexcept V_FMAAK_F32 2, undef %0:vgpr_32, 2, implicit $exec, implicit $mode
%3:vgpr_32 = nofpexcept V_FMAAK_F32 3, undef %0:vgpr_32, 3, implicit $exec, implicit $mode
S_NOP 0, implicit %1
S_NOP 0, implicit %2
S_NOP 0, implicit %3
S_ENDPGM 0
...
---
name: test_remat_v_mad_legacy_f32_e64
tracksRegLiveness: true
body: |
bb.0:
; GCN-LABEL: name: test_remat_v_mad_legacy_f32_e64
; GCN: [[V_MAD_LEGACY_F32_e64_:%[0-9]+]]:vgpr_32 = nofpexcept V_MAD_LEGACY_F32_e64 0, 1, 0, 1, 0, undef %1:vgpr_32, 0, 0, implicit $exec, implicit $mode
; GCN-NEXT: [[V_MAD_LEGACY_F32_e64_1:%[0-9]+]]:vgpr_32 = nofpexcept V_MAD_LEGACY_F32_e64 0, 2, 0, 2, 0, undef %1:vgpr_32, 0, 0, implicit $exec, implicit $mode
; GCN-NEXT: [[V_MAD_LEGACY_F32_e64_2:%[0-9]+]]:vgpr_32 = nofpexcept V_MAD_LEGACY_F32_e64 0, 3, 0, 3, 0, undef %1:vgpr_32, 0, 0, implicit $exec, implicit $mode
; GCN-NEXT: S_NOP 0, implicit [[V_MAD_LEGACY_F32_e64_]]
; GCN-NEXT: S_NOP 0, implicit [[V_MAD_LEGACY_F32_e64_1]]
; GCN-NEXT: S_NOP 0, implicit [[V_MAD_LEGACY_F32_e64_2]]
; GCN-NEXT: S_ENDPGM 0
%1:vgpr_32 = nofpexcept V_MAD_LEGACY_F32_e64 0, 1, 0, 1, 0, undef %0:vgpr_32, 0, 0, implicit $exec, implicit $mode
%2:vgpr_32 = nofpexcept V_MAD_LEGACY_F32_e64 0, 2, 0, 2, 0, undef %0:vgpr_32, 0, 0, implicit $exec, implicit $mode
%3:vgpr_32 = nofpexcept V_MAD_LEGACY_F32_e64 0, 3, 0, 3, 0, undef %0:vgpr_32, 0, 0, implicit $exec, implicit $mode
S_NOP 0, implicit %1
S_NOP 0, implicit %2
S_NOP 0, implicit %3
S_ENDPGM 0
...
---
name: test_remat_v_mad_f32_e64
tracksRegLiveness: true
body: |
bb.0:
; GCN-LABEL: name: test_remat_v_mad_f32_e64
; GCN: [[V_MAD_F32_e64_:%[0-9]+]]:vgpr_32 = nofpexcept V_MAD_F32_e64 0, 1, 0, 1, 0, undef %1:vgpr_32, 0, 0, implicit $exec, implicit $mode
; GCN-NEXT: [[V_MAD_F32_e64_1:%[0-9]+]]:vgpr_32 = nofpexcept V_MAD_F32_e64 0, 2, 0, 2, 0, undef %1:vgpr_32, 0, 0, implicit $exec, implicit $mode
; GCN-NEXT: [[V_MAD_F32_e64_2:%[0-9]+]]:vgpr_32 = nofpexcept V_MAD_F32_e64 0, 3, 0, 3, 0, undef %1:vgpr_32, 0, 0, implicit $exec, implicit $mode
; GCN-NEXT: S_NOP 0, implicit [[V_MAD_F32_e64_]]
; GCN-NEXT: S_NOP 0, implicit [[V_MAD_F32_e64_1]]
; GCN-NEXT: S_NOP 0, implicit [[V_MAD_F32_e64_2]]
; GCN-NEXT: S_ENDPGM 0
%1:vgpr_32 = nofpexcept V_MAD_F32_e64 0, 1, 0, 1, 0, undef %0:vgpr_32, 0, 0, implicit $exec, implicit $mode
%2:vgpr_32 = nofpexcept V_MAD_F32_e64 0, 2, 0, 2, 0, undef %0:vgpr_32, 0, 0, implicit $exec, implicit $mode
%3:vgpr_32 = nofpexcept V_MAD_F32_e64 0, 3, 0, 3, 0, undef %0:vgpr_32, 0, 0, implicit $exec, implicit $mode
S_NOP 0, implicit %1
S_NOP 0, implicit %2
S_NOP 0, implicit %3
S_ENDPGM 0
...
---
name: test_remat_v_fma_legacy_f32_e64
tracksRegLiveness: true
body: |
bb.0:
; GCN-LABEL: name: test_remat_v_fma_legacy_f32_e64
; GCN: [[V_FMA_LEGACY_F32_e64_:%[0-9]+]]:vgpr_32 = nofpexcept V_FMA_LEGACY_F32_e64 0, 1, 0, 1, 0, undef %1:vgpr_32, 0, 0, implicit $exec, implicit $mode
; GCN-NEXT: [[V_FMA_LEGACY_F32_e64_1:%[0-9]+]]:vgpr_32 = nofpexcept V_FMA_LEGACY_F32_e64 0, 2, 0, 2, 0, undef %1:vgpr_32, 0, 0, implicit $exec, implicit $mode
; GCN-NEXT: [[V_FMA_LEGACY_F32_e64_2:%[0-9]+]]:vgpr_32 = nofpexcept V_FMA_LEGACY_F32_e64 0, 3, 0, 3, 0, undef %1:vgpr_32, 0, 0, implicit $exec, implicit $mode
; GCN-NEXT: S_NOP 0, implicit [[V_FMA_LEGACY_F32_e64_]]
; GCN-NEXT: S_NOP 0, implicit [[V_FMA_LEGACY_F32_e64_1]]
; GCN-NEXT: S_NOP 0, implicit [[V_FMA_LEGACY_F32_e64_2]]
; GCN-NEXT: S_ENDPGM 0
%1:vgpr_32 = nofpexcept V_FMA_LEGACY_F32_e64 0, 1, 0, 1, 0, undef %0:vgpr_32, 0, 0, implicit $exec, implicit $mode
%2:vgpr_32 = nofpexcept V_FMA_LEGACY_F32_e64 0, 2, 0, 2, 0, undef %0:vgpr_32, 0, 0, implicit $exec, implicit $mode
%3:vgpr_32 = nofpexcept V_FMA_LEGACY_F32_e64 0, 3, 0, 3, 0, undef %0:vgpr_32, 0, 0, implicit $exec, implicit $mode
S_NOP 0, implicit %1
S_NOP 0, implicit %2
S_NOP 0, implicit %3
S_ENDPGM 0
...
---
name: test_remat_v_fma_f32_e64
tracksRegLiveness: true
body: |
bb.0:
; GCN-LABEL: name: test_remat_v_fma_f32_e64
; GCN: [[V_FMA_F32_e64_:%[0-9]+]]:vgpr_32 = nofpexcept V_FMA_F32_e64 0, 1, 0, 1, 0, undef %1:vgpr_32, 0, 0, implicit $exec, implicit $mode
; GCN-NEXT: [[V_FMA_F32_e64_1:%[0-9]+]]:vgpr_32 = nofpexcept V_FMA_F32_e64 0, 2, 0, 2, 0, undef %1:vgpr_32, 0, 0, implicit $exec, implicit $mode
; GCN-NEXT: [[V_FMA_F32_e64_2:%[0-9]+]]:vgpr_32 = nofpexcept V_FMA_F32_e64 0, 3, 0, 3, 0, undef %1:vgpr_32, 0, 0, implicit $exec, implicit $mode
; GCN-NEXT: S_NOP 0, implicit [[V_FMA_F32_e64_]]
; GCN-NEXT: S_NOP 0, implicit [[V_FMA_F32_e64_1]]
; GCN-NEXT: S_NOP 0, implicit [[V_FMA_F32_e64_2]]
; GCN-NEXT: S_ENDPGM 0
%1:vgpr_32 = nofpexcept V_FMA_F32_e64 0, 1, 0, 1, 0, undef %0:vgpr_32, 0, 0, implicit $exec, implicit $mode
%2:vgpr_32 = nofpexcept V_FMA_F32_e64 0, 2, 0, 2, 0, undef %0:vgpr_32, 0, 0, implicit $exec, implicit $mode
%3:vgpr_32 = nofpexcept V_FMA_F32_e64 0, 3, 0, 3, 0, undef %0:vgpr_32, 0, 0, implicit $exec, implicit $mode
S_NOP 0, implicit %1
S_NOP 0, implicit %2
S_NOP 0, implicit %3
S_ENDPGM 0
...
---
name: test_remat_v_mad_i32_i24_e64
tracksRegLiveness: true
body: |
bb.0:
; GCN-LABEL: name: test_remat_v_mad_i32_i24_e64
; GCN: [[V_MAD_I32_I24_e64_:%[0-9]+]]:vgpr_32 = V_MAD_I32_I24_e64 1, 1, undef %1:vgpr_32, 0, implicit $exec
; GCN-NEXT: [[V_MAD_I32_I24_e64_1:%[0-9]+]]:vgpr_32 = V_MAD_I32_I24_e64 2, 2, undef %1:vgpr_32, 0, implicit $exec
; GCN-NEXT: [[V_MAD_I32_I24_e64_2:%[0-9]+]]:vgpr_32 = V_MAD_I32_I24_e64 3, 3, undef %1:vgpr_32, 0, implicit $exec
; GCN-NEXT: S_NOP 0, implicit [[V_MAD_I32_I24_e64_]]
; GCN-NEXT: S_NOP 0, implicit [[V_MAD_I32_I24_e64_1]]
; GCN-NEXT: S_NOP 0, implicit [[V_MAD_I32_I24_e64_2]]
; GCN-NEXT: S_ENDPGM 0
%1:vgpr_32 = V_MAD_I32_I24_e64 1, 1, undef %0:vgpr_32, 0, implicit $exec
%2:vgpr_32 = V_MAD_I32_I24_e64 2, 2, undef %0:vgpr_32, 0, implicit $exec
%3:vgpr_32 = V_MAD_I32_I24_e64 3, 3, undef %0:vgpr_32, 0, implicit $exec
S_NOP 0, implicit %1
S_NOP 0, implicit %2
S_NOP 0, implicit %3
S_ENDPGM 0
...
---
name: test_remat_v_mad_u32_u24_e64
tracksRegLiveness: true
body: |
bb.0:
; GCN-LABEL: name: test_remat_v_mad_u32_u24_e64
; GCN: [[V_MAD_U32_U24_e64_:%[0-9]+]]:vgpr_32 = V_MAD_U32_U24_e64 1, 1, undef %1:vgpr_32, 0, implicit $exec
; GCN-NEXT: [[V_MAD_U32_U24_e64_1:%[0-9]+]]:vgpr_32 = V_MAD_U32_U24_e64 2, 2, undef %1:vgpr_32, 0, implicit $exec
; GCN-NEXT: [[V_MAD_U32_U24_e64_2:%[0-9]+]]:vgpr_32 = V_MAD_U32_U24_e64 3, 3, undef %1:vgpr_32, 0, implicit $exec
; GCN-NEXT: S_NOP 0, implicit [[V_MAD_U32_U24_e64_]]
; GCN-NEXT: S_NOP 0, implicit [[V_MAD_U32_U24_e64_1]]
; GCN-NEXT: S_NOP 0, implicit [[V_MAD_U32_U24_e64_2]]
; GCN-NEXT: S_ENDPGM 0
%1:vgpr_32 = V_MAD_U32_U24_e64 1, 1, undef %0:vgpr_32, 0, implicit $exec
%2:vgpr_32 = V_MAD_U32_U24_e64 2, 2, undef %0:vgpr_32, 0, implicit $exec
%3:vgpr_32 = V_MAD_U32_U24_e64 3, 3, undef %0:vgpr_32, 0, implicit $exec
S_NOP 0, implicit %1
S_NOP 0, implicit %2
S_NOP 0, implicit %3
S_ENDPGM 0
...
---
name: test_remat_v_lerp_u8_e64
tracksRegLiveness: true
body: |
bb.0:
; GCN-LABEL: name: test_remat_v_lerp_u8_e64
; GCN: [[V_LERP_U8_e64_:%[0-9]+]]:vgpr_32 = V_LERP_U8_e64 1, 1, undef %1:vgpr_32, implicit $exec
; GCN-NEXT: [[V_LERP_U8_e64_1:%[0-9]+]]:vgpr_32 = V_LERP_U8_e64 2, 2, undef %1:vgpr_32, implicit $exec
; GCN-NEXT: [[V_LERP_U8_e64_2:%[0-9]+]]:vgpr_32 = V_LERP_U8_e64 3, 3, undef %1:vgpr_32, implicit $exec
; GCN-NEXT: S_NOP 0, implicit [[V_LERP_U8_e64_]]
; GCN-NEXT: S_NOP 0, implicit [[V_LERP_U8_e64_1]]
; GCN-NEXT: S_NOP 0, implicit [[V_LERP_U8_e64_2]]
; GCN-NEXT: S_ENDPGM 0
%1:vgpr_32 = V_LERP_U8_e64 1, 1, undef %0:vgpr_32, implicit $exec
%2:vgpr_32 = V_LERP_U8_e64 2, 2, undef %0:vgpr_32, implicit $exec
%3:vgpr_32 = V_LERP_U8_e64 3, 3, undef %0:vgpr_32, implicit $exec
S_NOP 0, implicit %1
S_NOP 0, implicit %2
S_NOP 0, implicit %3
S_ENDPGM 0
...
---
name: test_remat_v_fma_f64_e64
tracksRegLiveness: true
body: |
bb.0:
; GCN-LABEL: name: test_remat_v_fma_f64_e64
; GCN: [[V_FMA_F64_e64_:%[0-9]+]]:vreg_64_align2 = nofpexcept V_FMA_F64_e64 0, 1, 0, 1, 0, undef %1:vreg_64_align2, 0, 0, implicit $exec, implicit $mode
; GCN-NEXT: [[V_FMA_F64_e64_1:%[0-9]+]]:vreg_64_align2 = nofpexcept V_FMA_F64_e64 0, 2, 0, 2, 0, undef %1:vreg_64_align2, 0, 0, implicit $exec, implicit $mode
; GCN-NEXT: [[V_FMA_F64_e64_2:%[0-9]+]]:vreg_64_align2 = nofpexcept V_FMA_F64_e64 0, 3, 0, 3, 0, undef %1:vreg_64_align2, 0, 0, implicit $exec, implicit $mode
; GCN-NEXT: S_NOP 0, implicit [[V_FMA_F64_e64_]]
; GCN-NEXT: S_NOP 0, implicit [[V_FMA_F64_e64_1]]
; GCN-NEXT: S_NOP 0, implicit [[V_FMA_F64_e64_2]]
; GCN-NEXT: S_ENDPGM 0
%1:vreg_64_align2 = nofpexcept V_FMA_F64_e64 0, 1, 0, 1, 0, undef %0:vreg_64_align2, 0, 0, implicit $exec, implicit $mode
%2:vreg_64_align2 = nofpexcept V_FMA_F64_e64 0, 2, 0, 2, 0, undef %0:vreg_64_align2, 0, 0, implicit $exec, implicit $mode
%3:vreg_64_align2 = nofpexcept V_FMA_F64_e64 0, 3, 0, 3, 0, undef %0:vreg_64_align2, 0, 0, implicit $exec, implicit $mode
S_NOP 0, implicit %1
S_NOP 0, implicit %2
S_NOP 0, implicit %3
S_ENDPGM 0
...
---
name: test_remat_v_add_f64_e64
tracksRegLiveness: true
body: |
bb.0:
; GCN-LABEL: name: test_remat_v_add_f64_e64
; GCN: [[V_ADD_F64_e64_:%[0-9]+]]:vreg_64_align2 = nofpexcept V_ADD_F64_e64 0, 1, 0, undef %1:vreg_64_align2, 0, 0, implicit $exec, implicit $mode
; GCN-NEXT: [[V_ADD_F64_e64_1:%[0-9]+]]:vreg_64_align2 = nofpexcept V_ADD_F64_e64 0, 2, 0, undef %1:vreg_64_align2, 0, 0, implicit $exec, implicit $mode
; GCN-NEXT: [[V_ADD_F64_e64_2:%[0-9]+]]:vreg_64_align2 = nofpexcept V_ADD_F64_e64 0, 3, 0, undef %1:vreg_64_align2, 0, 0, implicit $exec, implicit $mode
; GCN-NEXT: S_NOP 0, implicit [[V_ADD_F64_e64_]]
; GCN-NEXT: S_NOP 0, implicit [[V_ADD_F64_e64_1]]
; GCN-NEXT: S_NOP 0, implicit [[V_ADD_F64_e64_2]]
; GCN-NEXT: S_ENDPGM 0
%1:vreg_64_align2 = nofpexcept V_ADD_F64_e64 0, 1, 0, undef %0:vreg_64_align2, 0, 0, implicit $exec, implicit $mode
%2:vreg_64_align2 = nofpexcept V_ADD_F64_e64 0, 2, 0, undef %0:vreg_64_align2, 0, 0, implicit $exec, implicit $mode
%3:vreg_64_align2 = nofpexcept V_ADD_F64_e64 0, 3, 0, undef %0:vreg_64_align2, 0, 0, implicit $exec, implicit $mode
S_NOP 0, implicit %1
S_NOP 0, implicit %2
S_NOP 0, implicit %3
S_ENDPGM 0
...
---
name: test_remat_v_mul_f64_e64
tracksRegLiveness: true
body: |
bb.0:
; GCN-LABEL: name: test_remat_v_mul_f64_e64
; GCN: [[V_MUL_F64_e64_:%[0-9]+]]:vreg_64_align2 = nofpexcept V_MUL_F64_e64 0, 1, 0, undef %1:vreg_64_align2, 0, 0, implicit $exec, implicit $mode
; GCN-NEXT: [[V_MUL_F64_e64_1:%[0-9]+]]:vreg_64_align2 = nofpexcept V_MUL_F64_e64 0, 2, 0, undef %1:vreg_64_align2, 0, 0, implicit $exec, implicit $mode
; GCN-NEXT: [[V_MUL_F64_e64_2:%[0-9]+]]:vreg_64_align2 = nofpexcept V_MUL_F64_e64 0, 3, 0, undef %1:vreg_64_align2, 0, 0, implicit $exec, implicit $mode
; GCN-NEXT: S_NOP 0, implicit [[V_MUL_F64_e64_]]
; GCN-NEXT: S_NOP 0, implicit [[V_MUL_F64_e64_1]]
; GCN-NEXT: S_NOP 0, implicit [[V_MUL_F64_e64_2]]
; GCN-NEXT: S_ENDPGM 0
%1:vreg_64_align2 = nofpexcept V_MUL_F64_e64 0, 1, 0, undef %0:vreg_64_align2, 0, 0, implicit $exec, implicit $mode
%2:vreg_64_align2 = nofpexcept V_MUL_F64_e64 0, 2, 0, undef %0:vreg_64_align2, 0, 0, implicit $exec, implicit $mode
%3:vreg_64_align2 = nofpexcept V_MUL_F64_e64 0, 3, 0, undef %0:vreg_64_align2, 0, 0, implicit $exec, implicit $mode
S_NOP 0, implicit %1
S_NOP 0, implicit %2
S_NOP 0, implicit %3
S_ENDPGM 0
...
---
name: test_remat_v_min_f64_e64
tracksRegLiveness: true
body: |
bb.0:
; GCN-LABEL: name: test_remat_v_min_f64_e64
; GCN: [[V_MIN_F64_e64_:%[0-9]+]]:vreg_64_align2 = nofpexcept V_MIN_F64_e64 0, 1, 0, undef %1:vreg_64_align2, 0, 0, implicit $exec, implicit $mode
; GCN-NEXT: [[V_MIN_F64_e64_1:%[0-9]+]]:vreg_64_align2 = nofpexcept V_MIN_F64_e64 0, 2, 0, undef %1:vreg_64_align2, 0, 0, implicit $exec, implicit $mode
; GCN-NEXT: [[V_MIN_F64_e64_2:%[0-9]+]]:vreg_64_align2 = nofpexcept V_MIN_F64_e64 0, 3, 0, undef %1:vreg_64_align2, 0, 0, implicit $exec, implicit $mode
; GCN-NEXT: S_NOP 0, implicit [[V_MIN_F64_e64_]]
; GCN-NEXT: S_NOP 0, implicit [[V_MIN_F64_e64_1]]
; GCN-NEXT: S_NOP 0, implicit [[V_MIN_F64_e64_2]]
; GCN-NEXT: S_ENDPGM 0
%1:vreg_64_align2 = nofpexcept V_MIN_F64_e64 0, 1, 0, undef %0:vreg_64_align2, 0, 0, implicit $exec, implicit $mode
%2:vreg_64_align2 = nofpexcept V_MIN_F64_e64 0, 2, 0, undef %0:vreg_64_align2, 0, 0, implicit $exec, implicit $mode
%3:vreg_64_align2 = nofpexcept V_MIN_F64_e64 0, 3, 0, undef %0:vreg_64_align2, 0, 0, implicit $exec, implicit $mode
S_NOP 0, implicit %1
S_NOP 0, implicit %2
S_NOP 0, implicit %3
S_ENDPGM 0
...
---
name: test_remat_v_max_f64_e64
tracksRegLiveness: true
body: |
bb.0:
; GCN-LABEL: name: test_remat_v_max_f64_e64
; GCN: [[V_MAX_F64_e64_:%[0-9]+]]:vreg_64_align2 = nofpexcept V_MAX_F64_e64 0, 1, 0, undef %1:vreg_64_align2, 0, 0, implicit $exec, implicit $mode
; GCN-NEXT: [[V_MAX_F64_e64_1:%[0-9]+]]:vreg_64_align2 = nofpexcept V_MAX_F64_e64 0, 2, 0, undef %1:vreg_64_align2, 0, 0, implicit $exec, implicit $mode
; GCN-NEXT: [[V_MAX_F64_e64_2:%[0-9]+]]:vreg_64_align2 = nofpexcept V_MAX_F64_e64 0, 3, 0, undef %1:vreg_64_align2, 0, 0, implicit $exec, implicit $mode
; GCN-NEXT: S_NOP 0, implicit [[V_MAX_F64_e64_]]
; GCN-NEXT: S_NOP 0, implicit [[V_MAX_F64_e64_1]]
; GCN-NEXT: S_NOP 0, implicit [[V_MAX_F64_e64_2]]
; GCN-NEXT: S_ENDPGM 0
%1:vreg_64_align2 = nofpexcept V_MAX_F64_e64 0, 1, 0, undef %0:vreg_64_align2, 0, 0, implicit $exec, implicit $mode
%2:vreg_64_align2 = nofpexcept V_MAX_F64_e64 0, 2, 0, undef %0:vreg_64_align2, 0, 0, implicit $exec, implicit $mode
%3:vreg_64_align2 = nofpexcept V_MAX_F64_e64 0, 3, 0, undef %0:vreg_64_align2, 0, 0, implicit $exec, implicit $mode
S_NOP 0, implicit %1
S_NOP 0, implicit %2
S_NOP 0, implicit %3
S_ENDPGM 0
...
---
name: test_remat_v_mul_lo_u32_e64
tracksRegLiveness: true
body: |
bb.0:
; GCN-LABEL: name: test_remat_v_mul_lo_u32_e64
; GCN: [[V_MUL_LO_U32_e64_:%[0-9]+]]:vgpr_32 = V_MUL_LO_U32_e64 1, undef %1:vgpr_32, implicit $exec
; GCN-NEXT: [[V_MUL_LO_U32_e64_1:%[0-9]+]]:vgpr_32 = V_MUL_LO_U32_e64 2, undef %1:vgpr_32, implicit $exec
; GCN-NEXT: [[V_MUL_LO_U32_e64_2:%[0-9]+]]:vgpr_32 = V_MUL_LO_U32_e64 3, undef %1:vgpr_32, implicit $exec
; GCN-NEXT: S_NOP 0, implicit [[V_MUL_LO_U32_e64_]]
; GCN-NEXT: S_NOP 0, implicit [[V_MUL_LO_U32_e64_1]]
; GCN-NEXT: S_NOP 0, implicit [[V_MUL_LO_U32_e64_2]]
; GCN-NEXT: S_ENDPGM 0
%1:vgpr_32 = V_MUL_LO_U32_e64 1, undef %0:vgpr_32, implicit $exec
%2:vgpr_32 = V_MUL_LO_U32_e64 2, undef %0:vgpr_32, implicit $exec
%3:vgpr_32 = V_MUL_LO_U32_e64 3, undef %0:vgpr_32, implicit $exec
S_NOP 0, implicit %1
S_NOP 0, implicit %2
S_NOP 0, implicit %3
S_ENDPGM 0
...
---
name: test_remat_v_mul_hi_u32_e64
tracksRegLiveness: true
body: |
bb.0:
; GCN-LABEL: name: test_remat_v_mul_hi_u32_e64
; GCN: [[V_MUL_HI_U32_e64_:%[0-9]+]]:vgpr_32 = V_MUL_HI_U32_e64 1, undef %1:vgpr_32, implicit $exec
; GCN-NEXT: [[V_MUL_HI_U32_e64_1:%[0-9]+]]:vgpr_32 = V_MUL_HI_U32_e64 2, undef %1:vgpr_32, implicit $exec
; GCN-NEXT: [[V_MUL_HI_U32_e64_2:%[0-9]+]]:vgpr_32 = V_MUL_HI_U32_e64 3, undef %1:vgpr_32, implicit $exec
; GCN-NEXT: S_NOP 0, implicit [[V_MUL_HI_U32_e64_]]
; GCN-NEXT: S_NOP 0, implicit [[V_MUL_HI_U32_e64_1]]
; GCN-NEXT: S_NOP 0, implicit [[V_MUL_HI_U32_e64_2]]
; GCN-NEXT: S_ENDPGM 0
%1:vgpr_32 = V_MUL_HI_U32_e64 1, undef %0:vgpr_32, implicit $exec
%2:vgpr_32 = V_MUL_HI_U32_e64 2, undef %0:vgpr_32, implicit $exec
%3:vgpr_32 = V_MUL_HI_U32_e64 3, undef %0:vgpr_32, implicit $exec
S_NOP 0, implicit %1
S_NOP 0, implicit %2
S_NOP 0, implicit %3
S_ENDPGM 0
...
---
name: test_remat_v_mul_lo_i32_e64
tracksRegLiveness: true
body: |
bb.0:
; GCN-LABEL: name: test_remat_v_mul_lo_i32_e64
; GCN: [[V_MUL_LO_I32_e64_:%[0-9]+]]:vgpr_32 = V_MUL_LO_I32_e64 1, undef %1:vgpr_32, implicit $exec
; GCN-NEXT: [[V_MUL_LO_I32_e64_1:%[0-9]+]]:vgpr_32 = V_MUL_LO_I32_e64 2, undef %1:vgpr_32, implicit $exec
; GCN-NEXT: [[V_MUL_LO_I32_e64_2:%[0-9]+]]:vgpr_32 = V_MUL_LO_I32_e64 3, undef %1:vgpr_32, implicit $exec
; GCN-NEXT: S_NOP 0, implicit [[V_MUL_LO_I32_e64_]]
; GCN-NEXT: S_NOP 0, implicit [[V_MUL_LO_I32_e64_1]]
; GCN-NEXT: S_NOP 0, implicit [[V_MUL_LO_I32_e64_2]]
; GCN-NEXT: S_ENDPGM 0
%1:vgpr_32 = V_MUL_LO_I32_e64 1, undef %0:vgpr_32, implicit $exec
%2:vgpr_32 = V_MUL_LO_I32_e64 2, undef %0:vgpr_32, implicit $exec
%3:vgpr_32 = V_MUL_LO_I32_e64 3, undef %0:vgpr_32, implicit $exec
S_NOP 0, implicit %1
S_NOP 0, implicit %2
S_NOP 0, implicit %3
S_ENDPGM 0
...
---
name: test_remat_v_mul_hi_i32_e64
tracksRegLiveness: true
body: |
bb.0:
; GCN-LABEL: name: test_remat_v_mul_hi_i32_e64
; GCN: [[V_MUL_HI_I32_e64_:%[0-9]+]]:vgpr_32 = V_MUL_HI_I32_e64 1, undef %1:vgpr_32, implicit $exec
; GCN-NEXT: [[V_MUL_HI_I32_e64_1:%[0-9]+]]:vgpr_32 = V_MUL_HI_I32_e64 2, undef %1:vgpr_32, implicit $exec
; GCN-NEXT: [[V_MUL_HI_I32_e64_2:%[0-9]+]]:vgpr_32 = V_MUL_HI_I32_e64 3, undef %1:vgpr_32, implicit $exec
; GCN-NEXT: S_NOP 0, implicit [[V_MUL_HI_I32_e64_]]
; GCN-NEXT: S_NOP 0, implicit [[V_MUL_HI_I32_e64_1]]
; GCN-NEXT: S_NOP 0, implicit [[V_MUL_HI_I32_e64_2]]
; GCN-NEXT: S_ENDPGM 0
%1:vgpr_32 = V_MUL_HI_I32_e64 1, undef %0:vgpr_32, implicit $exec
%2:vgpr_32 = V_MUL_HI_I32_e64 2, undef %0:vgpr_32, implicit $exec
%3:vgpr_32 = V_MUL_HI_I32_e64 3, undef %0:vgpr_32, implicit $exec
S_NOP 0, implicit %1
S_NOP 0, implicit %2
S_NOP 0, implicit %3
S_ENDPGM 0
...
---
name: test_remat_v_cubeid_f32_e64
tracksRegLiveness: true
body: |
bb.0:
; GCN-LABEL: name: test_remat_v_cubeid_f32_e64
; GCN: [[V_CUBEID_F32_e64_:%[0-9]+]]:vgpr_32 = V_CUBEID_F32_e64 0, 1, 0, 1, 0, undef %1:vgpr_32, 0, 0, implicit $exec, implicit $mode
; GCN-NEXT: [[V_CUBEID_F32_e64_1:%[0-9]+]]:vgpr_32 = V_CUBEID_F32_e64 0, 2, 0, 2, 0, undef %1:vgpr_32, 0, 0, implicit $exec, implicit $mode
; GCN-NEXT: [[V_CUBEID_F32_e64_2:%[0-9]+]]:vgpr_32 = V_CUBEID_F32_e64 0, 3, 0, 3, 0, undef %1:vgpr_32, 0, 0, implicit $exec, implicit $mode
; GCN-NEXT: S_NOP 0, implicit [[V_CUBEID_F32_e64_]]
; GCN-NEXT: S_NOP 0, implicit [[V_CUBEID_F32_e64_1]]
; GCN-NEXT: S_NOP 0, implicit [[V_CUBEID_F32_e64_2]]
; GCN-NEXT: S_ENDPGM 0
%1:vgpr_32 = V_CUBEID_F32_e64 0, 1, 0, 1, 0, undef %0:vgpr_32, 0, 0, implicit $exec, implicit $mode
%2:vgpr_32 = V_CUBEID_F32_e64 0, 2, 0, 2, 0, undef %0:vgpr_32, 0, 0, implicit $exec, implicit $mode
%3:vgpr_32 = V_CUBEID_F32_e64 0, 3, 0, 3, 0, undef %0:vgpr_32, 0, 0, implicit $exec, implicit $mode
S_NOP 0, implicit %1
S_NOP 0, implicit %2
S_NOP 0, implicit %3
S_ENDPGM 0
...
---
name: test_remat_v_cubesc_f32_e64
tracksRegLiveness: true
body: |
bb.0:
; GCN-LABEL: name: test_remat_v_cubesc_f32_e64
; GCN: [[V_CUBESC_F32_e64_:%[0-9]+]]:vgpr_32 = V_CUBESC_F32_e64 0, 1, 0, 1, 0, undef %1:vgpr_32, 0, 0, implicit $exec, implicit $mode
; GCN-NEXT: [[V_CUBESC_F32_e64_1:%[0-9]+]]:vgpr_32 = V_CUBESC_F32_e64 0, 2, 0, 2, 0, undef %1:vgpr_32, 0, 0, implicit $exec, implicit $mode
; GCN-NEXT: [[V_CUBESC_F32_e64_2:%[0-9]+]]:vgpr_32 = V_CUBESC_F32_e64 0, 3, 0, 3, 0, undef %1:vgpr_32, 0, 0, implicit $exec, implicit $mode
; GCN-NEXT: S_NOP 0, implicit [[V_CUBESC_F32_e64_]]
; GCN-NEXT: S_NOP 0, implicit [[V_CUBESC_F32_e64_1]]
; GCN-NEXT: S_NOP 0, implicit [[V_CUBESC_F32_e64_2]]
; GCN-NEXT: S_ENDPGM 0
%1:vgpr_32 = V_CUBESC_F32_e64 0, 1, 0, 1, 0, undef %0:vgpr_32, 0, 0, implicit $exec, implicit $mode
%2:vgpr_32 = V_CUBESC_F32_e64 0, 2, 0, 2, 0, undef %0:vgpr_32, 0, 0, implicit $exec, implicit $mode
%3:vgpr_32 = V_CUBESC_F32_e64 0, 3, 0, 3, 0, undef %0:vgpr_32, 0, 0, implicit $exec, implicit $mode
S_NOP 0, implicit %1
S_NOP 0, implicit %2
S_NOP 0, implicit %3
S_ENDPGM 0
...
---
name: test_remat_v_cubetc_f32_e64
tracksRegLiveness: true
body: |
bb.0:
; GCN-LABEL: name: test_remat_v_cubetc_f32_e64
; GCN: [[V_CUBETC_F32_e64_:%[0-9]+]]:vgpr_32 = V_CUBETC_F32_e64 0, 1, 0, 1, 0, undef %1:vgpr_32, 0, 0, implicit $exec, implicit $mode
; GCN-NEXT: [[V_CUBETC_F32_e64_1:%[0-9]+]]:vgpr_32 = V_CUBETC_F32_e64 0, 2, 0, 2, 0, undef %1:vgpr_32, 0, 0, implicit $exec, implicit $mode
; GCN-NEXT: [[V_CUBETC_F32_e64_2:%[0-9]+]]:vgpr_32 = V_CUBETC_F32_e64 0, 3, 0, 3, 0, undef %1:vgpr_32, 0, 0, implicit $exec, implicit $mode
; GCN-NEXT: S_NOP 0, implicit [[V_CUBETC_F32_e64_]]
; GCN-NEXT: S_NOP 0, implicit [[V_CUBETC_F32_e64_1]]
; GCN-NEXT: S_NOP 0, implicit [[V_CUBETC_F32_e64_2]]
; GCN-NEXT: S_ENDPGM 0
%1:vgpr_32 = V_CUBETC_F32_e64 0, 1, 0, 1, 0, undef %0:vgpr_32, 0, 0, implicit $exec, implicit $mode
%2:vgpr_32 = V_CUBETC_F32_e64 0, 2, 0, 2, 0, undef %0:vgpr_32, 0, 0, implicit $exec, implicit $mode
%3:vgpr_32 = V_CUBETC_F32_e64 0, 3, 0, 3, 0, undef %0:vgpr_32, 0, 0, implicit $exec, implicit $mode
S_NOP 0, implicit %1
S_NOP 0, implicit %2
S_NOP 0, implicit %3
S_ENDPGM 0
...
---
name: test_remat_v_cubema_f32_e64
tracksRegLiveness: true
body: |
bb.0:
; GCN-LABEL: name: test_remat_v_cubema_f32_e64
; GCN: [[V_CUBEMA_F32_e64_:%[0-9]+]]:vgpr_32 = V_CUBEMA_F32_e64 0, 1, 0, 1, 0, undef %1:vgpr_32, 0, 0, implicit $exec, implicit $mode
; GCN-NEXT: [[V_CUBEMA_F32_e64_1:%[0-9]+]]:vgpr_32 = V_CUBEMA_F32_e64 0, 2, 0, 2, 0, undef %1:vgpr_32, 0, 0, implicit $exec, implicit $mode
; GCN-NEXT: [[V_CUBEMA_F32_e64_2:%[0-9]+]]:vgpr_32 = V_CUBEMA_F32_e64 0, 3, 0, 3, 0, undef %1:vgpr_32, 0, 0, implicit $exec, implicit $mode
; GCN-NEXT: S_NOP 0, implicit [[V_CUBEMA_F32_e64_]]
; GCN-NEXT: S_NOP 0, implicit [[V_CUBEMA_F32_e64_1]]
; GCN-NEXT: S_NOP 0, implicit [[V_CUBEMA_F32_e64_2]]
; GCN-NEXT: S_ENDPGM 0
%1:vgpr_32 = V_CUBEMA_F32_e64 0, 1, 0, 1, 0, undef %0:vgpr_32, 0, 0, implicit $exec, implicit $mode
%2:vgpr_32 = V_CUBEMA_F32_e64 0, 2, 0, 2, 0, undef %0:vgpr_32, 0, 0, implicit $exec, implicit $mode
%3:vgpr_32 = V_CUBEMA_F32_e64 0, 3, 0, 3, 0, undef %0:vgpr_32, 0, 0, implicit $exec, implicit $mode
S_NOP 0, implicit %1
S_NOP 0, implicit %2
S_NOP 0, implicit %3
S_ENDPGM 0
...
---
name: test_remat_v_bfe_u32_e64
tracksRegLiveness: true
body: |
bb.0:
; GCN-LABEL: name: test_remat_v_bfe_u32_e64
; GCN: [[V_BFE_U32_e64_:%[0-9]+]]:vgpr_32 = V_BFE_U32_e64 1, 1, undef %1:vgpr_32, implicit $exec
; GCN-NEXT: [[V_BFE_U32_e64_1:%[0-9]+]]:vgpr_32 = V_BFE_U32_e64 2, 2, undef %1:vgpr_32, implicit $exec
; GCN-NEXT: [[V_BFE_U32_e64_2:%[0-9]+]]:vgpr_32 = V_BFE_U32_e64 3, 3, undef %1:vgpr_32, implicit $exec
; GCN-NEXT: S_NOP 0, implicit [[V_BFE_U32_e64_]]
; GCN-NEXT: S_NOP 0, implicit [[V_BFE_U32_e64_1]]
; GCN-NEXT: S_NOP 0, implicit [[V_BFE_U32_e64_2]]
; GCN-NEXT: S_ENDPGM 0
%1:vgpr_32 = V_BFE_U32_e64 1, 1, undef %0:vgpr_32, implicit $exec
%2:vgpr_32 = V_BFE_U32_e64 2, 2, undef %0:vgpr_32, implicit $exec
%3:vgpr_32 = V_BFE_U32_e64 3, 3, undef %0:vgpr_32, implicit $exec
S_NOP 0, implicit %1
S_NOP 0, implicit %2
S_NOP 0, implicit %3
S_ENDPGM 0
...
---
name: test_remat_v_bfe_i32_e64
tracksRegLiveness: true
body: |
bb.0:
; GCN-LABEL: name: test_remat_v_bfe_i32_e64
; GCN: [[V_BFE_I32_e64_:%[0-9]+]]:vgpr_32 = V_BFE_I32_e64 1, 1, undef %1:vgpr_32, implicit $exec
; GCN-NEXT: [[V_BFE_I32_e64_1:%[0-9]+]]:vgpr_32 = V_BFE_I32_e64 2, 2, undef %1:vgpr_32, implicit $exec
; GCN-NEXT: [[V_BFE_I32_e64_2:%[0-9]+]]:vgpr_32 = V_BFE_I32_e64 3, 3, undef %1:vgpr_32, implicit $exec
; GCN-NEXT: S_NOP 0, implicit [[V_BFE_I32_e64_]]
; GCN-NEXT: S_NOP 0, implicit [[V_BFE_I32_e64_1]]
; GCN-NEXT: S_NOP 0, implicit [[V_BFE_I32_e64_2]]
; GCN-NEXT: S_ENDPGM 0
%1:vgpr_32 = V_BFE_I32_e64 1, 1, undef %0:vgpr_32, implicit $exec
%2:vgpr_32 = V_BFE_I32_e64 2, 2, undef %0:vgpr_32, implicit $exec
%3:vgpr_32 = V_BFE_I32_e64 3, 3, undef %0:vgpr_32, implicit $exec
S_NOP 0, implicit %1
S_NOP 0, implicit %2
S_NOP 0, implicit %3
S_ENDPGM 0
...
---
name: test_remat_v_bfi_b32_e64
tracksRegLiveness: true
body: |
bb.0:
; GCN-LABEL: name: test_remat_v_bfi_b32_e64
; GCN: [[V_BFI_B32_e64_:%[0-9]+]]:vgpr_32 = V_BFI_B32_e64 1, 1, undef %1:vgpr_32, implicit $exec
; GCN-NEXT: [[V_BFI_B32_e64_1:%[0-9]+]]:vgpr_32 = V_BFI_B32_e64 2, 2, undef %1:vgpr_32, implicit $exec
; GCN-NEXT: [[V_BFI_B32_e64_2:%[0-9]+]]:vgpr_32 = V_BFI_B32_e64 3, 3, undef %1:vgpr_32, implicit $exec
; GCN-NEXT: S_NOP 0, implicit [[V_BFI_B32_e64_]]
; GCN-NEXT: S_NOP 0, implicit [[V_BFI_B32_e64_1]]
; GCN-NEXT: S_NOP 0, implicit [[V_BFI_B32_e64_2]]
; GCN-NEXT: S_ENDPGM 0
%1:vgpr_32 = V_BFI_B32_e64 1, 1, undef %0:vgpr_32, implicit $exec
%2:vgpr_32 = V_BFI_B32_e64 2, 2, undef %0:vgpr_32, implicit $exec
%3:vgpr_32 = V_BFI_B32_e64 3, 3, undef %0:vgpr_32, implicit $exec
S_NOP 0, implicit %1
S_NOP 0, implicit %2
S_NOP 0, implicit %3
S_ENDPGM 0
...
---
name: test_remat_v_alignbit_b32_e64
tracksRegLiveness: true
body: |
bb.0:
; GCN-LABEL: name: test_remat_v_alignbit_b32_e64
; GCN: [[V_ALIGNBIT_B32_e64_:%[0-9]+]]:vgpr_32 = V_ALIGNBIT_B32_e64 1, 1, undef %1:vgpr_32, implicit $exec
; GCN-NEXT: [[V_ALIGNBIT_B32_e64_1:%[0-9]+]]:vgpr_32 = V_ALIGNBIT_B32_e64 2, 2, undef %1:vgpr_32, implicit $exec
; GCN-NEXT: [[V_ALIGNBIT_B32_e64_2:%[0-9]+]]:vgpr_32 = V_ALIGNBIT_B32_e64 3, 3, undef %1:vgpr_32, implicit $exec
; GCN-NEXT: S_NOP 0, implicit [[V_ALIGNBIT_B32_e64_]]
; GCN-NEXT: S_NOP 0, implicit [[V_ALIGNBIT_B32_e64_1]]
; GCN-NEXT: S_NOP 0, implicit [[V_ALIGNBIT_B32_e64_2]]
; GCN-NEXT: S_ENDPGM 0
%1:vgpr_32 = V_ALIGNBIT_B32_e64 1, 1, undef %0:vgpr_32, implicit $exec
%2:vgpr_32 = V_ALIGNBIT_B32_e64 2, 2, undef %0:vgpr_32, implicit $exec
%3:vgpr_32 = V_ALIGNBIT_B32_e64 3, 3, undef %0:vgpr_32, implicit $exec
S_NOP 0, implicit %1
S_NOP 0, implicit %2
S_NOP 0, implicit %3
S_ENDPGM 0
...
---
name: test_remat_v_alignbyte_b32_e64
tracksRegLiveness: true
body: |
bb.0:
; GCN-LABEL: name: test_remat_v_alignbyte_b32_e64
; GCN: [[V_ALIGNBYTE_B32_e64_:%[0-9]+]]:vgpr_32 = V_ALIGNBYTE_B32_e64 1, 1, undef %1:vgpr_32, implicit $exec
; GCN-NEXT: [[V_ALIGNBYTE_B32_e64_1:%[0-9]+]]:vgpr_32 = V_ALIGNBYTE_B32_e64 2, 2, undef %1:vgpr_32, implicit $exec
; GCN-NEXT: [[V_ALIGNBYTE_B32_e64_2:%[0-9]+]]:vgpr_32 = V_ALIGNBYTE_B32_e64 3, 3, undef %1:vgpr_32, implicit $exec
; GCN-NEXT: S_NOP 0, implicit [[V_ALIGNBYTE_B32_e64_]]
; GCN-NEXT: S_NOP 0, implicit [[V_ALIGNBYTE_B32_e64_1]]
; GCN-NEXT: S_NOP 0, implicit [[V_ALIGNBYTE_B32_e64_2]]
; GCN-NEXT: S_ENDPGM 0
%1:vgpr_32 = V_ALIGNBYTE_B32_e64 1, 1, undef %0:vgpr_32, implicit $exec
%2:vgpr_32 = V_ALIGNBYTE_B32_e64 2, 2, undef %0:vgpr_32, implicit $exec
%3:vgpr_32 = V_ALIGNBYTE_B32_e64 3, 3, undef %0:vgpr_32, implicit $exec
S_NOP 0, implicit %1
S_NOP 0, implicit %2
S_NOP 0, implicit %3
S_ENDPGM 0
...
---
name: test_remat_v_min3_i32_e64
tracksRegLiveness: true
body: |
bb.0:
; GCN-LABEL: name: test_remat_v_min3_i32_e64
; GCN: [[V_MIN3_I32_e64_:%[0-9]+]]:vgpr_32 = V_MIN3_I32_e64 1, 1, undef %1:vgpr_32, implicit $exec
; GCN-NEXT: [[V_MIN3_I32_e64_1:%[0-9]+]]:vgpr_32 = V_MIN3_I32_e64 2, 2, undef %1:vgpr_32, implicit $exec
; GCN-NEXT: [[V_MIN3_I32_e64_2:%[0-9]+]]:vgpr_32 = V_MIN3_I32_e64 3, 3, undef %1:vgpr_32, implicit $exec
; GCN-NEXT: S_NOP 0, implicit [[V_MIN3_I32_e64_]]
; GCN-NEXT: S_NOP 0, implicit [[V_MIN3_I32_e64_1]]
; GCN-NEXT: S_NOP 0, implicit [[V_MIN3_I32_e64_2]]
; GCN-NEXT: S_ENDPGM 0
%1:vgpr_32 = V_MIN3_I32_e64 1, 1, undef %0:vgpr_32, implicit $exec
%2:vgpr_32 = V_MIN3_I32_e64 2, 2, undef %0:vgpr_32, implicit $exec
%3:vgpr_32 = V_MIN3_I32_e64 3, 3, undef %0:vgpr_32, implicit $exec
S_NOP 0, implicit %1
S_NOP 0, implicit %2
S_NOP 0, implicit %3
S_ENDPGM 0
...
---
name: test_remat_v_min3_u32_e64
tracksRegLiveness: true
body: |
bb.0:
; GCN-LABEL: name: test_remat_v_min3_u32_e64
; GCN: [[V_MIN3_U32_e64_:%[0-9]+]]:vgpr_32 = V_MIN3_U32_e64 1, 1, undef %1:vgpr_32, implicit $exec
; GCN-NEXT: [[V_MIN3_U32_e64_1:%[0-9]+]]:vgpr_32 = V_MIN3_U32_e64 2, 2, undef %1:vgpr_32, implicit $exec
; GCN-NEXT: [[V_MIN3_U32_e64_2:%[0-9]+]]:vgpr_32 = V_MIN3_U32_e64 3, 3, undef %1:vgpr_32, implicit $exec
; GCN-NEXT: S_NOP 0, implicit [[V_MIN3_U32_e64_]]
; GCN-NEXT: S_NOP 0, implicit [[V_MIN3_U32_e64_1]]
; GCN-NEXT: S_NOP 0, implicit [[V_MIN3_U32_e64_2]]
; GCN-NEXT: S_ENDPGM 0
%1:vgpr_32 = V_MIN3_U32_e64 1, 1, undef %0:vgpr_32, implicit $exec
%2:vgpr_32 = V_MIN3_U32_e64 2, 2, undef %0:vgpr_32, implicit $exec
%3:vgpr_32 = V_MIN3_U32_e64 3, 3, undef %0:vgpr_32, implicit $exec
S_NOP 0, implicit %1
S_NOP 0, implicit %2
S_NOP 0, implicit %3
S_ENDPGM 0
...
---
name: test_remat_v_max3_i32_e64
tracksRegLiveness: true
body: |
bb.0:
; GCN-LABEL: name: test_remat_v_max3_i32_e64
; GCN: [[V_MAX3_I32_e64_:%[0-9]+]]:vgpr_32 = V_MAX3_I32_e64 1, 1, undef %1:vgpr_32, implicit $exec
; GCN-NEXT: [[V_MAX3_I32_e64_1:%[0-9]+]]:vgpr_32 = V_MAX3_I32_e64 2, 2, undef %1:vgpr_32, implicit $exec
; GCN-NEXT: [[V_MAX3_I32_e64_2:%[0-9]+]]:vgpr_32 = V_MAX3_I32_e64 3, 3, undef %1:vgpr_32, implicit $exec
; GCN-NEXT: S_NOP 0, implicit [[V_MAX3_I32_e64_]]
; GCN-NEXT: S_NOP 0, implicit [[V_MAX3_I32_e64_1]]
; GCN-NEXT: S_NOP 0, implicit [[V_MAX3_I32_e64_2]]
; GCN-NEXT: S_ENDPGM 0
%1:vgpr_32 = V_MAX3_I32_e64 1, 1, undef %0:vgpr_32, implicit $exec
%2:vgpr_32 = V_MAX3_I32_e64 2, 2, undef %0:vgpr_32, implicit $exec
%3:vgpr_32 = V_MAX3_I32_e64 3, 3, undef %0:vgpr_32, implicit $exec
S_NOP 0, implicit %1
S_NOP 0, implicit %2
S_NOP 0, implicit %3
S_ENDPGM 0
...
---
name: test_remat_v_max3_u32_e64
tracksRegLiveness: true
body: |
bb.0:
; GCN-LABEL: name: test_remat_v_max3_u32_e64
; GCN: [[V_MAX3_U32_e64_:%[0-9]+]]:vgpr_32 = V_MAX3_U32_e64 1, 1, undef %1:vgpr_32, implicit $exec
; GCN-NEXT: [[V_MAX3_U32_e64_1:%[0-9]+]]:vgpr_32 = V_MAX3_U32_e64 2, 2, undef %1:vgpr_32, implicit $exec
; GCN-NEXT: [[V_MAX3_U32_e64_2:%[0-9]+]]:vgpr_32 = V_MAX3_U32_e64 3, 3, undef %1:vgpr_32, implicit $exec
; GCN-NEXT: S_NOP 0, implicit [[V_MAX3_U32_e64_]]
; GCN-NEXT: S_NOP 0, implicit [[V_MAX3_U32_e64_1]]
; GCN-NEXT: S_NOP 0, implicit [[V_MAX3_U32_e64_2]]
; GCN-NEXT: S_ENDPGM 0
%1:vgpr_32 = V_MAX3_U32_e64 1, 1, undef %0:vgpr_32, implicit $exec
%2:vgpr_32 = V_MAX3_U32_e64 2, 2, undef %0:vgpr_32, implicit $exec
%3:vgpr_32 = V_MAX3_U32_e64 3, 3, undef %0:vgpr_32, implicit $exec
S_NOP 0, implicit %1
S_NOP 0, implicit %2
S_NOP 0, implicit %3
S_ENDPGM 0
...
---
name: test_remat_v_med3_i32_e64
tracksRegLiveness: true
body: |
bb.0:
; GCN-LABEL: name: test_remat_v_med3_i32_e64
; GCN: [[V_MED3_I32_e64_:%[0-9]+]]:vgpr_32 = V_MED3_I32_e64 1, 1, undef %1:vgpr_32, implicit $exec
; GCN-NEXT: [[V_MED3_I32_e64_1:%[0-9]+]]:vgpr_32 = V_MED3_I32_e64 2, 2, undef %1:vgpr_32, implicit $exec
; GCN-NEXT: [[V_MED3_I32_e64_2:%[0-9]+]]:vgpr_32 = V_MED3_I32_e64 3, 3, undef %1:vgpr_32, implicit $exec
; GCN-NEXT: S_NOP 0, implicit [[V_MED3_I32_e64_]]
; GCN-NEXT: S_NOP 0, implicit [[V_MED3_I32_e64_1]]
; GCN-NEXT: S_NOP 0, implicit [[V_MED3_I32_e64_2]]
; GCN-NEXT: S_ENDPGM 0
%1:vgpr_32 = V_MED3_I32_e64 1, 1, undef %0:vgpr_32, implicit $exec
%2:vgpr_32 = V_MED3_I32_e64 2, 2, undef %0:vgpr_32, implicit $exec
%3:vgpr_32 = V_MED3_I32_e64 3, 3, undef %0:vgpr_32, implicit $exec
S_NOP 0, implicit %1
S_NOP 0, implicit %2
S_NOP 0, implicit %3
S_ENDPGM 0
...
---
name: test_remat_v_med3_u32_e64
tracksRegLiveness: true
body: |
bb.0:
; GCN-LABEL: name: test_remat_v_med3_u32_e64
; GCN: [[V_MED3_U32_e64_:%[0-9]+]]:vgpr_32 = V_MED3_U32_e64 1, 1, undef %1:vgpr_32, implicit $exec
; GCN-NEXT: [[V_MED3_U32_e64_1:%[0-9]+]]:vgpr_32 = V_MED3_U32_e64 2, 2, undef %1:vgpr_32, implicit $exec
; GCN-NEXT: [[V_MED3_U32_e64_2:%[0-9]+]]:vgpr_32 = V_MED3_U32_e64 3, 3, undef %1:vgpr_32, implicit $exec
; GCN-NEXT: S_NOP 0, implicit [[V_MED3_U32_e64_]]
; GCN-NEXT: S_NOP 0, implicit [[V_MED3_U32_e64_1]]
; GCN-NEXT: S_NOP 0, implicit [[V_MED3_U32_e64_2]]
; GCN-NEXT: S_ENDPGM 0
%1:vgpr_32 = V_MED3_U32_e64 1, 1, undef %0:vgpr_32, implicit $exec
%2:vgpr_32 = V_MED3_U32_e64 2, 2, undef %0:vgpr_32, implicit $exec
%3:vgpr_32 = V_MED3_U32_e64 3, 3, undef %0:vgpr_32, implicit $exec
S_NOP 0, implicit %1
S_NOP 0, implicit %2
S_NOP 0, implicit %3
S_ENDPGM 0
...
---
name: test_remat_v_min3_f32_e64
tracksRegLiveness: true
body: |
bb.0:
; GCN-LABEL: name: test_remat_v_min3_f32_e64
; GCN: [[V_MIN3_F32_e64_:%[0-9]+]]:vgpr_32 = V_MIN3_F32_e64 0, 1, 0, 1, 0, undef %1:vgpr_32, 0, 0, implicit $exec, implicit $mode
; GCN-NEXT: [[V_MIN3_F32_e64_1:%[0-9]+]]:vgpr_32 = V_MIN3_F32_e64 0, 2, 0, 2, 0, undef %1:vgpr_32, 0, 0, implicit $exec, implicit $mode
; GCN-NEXT: [[V_MIN3_F32_e64_2:%[0-9]+]]:vgpr_32 = V_MIN3_F32_e64 0, 3, 0, 3, 0, undef %1:vgpr_32, 0, 0, implicit $exec, implicit $mode
; GCN-NEXT: S_NOP 0, implicit [[V_MIN3_F32_e64_]]
; GCN-NEXT: S_NOP 0, implicit [[V_MIN3_F32_e64_1]]
; GCN-NEXT: S_NOP 0, implicit [[V_MIN3_F32_e64_2]]
; GCN-NEXT: S_ENDPGM 0
%1:vgpr_32 = V_MIN3_F32_e64 0, 1, 0, 1, 0, undef %0:vgpr_32, 0, 0, implicit $exec, implicit $mode
%2:vgpr_32 = V_MIN3_F32_e64 0, 2, 0, 2, 0, undef %0:vgpr_32, 0, 0, implicit $exec, implicit $mode
%3:vgpr_32 = V_MIN3_F32_e64 0, 3, 0, 3, 0, undef %0:vgpr_32, 0, 0, implicit $exec, implicit $mode
S_NOP 0, implicit %1
S_NOP 0, implicit %2
S_NOP 0, implicit %3
S_ENDPGM 0
...
---
name: test_remat_v_max3_f32_e64
tracksRegLiveness: true
body: |
bb.0:
; GCN-LABEL: name: test_remat_v_max3_f32_e64
; GCN: [[V_MAX3_F32_e64_:%[0-9]+]]:vgpr_32 = V_MAX3_F32_e64 0, 1, 0, 1, 0, undef %1:vgpr_32, 0, 0, implicit $exec, implicit $mode
; GCN-NEXT: [[V_MAX3_F32_e64_1:%[0-9]+]]:vgpr_32 = V_MAX3_F32_e64 0, 2, 0, 2, 0, undef %1:vgpr_32, 0, 0, implicit $exec, implicit $mode
; GCN-NEXT: [[V_MAX3_F32_e64_2:%[0-9]+]]:vgpr_32 = V_MAX3_F32_e64 0, 3, 0, 3, 0, undef %1:vgpr_32, 0, 0, implicit $exec, implicit $mode
; GCN-NEXT: S_NOP 0, implicit [[V_MAX3_F32_e64_]]
; GCN-NEXT: S_NOP 0, implicit [[V_MAX3_F32_e64_1]]
; GCN-NEXT: S_NOP 0, implicit [[V_MAX3_F32_e64_2]]
; GCN-NEXT: S_ENDPGM 0
%1:vgpr_32 = V_MAX3_F32_e64 0, 1, 0, 1, 0, undef %0:vgpr_32, 0, 0, implicit $exec, implicit $mode
%2:vgpr_32 = V_MAX3_F32_e64 0, 2, 0, 2, 0, undef %0:vgpr_32, 0, 0, implicit $exec, implicit $mode
%3:vgpr_32 = V_MAX3_F32_e64 0, 3, 0, 3, 0, undef %0:vgpr_32, 0, 0, implicit $exec, implicit $mode
S_NOP 0, implicit %1
S_NOP 0, implicit %2
S_NOP 0, implicit %3
S_ENDPGM 0
...
---
name: test_remat_v_med3_f32_e64
tracksRegLiveness: true
body: |
bb.0:
; GCN-LABEL: name: test_remat_v_med3_f32_e64
; GCN: [[V_MED3_F32_e64_:%[0-9]+]]:vgpr_32 = V_MED3_F32_e64 0, 1, 0, 1, 0, undef %1:vgpr_32, 0, 0, implicit $exec, implicit $mode
; GCN-NEXT: [[V_MED3_F32_e64_1:%[0-9]+]]:vgpr_32 = V_MED3_F32_e64 0, 2, 0, 2, 0, undef %1:vgpr_32, 0, 0, implicit $exec, implicit $mode
; GCN-NEXT: [[V_MED3_F32_e64_2:%[0-9]+]]:vgpr_32 = V_MED3_F32_e64 0, 3, 0, 3, 0, undef %1:vgpr_32, 0, 0, implicit $exec, implicit $mode
; GCN-NEXT: S_NOP 0, implicit [[V_MED3_F32_e64_]]
; GCN-NEXT: S_NOP 0, implicit [[V_MED3_F32_e64_1]]
; GCN-NEXT: S_NOP 0, implicit [[V_MED3_F32_e64_2]]
; GCN-NEXT: S_ENDPGM 0
%1:vgpr_32 = V_MED3_F32_e64 0, 1, 0, 1, 0, undef %0:vgpr_32, 0, 0, implicit $exec, implicit $mode
%2:vgpr_32 = V_MED3_F32_e64 0, 2, 0, 2, 0, undef %0:vgpr_32, 0, 0, implicit $exec, implicit $mode
%3:vgpr_32 = V_MED3_F32_e64 0, 3, 0, 3, 0, undef %0:vgpr_32, 0, 0, implicit $exec, implicit $mode
S_NOP 0, implicit %1
S_NOP 0, implicit %2
S_NOP 0, implicit %3
S_ENDPGM 0
...
---
name: test_remat_v_sad_u8_e64
tracksRegLiveness: true
body: |
bb.0:
; GCN-LABEL: name: test_remat_v_sad_u8_e64
; GCN: [[V_SAD_U8_e64_:%[0-9]+]]:vgpr_32 = V_SAD_U8_e64 1, 1, undef %1:vgpr_32, 0, implicit $exec
; GCN-NEXT: [[V_SAD_U8_e64_1:%[0-9]+]]:vgpr_32 = V_SAD_U8_e64 2, 2, undef %1:vgpr_32, 0, implicit $exec
; GCN-NEXT: [[V_SAD_U8_e64_2:%[0-9]+]]:vgpr_32 = V_SAD_U8_e64 3, 3, undef %1:vgpr_32, 0, implicit $exec
; GCN-NEXT: S_NOP 0, implicit [[V_SAD_U8_e64_]]
; GCN-NEXT: S_NOP 0, implicit [[V_SAD_U8_e64_1]]
; GCN-NEXT: S_NOP 0, implicit [[V_SAD_U8_e64_2]]
; GCN-NEXT: S_ENDPGM 0
%1:vgpr_32 = V_SAD_U8_e64 1, 1, undef %0:vgpr_32, 0, implicit $exec
%2:vgpr_32 = V_SAD_U8_e64 2, 2, undef %0:vgpr_32, 0, implicit $exec
%3:vgpr_32 = V_SAD_U8_e64 3, 3, undef %0:vgpr_32, 0, implicit $exec
S_NOP 0, implicit %1
S_NOP 0, implicit %2
S_NOP 0, implicit %3
S_ENDPGM 0
...
---
name: test_remat_v_sad_hi_u8_e64
tracksRegLiveness: true
body: |
bb.0:
; GCN-LABEL: name: test_remat_v_sad_hi_u8_e64
; GCN: [[V_SAD_HI_U8_e64_:%[0-9]+]]:vgpr_32 = V_SAD_HI_U8_e64 1, 1, undef %1:vgpr_32, 0, implicit $exec
; GCN-NEXT: [[V_SAD_HI_U8_e64_1:%[0-9]+]]:vgpr_32 = V_SAD_HI_U8_e64 2, 2, undef %1:vgpr_32, 0, implicit $exec
; GCN-NEXT: [[V_SAD_HI_U8_e64_2:%[0-9]+]]:vgpr_32 = V_SAD_HI_U8_e64 3, 3, undef %1:vgpr_32, 0, implicit $exec
; GCN-NEXT: S_NOP 0, implicit [[V_SAD_HI_U8_e64_]]
; GCN-NEXT: S_NOP 0, implicit [[V_SAD_HI_U8_e64_1]]
; GCN-NEXT: S_NOP 0, implicit [[V_SAD_HI_U8_e64_2]]
; GCN-NEXT: S_ENDPGM 0
%1:vgpr_32 = V_SAD_HI_U8_e64 1, 1, undef %0:vgpr_32, 0, implicit $exec
%2:vgpr_32 = V_SAD_HI_U8_e64 2, 2, undef %0:vgpr_32, 0, implicit $exec
%3:vgpr_32 = V_SAD_HI_U8_e64 3, 3, undef %0:vgpr_32, 0, implicit $exec
S_NOP 0, implicit %1
S_NOP 0, implicit %2
S_NOP 0, implicit %3
S_ENDPGM 0
...
---
name: test_remat_v_sad_u16_e64
tracksRegLiveness: true
body: |
bb.0:
; GCN-LABEL: name: test_remat_v_sad_u16_e64
; GCN: [[V_SAD_U16_e64_:%[0-9]+]]:vgpr_32 = V_SAD_U16_e64 1, 1, undef %1:vgpr_32, 0, implicit $exec
; GCN-NEXT: [[V_SAD_U16_e64_1:%[0-9]+]]:vgpr_32 = V_SAD_U16_e64 2, 2, undef %1:vgpr_32, 0, implicit $exec
; GCN-NEXT: [[V_SAD_U16_e64_2:%[0-9]+]]:vgpr_32 = V_SAD_U16_e64 3, 3, undef %1:vgpr_32, 0, implicit $exec
; GCN-NEXT: S_NOP 0, implicit [[V_SAD_U16_e64_]]
; GCN-NEXT: S_NOP 0, implicit [[V_SAD_U16_e64_1]]
; GCN-NEXT: S_NOP 0, implicit [[V_SAD_U16_e64_2]]
; GCN-NEXT: S_ENDPGM 0
%1:vgpr_32 = V_SAD_U16_e64 1, 1, undef %0:vgpr_32, 0, implicit $exec
%2:vgpr_32 = V_SAD_U16_e64 2, 2, undef %0:vgpr_32, 0, implicit $exec
%3:vgpr_32 = V_SAD_U16_e64 3, 3, undef %0:vgpr_32, 0, implicit $exec
S_NOP 0, implicit %1
S_NOP 0, implicit %2
S_NOP 0, implicit %3
S_ENDPGM 0
...
---
name: test_remat_v_sad_u32_e64
tracksRegLiveness: true
body: |
bb.0:
; GCN-LABEL: name: test_remat_v_sad_u32_e64
; GCN: [[V_SAD_U32_e64_:%[0-9]+]]:vgpr_32 = V_SAD_U32_e64 1, 1, undef %1:vgpr_32, 0, implicit $exec
; GCN-NEXT: [[V_SAD_U32_e64_1:%[0-9]+]]:vgpr_32 = V_SAD_U32_e64 2, 2, undef %1:vgpr_32, 0, implicit $exec
; GCN-NEXT: [[V_SAD_U32_e64_2:%[0-9]+]]:vgpr_32 = V_SAD_U32_e64 3, 3, undef %1:vgpr_32, 0, implicit $exec
; GCN-NEXT: S_NOP 0, implicit [[V_SAD_U32_e64_]]
; GCN-NEXT: S_NOP 0, implicit [[V_SAD_U32_e64_1]]
; GCN-NEXT: S_NOP 0, implicit [[V_SAD_U32_e64_2]]
; GCN-NEXT: S_ENDPGM 0
%1:vgpr_32 = V_SAD_U32_e64 1, 1, undef %0:vgpr_32, 0, implicit $exec
%2:vgpr_32 = V_SAD_U32_e64 2, 2, undef %0:vgpr_32, 0, implicit $exec
%3:vgpr_32 = V_SAD_U32_e64 3, 3, undef %0:vgpr_32, 0, implicit $exec
S_NOP 0, implicit %1
S_NOP 0, implicit %2
S_NOP 0, implicit %3
S_ENDPGM 0
...
---
name: test_remat_v_cvt_pk_u8_f32_e64
tracksRegLiveness: true
body: |
bb.0:
; GCN-LABEL: name: test_remat_v_cvt_pk_u8_f32_e64
; GCN: [[V_CVT_PK_U8_F32_e64_:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_PK_U8_F32_e64 0, 1, 0, 1, 0, undef %1:vgpr_32, 0, implicit $exec, implicit $mode
; GCN-NEXT: [[V_CVT_PK_U8_F32_e64_1:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_PK_U8_F32_e64 0, 2, 0, 2, 0, undef %1:vgpr_32, 0, implicit $exec, implicit $mode
; GCN-NEXT: [[V_CVT_PK_U8_F32_e64_2:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_PK_U8_F32_e64 0, 3, 0, 3, 0, undef %1:vgpr_32, 0, implicit $exec, implicit $mode
; GCN-NEXT: S_NOP 0, implicit [[V_CVT_PK_U8_F32_e64_]]
; GCN-NEXT: S_NOP 0, implicit [[V_CVT_PK_U8_F32_e64_1]]
; GCN-NEXT: S_NOP 0, implicit [[V_CVT_PK_U8_F32_e64_2]]
; GCN-NEXT: S_ENDPGM 0
%1:vgpr_32 = nofpexcept V_CVT_PK_U8_F32_e64 0, 1, 0, 1, 0, undef %0:vgpr_32, 0, implicit $exec, implicit $mode
%2:vgpr_32 = nofpexcept V_CVT_PK_U8_F32_e64 0, 2, 0, 2, 0, undef %0:vgpr_32, 0, implicit $exec, implicit $mode
%3:vgpr_32 = nofpexcept V_CVT_PK_U8_F32_e64 0, 3, 0, 3, 0, undef %0:vgpr_32, 0, implicit $exec, implicit $mode
S_NOP 0, implicit %1
S_NOP 0, implicit %2
S_NOP 0, implicit %3
S_ENDPGM 0
...
---
name: test_remat_v_div_fixup_f64_e64
tracksRegLiveness: true
body: |
bb.0:
; GCN-LABEL: name: test_remat_v_div_fixup_f64_e64
; GCN: [[V_DIV_FIXUP_F64_e64_:%[0-9]+]]:vreg_64_align2 = nofpexcept V_DIV_FIXUP_F64_e64 0, 1, 0, 1, 0, undef %1:vreg_64_align2, 0, 0, implicit $exec, implicit $mode
; GCN-NEXT: [[V_DIV_FIXUP_F64_e64_1:%[0-9]+]]:vreg_64_align2 = nofpexcept V_DIV_FIXUP_F64_e64 0, 2, 0, 2, 0, undef %1:vreg_64_align2, 0, 0, implicit $exec, implicit $mode
; GCN-NEXT: [[V_DIV_FIXUP_F64_e64_2:%[0-9]+]]:vreg_64_align2 = nofpexcept V_DIV_FIXUP_F64_e64 0, 3, 0, 3, 0, undef %1:vreg_64_align2, 0, 0, implicit $exec, implicit $mode
; GCN-NEXT: S_NOP 0, implicit [[V_DIV_FIXUP_F64_e64_]]
; GCN-NEXT: S_NOP 0, implicit [[V_DIV_FIXUP_F64_e64_1]]
; GCN-NEXT: S_NOP 0, implicit [[V_DIV_FIXUP_F64_e64_2]]
; GCN-NEXT: S_ENDPGM 0
%1:vreg_64_align2 = nofpexcept V_DIV_FIXUP_F64_e64 0, 1, 0, 1, 0, undef %0:vreg_64_align2, 0, 0, implicit $exec, implicit $mode
%2:vreg_64_align2 = nofpexcept V_DIV_FIXUP_F64_e64 0, 2, 0, 2, 0, undef %0:vreg_64_align2, 0, 0, implicit $exec, implicit $mode
%3:vreg_64_align2 = nofpexcept V_DIV_FIXUP_F64_e64 0, 3, 0, 3, 0, undef %0:vreg_64_align2, 0, 0, implicit $exec, implicit $mode
S_NOP 0, implicit %1
S_NOP 0, implicit %2
S_NOP 0, implicit %3
S_ENDPGM 0
...
---
name: test_remat_v_ldexp_f64_e64
tracksRegLiveness: true
body: |
bb.0:
; GCN-LABEL: name: test_remat_v_ldexp_f64_e64
; GCN: [[V_LDEXP_F64_e64_:%[0-9]+]]:vreg_64_align2 = nofpexcept V_LDEXP_F64_e64 0, 1, 0, undef %1:vgpr_32, 0, 0, implicit $exec, implicit $mode
; GCN-NEXT: [[V_LDEXP_F64_e64_1:%[0-9]+]]:vreg_64_align2 = nofpexcept V_LDEXP_F64_e64 0, 2, 0, undef %1:vgpr_32, 0, 0, implicit $exec, implicit $mode
; GCN-NEXT: [[V_LDEXP_F64_e64_2:%[0-9]+]]:vreg_64_align2 = nofpexcept V_LDEXP_F64_e64 0, 3, 0, undef %1:vgpr_32, 0, 0, implicit $exec, implicit $mode
; GCN-NEXT: S_NOP 0, implicit [[V_LDEXP_F64_e64_]]
; GCN-NEXT: S_NOP 0, implicit [[V_LDEXP_F64_e64_1]]
; GCN-NEXT: S_NOP 0, implicit [[V_LDEXP_F64_e64_2]]
; GCN-NEXT: S_ENDPGM 0
%1:vreg_64_align2 = nofpexcept V_LDEXP_F64_e64 0, 1, 0, undef %0:vgpr_32, 0, 0, implicit $exec, implicit $mode
%2:vreg_64_align2 = nofpexcept V_LDEXP_F64_e64 0, 2, 0, undef %0:vgpr_32, 0, 0, implicit $exec, implicit $mode
%3:vreg_64_align2 = nofpexcept V_LDEXP_F64_e64 0, 3, 0, undef %0:vgpr_32, 0, 0, implicit $exec, implicit $mode
S_NOP 0, implicit %1
S_NOP 0, implicit %2
S_NOP 0, implicit %3
S_ENDPGM 0
...
---
name: test_remat_v_msad_u8_e64
tracksRegLiveness: true
body: |
bb.0:
; GCN-LABEL: name: test_remat_v_msad_u8_e64
; GCN: [[V_MSAD_U8_e64_:%[0-9]+]]:vgpr_32 = V_MSAD_U8_e64 1, 1, undef %1:vgpr_32, 0, implicit $exec
; GCN-NEXT: [[V_MSAD_U8_e64_1:%[0-9]+]]:vgpr_32 = V_MSAD_U8_e64 2, 2, undef %1:vgpr_32, 0, implicit $exec
; GCN-NEXT: [[V_MSAD_U8_e64_2:%[0-9]+]]:vgpr_32 = V_MSAD_U8_e64 3, 3, undef %1:vgpr_32, 0, implicit $exec
; GCN-NEXT: S_NOP 0, implicit [[V_MSAD_U8_e64_]]
; GCN-NEXT: S_NOP 0, implicit [[V_MSAD_U8_e64_1]]
; GCN-NEXT: S_NOP 0, implicit [[V_MSAD_U8_e64_2]]
; GCN-NEXT: S_ENDPGM 0
%1:vgpr_32 = V_MSAD_U8_e64 1, 1, undef %0:vgpr_32, 0, implicit $exec
%2:vgpr_32 = V_MSAD_U8_e64 2, 2, undef %0:vgpr_32, 0, implicit $exec
%3:vgpr_32 = V_MSAD_U8_e64 3, 3, undef %0:vgpr_32, 0, implicit $exec
S_NOP 0, implicit %1
S_NOP 0, implicit %2
S_NOP 0, implicit %3
S_ENDPGM 0
...
---
name: test_remat_v_trig_preop_f64_e64
tracksRegLiveness: true
body: |
bb.0:
; GCN-LABEL: name: test_remat_v_trig_preop_f64_e64
; GCN: [[V_TRIG_PREOP_F64_e64_:%[0-9]+]]:vreg_64_align2 = nofpexcept V_TRIG_PREOP_F64_e64 0, 1, 0, undef %1:vgpr_32, 0, 0, implicit $exec, implicit $mode
; GCN-NEXT: [[V_TRIG_PREOP_F64_e64_1:%[0-9]+]]:vreg_64_align2 = nofpexcept V_TRIG_PREOP_F64_e64 0, 2, 0, undef %1:vgpr_32, 0, 0, implicit $exec, implicit $mode
; GCN-NEXT: [[V_TRIG_PREOP_F64_e64_2:%[0-9]+]]:vreg_64_align2 = nofpexcept V_TRIG_PREOP_F64_e64 0, 3, 0, undef %1:vgpr_32, 0, 0, implicit $exec, implicit $mode
; GCN-NEXT: S_NOP 0, implicit [[V_TRIG_PREOP_F64_e64_]]
; GCN-NEXT: S_NOP 0, implicit [[V_TRIG_PREOP_F64_e64_1]]
; GCN-NEXT: S_NOP 0, implicit [[V_TRIG_PREOP_F64_e64_2]]
; GCN-NEXT: S_ENDPGM 0
%1:vreg_64_align2 = nofpexcept V_TRIG_PREOP_F64_e64 0, 1, 0, undef %0:vgpr_32, 0, 0, implicit $exec, implicit $mode
%2:vreg_64_align2 = nofpexcept V_TRIG_PREOP_F64_e64 0, 2, 0, undef %0:vgpr_32, 0, 0, implicit $exec, implicit $mode
%3:vreg_64_align2 = nofpexcept V_TRIG_PREOP_F64_e64 0, 3, 0, undef %0:vgpr_32, 0, 0, implicit $exec, implicit $mode
S_NOP 0, implicit %1
S_NOP 0, implicit %2
S_NOP 0, implicit %3
S_ENDPGM 0
...
---
name: test_remat_v_lshlrev_b64_e64
tracksRegLiveness: true
body: |
bb.0:
; GCN-LABEL: name: test_remat_v_lshlrev_b64_e64
; GCN: [[V_LSHLREV_B64_e64_:%[0-9]+]]:vreg_64_align2 = V_LSHLREV_B64_e64 1, undef %1:vreg_64_align2, implicit $exec
; GCN-NEXT: [[V_LSHLREV_B64_e64_1:%[0-9]+]]:vreg_64_align2 = V_LSHLREV_B64_e64 2, undef %1:vreg_64_align2, implicit $exec
; GCN-NEXT: [[V_LSHLREV_B64_e64_2:%[0-9]+]]:vreg_64_align2 = V_LSHLREV_B64_e64 3, undef %1:vreg_64_align2, implicit $exec
; GCN-NEXT: S_NOP 0, implicit [[V_LSHLREV_B64_e64_]]
; GCN-NEXT: S_NOP 0, implicit [[V_LSHLREV_B64_e64_1]]
; GCN-NEXT: S_NOP 0, implicit [[V_LSHLREV_B64_e64_2]]
; GCN-NEXT: S_ENDPGM 0
%1:vreg_64_align2 = V_LSHLREV_B64_e64 1, undef %0:vreg_64_align2, implicit $exec
%2:vreg_64_align2 = V_LSHLREV_B64_e64 2, undef %0:vreg_64_align2, implicit $exec
%3:vreg_64_align2 = V_LSHLREV_B64_e64 3, undef %0:vreg_64_align2, implicit $exec
S_NOP 0, implicit %1
S_NOP 0, implicit %2
S_NOP 0, implicit %3
S_ENDPGM 0
...
---
name: test_remat_v_lshrrev_b64_e64
tracksRegLiveness: true
body: |
bb.0:
; GCN-LABEL: name: test_remat_v_lshrrev_b64_e64
; GCN: [[V_LSHRREV_B64_e64_:%[0-9]+]]:vreg_64_align2 = V_LSHRREV_B64_e64 1, undef %1:vreg_64_align2, implicit $exec
; GCN-NEXT: [[V_LSHRREV_B64_e64_1:%[0-9]+]]:vreg_64_align2 = V_LSHRREV_B64_e64 2, undef %1:vreg_64_align2, implicit $exec
; GCN-NEXT: [[V_LSHRREV_B64_e64_2:%[0-9]+]]:vreg_64_align2 = V_LSHRREV_B64_e64 3, undef %1:vreg_64_align2, implicit $exec
; GCN-NEXT: S_NOP 0, implicit [[V_LSHRREV_B64_e64_]]
; GCN-NEXT: S_NOP 0, implicit [[V_LSHRREV_B64_e64_1]]
; GCN-NEXT: S_NOP 0, implicit [[V_LSHRREV_B64_e64_2]]
; GCN-NEXT: S_ENDPGM 0
%1:vreg_64_align2 = V_LSHRREV_B64_e64 1, undef %0:vreg_64_align2, implicit $exec
%2:vreg_64_align2 = V_LSHRREV_B64_e64 2, undef %0:vreg_64_align2, implicit $exec
%3:vreg_64_align2 = V_LSHRREV_B64_e64 3, undef %0:vreg_64_align2, implicit $exec
S_NOP 0, implicit %1
S_NOP 0, implicit %2
S_NOP 0, implicit %3
S_ENDPGM 0
...
---
name: test_remat_v_ashrrev_i64_e64
tracksRegLiveness: true
body: |
bb.0:
; GCN-LABEL: name: test_remat_v_ashrrev_i64_e64
; GCN: [[V_ASHRREV_I64_e64_:%[0-9]+]]:vreg_64_align2 = V_ASHRREV_I64_e64 1, undef %1:vreg_64_align2, implicit $exec
; GCN-NEXT: [[V_ASHRREV_I64_e64_1:%[0-9]+]]:vreg_64_align2 = V_ASHRREV_I64_e64 2, undef %1:vreg_64_align2, implicit $exec
; GCN-NEXT: [[V_ASHRREV_I64_e64_2:%[0-9]+]]:vreg_64_align2 = V_ASHRREV_I64_e64 3, undef %1:vreg_64_align2, implicit $exec
; GCN-NEXT: S_NOP 0, implicit [[V_ASHRREV_I64_e64_]]
; GCN-NEXT: S_NOP 0, implicit [[V_ASHRREV_I64_e64_1]]
; GCN-NEXT: S_NOP 0, implicit [[V_ASHRREV_I64_e64_2]]
; GCN-NEXT: S_ENDPGM 0
%1:vreg_64_align2 = V_ASHRREV_I64_e64 1, undef %0:vreg_64_align2, implicit $exec
%2:vreg_64_align2 = V_ASHRREV_I64_e64 2, undef %0:vreg_64_align2, implicit $exec
%3:vreg_64_align2 = V_ASHRREV_I64_e64 3, undef %0:vreg_64_align2, implicit $exec
S_NOP 0, implicit %1
S_NOP 0, implicit %2
S_NOP 0, implicit %3
S_ENDPGM 0
...
---
name: test_remat_v_perm_b32_e64
tracksRegLiveness: true
body: |
bb.0:
; GCN-LABEL: name: test_remat_v_perm_b32_e64
; GCN: [[V_PERM_B32_e64_:%[0-9]+]]:vgpr_32 = V_PERM_B32_e64 1, 1, undef %1:vgpr_32, implicit $exec
; GCN-NEXT: [[V_PERM_B32_e64_1:%[0-9]+]]:vgpr_32 = V_PERM_B32_e64 2, 2, undef %1:vgpr_32, implicit $exec
; GCN-NEXT: [[V_PERM_B32_e64_2:%[0-9]+]]:vgpr_32 = V_PERM_B32_e64 3, 3, undef %1:vgpr_32, implicit $exec
; GCN-NEXT: S_NOP 0, implicit [[V_PERM_B32_e64_]]
; GCN-NEXT: S_NOP 0, implicit [[V_PERM_B32_e64_1]]
; GCN-NEXT: S_NOP 0, implicit [[V_PERM_B32_e64_2]]
; GCN-NEXT: S_ENDPGM 0
%1:vgpr_32 = V_PERM_B32_e64 1, 1, undef %0:vgpr_32, implicit $exec
%2:vgpr_32 = V_PERM_B32_e64 2, 2, undef %0:vgpr_32, implicit $exec
%3:vgpr_32 = V_PERM_B32_e64 3, 3, undef %0:vgpr_32, implicit $exec
S_NOP 0, implicit %1
S_NOP 0, implicit %2
S_NOP 0, implicit %3
S_ENDPGM 0
...
---
name: test_remat_v_add3_u32_e64
tracksRegLiveness: true
body: |
bb.0:
; GCN-LABEL: name: test_remat_v_add3_u32_e64
; GCN: [[V_ADD3_U32_e64_:%[0-9]+]]:vgpr_32 = V_ADD3_U32_e64 1, 1, undef %1:vgpr_32, implicit $exec
; GCN-NEXT: [[V_ADD3_U32_e64_1:%[0-9]+]]:vgpr_32 = V_ADD3_U32_e64 2, 2, undef %1:vgpr_32, implicit $exec
; GCN-NEXT: [[V_ADD3_U32_e64_2:%[0-9]+]]:vgpr_32 = V_ADD3_U32_e64 3, 3, undef %1:vgpr_32, implicit $exec
; GCN-NEXT: S_NOP 0, implicit [[V_ADD3_U32_e64_]]
; GCN-NEXT: S_NOP 0, implicit [[V_ADD3_U32_e64_1]]
; GCN-NEXT: S_NOP 0, implicit [[V_ADD3_U32_e64_2]]
; GCN-NEXT: S_ENDPGM 0
%1:vgpr_32 = V_ADD3_U32_e64 1, 1, undef %0:vgpr_32, implicit $exec
%2:vgpr_32 = V_ADD3_U32_e64 2, 2, undef %0:vgpr_32, implicit $exec
%3:vgpr_32 = V_ADD3_U32_e64 3, 3, undef %0:vgpr_32, implicit $exec
S_NOP 0, implicit %1
S_NOP 0, implicit %2
S_NOP 0, implicit %3
S_ENDPGM 0
...
---
name: test_remat_v_and_or_b32_e64
tracksRegLiveness: true
body: |
bb.0:
; GCN-LABEL: name: test_remat_v_and_or_b32_e64
; GCN: [[V_AND_OR_B32_e64_:%[0-9]+]]:vgpr_32 = V_AND_OR_B32_e64 1, 1, undef %1:vgpr_32, implicit $exec
; GCN-NEXT: [[V_AND_OR_B32_e64_1:%[0-9]+]]:vgpr_32 = V_AND_OR_B32_e64 2, 2, undef %1:vgpr_32, implicit $exec
; GCN-NEXT: [[V_AND_OR_B32_e64_2:%[0-9]+]]:vgpr_32 = V_AND_OR_B32_e64 3, 3, undef %1:vgpr_32, implicit $exec
; GCN-NEXT: S_NOP 0, implicit [[V_AND_OR_B32_e64_]]
; GCN-NEXT: S_NOP 0, implicit [[V_AND_OR_B32_e64_1]]
; GCN-NEXT: S_NOP 0, implicit [[V_AND_OR_B32_e64_2]]
; GCN-NEXT: S_ENDPGM 0
%1:vgpr_32 = V_AND_OR_B32_e64 1, 1, undef %0:vgpr_32, implicit $exec
%2:vgpr_32 = V_AND_OR_B32_e64 2, 2, undef %0:vgpr_32, implicit $exec
%3:vgpr_32 = V_AND_OR_B32_e64 3, 3, undef %0:vgpr_32, implicit $exec
S_NOP 0, implicit %1
S_NOP 0, implicit %2
S_NOP 0, implicit %3
S_ENDPGM 0
...
---
name: test_remat_v_or3_b32_e64
tracksRegLiveness: true
body: |
bb.0:
; GCN-LABEL: name: test_remat_v_or3_b32_e64
; GCN: [[V_OR3_B32_e64_:%[0-9]+]]:vgpr_32 = V_OR3_B32_e64 1, 1, undef %1:vgpr_32, implicit $exec
; GCN-NEXT: [[V_OR3_B32_e64_1:%[0-9]+]]:vgpr_32 = V_OR3_B32_e64 2, 2, undef %1:vgpr_32, implicit $exec
; GCN-NEXT: [[V_OR3_B32_e64_2:%[0-9]+]]:vgpr_32 = V_OR3_B32_e64 3, 3, undef %1:vgpr_32, implicit $exec
; GCN-NEXT: S_NOP 0, implicit [[V_OR3_B32_e64_]]
; GCN-NEXT: S_NOP 0, implicit [[V_OR3_B32_e64_1]]
; GCN-NEXT: S_NOP 0, implicit [[V_OR3_B32_e64_2]]
; GCN-NEXT: S_ENDPGM 0
%1:vgpr_32 = V_OR3_B32_e64 1, 1, undef %0:vgpr_32, implicit $exec
%2:vgpr_32 = V_OR3_B32_e64 2, 2, undef %0:vgpr_32, implicit $exec
%3:vgpr_32 = V_OR3_B32_e64 3, 3, undef %0:vgpr_32, implicit $exec
S_NOP 0, implicit %1
S_NOP 0, implicit %2
S_NOP 0, implicit %3
S_ENDPGM 0
...
---
name: test_remat_v_xad_u32_e64
tracksRegLiveness: true
body: |
bb.0:
; GCN-LABEL: name: test_remat_v_xad_u32_e64
; GCN: [[V_XAD_U32_e64_:%[0-9]+]]:vgpr_32 = V_XAD_U32_e64 1, 1, undef %1:vgpr_32, implicit $exec
; GCN-NEXT: [[V_XAD_U32_e64_1:%[0-9]+]]:vgpr_32 = V_XAD_U32_e64 2, 2, undef %1:vgpr_32, implicit $exec
; GCN-NEXT: [[V_XAD_U32_e64_2:%[0-9]+]]:vgpr_32 = V_XAD_U32_e64 3, 3, undef %1:vgpr_32, implicit $exec
; GCN-NEXT: S_NOP 0, implicit [[V_XAD_U32_e64_]]
; GCN-NEXT: S_NOP 0, implicit [[V_XAD_U32_e64_1]]
; GCN-NEXT: S_NOP 0, implicit [[V_XAD_U32_e64_2]]
; GCN-NEXT: S_ENDPGM 0
%1:vgpr_32 = V_XAD_U32_e64 1, 1, undef %0:vgpr_32, implicit $exec
%2:vgpr_32 = V_XAD_U32_e64 2, 2, undef %0:vgpr_32, implicit $exec
%3:vgpr_32 = V_XAD_U32_e64 3, 3, undef %0:vgpr_32, implicit $exec
S_NOP 0, implicit %1
S_NOP 0, implicit %2
S_NOP 0, implicit %3
S_ENDPGM 0
...
---
name: test_remat_v_add_i32_e64
tracksRegLiveness: true
body: |
bb.0:
; GCN-LABEL: name: test_remat_v_add_i32_e64
; GCN: [[V_ADD_I32_e64_:%[0-9]+]]:vgpr_32 = V_ADD_I32_e64 1, undef %1:vgpr_32, 0, implicit $exec
; GCN-NEXT: [[V_ADD_I32_e64_1:%[0-9]+]]:vgpr_32 = V_ADD_I32_e64 2, undef %1:vgpr_32, 0, implicit $exec
; GCN-NEXT: [[V_ADD_I32_e64_2:%[0-9]+]]:vgpr_32 = V_ADD_I32_e64 3, undef %1:vgpr_32, 0, implicit $exec
; GCN-NEXT: S_NOP 0, implicit [[V_ADD_I32_e64_]]
; GCN-NEXT: S_NOP 0, implicit [[V_ADD_I32_e64_1]]
; GCN-NEXT: S_NOP 0, implicit [[V_ADD_I32_e64_2]]
; GCN-NEXT: S_ENDPGM 0
%1:vgpr_32 = V_ADD_I32_e64 1, undef %0:vgpr_32, 0, implicit $exec
%2:vgpr_32 = V_ADD_I32_e64 2, undef %0:vgpr_32, 0, implicit $exec
%3:vgpr_32 = V_ADD_I32_e64 3, undef %0:vgpr_32, 0, implicit $exec
S_NOP 0, implicit %1
S_NOP 0, implicit %2
S_NOP 0, implicit %3
S_ENDPGM 0
...
---
name: test_remat_v_add_lshl_u32_e64
tracksRegLiveness: true
body: |
bb.0:
; GCN-LABEL: name: test_remat_v_add_lshl_u32_e64
; GCN: [[V_ADD_LSHL_U32_e64_:%[0-9]+]]:vgpr_32 = V_ADD_LSHL_U32_e64 1, 1, undef %1:vgpr_32, implicit $exec
; GCN-NEXT: [[V_ADD_LSHL_U32_e64_1:%[0-9]+]]:vgpr_32 = V_ADD_LSHL_U32_e64 2, 2, undef %1:vgpr_32, implicit $exec
; GCN-NEXT: [[V_ADD_LSHL_U32_e64_2:%[0-9]+]]:vgpr_32 = V_ADD_LSHL_U32_e64 3, 3, undef %1:vgpr_32, implicit $exec
; GCN-NEXT: S_NOP 0, implicit [[V_ADD_LSHL_U32_e64_]]
; GCN-NEXT: S_NOP 0, implicit [[V_ADD_LSHL_U32_e64_1]]
; GCN-NEXT: S_NOP 0, implicit [[V_ADD_LSHL_U32_e64_2]]
; GCN-NEXT: S_ENDPGM 0
%1:vgpr_32 = V_ADD_LSHL_U32_e64 1, 1, undef %0:vgpr_32, implicit $exec
%2:vgpr_32 = V_ADD_LSHL_U32_e64 2, 2, undef %0:vgpr_32, implicit $exec
%3:vgpr_32 = V_ADD_LSHL_U32_e64 3, 3, undef %0:vgpr_32, implicit $exec
S_NOP 0, implicit %1
S_NOP 0, implicit %2
S_NOP 0, implicit %3
S_ENDPGM 0
...
---
name: test_remat_v_sub_i32_e64
tracksRegLiveness: true
body: |
bb.0:
; GCN-LABEL: name: test_remat_v_sub_i32_e64
; GCN: [[V_SUB_I32_e64_:%[0-9]+]]:vgpr_32 = V_SUB_I32_e64 1, undef %1:vgpr_32, 0, implicit $exec
; GCN-NEXT: [[V_SUB_I32_e64_1:%[0-9]+]]:vgpr_32 = V_SUB_I32_e64 2, undef %1:vgpr_32, 0, implicit $exec
; GCN-NEXT: [[V_SUB_I32_e64_2:%[0-9]+]]:vgpr_32 = V_SUB_I32_e64 3, undef %1:vgpr_32, 0, implicit $exec
; GCN-NEXT: S_NOP 0, implicit [[V_SUB_I32_e64_]]
; GCN-NEXT: S_NOP 0, implicit [[V_SUB_I32_e64_1]]
; GCN-NEXT: S_NOP 0, implicit [[V_SUB_I32_e64_2]]
; GCN-NEXT: S_ENDPGM 0
%1:vgpr_32 = V_SUB_I32_e64 1, undef %0:vgpr_32, 0, implicit $exec
%2:vgpr_32 = V_SUB_I32_e64 2, undef %0:vgpr_32, 0, implicit $exec
%3:vgpr_32 = V_SUB_I32_e64 3, undef %0:vgpr_32, 0, implicit $exec
S_NOP 0, implicit %1
S_NOP 0, implicit %2
S_NOP 0, implicit %3
S_ENDPGM 0
...
---
name: test_remat_v_lshl_add_u32_e64
tracksRegLiveness: true
body: |
bb.0:
; GCN-LABEL: name: test_remat_v_lshl_add_u32_e64
; GCN: [[V_LSHL_ADD_U32_e64_:%[0-9]+]]:vgpr_32 = V_LSHL_ADD_U32_e64 1, 1, undef %1:vgpr_32, implicit $exec
; GCN-NEXT: [[V_LSHL_ADD_U32_e64_1:%[0-9]+]]:vgpr_32 = V_LSHL_ADD_U32_e64 2, 2, undef %1:vgpr_32, implicit $exec
; GCN-NEXT: [[V_LSHL_ADD_U32_e64_2:%[0-9]+]]:vgpr_32 = V_LSHL_ADD_U32_e64 3, 3, undef %1:vgpr_32, implicit $exec
; GCN-NEXT: S_NOP 0, implicit [[V_LSHL_ADD_U32_e64_]]
; GCN-NEXT: S_NOP 0, implicit [[V_LSHL_ADD_U32_e64_1]]
; GCN-NEXT: S_NOP 0, implicit [[V_LSHL_ADD_U32_e64_2]]
; GCN-NEXT: S_ENDPGM 0
%1:vgpr_32 = V_LSHL_ADD_U32_e64 1, 1, undef %0:vgpr_32, implicit $exec
%2:vgpr_32 = V_LSHL_ADD_U32_e64 2, 2, undef %0:vgpr_32, implicit $exec
%3:vgpr_32 = V_LSHL_ADD_U32_e64 3, 3, undef %0:vgpr_32, implicit $exec
S_NOP 0, implicit %1
S_NOP 0, implicit %2
S_NOP 0, implicit %3
S_ENDPGM 0
...
---
name: test_remat_v_lshl_or_b32_e64
tracksRegLiveness: true
body: |
bb.0:
; GCN-LABEL: name: test_remat_v_lshl_or_b32_e64
; GCN: [[V_LSHL_OR_B32_e64_:%[0-9]+]]:vgpr_32 = V_LSHL_OR_B32_e64 1, 1, undef %1:vgpr_32, implicit $exec
; GCN-NEXT: [[V_LSHL_OR_B32_e64_1:%[0-9]+]]:vgpr_32 = V_LSHL_OR_B32_e64 2, 2, undef %1:vgpr_32, implicit $exec
; GCN-NEXT: [[V_LSHL_OR_B32_e64_2:%[0-9]+]]:vgpr_32 = V_LSHL_OR_B32_e64 3, 3, undef %1:vgpr_32, implicit $exec
; GCN-NEXT: S_NOP 0, implicit [[V_LSHL_OR_B32_e64_]]
; GCN-NEXT: S_NOP 0, implicit [[V_LSHL_OR_B32_e64_1]]
; GCN-NEXT: S_NOP 0, implicit [[V_LSHL_OR_B32_e64_2]]
; GCN-NEXT: S_ENDPGM 0
%1:vgpr_32 = V_LSHL_OR_B32_e64 1, 1, undef %0:vgpr_32, implicit $exec
%2:vgpr_32 = V_LSHL_OR_B32_e64 2, 2, undef %0:vgpr_32, implicit $exec
%3:vgpr_32 = V_LSHL_OR_B32_e64 3, 3, undef %0:vgpr_32, implicit $exec
S_NOP 0, implicit %1
S_NOP 0, implicit %2
S_NOP 0, implicit %3
S_ENDPGM 0
...
---
name: test_remat_v_lshlrev_b16_e32
tracksRegLiveness: true
body: |
bb.0:
liveins: $vgpr0
; GCN-LABEL: name: test_remat_v_lshlrev_b16_e32
; GCN: liveins: $vgpr0
; GCN-NEXT: {{ $}}
; GCN-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
; GCN-NEXT: [[V_LSHLREV_B16_e32_:%[0-9]+]]:vgpr_32 = V_LSHLREV_B16_e32 1, [[COPY]], implicit $exec
; GCN-NEXT: [[V_LSHLREV_B16_e32_1:%[0-9]+]]:vgpr_32 = V_LSHLREV_B16_e32 2, [[COPY]], implicit $exec
; GCN-NEXT: [[V_LSHLREV_B16_e32_2:%[0-9]+]]:vgpr_32 = V_LSHLREV_B16_e32 3, [[COPY]], implicit $exec
; GCN-NEXT: S_NOP 0, implicit [[V_LSHLREV_B16_e32_]]
; GCN-NEXT: S_NOP 0, implicit [[V_LSHLREV_B16_e32_1]]
; GCN-NEXT: S_NOP 0, implicit [[V_LSHLREV_B16_e32_2]]
; GCN-NEXT: S_ENDPGM 0, implicit [[COPY]]
%0:vgpr_32 = COPY $vgpr0
%1:vgpr_32 = V_LSHLREV_B16_e32 1, %0:vgpr_32, implicit $exec
%2:vgpr_32 = V_LSHLREV_B16_e32 2, %0:vgpr_32, implicit $exec
%3:vgpr_32 = V_LSHLREV_B16_e32 3, %0:vgpr_32, implicit $exec
S_NOP 0, implicit %1
S_NOP 0, implicit %2
S_NOP 0, implicit %3
S_ENDPGM 0, implicit %0
...
---
name: test_remat_v_lshlrev_b16_e64
tracksRegLiveness: true
body: |
bb.0:
liveins: $vgpr0
; GCN-LABEL: name: test_remat_v_lshlrev_b16_e64
; GCN: liveins: $vgpr0
; GCN-NEXT: {{ $}}
; GCN-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
; GCN-NEXT: [[V_LSHLREV_B16_e64_:%[0-9]+]]:vgpr_32 = V_LSHLREV_B16_e64 1, [[COPY]], implicit $exec
; GCN-NEXT: [[V_LSHLREV_B16_e64_1:%[0-9]+]]:vgpr_32 = V_LSHLREV_B16_e64 2, [[COPY]], implicit $exec
; GCN-NEXT: [[V_LSHLREV_B16_e64_2:%[0-9]+]]:vgpr_32 = V_LSHLREV_B16_e64 3, [[COPY]], implicit $exec
; GCN-NEXT: S_NOP 0, implicit [[V_LSHLREV_B16_e64_]]
; GCN-NEXT: S_NOP 0, implicit [[V_LSHLREV_B16_e64_1]]
; GCN-NEXT: S_NOP 0, implicit [[V_LSHLREV_B16_e64_2]]
; GCN-NEXT: S_ENDPGM 0, implicit [[COPY]]
%0:vgpr_32 = COPY $vgpr0
%1:vgpr_32 = V_LSHLREV_B16_e64 1, %0:vgpr_32, implicit $exec
%2:vgpr_32 = V_LSHLREV_B16_e64 2, %0:vgpr_32, implicit $exec
%3:vgpr_32 = V_LSHLREV_B16_e64 3, %0:vgpr_32, implicit $exec
S_NOP 0, implicit %1
S_NOP 0, implicit %2
S_NOP 0, implicit %3
S_ENDPGM 0, implicit %0
...
---
name: test_remat_v_lshrrev_b16_e32
tracksRegLiveness: true
body: |
bb.0:
liveins: $vgpr0
; GCN-LABEL: name: test_remat_v_lshrrev_b16_e32
; GCN: liveins: $vgpr0
; GCN-NEXT: {{ $}}
; GCN-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
; GCN-NEXT: [[V_LSHRREV_B16_e32_:%[0-9]+]]:vgpr_32 = V_LSHRREV_B16_e32 1, [[COPY]], implicit $exec
; GCN-NEXT: [[V_LSHRREV_B16_e32_1:%[0-9]+]]:vgpr_32 = V_LSHRREV_B16_e32 2, [[COPY]], implicit $exec
; GCN-NEXT: [[V_LSHRREV_B16_e32_2:%[0-9]+]]:vgpr_32 = V_LSHRREV_B16_e32 3, [[COPY]], implicit $exec
; GCN-NEXT: S_NOP 0, implicit [[V_LSHRREV_B16_e32_]]
; GCN-NEXT: S_NOP 0, implicit [[V_LSHRREV_B16_e32_1]]
; GCN-NEXT: S_NOP 0, implicit [[V_LSHRREV_B16_e32_2]]
; GCN-NEXT: S_ENDPGM 0, implicit [[COPY]]
%0:vgpr_32 = COPY $vgpr0
%1:vgpr_32 = V_LSHRREV_B16_e32 1, %0:vgpr_32, implicit $exec
%2:vgpr_32 = V_LSHRREV_B16_e32 2, %0:vgpr_32, implicit $exec
%3:vgpr_32 = V_LSHRREV_B16_e32 3, %0:vgpr_32, implicit $exec
S_NOP 0, implicit %1
S_NOP 0, implicit %2
S_NOP 0, implicit %3
S_ENDPGM 0, implicit %0
...
---
name: test_remat_v_lshrrev_b16_e64
tracksRegLiveness: true
body: |
bb.0:
liveins: $vgpr0
; GCN-LABEL: name: test_remat_v_lshrrev_b16_e64
; GCN: liveins: $vgpr0
; GCN-NEXT: {{ $}}
; GCN-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
; GCN-NEXT: [[V_LSHRREV_B16_e64_:%[0-9]+]]:vgpr_32 = V_LSHRREV_B16_e64 1, [[COPY]], implicit $exec
; GCN-NEXT: [[V_LSHRREV_B16_e64_1:%[0-9]+]]:vgpr_32 = V_LSHRREV_B16_e64 2, [[COPY]], implicit $exec
; GCN-NEXT: [[V_LSHRREV_B16_e64_2:%[0-9]+]]:vgpr_32 = V_LSHRREV_B16_e64 3, [[COPY]], implicit $exec
; GCN-NEXT: S_NOP 0, implicit [[V_LSHRREV_B16_e64_]]
; GCN-NEXT: S_NOP 0, implicit [[V_LSHRREV_B16_e64_1]]
; GCN-NEXT: S_NOP 0, implicit [[V_LSHRREV_B16_e64_2]]
; GCN-NEXT: S_ENDPGM 0, implicit [[COPY]]
%0:vgpr_32 = COPY $vgpr0
%1:vgpr_32 = V_LSHRREV_B16_e64 1, %0:vgpr_32, implicit $exec
%2:vgpr_32 = V_LSHRREV_B16_e64 2, %0:vgpr_32, implicit $exec
%3:vgpr_32 = V_LSHRREV_B16_e64 3, %0:vgpr_32, implicit $exec
S_NOP 0, implicit %1
S_NOP 0, implicit %2
S_NOP 0, implicit %3
S_ENDPGM 0, implicit %0
...
---
name: test_remat_v_ashrrev_i16_e32
tracksRegLiveness: true
body: |
bb.0:
liveins: $vgpr0
; GCN-LABEL: name: test_remat_v_ashrrev_i16_e32
; GCN: liveins: $vgpr0
; GCN-NEXT: {{ $}}
; GCN-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
; GCN-NEXT: [[V_ASHRREV_I16_e32_:%[0-9]+]]:vgpr_32 = V_ASHRREV_I16_e32 1, [[COPY]], implicit $exec
; GCN-NEXT: [[V_ASHRREV_I16_e32_1:%[0-9]+]]:vgpr_32 = V_ASHRREV_I16_e32 2, [[COPY]], implicit $exec
; GCN-NEXT: [[V_ASHRREV_I16_e32_2:%[0-9]+]]:vgpr_32 = V_ASHRREV_I16_e32 3, [[COPY]], implicit $exec
; GCN-NEXT: S_NOP 0, implicit [[V_ASHRREV_I16_e32_]]
; GCN-NEXT: S_NOP 0, implicit [[V_ASHRREV_I16_e32_1]]
; GCN-NEXT: S_NOP 0, implicit [[V_ASHRREV_I16_e32_2]]
; GCN-NEXT: S_ENDPGM 0, implicit [[COPY]]
%0:vgpr_32 = COPY $vgpr0
%1:vgpr_32 = V_ASHRREV_I16_e32 1, %0:vgpr_32, implicit $exec
%2:vgpr_32 = V_ASHRREV_I16_e32 2, %0:vgpr_32, implicit $exec
%3:vgpr_32 = V_ASHRREV_I16_e32 3, %0:vgpr_32, implicit $exec
S_NOP 0, implicit %1
S_NOP 0, implicit %2
S_NOP 0, implicit %3
S_ENDPGM 0, implicit %0
...
---
name: test_remat_v_ashrrev_i16_e64
tracksRegLiveness: true
body: |
bb.0:
liveins: $vgpr0
; GCN-LABEL: name: test_remat_v_ashrrev_i16_e64
; GCN: liveins: $vgpr0
; GCN-NEXT: {{ $}}
; GCN-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
; GCN-NEXT: [[V_ASHRREV_I16_e64_:%[0-9]+]]:vgpr_32 = V_ASHRREV_I16_e64 1, [[COPY]], implicit $exec
; GCN-NEXT: [[V_ASHRREV_I16_e64_1:%[0-9]+]]:vgpr_32 = V_ASHRREV_I16_e64 2, [[COPY]], implicit $exec
; GCN-NEXT: [[V_ASHRREV_I16_e64_2:%[0-9]+]]:vgpr_32 = V_ASHRREV_I16_e64 3, [[COPY]], implicit $exec
; GCN-NEXT: S_NOP 0, implicit [[V_ASHRREV_I16_e64_]]
; GCN-NEXT: S_NOP 0, implicit [[V_ASHRREV_I16_e64_1]]
; GCN-NEXT: S_NOP 0, implicit [[V_ASHRREV_I16_e64_2]]
; GCN-NEXT: S_ENDPGM 0, implicit [[COPY]]
%0:vgpr_32 = COPY $vgpr0
%1:vgpr_32 = V_ASHRREV_I16_e64 1, %0:vgpr_32, implicit $exec
%2:vgpr_32 = V_ASHRREV_I16_e64 2, %0:vgpr_32, implicit $exec
%3:vgpr_32 = V_ASHRREV_I16_e64 3, %0:vgpr_32, implicit $exec
S_NOP 0, implicit %1
S_NOP 0, implicit %2
S_NOP 0, implicit %3
S_ENDPGM 0, implicit %0
...
---
name: test_remat_v_add_u16_e32
tracksRegLiveness: true
body: |
bb.0:
liveins: $vgpr0
; GCN-LABEL: name: test_remat_v_add_u16_e32
; GCN: liveins: $vgpr0
; GCN-NEXT: {{ $}}
; GCN-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
; GCN-NEXT: [[V_ADD_U16_e32_:%[0-9]+]]:vgpr_32 = V_ADD_U16_e32 1, [[COPY]], implicit $exec
; GCN-NEXT: [[V_ADD_U16_e32_1:%[0-9]+]]:vgpr_32 = V_ADD_U16_e32 2, [[COPY]], implicit $exec
; GCN-NEXT: [[V_ADD_U16_e32_2:%[0-9]+]]:vgpr_32 = V_ADD_U16_e32 3, [[COPY]], implicit $exec
; GCN-NEXT: S_NOP 0, implicit [[V_ADD_U16_e32_]]
; GCN-NEXT: S_NOP 0, implicit [[V_ADD_U16_e32_1]]
; GCN-NEXT: S_NOP 0, implicit [[V_ADD_U16_e32_2]]
; GCN-NEXT: S_ENDPGM 0, implicit [[COPY]]
%0:vgpr_32 = COPY $vgpr0
%1:vgpr_32 = V_ADD_U16_e32 1, %0:vgpr_32, implicit $exec
%2:vgpr_32 = V_ADD_U16_e32 2, %0:vgpr_32, implicit $exec
%3:vgpr_32 = V_ADD_U16_e32 3, %0:vgpr_32, implicit $exec
S_NOP 0, implicit %1
S_NOP 0, implicit %2
S_NOP 0, implicit %3
S_ENDPGM 0, implicit %0
...
---
name: test_remat_v_add_u16_e64
tracksRegLiveness: true
body: |
bb.0:
liveins: $vgpr0
; GCN-LABEL: name: test_remat_v_add_u16_e64
; GCN: liveins: $vgpr0
; GCN-NEXT: {{ $}}
; GCN-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
; GCN-NEXT: [[V_ADD_U16_e64_:%[0-9]+]]:vgpr_32 = V_ADD_U16_e64 1, [[COPY]], 0, implicit $exec
; GCN-NEXT: [[V_ADD_U16_e64_1:%[0-9]+]]:vgpr_32 = V_ADD_U16_e64 2, [[COPY]], 0, implicit $exec
; GCN-NEXT: [[V_ADD_U16_e64_2:%[0-9]+]]:vgpr_32 = V_ADD_U16_e64 3, [[COPY]], 0, implicit $exec
; GCN-NEXT: S_NOP 0, implicit [[V_ADD_U16_e64_]]
; GCN-NEXT: S_NOP 0, implicit [[V_ADD_U16_e64_1]]
; GCN-NEXT: S_NOP 0, implicit [[V_ADD_U16_e64_2]]
; GCN-NEXT: S_ENDPGM 0, implicit [[COPY]]
%0:vgpr_32 = COPY $vgpr0
%1:vgpr_32 = V_ADD_U16_e64 1, %0:vgpr_32, 0, implicit $exec
%2:vgpr_32 = V_ADD_U16_e64 2, %0:vgpr_32, 0, implicit $exec
%3:vgpr_32 = V_ADD_U16_e64 3, %0:vgpr_32, 0, implicit $exec
S_NOP 0, implicit %1
S_NOP 0, implicit %2
S_NOP 0, implicit %3
S_ENDPGM 0, implicit %0
...
---
name: test_remat_v_sub_u16_e32
tracksRegLiveness: true
body: |
bb.0:
liveins: $vgpr0
; GCN-LABEL: name: test_remat_v_sub_u16_e32
; GCN: liveins: $vgpr0
; GCN-NEXT: {{ $}}
; GCN-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
; GCN-NEXT: [[V_SUB_U16_e32_:%[0-9]+]]:vgpr_32 = V_SUB_U16_e32 1, [[COPY]], implicit $exec
; GCN-NEXT: [[V_SUB_U16_e32_1:%[0-9]+]]:vgpr_32 = V_SUB_U16_e32 2, [[COPY]], implicit $exec
; GCN-NEXT: [[V_SUB_U16_e32_2:%[0-9]+]]:vgpr_32 = V_SUB_U16_e32 3, [[COPY]], implicit $exec
; GCN-NEXT: S_NOP 0, implicit [[V_SUB_U16_e32_]]
; GCN-NEXT: S_NOP 0, implicit [[V_SUB_U16_e32_1]]
; GCN-NEXT: S_NOP 0, implicit [[V_SUB_U16_e32_2]]
; GCN-NEXT: S_ENDPGM 0, implicit [[COPY]]
%0:vgpr_32 = COPY $vgpr0
%1:vgpr_32 = V_SUB_U16_e32 1, %0:vgpr_32, implicit $exec
%2:vgpr_32 = V_SUB_U16_e32 2, %0:vgpr_32, implicit $exec
%3:vgpr_32 = V_SUB_U16_e32 3, %0:vgpr_32, implicit $exec
S_NOP 0, implicit %1
S_NOP 0, implicit %2
S_NOP 0, implicit %3
S_ENDPGM 0, implicit %0
...
---
name: test_remat_v_sub_u16_e64
tracksRegLiveness: true
body: |
bb.0:
liveins: $vgpr0
; GCN-LABEL: name: test_remat_v_sub_u16_e64
; GCN: liveins: $vgpr0
; GCN-NEXT: {{ $}}
; GCN-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
; GCN-NEXT: [[V_SUB_U16_e64_:%[0-9]+]]:vgpr_32 = V_SUB_U16_e64 1, [[COPY]], 0, implicit $exec
; GCN-NEXT: [[V_SUB_U16_e64_1:%[0-9]+]]:vgpr_32 = V_SUB_U16_e64 2, [[COPY]], 0, implicit $exec
; GCN-NEXT: [[V_SUB_U16_e64_2:%[0-9]+]]:vgpr_32 = V_SUB_U16_e64 3, [[COPY]], 0, implicit $exec
; GCN-NEXT: S_NOP 0, implicit [[V_SUB_U16_e64_]]
; GCN-NEXT: S_NOP 0, implicit [[V_SUB_U16_e64_1]]
; GCN-NEXT: S_NOP 0, implicit [[V_SUB_U16_e64_2]]
; GCN-NEXT: S_ENDPGM 0, implicit [[COPY]]
%0:vgpr_32 = COPY $vgpr0
%1:vgpr_32 = V_SUB_U16_e64 1, %0:vgpr_32, 0, implicit $exec
%2:vgpr_32 = V_SUB_U16_e64 2, %0:vgpr_32, 0, implicit $exec
%3:vgpr_32 = V_SUB_U16_e64 3, %0:vgpr_32, 0, implicit $exec
S_NOP 0, implicit %1
S_NOP 0, implicit %2
S_NOP 0, implicit %3
S_ENDPGM 0, implicit %0
...
---
name: test_remat_v_subrev_u16_e32
tracksRegLiveness: true
body: |
bb.0:
liveins: $vgpr0
; GCN-LABEL: name: test_remat_v_subrev_u16_e32
; GCN: liveins: $vgpr0
; GCN-NEXT: {{ $}}
; GCN-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
; GCN-NEXT: [[V_SUBREV_U16_e32_:%[0-9]+]]:vgpr_32 = V_SUBREV_U16_e32 1, [[COPY]], implicit $exec
; GCN-NEXT: [[V_SUBREV_U16_e32_1:%[0-9]+]]:vgpr_32 = V_SUBREV_U16_e32 2, [[COPY]], implicit $exec
; GCN-NEXT: [[V_SUBREV_U16_e32_2:%[0-9]+]]:vgpr_32 = V_SUBREV_U16_e32 3, [[COPY]], implicit $exec
; GCN-NEXT: S_NOP 0, implicit [[V_SUBREV_U16_e32_]]
; GCN-NEXT: S_NOP 0, implicit [[V_SUBREV_U16_e32_1]]
; GCN-NEXT: S_NOP 0, implicit [[V_SUBREV_U16_e32_2]]
; GCN-NEXT: S_ENDPGM 0, implicit [[COPY]]
%0:vgpr_32 = COPY $vgpr0
%1:vgpr_32 = V_SUBREV_U16_e32 1, %0:vgpr_32, implicit $exec
%2:vgpr_32 = V_SUBREV_U16_e32 2, %0:vgpr_32, implicit $exec
%3:vgpr_32 = V_SUBREV_U16_e32 3, %0:vgpr_32, implicit $exec
S_NOP 0, implicit %1
S_NOP 0, implicit %2
S_NOP 0, implicit %3
S_ENDPGM 0, implicit %0
...
---
name: test_remat_v_subrev_u16_e64
tracksRegLiveness: true
body: |
bb.0:
liveins: $vgpr0
; GCN-LABEL: name: test_remat_v_subrev_u16_e64
; GCN: liveins: $vgpr0
; GCN-NEXT: {{ $}}
; GCN-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
; GCN-NEXT: [[V_SUBREV_U16_e64_:%[0-9]+]]:vgpr_32 = V_SUBREV_U16_e64 1, [[COPY]], 0, implicit $exec
; GCN-NEXT: [[V_SUBREV_U16_e64_1:%[0-9]+]]:vgpr_32 = V_SUBREV_U16_e64 2, [[COPY]], 0, implicit $exec
; GCN-NEXT: [[V_SUBREV_U16_e64_2:%[0-9]+]]:vgpr_32 = V_SUBREV_U16_e64 3, [[COPY]], 0, implicit $exec
; GCN-NEXT: S_NOP 0, implicit [[V_SUBREV_U16_e64_]]
; GCN-NEXT: S_NOP 0, implicit [[V_SUBREV_U16_e64_1]]
; GCN-NEXT: S_NOP 0, implicit [[V_SUBREV_U16_e64_2]]
; GCN-NEXT: S_ENDPGM 0, implicit [[COPY]]
%0:vgpr_32 = COPY $vgpr0
%1:vgpr_32 = V_SUBREV_U16_e64 1, %0:vgpr_32, 0, implicit $exec
%2:vgpr_32 = V_SUBREV_U16_e64 2, %0:vgpr_32, 0, implicit $exec
%3:vgpr_32 = V_SUBREV_U16_e64 3, %0:vgpr_32, 0, implicit $exec
S_NOP 0, implicit %1
S_NOP 0, implicit %2
S_NOP 0, implicit %3
S_ENDPGM 0, implicit %0
...
---
name: test_remat_v_min_u16_e32
tracksRegLiveness: true
body: |
bb.0:
liveins: $vgpr0
; GCN-LABEL: name: test_remat_v_min_u16_e32
; GCN: liveins: $vgpr0
; GCN-NEXT: {{ $}}
; GCN-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
; GCN-NEXT: [[V_MIN_U16_e32_:%[0-9]+]]:vgpr_32 = V_MIN_U16_e32 1, [[COPY]], implicit $exec
; GCN-NEXT: [[V_MIN_U16_e32_1:%[0-9]+]]:vgpr_32 = V_MIN_U16_e32 2, [[COPY]], implicit $exec
; GCN-NEXT: [[V_MIN_U16_e32_2:%[0-9]+]]:vgpr_32 = V_MIN_U16_e32 3, [[COPY]], implicit $exec
; GCN-NEXT: S_NOP 0, implicit [[V_MIN_U16_e32_]]
; GCN-NEXT: S_NOP 0, implicit [[V_MIN_U16_e32_1]]
; GCN-NEXT: S_NOP 0, implicit [[V_MIN_U16_e32_2]]
; GCN-NEXT: S_ENDPGM 0, implicit [[COPY]]
%0:vgpr_32 = COPY $vgpr0
%1:vgpr_32 = V_MIN_U16_e32 1, %0:vgpr_32, implicit $exec
%2:vgpr_32 = V_MIN_U16_e32 2, %0:vgpr_32, implicit $exec
%3:vgpr_32 = V_MIN_U16_e32 3, %0:vgpr_32, implicit $exec
S_NOP 0, implicit %1
S_NOP 0, implicit %2
S_NOP 0, implicit %3
S_ENDPGM 0, implicit %0
...
---
name: test_remat_v_min_u16_e64
tracksRegLiveness: true
body: |
bb.0:
liveins: $vgpr0
; GCN-LABEL: name: test_remat_v_min_u16_e64
; GCN: liveins: $vgpr0
; GCN-NEXT: {{ $}}
; GCN-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
; GCN-NEXT: [[V_MIN_U16_e64_:%[0-9]+]]:vgpr_32 = V_MIN_U16_e64 1, [[COPY]], implicit $exec
; GCN-NEXT: [[V_MIN_U16_e64_1:%[0-9]+]]:vgpr_32 = V_MIN_U16_e64 2, [[COPY]], implicit $exec
; GCN-NEXT: [[V_MIN_U16_e64_2:%[0-9]+]]:vgpr_32 = V_MIN_U16_e64 3, [[COPY]], implicit $exec
; GCN-NEXT: S_NOP 0, implicit [[V_MIN_U16_e64_]]
; GCN-NEXT: S_NOP 0, implicit [[V_MIN_U16_e64_1]]
; GCN-NEXT: S_NOP 0, implicit [[V_MIN_U16_e64_2]]
; GCN-NEXT: S_ENDPGM 0, implicit [[COPY]]
%0:vgpr_32 = COPY $vgpr0
%1:vgpr_32 = V_MIN_U16_e64 1, %0:vgpr_32, implicit $exec
%2:vgpr_32 = V_MIN_U16_e64 2, %0:vgpr_32, implicit $exec
%3:vgpr_32 = V_MIN_U16_e64 3, %0:vgpr_32, implicit $exec
S_NOP 0, implicit %1
S_NOP 0, implicit %2
S_NOP 0, implicit %3
S_ENDPGM 0, implicit %0
...
---
name: test_remat_v_max_u16_e32
tracksRegLiveness: true
body: |
bb.0:
liveins: $vgpr0
; GCN-LABEL: name: test_remat_v_max_u16_e32
; GCN: liveins: $vgpr0
; GCN-NEXT: {{ $}}
; GCN-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
; GCN-NEXT: [[V_MAX_U16_e32_:%[0-9]+]]:vgpr_32 = V_MAX_U16_e32 1, [[COPY]], implicit $exec
; GCN-NEXT: [[V_MAX_U16_e32_1:%[0-9]+]]:vgpr_32 = V_MAX_U16_e32 2, [[COPY]], implicit $exec
; GCN-NEXT: [[V_MAX_U16_e32_2:%[0-9]+]]:vgpr_32 = V_MAX_U16_e32 3, [[COPY]], implicit $exec
; GCN-NEXT: S_NOP 0, implicit [[V_MAX_U16_e32_]]
; GCN-NEXT: S_NOP 0, implicit [[V_MAX_U16_e32_1]]
; GCN-NEXT: S_NOP 0, implicit [[V_MAX_U16_e32_2]]
; GCN-NEXT: S_ENDPGM 0, implicit [[COPY]]
%0:vgpr_32 = COPY $vgpr0
%1:vgpr_32 = V_MAX_U16_e32 1, %0:vgpr_32, implicit $exec
%2:vgpr_32 = V_MAX_U16_e32 2, %0:vgpr_32, implicit $exec
%3:vgpr_32 = V_MAX_U16_e32 3, %0:vgpr_32, implicit $exec
S_NOP 0, implicit %1
S_NOP 0, implicit %2
S_NOP 0, implicit %3
S_ENDPGM 0, implicit %0
...
---
name: test_remat_v_max_u16_e64
tracksRegLiveness: true
body: |
bb.0:
liveins: $vgpr0
; GCN-LABEL: name: test_remat_v_max_u16_e64
; GCN: liveins: $vgpr0
; GCN-NEXT: {{ $}}
; GCN-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
; GCN-NEXT: [[V_MAX_U16_e64_:%[0-9]+]]:vgpr_32 = V_MAX_U16_e64 1, [[COPY]], implicit $exec
; GCN-NEXT: [[V_MAX_U16_e64_1:%[0-9]+]]:vgpr_32 = V_MAX_U16_e64 2, [[COPY]], implicit $exec
; GCN-NEXT: [[V_MAX_U16_e64_2:%[0-9]+]]:vgpr_32 = V_MAX_U16_e64 3, [[COPY]], implicit $exec
; GCN-NEXT: S_NOP 0, implicit [[V_MAX_U16_e64_]]
; GCN-NEXT: S_NOP 0, implicit [[V_MAX_U16_e64_1]]
; GCN-NEXT: S_NOP 0, implicit [[V_MAX_U16_e64_2]]
; GCN-NEXT: S_ENDPGM 0, implicit [[COPY]]
%0:vgpr_32 = COPY $vgpr0
%1:vgpr_32 = V_MAX_U16_e64 1, %0:vgpr_32, implicit $exec
%2:vgpr_32 = V_MAX_U16_e64 2, %0:vgpr_32, implicit $exec
%3:vgpr_32 = V_MAX_U16_e64 3, %0:vgpr_32, implicit $exec
S_NOP 0, implicit %1
S_NOP 0, implicit %2
S_NOP 0, implicit %3
S_ENDPGM 0, implicit %0
...
---
name: test_remat_v_min_i16_e32
tracksRegLiveness: true
body: |
bb.0:
liveins: $vgpr0
; GCN-LABEL: name: test_remat_v_min_i16_e32
; GCN: liveins: $vgpr0
; GCN-NEXT: {{ $}}
; GCN-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
; GCN-NEXT: [[V_MIN_I16_e32_:%[0-9]+]]:vgpr_32 = V_MIN_I16_e32 1, [[COPY]], implicit $exec
; GCN-NEXT: [[V_MIN_I16_e32_1:%[0-9]+]]:vgpr_32 = V_MIN_I16_e32 2, [[COPY]], implicit $exec
; GCN-NEXT: [[V_MIN_I16_e32_2:%[0-9]+]]:vgpr_32 = V_MIN_I16_e32 3, [[COPY]], implicit $exec
; GCN-NEXT: S_NOP 0, implicit [[V_MIN_I16_e32_]]
; GCN-NEXT: S_NOP 0, implicit [[V_MIN_I16_e32_1]]
; GCN-NEXT: S_NOP 0, implicit [[V_MIN_I16_e32_2]]
; GCN-NEXT: S_ENDPGM 0, implicit [[COPY]]
%0:vgpr_32 = COPY $vgpr0
%1:vgpr_32 = V_MIN_I16_e32 1, %0:vgpr_32, implicit $exec
%2:vgpr_32 = V_MIN_I16_e32 2, %0:vgpr_32, implicit $exec
%3:vgpr_32 = V_MIN_I16_e32 3, %0:vgpr_32, implicit $exec
S_NOP 0, implicit %1
S_NOP 0, implicit %2
S_NOP 0, implicit %3
S_ENDPGM 0, implicit %0
...
---
name: test_remat_v_min_i16_e64
tracksRegLiveness: true
body: |
bb.0:
liveins: $vgpr0
; GCN-LABEL: name: test_remat_v_min_i16_e64
; GCN: liveins: $vgpr0
; GCN-NEXT: {{ $}}
; GCN-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
; GCN-NEXT: [[V_MIN_I16_e64_:%[0-9]+]]:vgpr_32 = V_MIN_I16_e64 1, [[COPY]], implicit $exec
; GCN-NEXT: [[V_MIN_I16_e64_1:%[0-9]+]]:vgpr_32 = V_MIN_I16_e64 2, [[COPY]], implicit $exec
; GCN-NEXT: [[V_MIN_I16_e64_2:%[0-9]+]]:vgpr_32 = V_MIN_I16_e64 3, [[COPY]], implicit $exec
; GCN-NEXT: S_NOP 0, implicit [[V_MIN_I16_e64_]]
; GCN-NEXT: S_NOP 0, implicit [[V_MIN_I16_e64_1]]
; GCN-NEXT: S_NOP 0, implicit [[V_MIN_I16_e64_2]]
; GCN-NEXT: S_ENDPGM 0, implicit [[COPY]]
%0:vgpr_32 = COPY $vgpr0
%1:vgpr_32 = V_MIN_I16_e64 1, %0:vgpr_32, implicit $exec
%2:vgpr_32 = V_MIN_I16_e64 2, %0:vgpr_32, implicit $exec
%3:vgpr_32 = V_MIN_I16_e64 3, %0:vgpr_32, implicit $exec
S_NOP 0, implicit %1
S_NOP 0, implicit %2
S_NOP 0, implicit %3
S_ENDPGM 0, implicit %0
...
---
name: test_remat_v_max_i16_e32
tracksRegLiveness: true
body: |
bb.0:
liveins: $vgpr0
; GCN-LABEL: name: test_remat_v_max_i16_e32
; GCN: liveins: $vgpr0
; GCN-NEXT: {{ $}}
; GCN-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
; GCN-NEXT: [[V_MAX_I16_e32_:%[0-9]+]]:vgpr_32 = V_MAX_I16_e32 1, [[COPY]], implicit $exec
; GCN-NEXT: [[V_MAX_I16_e32_1:%[0-9]+]]:vgpr_32 = V_MAX_I16_e32 2, [[COPY]], implicit $exec
; GCN-NEXT: [[V_MAX_I16_e32_2:%[0-9]+]]:vgpr_32 = V_MAX_I16_e32 3, [[COPY]], implicit $exec
; GCN-NEXT: S_NOP 0, implicit [[V_MAX_I16_e32_]]
; GCN-NEXT: S_NOP 0, implicit [[V_MAX_I16_e32_1]]
; GCN-NEXT: S_NOP 0, implicit [[V_MAX_I16_e32_2]]
; GCN-NEXT: S_ENDPGM 0, implicit [[COPY]]
%0:vgpr_32 = COPY $vgpr0
%1:vgpr_32 = V_MAX_I16_e32 1, %0:vgpr_32, implicit $exec
%2:vgpr_32 = V_MAX_I16_e32 2, %0:vgpr_32, implicit $exec
%3:vgpr_32 = V_MAX_I16_e32 3, %0:vgpr_32, implicit $exec
S_NOP 0, implicit %1
S_NOP 0, implicit %2
S_NOP 0, implicit %3
S_ENDPGM 0, implicit %0
...
---
name: test_remat_v_max_i16_e64
tracksRegLiveness: true
body: |
bb.0:
liveins: $vgpr0
; GCN-LABEL: name: test_remat_v_max_i16_e64
; GCN: liveins: $vgpr0
; GCN-NEXT: {{ $}}
; GCN-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
; GCN-NEXT: [[V_MAX_I16_e64_:%[0-9]+]]:vgpr_32 = V_MAX_I16_e64 1, [[COPY]], implicit $exec
; GCN-NEXT: [[V_MAX_I16_e64_1:%[0-9]+]]:vgpr_32 = V_MAX_I16_e64 2, [[COPY]], implicit $exec
; GCN-NEXT: [[V_MAX_I16_e64_2:%[0-9]+]]:vgpr_32 = V_MAX_I16_e64 3, [[COPY]], implicit $exec
; GCN-NEXT: S_NOP 0, implicit [[V_MAX_I16_e64_]]
; GCN-NEXT: S_NOP 0, implicit [[V_MAX_I16_e64_1]]
; GCN-NEXT: S_NOP 0, implicit [[V_MAX_I16_e64_2]]
; GCN-NEXT: S_ENDPGM 0, implicit [[COPY]]
%0:vgpr_32 = COPY $vgpr0
%1:vgpr_32 = V_MAX_I16_e64 1, %0:vgpr_32, implicit $exec
%2:vgpr_32 = V_MAX_I16_e64 2, %0:vgpr_32, implicit $exec
%3:vgpr_32 = V_MAX_I16_e64 3, %0:vgpr_32, implicit $exec
S_NOP 0, implicit %1
S_NOP 0, implicit %2
S_NOP 0, implicit %3
S_ENDPGM 0, implicit %0
...
---
name: test_remat_v_mul_lo_u16_e32
tracksRegLiveness: true
body: |
bb.0:
liveins: $vgpr0
; GCN-LABEL: name: test_remat_v_mul_lo_u16_e32
; GCN: liveins: $vgpr0
; GCN-NEXT: {{ $}}
; GCN-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
; GCN-NEXT: [[V_MUL_LO_U16_e32_:%[0-9]+]]:vgpr_32 = V_MUL_LO_U16_e32 1, [[COPY]], implicit $exec
; GCN-NEXT: [[V_MUL_LO_U16_e32_1:%[0-9]+]]:vgpr_32 = V_MUL_LO_U16_e32 2, [[COPY]], implicit $exec
; GCN-NEXT: [[V_MUL_LO_U16_e32_2:%[0-9]+]]:vgpr_32 = V_MUL_LO_U16_e32 3, [[COPY]], implicit $exec
; GCN-NEXT: S_NOP 0, implicit [[V_MUL_LO_U16_e32_]]
; GCN-NEXT: S_NOP 0, implicit [[V_MUL_LO_U16_e32_1]]
; GCN-NEXT: S_NOP 0, implicit [[V_MUL_LO_U16_e32_2]]
; GCN-NEXT: S_ENDPGM 0, implicit [[COPY]]
%0:vgpr_32 = COPY $vgpr0
%1:vgpr_32 = V_MUL_LO_U16_e32 1, %0:vgpr_32, implicit $exec
%2:vgpr_32 = V_MUL_LO_U16_e32 2, %0:vgpr_32, implicit $exec
%3:vgpr_32 = V_MUL_LO_U16_e32 3, %0:vgpr_32, implicit $exec
S_NOP 0, implicit %1
S_NOP 0, implicit %2
S_NOP 0, implicit %3
S_ENDPGM 0, implicit %0
...
---
name: test_remat_v_mul_lo_u16_e64
tracksRegLiveness: true
body: |
bb.0:
liveins: $vgpr0
; GCN-LABEL: name: test_remat_v_mul_lo_u16_e64
; GCN: liveins: $vgpr0
; GCN-NEXT: {{ $}}
; GCN-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
; GCN-NEXT: [[V_MUL_LO_U16_e64_:%[0-9]+]]:vgpr_32 = V_MUL_LO_U16_e64 1, [[COPY]], implicit $exec
; GCN-NEXT: [[V_MUL_LO_U16_e64_1:%[0-9]+]]:vgpr_32 = V_MUL_LO_U16_e64 2, [[COPY]], implicit $exec
; GCN-NEXT: [[V_MUL_LO_U16_e64_2:%[0-9]+]]:vgpr_32 = V_MUL_LO_U16_e64 3, [[COPY]], implicit $exec
; GCN-NEXT: S_NOP 0, implicit [[V_MUL_LO_U16_e64_]]
; GCN-NEXT: S_NOP 0, implicit [[V_MUL_LO_U16_e64_1]]
; GCN-NEXT: S_NOP 0, implicit [[V_MUL_LO_U16_e64_2]]
; GCN-NEXT: S_ENDPGM 0, implicit [[COPY]]
%0:vgpr_32 = COPY $vgpr0
%1:vgpr_32 = V_MUL_LO_U16_e64 1, %0:vgpr_32, implicit $exec
%2:vgpr_32 = V_MUL_LO_U16_e64 2, %0:vgpr_32, implicit $exec
%3:vgpr_32 = V_MUL_LO_U16_e64 3, %0:vgpr_32, implicit $exec
S_NOP 0, implicit %1
S_NOP 0, implicit %2
S_NOP 0, implicit %3
S_ENDPGM 0, implicit %0
...
---
name: test_remat_v_add_f16_e32
tracksRegLiveness: true
body: |
bb.0:
liveins: $vgpr0
; GCN-LABEL: name: test_remat_v_add_f16_e32
; GCN: liveins: $vgpr0
; GCN-NEXT: {{ $}}
; GCN-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
; GCN-NEXT: [[V_ADD_F16_e32_:%[0-9]+]]:vgpr_32 = nofpexcept V_ADD_F16_e32 1, [[COPY]], implicit $mode, implicit $exec
; GCN-NEXT: [[V_ADD_F16_e32_1:%[0-9]+]]:vgpr_32 = nofpexcept V_ADD_F16_e32 2, [[COPY]], implicit $mode, implicit $exec
; GCN-NEXT: [[V_ADD_F16_e32_2:%[0-9]+]]:vgpr_32 = nofpexcept V_ADD_F16_e32 3, [[COPY]], implicit $mode, implicit $exec
; GCN-NEXT: S_NOP 0, implicit [[V_ADD_F16_e32_]]
; GCN-NEXT: S_NOP 0, implicit [[V_ADD_F16_e32_1]]
; GCN-NEXT: S_NOP 0, implicit [[V_ADD_F16_e32_2]]
; GCN-NEXT: S_ENDPGM 0, implicit [[COPY]]
%0:vgpr_32 = COPY $vgpr0
%1:vgpr_32 = nofpexcept V_ADD_F16_e32 1, %0:vgpr_32, implicit $mode, implicit $exec
%2:vgpr_32 = nofpexcept V_ADD_F16_e32 2, %0:vgpr_32, implicit $mode, implicit $exec
%3:vgpr_32 = nofpexcept V_ADD_F16_e32 3, %0:vgpr_32, implicit $mode, implicit $exec
S_NOP 0, implicit %1
S_NOP 0, implicit %2
S_NOP 0, implicit %3
S_ENDPGM 0, implicit %0
...
---
name: test_remat_v_add_f16_e64
tracksRegLiveness: true
body: |
bb.0:
liveins: $vgpr0
; GCN-LABEL: name: test_remat_v_add_f16_e64
; GCN: liveins: $vgpr0
; GCN-NEXT: {{ $}}
; GCN-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
; GCN-NEXT: [[V_ADD_F16_e64_:%[0-9]+]]:vgpr_32 = nofpexcept V_ADD_F16_e64 0, 1, 0, [[COPY]], 0, 0, implicit $mode, implicit $exec
; GCN-NEXT: [[V_ADD_F16_e64_1:%[0-9]+]]:vgpr_32 = nofpexcept V_ADD_F16_e64 0, 2, 0, [[COPY]], 0, 0, implicit $mode, implicit $exec
; GCN-NEXT: [[V_ADD_F16_e64_2:%[0-9]+]]:vgpr_32 = nofpexcept V_ADD_F16_e64 0, 3, 0, [[COPY]], 0, 0, implicit $mode, implicit $exec
; GCN-NEXT: S_NOP 0, implicit [[V_ADD_F16_e64_]]
; GCN-NEXT: S_NOP 0, implicit [[V_ADD_F16_e64_1]]
; GCN-NEXT: S_NOP 0, implicit [[V_ADD_F16_e64_2]]
; GCN-NEXT: S_ENDPGM 0, implicit [[COPY]]
%0:vgpr_32 = COPY $vgpr0
%1:vgpr_32 = nofpexcept V_ADD_F16_e64 0, 1, 0, %0:vgpr_32, 0, 0, implicit $mode, implicit $exec
%2:vgpr_32 = nofpexcept V_ADD_F16_e64 0, 2, 0, %0:vgpr_32, 0, 0, implicit $mode, implicit $exec
%3:vgpr_32 = nofpexcept V_ADD_F16_e64 0, 3, 0, %0:vgpr_32, 0, 0, implicit $mode, implicit $exec
S_NOP 0, implicit %1
S_NOP 0, implicit %2
S_NOP 0, implicit %3
S_ENDPGM 0, implicit %0
...
---
name: test_remat_v_sub_f16_e32
tracksRegLiveness: true
body: |
bb.0:
liveins: $vgpr0
; GCN-LABEL: name: test_remat_v_sub_f16_e32
; GCN: liveins: $vgpr0
; GCN-NEXT: {{ $}}
; GCN-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
; GCN-NEXT: [[V_SUB_F16_e32_:%[0-9]+]]:vgpr_32 = nofpexcept V_SUB_F16_e32 1, [[COPY]], implicit $mode, implicit $exec
; GCN-NEXT: [[V_SUB_F16_e32_1:%[0-9]+]]:vgpr_32 = nofpexcept V_SUB_F16_e32 2, [[COPY]], implicit $mode, implicit $exec
; GCN-NEXT: [[V_SUB_F16_e32_2:%[0-9]+]]:vgpr_32 = nofpexcept V_SUB_F16_e32 3, [[COPY]], implicit $mode, implicit $exec
; GCN-NEXT: S_NOP 0, implicit [[V_SUB_F16_e32_]]
; GCN-NEXT: S_NOP 0, implicit [[V_SUB_F16_e32_1]]
; GCN-NEXT: S_NOP 0, implicit [[V_SUB_F16_e32_2]]
; GCN-NEXT: S_ENDPGM 0, implicit [[COPY]]
%0:vgpr_32 = COPY $vgpr0
%1:vgpr_32 = nofpexcept V_SUB_F16_e32 1, %0:vgpr_32, implicit $mode, implicit $exec
%2:vgpr_32 = nofpexcept V_SUB_F16_e32 2, %0:vgpr_32, implicit $mode, implicit $exec
%3:vgpr_32 = nofpexcept V_SUB_F16_e32 3, %0:vgpr_32, implicit $mode, implicit $exec
S_NOP 0, implicit %1
S_NOP 0, implicit %2
S_NOP 0, implicit %3
S_ENDPGM 0, implicit %0
...
---
name: test_remat_v_sub_f16_e64
tracksRegLiveness: true
body: |
bb.0:
liveins: $vgpr0
; GCN-LABEL: name: test_remat_v_sub_f16_e64
; GCN: liveins: $vgpr0
; GCN-NEXT: {{ $}}
; GCN-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
; GCN-NEXT: [[V_SUB_F16_e64_:%[0-9]+]]:vgpr_32 = nofpexcept V_SUB_F16_e64 0, 1, 0, [[COPY]], 0, 0, implicit $mode, implicit $exec
; GCN-NEXT: [[V_SUB_F16_e64_1:%[0-9]+]]:vgpr_32 = nofpexcept V_SUB_F16_e64 0, 2, 0, [[COPY]], 0, 0, implicit $mode, implicit $exec
; GCN-NEXT: [[V_SUB_F16_e64_2:%[0-9]+]]:vgpr_32 = nofpexcept V_SUB_F16_e64 0, 3, 0, [[COPY]], 0, 0, implicit $mode, implicit $exec
; GCN-NEXT: S_NOP 0, implicit [[V_SUB_F16_e64_]]
; GCN-NEXT: S_NOP 0, implicit [[V_SUB_F16_e64_1]]
; GCN-NEXT: S_NOP 0, implicit [[V_SUB_F16_e64_2]]
; GCN-NEXT: S_ENDPGM 0, implicit [[COPY]]
%0:vgpr_32 = COPY $vgpr0
%1:vgpr_32 = nofpexcept V_SUB_F16_e64 0, 1, 0, %0:vgpr_32, 0, 0, implicit $mode, implicit $exec
%2:vgpr_32 = nofpexcept V_SUB_F16_e64 0, 2, 0, %0:vgpr_32, 0, 0, implicit $mode, implicit $exec
%3:vgpr_32 = nofpexcept V_SUB_F16_e64 0, 3, 0, %0:vgpr_32, 0, 0, implicit $mode, implicit $exec
S_NOP 0, implicit %1
S_NOP 0, implicit %2
S_NOP 0, implicit %3
S_ENDPGM 0, implicit %0
...
---
name: test_remat_v_subrev_f16_e32
tracksRegLiveness: true
body: |
bb.0:
liveins: $vgpr0
; GCN-LABEL: name: test_remat_v_subrev_f16_e32
; GCN: liveins: $vgpr0
; GCN-NEXT: {{ $}}
; GCN-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
; GCN-NEXT: [[V_SUBREV_F16_e32_:%[0-9]+]]:vgpr_32 = nofpexcept V_SUBREV_F16_e32 1, [[COPY]], implicit $mode, implicit $exec
; GCN-NEXT: [[V_SUBREV_F16_e32_1:%[0-9]+]]:vgpr_32 = nofpexcept V_SUBREV_F16_e32 2, [[COPY]], implicit $mode, implicit $exec
; GCN-NEXT: [[V_SUBREV_F16_e32_2:%[0-9]+]]:vgpr_32 = nofpexcept V_SUBREV_F16_e32 3, [[COPY]], implicit $mode, implicit $exec
; GCN-NEXT: S_NOP 0, implicit [[V_SUBREV_F16_e32_]]
; GCN-NEXT: S_NOP 0, implicit [[V_SUBREV_F16_e32_1]]
; GCN-NEXT: S_NOP 0, implicit [[V_SUBREV_F16_e32_2]]
; GCN-NEXT: S_ENDPGM 0, implicit [[COPY]]
%0:vgpr_32 = COPY $vgpr0
%1:vgpr_32 = nofpexcept V_SUBREV_F16_e32 1, %0:vgpr_32, implicit $mode, implicit $exec
%2:vgpr_32 = nofpexcept V_SUBREV_F16_e32 2, %0:vgpr_32, implicit $mode, implicit $exec
%3:vgpr_32 = nofpexcept V_SUBREV_F16_e32 3, %0:vgpr_32, implicit $mode, implicit $exec
S_NOP 0, implicit %1
S_NOP 0, implicit %2
S_NOP 0, implicit %3
S_ENDPGM 0, implicit %0
...
---
name: test_remat_v_subrev_f16_e64
tracksRegLiveness: true
body: |
bb.0:
liveins: $vgpr0
; GCN-LABEL: name: test_remat_v_subrev_f16_e64
; GCN: liveins: $vgpr0
; GCN-NEXT: {{ $}}
; GCN-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
; GCN-NEXT: [[V_SUBREV_F16_e64_:%[0-9]+]]:vgpr_32 = nofpexcept V_SUBREV_F16_e64 0, 1, 0, [[COPY]], 0, 0, implicit $mode, implicit $exec
; GCN-NEXT: [[V_SUBREV_F16_e64_1:%[0-9]+]]:vgpr_32 = nofpexcept V_SUBREV_F16_e64 0, 2, 0, [[COPY]], 0, 0, implicit $mode, implicit $exec
; GCN-NEXT: [[V_SUBREV_F16_e64_2:%[0-9]+]]:vgpr_32 = nofpexcept V_SUBREV_F16_e64 0, 3, 0, [[COPY]], 0, 0, implicit $mode, implicit $exec
; GCN-NEXT: S_NOP 0, implicit [[V_SUBREV_F16_e64_]]
; GCN-NEXT: S_NOP 0, implicit [[V_SUBREV_F16_e64_1]]
; GCN-NEXT: S_NOP 0, implicit [[V_SUBREV_F16_e64_2]]
; GCN-NEXT: S_ENDPGM 0, implicit [[COPY]]
%0:vgpr_32 = COPY $vgpr0
%1:vgpr_32 = nofpexcept V_SUBREV_F16_e64 0, 1, 0, %0:vgpr_32, 0, 0, implicit $mode, implicit $exec
%2:vgpr_32 = nofpexcept V_SUBREV_F16_e64 0, 2, 0, %0:vgpr_32, 0, 0, implicit $mode, implicit $exec
%3:vgpr_32 = nofpexcept V_SUBREV_F16_e64 0, 3, 0, %0:vgpr_32, 0, 0, implicit $mode, implicit $exec
S_NOP 0, implicit %1
S_NOP 0, implicit %2
S_NOP 0, implicit %3
S_ENDPGM 0, implicit %0
...
---
name: test_remat_v_mul_f16_e32
tracksRegLiveness: true
body: |
bb.0:
liveins: $vgpr0
; GCN-LABEL: name: test_remat_v_mul_f16_e32
; GCN: liveins: $vgpr0
; GCN-NEXT: {{ $}}
; GCN-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
; GCN-NEXT: [[V_MUL_F16_e32_:%[0-9]+]]:vgpr_32 = nofpexcept V_MUL_F16_e32 1, [[COPY]], implicit $mode, implicit $exec
; GCN-NEXT: [[V_MUL_F16_e32_1:%[0-9]+]]:vgpr_32 = nofpexcept V_MUL_F16_e32 2, [[COPY]], implicit $mode, implicit $exec
; GCN-NEXT: [[V_MUL_F16_e32_2:%[0-9]+]]:vgpr_32 = nofpexcept V_MUL_F16_e32 3, [[COPY]], implicit $mode, implicit $exec
; GCN-NEXT: S_NOP 0, implicit [[V_MUL_F16_e32_]]
; GCN-NEXT: S_NOP 0, implicit [[V_MUL_F16_e32_1]]
; GCN-NEXT: S_NOP 0, implicit [[V_MUL_F16_e32_2]]
; GCN-NEXT: S_ENDPGM 0, implicit [[COPY]]
%0:vgpr_32 = COPY $vgpr0
%1:vgpr_32 = nofpexcept V_MUL_F16_e32 1, %0:vgpr_32, implicit $mode, implicit $exec
%2:vgpr_32 = nofpexcept V_MUL_F16_e32 2, %0:vgpr_32, implicit $mode, implicit $exec
%3:vgpr_32 = nofpexcept V_MUL_F16_e32 3, %0:vgpr_32, implicit $mode, implicit $exec
S_NOP 0, implicit %1
S_NOP 0, implicit %2
S_NOP 0, implicit %3
S_ENDPGM 0, implicit %0
...
---
name: test_remat_v_mul_f16_e64
tracksRegLiveness: true
body: |
bb.0:
liveins: $vgpr0
; GCN-LABEL: name: test_remat_v_mul_f16_e64
; GCN: liveins: $vgpr0
; GCN-NEXT: {{ $}}
; GCN-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
; GCN-NEXT: [[V_MUL_F16_e64_:%[0-9]+]]:vgpr_32 = nofpexcept V_MUL_F16_e64 0, 1, 0, [[COPY]], 0, 0, implicit $mode, implicit $exec
; GCN-NEXT: [[V_MUL_F16_e64_1:%[0-9]+]]:vgpr_32 = nofpexcept V_MUL_F16_e64 0, 2, 0, [[COPY]], 0, 0, implicit $mode, implicit $exec
; GCN-NEXT: [[V_MUL_F16_e64_2:%[0-9]+]]:vgpr_32 = nofpexcept V_MUL_F16_e64 0, 3, 0, [[COPY]], 0, 0, implicit $mode, implicit $exec
; GCN-NEXT: S_NOP 0, implicit [[V_MUL_F16_e64_]]
; GCN-NEXT: S_NOP 0, implicit [[V_MUL_F16_e64_1]]
; GCN-NEXT: S_NOP 0, implicit [[V_MUL_F16_e64_2]]
; GCN-NEXT: S_ENDPGM 0, implicit [[COPY]]
%0:vgpr_32 = COPY $vgpr0
%1:vgpr_32 = nofpexcept V_MUL_F16_e64 0, 1, 0, %0:vgpr_32, 0, 0, implicit $mode, implicit $exec
%2:vgpr_32 = nofpexcept V_MUL_F16_e64 0, 2, 0, %0:vgpr_32, 0, 0, implicit $mode, implicit $exec
%3:vgpr_32 = nofpexcept V_MUL_F16_e64 0, 3, 0, %0:vgpr_32, 0, 0, implicit $mode, implicit $exec
S_NOP 0, implicit %1
S_NOP 0, implicit %2
S_NOP 0, implicit %3
S_ENDPGM 0, implicit %0
...
---
name: test_remat_v_ldexp_f16_e32
tracksRegLiveness: true
body: |
bb.0:
liveins: $vgpr0, $vgpr1
; GCN-LABEL: name: test_remat_v_ldexp_f16_e32
; GCN: liveins: $vgpr0, $vgpr1
; GCN-NEXT: {{ $}}
; GCN-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
; GCN-NEXT: [[V_LDEXP_F16_e32_:%[0-9]+]]:vgpr_32 = nofpexcept V_LDEXP_F16_e32 1, [[COPY]], implicit $mode, implicit $exec
; GCN-NEXT: [[V_LDEXP_F16_e32_1:%[0-9]+]]:vgpr_32 = nofpexcept V_LDEXP_F16_e32 1, [[COPY]], implicit $mode, implicit $exec
; GCN-NEXT: [[V_LDEXP_F16_e32_2:%[0-9]+]]:vgpr_32 = nofpexcept V_LDEXP_F16_e32 1, [[COPY]], implicit $mode, implicit $exec
; GCN-NEXT: S_NOP 0, implicit [[V_LDEXP_F16_e32_]]
; GCN-NEXT: S_NOP 0, implicit [[V_LDEXP_F16_e32_1]]
; GCN-NEXT: S_NOP 0, implicit [[V_LDEXP_F16_e32_2]]
; GCN-NEXT: S_ENDPGM 0, implicit [[COPY]]
%0:vgpr_32 = COPY $vgpr0
%1:vgpr_32 = nofpexcept V_LDEXP_F16_e32 1, %0, implicit $mode, implicit $exec
%2:vgpr_32 = nofpexcept V_LDEXP_F16_e32 1, %0, implicit $mode, implicit $exec
%3:vgpr_32 = nofpexcept V_LDEXP_F16_e32 1, %0, implicit $mode, implicit $exec
S_NOP 0, implicit %1
S_NOP 0, implicit %2
S_NOP 0, implicit %3
S_ENDPGM 0, implicit %0
...
---
name: test_remat_v_ldexp_f16_e64
tracksRegLiveness: true
body: |
bb.0:
liveins: $vgpr0, $vgpr1
; GCN-LABEL: name: test_remat_v_ldexp_f16_e64
; GCN: liveins: $vgpr0, $vgpr1
; GCN-NEXT: {{ $}}
; GCN-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
; GCN-NEXT: [[V_LDEXP_F16_e64_:%[0-9]+]]:vgpr_32 = nofpexcept V_LDEXP_F16_e64 0, [[COPY]], 0, 1, 0, 0, implicit $mode, implicit $exec
; GCN-NEXT: [[V_LDEXP_F16_e64_1:%[0-9]+]]:vgpr_32 = nofpexcept V_LDEXP_F16_e64 0, [[COPY]], 0, 1, 0, 0, implicit $mode, implicit $exec
; GCN-NEXT: [[V_LDEXP_F16_e64_2:%[0-9]+]]:vgpr_32 = nofpexcept V_LDEXP_F16_e64 0, [[COPY]], 0, 1, 0, 0, implicit $mode, implicit $exec
; GCN-NEXT: S_NOP 0, implicit [[V_LDEXP_F16_e64_]]
; GCN-NEXT: S_NOP 0, implicit [[V_LDEXP_F16_e64_1]]
; GCN-NEXT: S_NOP 0, implicit [[V_LDEXP_F16_e64_2]]
; GCN-NEXT: S_ENDPGM 0, implicit [[COPY]]
%0:vgpr_32 = COPY $vgpr0
%1:vgpr_32 = nofpexcept V_LDEXP_F16_e64 0, %0, 0, 1, 0, 0, implicit $mode, implicit $exec
%2:vgpr_32 = nofpexcept V_LDEXP_F16_e64 0, %0, 0, 1, 0, 0, implicit $mode, implicit $exec
%3:vgpr_32 = nofpexcept V_LDEXP_F16_e64 0, %0, 0, 1, 0, 0, implicit $mode, implicit $exec
S_NOP 0, implicit %1
S_NOP 0, implicit %2
S_NOP 0, implicit %3
S_ENDPGM 0, implicit %0
...
---
name: test_remat_v_min_f16_e32
tracksRegLiveness: true
body: |
bb.0:
liveins: $vgpr0
; GCN-LABEL: name: test_remat_v_min_f16_e32
; GCN: liveins: $vgpr0
; GCN-NEXT: {{ $}}
; GCN-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
; GCN-NEXT: [[V_MIN_F16_e32_:%[0-9]+]]:vgpr_32 = nofpexcept V_MIN_F16_e32 1, [[COPY]], implicit $mode, implicit $exec
; GCN-NEXT: [[V_MIN_F16_e32_1:%[0-9]+]]:vgpr_32 = nofpexcept V_MIN_F16_e32 2, [[COPY]], implicit $mode, implicit $exec
; GCN-NEXT: [[V_MIN_F16_e32_2:%[0-9]+]]:vgpr_32 = nofpexcept V_MIN_F16_e32 3, [[COPY]], implicit $mode, implicit $exec
; GCN-NEXT: S_NOP 0, implicit [[V_MIN_F16_e32_]]
; GCN-NEXT: S_NOP 0, implicit [[V_MIN_F16_e32_1]]
; GCN-NEXT: S_NOP 0, implicit [[V_MIN_F16_e32_2]]
; GCN-NEXT: S_ENDPGM 0, implicit [[COPY]]
%0:vgpr_32 = COPY $vgpr0
%1:vgpr_32 = nofpexcept V_MIN_F16_e32 1, %0:vgpr_32, implicit $mode, implicit $exec
%2:vgpr_32 = nofpexcept V_MIN_F16_e32 2, %0:vgpr_32, implicit $mode, implicit $exec
%3:vgpr_32 = nofpexcept V_MIN_F16_e32 3, %0:vgpr_32, implicit $mode, implicit $exec
S_NOP 0, implicit %1
S_NOP 0, implicit %2
S_NOP 0, implicit %3
S_ENDPGM 0, implicit %0
...
---
name: test_remat_v_min_f16_e64
tracksRegLiveness: true
body: |
bb.0:
liveins: $vgpr0
; GCN-LABEL: name: test_remat_v_min_f16_e64
; GCN: liveins: $vgpr0
; GCN-NEXT: {{ $}}
; GCN-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
; GCN-NEXT: [[V_MIN_F16_e64_:%[0-9]+]]:vgpr_32 = nofpexcept V_MIN_F16_e64 0, 1, 0, [[COPY]], 0, 0, implicit $mode, implicit $exec
; GCN-NEXT: [[V_MIN_F16_e64_1:%[0-9]+]]:vgpr_32 = nofpexcept V_MIN_F16_e64 0, 2, 0, [[COPY]], 0, 0, implicit $mode, implicit $exec
; GCN-NEXT: [[V_MIN_F16_e64_2:%[0-9]+]]:vgpr_32 = nofpexcept V_MIN_F16_e64 0, 3, 0, [[COPY]], 0, 0, implicit $mode, implicit $exec
; GCN-NEXT: S_NOP 0, implicit [[V_MIN_F16_e64_]]
; GCN-NEXT: S_NOP 0, implicit [[V_MIN_F16_e64_1]]
; GCN-NEXT: S_NOP 0, implicit [[V_MIN_F16_e64_2]]
; GCN-NEXT: S_ENDPGM 0, implicit [[COPY]]
%0:vgpr_32 = COPY $vgpr0
%1:vgpr_32 = nofpexcept V_MIN_F16_e64 0, 1, 0, %0:vgpr_32, 0, 0, implicit $mode, implicit $exec
%2:vgpr_32 = nofpexcept V_MIN_F16_e64 0, 2, 0, %0:vgpr_32, 0, 0, implicit $mode, implicit $exec
%3:vgpr_32 = nofpexcept V_MIN_F16_e64 0, 3, 0, %0:vgpr_32, 0, 0, implicit $mode, implicit $exec
S_NOP 0, implicit %1
S_NOP 0, implicit %2
S_NOP 0, implicit %3
S_ENDPGM 0, implicit %0
...
---
name: test_remat_v_max_f16_e32
tracksRegLiveness: true
body: |
bb.0:
liveins: $vgpr0
; GCN-LABEL: name: test_remat_v_max_f16_e32
; GCN: liveins: $vgpr0
; GCN-NEXT: {{ $}}
; GCN-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
; GCN-NEXT: [[V_MAX_F16_e32_:%[0-9]+]]:vgpr_32 = nofpexcept V_MAX_F16_e32 1, [[COPY]], implicit $mode, implicit $exec
; GCN-NEXT: [[V_MAX_F16_e32_1:%[0-9]+]]:vgpr_32 = nofpexcept V_MAX_F16_e32 2, [[COPY]], implicit $mode, implicit $exec
; GCN-NEXT: [[V_MAX_F16_e32_2:%[0-9]+]]:vgpr_32 = nofpexcept V_MAX_F16_e32 3, [[COPY]], implicit $mode, implicit $exec
; GCN-NEXT: S_NOP 0, implicit [[V_MAX_F16_e32_]]
; GCN-NEXT: S_NOP 0, implicit [[V_MAX_F16_e32_1]]
; GCN-NEXT: S_NOP 0, implicit [[V_MAX_F16_e32_2]]
; GCN-NEXT: S_ENDPGM 0, implicit [[COPY]]
%0:vgpr_32 = COPY $vgpr0
%1:vgpr_32 = nofpexcept V_MAX_F16_e32 1, %0:vgpr_32, implicit $mode, implicit $exec
%2:vgpr_32 = nofpexcept V_MAX_F16_e32 2, %0:vgpr_32, implicit $mode, implicit $exec
%3:vgpr_32 = nofpexcept V_MAX_F16_e32 3, %0:vgpr_32, implicit $mode, implicit $exec
S_NOP 0, implicit %1
S_NOP 0, implicit %2
S_NOP 0, implicit %3
S_ENDPGM 0, implicit %0
...
---
name: test_remat_v_max_f16_e64
tracksRegLiveness: true
body: |
bb.0:
liveins: $vgpr0
; GCN-LABEL: name: test_remat_v_max_f16_e64
; GCN: liveins: $vgpr0
; GCN-NEXT: {{ $}}
; GCN-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
; GCN-NEXT: [[V_MAX_F16_e64_:%[0-9]+]]:vgpr_32 = nofpexcept V_MAX_F16_e64 0, 1, 0, [[COPY]], 0, 0, implicit $mode, implicit $exec
; GCN-NEXT: [[V_MAX_F16_e64_1:%[0-9]+]]:vgpr_32 = nofpexcept V_MAX_F16_e64 0, 2, 0, [[COPY]], 0, 0, implicit $mode, implicit $exec
; GCN-NEXT: [[V_MAX_F16_e64_2:%[0-9]+]]:vgpr_32 = nofpexcept V_MAX_F16_e64 0, 3, 0, [[COPY]], 0, 0, implicit $mode, implicit $exec
; GCN-NEXT: S_NOP 0, implicit [[V_MAX_F16_e64_]]
; GCN-NEXT: S_NOP 0, implicit [[V_MAX_F16_e64_1]]
; GCN-NEXT: S_NOP 0, implicit [[V_MAX_F16_e64_2]]
; GCN-NEXT: S_ENDPGM 0, implicit [[COPY]]
%0:vgpr_32 = COPY $vgpr0
%1:vgpr_32 = nofpexcept V_MAX_F16_e64 0, 1, 0, %0:vgpr_32, 0, 0, implicit $mode, implicit $exec
%2:vgpr_32 = nofpexcept V_MAX_F16_e64 0, 2, 0, %0:vgpr_32, 0, 0, implicit $mode, implicit $exec
%3:vgpr_32 = nofpexcept V_MAX_F16_e64 0, 3, 0, %0:vgpr_32, 0, 0, implicit $mode, implicit $exec
S_NOP 0, implicit %1
S_NOP 0, implicit %2
S_NOP 0, implicit %3
S_ENDPGM 0, implicit %0
...
---
name: test_remat_v_madak_f16
tracksRegLiveness: true
body: |
bb.0:
liveins: $vgpr0
; GCN-LABEL: name: test_remat_v_madak_f16
; GCN: liveins: $vgpr0
; GCN-NEXT: {{ $}}
; GCN-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
; GCN-NEXT: [[V_MADAK_F16_:%[0-9]+]]:vgpr_32 = nofpexcept V_MADAK_F16 1, [[COPY]], 1, implicit $exec, implicit $mode
; GCN-NEXT: [[V_MADAK_F16_1:%[0-9]+]]:vgpr_32 = nofpexcept V_MADAK_F16 2, [[COPY]], 2, implicit $exec, implicit $mode
; GCN-NEXT: [[V_MADAK_F16_2:%[0-9]+]]:vgpr_32 = nofpexcept V_MADAK_F16 3, [[COPY]], 3, implicit $exec, implicit $mode
; GCN-NEXT: S_NOP 0, implicit [[V_MADAK_F16_]]
; GCN-NEXT: S_NOP 0, implicit [[V_MADAK_F16_1]]
; GCN-NEXT: S_NOP 0, implicit [[V_MADAK_F16_2]]
; GCN-NEXT: S_ENDPGM 0, implicit [[COPY]]
%0:vgpr_32 = COPY $vgpr0
%1:vgpr_32 = nofpexcept V_MADAK_F16 1, %0, 1, implicit $exec, implicit $mode
%2:vgpr_32 = nofpexcept V_MADAK_F16 2, %0, 2, implicit $exec, implicit $mode
%3:vgpr_32 = nofpexcept V_MADAK_F16 3, %0, 3, implicit $exec, implicit $mode
S_NOP 0, implicit %1
S_NOP 0, implicit %2
S_NOP 0, implicit %3
S_ENDPGM 0, implicit %0
...
---
name: test_remat_v_madmk_f16
tracksRegLiveness: true
body: |
bb.0:
liveins: $vgpr0, $vgpr1
; GCN-LABEL: name: test_remat_v_madmk_f16
; GCN: liveins: $vgpr0, $vgpr1
; GCN-NEXT: {{ $}}
; GCN-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
; GCN-NEXT: [[V_MADMK_F16_:%[0-9]+]]:vgpr_32 = nofpexcept V_MADMK_F16 1, 1, [[COPY]], implicit $exec, implicit $mode
; GCN-NEXT: [[V_MADMK_F16_1:%[0-9]+]]:vgpr_32 = nofpexcept V_MADMK_F16 2, 2, [[COPY]], implicit $exec, implicit $mode
; GCN-NEXT: [[V_MADMK_F16_2:%[0-9]+]]:vgpr_32 = nofpexcept V_MADMK_F16 3, 3, [[COPY]], implicit $exec, implicit $mode
; GCN-NEXT: S_NOP 0, implicit [[V_MADMK_F16_]]
; GCN-NEXT: S_NOP 0, implicit [[V_MADMK_F16_1]]
; GCN-NEXT: S_NOP 0, implicit [[V_MADMK_F16_2]]
; GCN-NEXT: S_ENDPGM 0, implicit [[COPY]]
%0:vgpr_32 = COPY $vgpr0
%1:vgpr_32 = nofpexcept V_MADMK_F16 1, 1, %0, implicit $exec, implicit $mode
%2:vgpr_32 = nofpexcept V_MADMK_F16 2, 2, %0, implicit $exec, implicit $mode
%3:vgpr_32 = nofpexcept V_MADMK_F16 3, 3, %0, implicit $exec, implicit $mode
S_NOP 0, implicit %1
S_NOP 0, implicit %2
S_NOP 0, implicit %3
S_ENDPGM 0, implicit %0
...
---
name: test_remat_v_fmamk_f16
tracksRegLiveness: true
body: |
bb.0:
liveins: $vgpr0, $vgpr1
; GCN-LABEL: name: test_remat_v_fmamk_f16
; GCN: liveins: $vgpr0, $vgpr1
; GCN-NEXT: {{ $}}
; GCN-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
; GCN-NEXT: [[V_FMAMK_F16_:%[0-9]+]]:vgpr_32 = nofpexcept V_FMAMK_F16 1, 1, [[COPY]], implicit $exec, implicit $mode
; GCN-NEXT: [[V_FMAMK_F16_1:%[0-9]+]]:vgpr_32 = nofpexcept V_FMAMK_F16 2, 2, [[COPY]], implicit $exec, implicit $mode
; GCN-NEXT: [[V_FMAMK_F16_2:%[0-9]+]]:vgpr_32 = nofpexcept V_FMAMK_F16 3, 3, [[COPY]], implicit $exec, implicit $mode
; GCN-NEXT: S_NOP 0, implicit [[V_FMAMK_F16_]]
; GCN-NEXT: S_NOP 0, implicit [[V_FMAMK_F16_1]]
; GCN-NEXT: S_NOP 0, implicit [[V_FMAMK_F16_2]]
; GCN-NEXT: S_ENDPGM 0, implicit [[COPY]]
%0:vgpr_32 = COPY $vgpr0
%1:vgpr_32 = nofpexcept V_FMAMK_F16 1, 1, %0, implicit $exec, implicit $mode
%2:vgpr_32 = nofpexcept V_FMAMK_F16 2, 2, %0, implicit $exec, implicit $mode
%3:vgpr_32 = nofpexcept V_FMAMK_F16 3, 3, %0, implicit $exec, implicit $mode
S_NOP 0, implicit %1
S_NOP 0, implicit %2
S_NOP 0, implicit %3
S_ENDPGM 0, implicit %0
...
---
name: test_remat_v_pk_mad_i16
tracksRegLiveness: true
body: |
bb.0:
liveins: $vgpr0
; GCN-LABEL: name: test_remat_v_pk_mad_i16
; GCN: liveins: $vgpr0
; GCN-NEXT: {{ $}}
; GCN-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
; GCN-NEXT: [[V_PK_MAD_I16_:%[0-9]+]]:vgpr_32 = V_PK_MAD_I16 8, [[COPY]], 8, [[COPY]], 8, [[COPY]], 0, 0, 0, 0, 0, implicit $exec
; GCN-NEXT: [[V_PK_MAD_I16_1:%[0-9]+]]:vgpr_32 = V_PK_MAD_I16 9, [[COPY]], 9, [[COPY]], 9, [[COPY]], 0, 0, 0, 0, 0, implicit $exec
; GCN-NEXT: [[V_PK_MAD_I16_2:%[0-9]+]]:vgpr_32 = V_PK_MAD_I16 10, [[COPY]], 10, [[COPY]], 10, [[COPY]], 0, 0, 0, 0, 0, implicit $exec
; GCN-NEXT: S_NOP 0, implicit [[V_PK_MAD_I16_]]
; GCN-NEXT: S_NOP 0, implicit [[V_PK_MAD_I16_1]]
; GCN-NEXT: S_NOP 0, implicit [[V_PK_MAD_I16_2]]
; GCN-NEXT: S_ENDPGM 0, implicit [[COPY]]
%0:vgpr_32 = COPY $vgpr0
%1:vgpr_32 = V_PK_MAD_I16 8, %0, 8, %0, 8, %0, 0, 0, 0, 0, 0, implicit $exec
%2:vgpr_32 = V_PK_MAD_I16 9, %0, 9, %0, 9, %0, 0, 0, 0, 0, 0, implicit $exec
%3:vgpr_32 = V_PK_MAD_I16 10, %0, 10, %0, 10, %0, 0, 0, 0, 0, 0, implicit $exec
S_NOP 0, implicit %1
S_NOP 0, implicit %2
S_NOP 0, implicit %3
S_ENDPGM 0, implicit %0
...
---
name: test_remat_v_pk_mad_u16
tracksRegLiveness: true
body: |
bb.0:
liveins: $vgpr0
; GCN-LABEL: name: test_remat_v_pk_mad_u16
; GCN: liveins: $vgpr0
; GCN-NEXT: {{ $}}
; GCN-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
; GCN-NEXT: [[V_PK_MAD_U16_:%[0-9]+]]:vgpr_32 = V_PK_MAD_U16 8, [[COPY]], 8, [[COPY]], 8, [[COPY]], 0, 0, 0, 0, 0, implicit $exec
; GCN-NEXT: [[V_PK_MAD_U16_1:%[0-9]+]]:vgpr_32 = V_PK_MAD_U16 9, [[COPY]], 9, [[COPY]], 9, [[COPY]], 0, 0, 0, 0, 0, implicit $exec
; GCN-NEXT: [[V_PK_MAD_U16_2:%[0-9]+]]:vgpr_32 = V_PK_MAD_U16 10, [[COPY]], 10, [[COPY]], 10, [[COPY]], 0, 0, 0, 0, 0, implicit $exec
; GCN-NEXT: S_NOP 0, implicit [[V_PK_MAD_U16_]]
; GCN-NEXT: S_NOP 0, implicit [[V_PK_MAD_U16_1]]
; GCN-NEXT: S_NOP 0, implicit [[V_PK_MAD_U16_2]]
; GCN-NEXT: S_ENDPGM 0, implicit [[COPY]]
%0:vgpr_32 = COPY $vgpr0
%1:vgpr_32 = V_PK_MAD_U16 8, %0, 8, %0, 8, %0, 0, 0, 0, 0, 0, implicit $exec
%2:vgpr_32 = V_PK_MAD_U16 9, %0, 9, %0, 9, %0, 0, 0, 0, 0, 0, implicit $exec
%3:vgpr_32 = V_PK_MAD_U16 10, %0, 10, %0, 10, %0, 0, 0, 0, 0, 0, implicit $exec
S_NOP 0, implicit %1
S_NOP 0, implicit %2
S_NOP 0, implicit %3
S_ENDPGM 0, implicit %0
...
---
name: test_remat_v_pk_add_u16
tracksRegLiveness: true
body: |
bb.0:
liveins: $vgpr0
; GCN-LABEL: name: test_remat_v_pk_add_u16
; GCN: liveins: $vgpr0
; GCN-NEXT: {{ $}}
; GCN-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
; GCN-NEXT: [[V_PK_ADD_U16_:%[0-9]+]]:vgpr_32 = V_PK_ADD_U16 8, [[COPY]], 8, [[COPY]], 0, 0, 0, 0, 0, implicit $exec
; GCN-NEXT: [[V_PK_ADD_U16_1:%[0-9]+]]:vgpr_32 = V_PK_ADD_U16 9, [[COPY]], 9, [[COPY]], 0, 0, 0, 0, 0, implicit $exec
; GCN-NEXT: [[V_PK_ADD_U16_2:%[0-9]+]]:vgpr_32 = V_PK_ADD_U16 10, [[COPY]], 10, [[COPY]], 0, 0, 0, 0, 0, implicit $exec
; GCN-NEXT: S_NOP 0, implicit [[V_PK_ADD_U16_]]
; GCN-NEXT: S_NOP 0, implicit [[V_PK_ADD_U16_1]]
; GCN-NEXT: S_NOP 0, implicit [[V_PK_ADD_U16_2]]
; GCN-NEXT: S_ENDPGM 0, implicit [[COPY]]
%0:vgpr_32 = COPY $vgpr0
%1:vgpr_32 = V_PK_ADD_U16 8, %0, 8, %0, 0, 0, 0, 0, 0, implicit $exec
%2:vgpr_32 = V_PK_ADD_U16 9, %0, 9, %0, 0, 0, 0, 0, 0, implicit $exec
%3:vgpr_32 = V_PK_ADD_U16 10, %0, 10, %0, 0, 0, 0, 0, 0, implicit $exec
S_NOP 0, implicit %1
S_NOP 0, implicit %2
S_NOP 0, implicit %3
S_ENDPGM 0, implicit %0
...
---
name: test_remat_v_pk_add_i16
tracksRegLiveness: true
body: |
bb.0:
liveins: $vgpr0
; GCN-LABEL: name: test_remat_v_pk_add_i16
; GCN: liveins: $vgpr0
; GCN-NEXT: {{ $}}
; GCN-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
; GCN-NEXT: [[V_PK_ADD_I16_:%[0-9]+]]:vgpr_32 = V_PK_ADD_I16 8, [[COPY]], 8, [[COPY]], 0, 0, 0, 0, 0, implicit $exec
; GCN-NEXT: [[V_PK_ADD_I16_1:%[0-9]+]]:vgpr_32 = V_PK_ADD_I16 9, [[COPY]], 9, [[COPY]], 0, 0, 0, 0, 0, implicit $exec
; GCN-NEXT: [[V_PK_ADD_I16_2:%[0-9]+]]:vgpr_32 = V_PK_ADD_I16 10, [[COPY]], 10, [[COPY]], 0, 0, 0, 0, 0, implicit $exec
; GCN-NEXT: S_NOP 0, implicit [[V_PK_ADD_I16_]]
; GCN-NEXT: S_NOP 0, implicit [[V_PK_ADD_I16_1]]
; GCN-NEXT: S_NOP 0, implicit [[V_PK_ADD_I16_2]]
; GCN-NEXT: S_ENDPGM 0, implicit [[COPY]]
%0:vgpr_32 = COPY $vgpr0
%1:vgpr_32 = V_PK_ADD_I16 8, %0, 8, %0, 0, 0, 0, 0, 0, implicit $exec
%2:vgpr_32 = V_PK_ADD_I16 9, %0, 9, %0, 0, 0, 0, 0, 0, implicit $exec
%3:vgpr_32 = V_PK_ADD_I16 10, %0, 10, %0, 0, 0, 0, 0, 0, implicit $exec
S_NOP 0, implicit %1
S_NOP 0, implicit %2
S_NOP 0, implicit %3
S_ENDPGM 0, implicit %0
...
---
name: test_remat_v_pk_mul_lo_u16
tracksRegLiveness: true
body: |
bb.0:
liveins: $vgpr0
; GCN-LABEL: name: test_remat_v_pk_mul_lo_u16
; GCN: liveins: $vgpr0
; GCN-NEXT: {{ $}}
; GCN-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
; GCN-NEXT: [[V_PK_MUL_LO_U16_:%[0-9]+]]:vgpr_32 = V_PK_MUL_LO_U16 8, [[COPY]], 8, [[COPY]], 0, 0, 0, 0, 0, implicit $exec
; GCN-NEXT: [[V_PK_MUL_LO_U16_1:%[0-9]+]]:vgpr_32 = V_PK_MUL_LO_U16 9, [[COPY]], 9, [[COPY]], 0, 0, 0, 0, 0, implicit $exec
; GCN-NEXT: [[V_PK_MUL_LO_U16_2:%[0-9]+]]:vgpr_32 = V_PK_MUL_LO_U16 10, [[COPY]], 10, [[COPY]], 0, 0, 0, 0, 0, implicit $exec
; GCN-NEXT: S_NOP 0, implicit [[V_PK_MUL_LO_U16_]]
; GCN-NEXT: S_NOP 0, implicit [[V_PK_MUL_LO_U16_1]]
; GCN-NEXT: S_NOP 0, implicit [[V_PK_MUL_LO_U16_2]]
; GCN-NEXT: S_ENDPGM 0, implicit [[COPY]]
%0:vgpr_32 = COPY $vgpr0
%1:vgpr_32 = V_PK_MUL_LO_U16 8, %0, 8, %0, 0, 0, 0, 0, 0, implicit $exec
%2:vgpr_32 = V_PK_MUL_LO_U16 9, %0, 9, %0, 0, 0, 0, 0, 0, implicit $exec
%3:vgpr_32 = V_PK_MUL_LO_U16 10, %0, 10, %0, 0, 0, 0, 0, 0, implicit $exec
S_NOP 0, implicit %1
S_NOP 0, implicit %2
S_NOP 0, implicit %3
S_ENDPGM 0, implicit %0
...
---
name: test_remat_v_pk_min_i16
tracksRegLiveness: true
body: |
bb.0:
liveins: $vgpr0
; GCN-LABEL: name: test_remat_v_pk_min_i16
; GCN: liveins: $vgpr0
; GCN-NEXT: {{ $}}
; GCN-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
; GCN-NEXT: [[V_PK_MIN_I16_:%[0-9]+]]:vgpr_32 = V_PK_MIN_I16 8, [[COPY]], 8, [[COPY]], 0, 0, 0, 0, 0, implicit $exec
; GCN-NEXT: [[V_PK_MIN_I16_1:%[0-9]+]]:vgpr_32 = V_PK_MIN_I16 9, [[COPY]], 9, [[COPY]], 0, 0, 0, 0, 0, implicit $exec
; GCN-NEXT: [[V_PK_MIN_I16_2:%[0-9]+]]:vgpr_32 = V_PK_MIN_I16 10, [[COPY]], 10, [[COPY]], 0, 0, 0, 0, 0, implicit $exec
; GCN-NEXT: S_NOP 0, implicit [[V_PK_MIN_I16_]]
; GCN-NEXT: S_NOP 0, implicit [[V_PK_MIN_I16_1]]
; GCN-NEXT: S_NOP 0, implicit [[V_PK_MIN_I16_2]]
; GCN-NEXT: S_ENDPGM 0, implicit [[COPY]]
%0:vgpr_32 = COPY $vgpr0
%1:vgpr_32 = V_PK_MIN_I16 8, %0, 8, %0, 0, 0, 0, 0, 0, implicit $exec
%2:vgpr_32 = V_PK_MIN_I16 9, %0, 9, %0, 0, 0, 0, 0, 0, implicit $exec
%3:vgpr_32 = V_PK_MIN_I16 10, %0, 10, %0, 0, 0, 0, 0, 0, implicit $exec
S_NOP 0, implicit %1
S_NOP 0, implicit %2
S_NOP 0, implicit %3
S_ENDPGM 0, implicit %0
...
---
name: test_remat_v_pk_max_i16
tracksRegLiveness: true
body: |
bb.0:
liveins: $vgpr0
; GCN-LABEL: name: test_remat_v_pk_max_i16
; GCN: liveins: $vgpr0
; GCN-NEXT: {{ $}}
; GCN-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
; GCN-NEXT: [[V_PK_MAX_I16_:%[0-9]+]]:vgpr_32 = V_PK_MAX_I16 8, [[COPY]], 8, [[COPY]], 0, 0, 0, 0, 0, implicit $exec
; GCN-NEXT: [[V_PK_MAX_I16_1:%[0-9]+]]:vgpr_32 = V_PK_MAX_I16 9, [[COPY]], 9, [[COPY]], 0, 0, 0, 0, 0, implicit $exec
; GCN-NEXT: [[V_PK_MAX_I16_2:%[0-9]+]]:vgpr_32 = V_PK_MAX_I16 10, [[COPY]], 10, [[COPY]], 0, 0, 0, 0, 0, implicit $exec
; GCN-NEXT: S_NOP 0, implicit [[V_PK_MAX_I16_]]
; GCN-NEXT: S_NOP 0, implicit [[V_PK_MAX_I16_1]]
; GCN-NEXT: S_NOP 0, implicit [[V_PK_MAX_I16_2]]
; GCN-NEXT: S_ENDPGM 0, implicit [[COPY]]
%0:vgpr_32 = COPY $vgpr0
%1:vgpr_32 = V_PK_MAX_I16 8, %0, 8, %0, 0, 0, 0, 0, 0, implicit $exec
%2:vgpr_32 = V_PK_MAX_I16 9, %0, 9, %0, 0, 0, 0, 0, 0, implicit $exec
%3:vgpr_32 = V_PK_MAX_I16 10, %0, 10, %0, 0, 0, 0, 0, 0, implicit $exec
S_NOP 0, implicit %1
S_NOP 0, implicit %2
S_NOP 0, implicit %3
S_ENDPGM 0, implicit %0
...
---
name: test_remat_v_pk_min_u16
tracksRegLiveness: true
body: |
bb.0:
liveins: $vgpr0
; GCN-LABEL: name: test_remat_v_pk_min_u16
; GCN: liveins: $vgpr0
; GCN-NEXT: {{ $}}
; GCN-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
; GCN-NEXT: [[V_PK_MIN_U16_:%[0-9]+]]:vgpr_32 = V_PK_MIN_U16 8, [[COPY]], 8, [[COPY]], 0, 0, 0, 0, 0, implicit $exec
; GCN-NEXT: [[V_PK_MIN_U16_1:%[0-9]+]]:vgpr_32 = V_PK_MIN_U16 9, [[COPY]], 9, [[COPY]], 0, 0, 0, 0, 0, implicit $exec
; GCN-NEXT: [[V_PK_MIN_U16_2:%[0-9]+]]:vgpr_32 = V_PK_MIN_U16 10, [[COPY]], 10, [[COPY]], 0, 0, 0, 0, 0, implicit $exec
; GCN-NEXT: S_NOP 0, implicit [[V_PK_MIN_U16_]]
; GCN-NEXT: S_NOP 0, implicit [[V_PK_MIN_U16_1]]
; GCN-NEXT: S_NOP 0, implicit [[V_PK_MIN_U16_2]]
; GCN-NEXT: S_ENDPGM 0, implicit [[COPY]]
%0:vgpr_32 = COPY $vgpr0
%1:vgpr_32 = V_PK_MIN_U16 8, %0, 8, %0, 0, 0, 0, 0, 0, implicit $exec
%2:vgpr_32 = V_PK_MIN_U16 9, %0, 9, %0, 0, 0, 0, 0, 0, implicit $exec
%3:vgpr_32 = V_PK_MIN_U16 10, %0, 10, %0, 0, 0, 0, 0, 0, implicit $exec
S_NOP 0, implicit %1
S_NOP 0, implicit %2
S_NOP 0, implicit %3
S_ENDPGM 0, implicit %0
...
---
name: test_remat_v_pk_max_u16
tracksRegLiveness: true
body: |
bb.0:
liveins: $vgpr0
; GCN-LABEL: name: test_remat_v_pk_max_u16
; GCN: liveins: $vgpr0
; GCN-NEXT: {{ $}}
; GCN-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
; GCN-NEXT: [[V_PK_MAX_U16_:%[0-9]+]]:vgpr_32 = V_PK_MAX_U16 8, [[COPY]], 8, [[COPY]], 0, 0, 0, 0, 0, implicit $exec
; GCN-NEXT: [[V_PK_MAX_U16_1:%[0-9]+]]:vgpr_32 = V_PK_MAX_U16 9, [[COPY]], 9, [[COPY]], 0, 0, 0, 0, 0, implicit $exec
; GCN-NEXT: [[V_PK_MAX_U16_2:%[0-9]+]]:vgpr_32 = V_PK_MAX_U16 10, [[COPY]], 10, [[COPY]], 0, 0, 0, 0, 0, implicit $exec
; GCN-NEXT: S_NOP 0, implicit [[V_PK_MAX_U16_]]
; GCN-NEXT: S_NOP 0, implicit [[V_PK_MAX_U16_1]]
; GCN-NEXT: S_NOP 0, implicit [[V_PK_MAX_U16_2]]
; GCN-NEXT: S_ENDPGM 0, implicit [[COPY]]
%0:vgpr_32 = COPY $vgpr0
%1:vgpr_32 = V_PK_MAX_U16 8, %0, 8, %0, 0, 0, 0, 0, 0, implicit $exec
%2:vgpr_32 = V_PK_MAX_U16 9, %0, 9, %0, 0, 0, 0, 0, 0, implicit $exec
%3:vgpr_32 = V_PK_MAX_U16 10, %0, 10, %0, 0, 0, 0, 0, 0, implicit $exec
S_NOP 0, implicit %1
S_NOP 0, implicit %2
S_NOP 0, implicit %3
S_ENDPGM 0, implicit %0
...
---
name: test_remat_v_pk_sub_u16
tracksRegLiveness: true
body: |
bb.0:
liveins: $vgpr0
; GCN-LABEL: name: test_remat_v_pk_sub_u16
; GCN: liveins: $vgpr0
; GCN-NEXT: {{ $}}
; GCN-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
; GCN-NEXT: [[V_PK_SUB_U16_:%[0-9]+]]:vgpr_32 = V_PK_SUB_U16 8, [[COPY]], 8, [[COPY]], 0, 0, 0, 0, 0, implicit $exec
; GCN-NEXT: [[V_PK_SUB_U16_1:%[0-9]+]]:vgpr_32 = V_PK_SUB_U16 9, [[COPY]], 9, [[COPY]], 0, 0, 0, 0, 0, implicit $exec
; GCN-NEXT: [[V_PK_SUB_U16_2:%[0-9]+]]:vgpr_32 = V_PK_SUB_U16 10, [[COPY]], 10, [[COPY]], 0, 0, 0, 0, 0, implicit $exec
; GCN-NEXT: S_NOP 0, implicit [[V_PK_SUB_U16_]]
; GCN-NEXT: S_NOP 0, implicit [[V_PK_SUB_U16_1]]
; GCN-NEXT: S_NOP 0, implicit [[V_PK_SUB_U16_2]]
; GCN-NEXT: S_ENDPGM 0, implicit [[COPY]]
%0:vgpr_32 = COPY $vgpr0
%1:vgpr_32 = V_PK_SUB_U16 8, %0, 8, %0, 0, 0, 0, 0, 0, implicit $exec
%2:vgpr_32 = V_PK_SUB_U16 9, %0, 9, %0, 0, 0, 0, 0, 0, implicit $exec
%3:vgpr_32 = V_PK_SUB_U16 10, %0, 10, %0, 0, 0, 0, 0, 0, implicit $exec
S_NOP 0, implicit %1
S_NOP 0, implicit %2
S_NOP 0, implicit %3
S_ENDPGM 0, implicit %0
...
---
name: test_remat_v_pk_sub_i16
tracksRegLiveness: true
body: |
bb.0:
liveins: $vgpr0
; GCN-LABEL: name: test_remat_v_pk_sub_i16
; GCN: liveins: $vgpr0
; GCN-NEXT: {{ $}}
; GCN-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
; GCN-NEXT: [[V_PK_SUB_I16_:%[0-9]+]]:vgpr_32 = V_PK_SUB_I16 8, [[COPY]], 8, [[COPY]], 0, 0, 0, 0, 0, implicit $exec
; GCN-NEXT: [[V_PK_SUB_I16_1:%[0-9]+]]:vgpr_32 = V_PK_SUB_I16 9, [[COPY]], 9, [[COPY]], 0, 0, 0, 0, 0, implicit $exec
; GCN-NEXT: [[V_PK_SUB_I16_2:%[0-9]+]]:vgpr_32 = V_PK_SUB_I16 10, [[COPY]], 10, [[COPY]], 0, 0, 0, 0, 0, implicit $exec
; GCN-NEXT: S_NOP 0, implicit [[V_PK_SUB_I16_]]
; GCN-NEXT: S_NOP 0, implicit [[V_PK_SUB_I16_1]]
; GCN-NEXT: S_NOP 0, implicit [[V_PK_SUB_I16_2]]
; GCN-NEXT: S_ENDPGM 0, implicit [[COPY]]
%0:vgpr_32 = COPY $vgpr0
%1:vgpr_32 = V_PK_SUB_I16 8, %0, 8, %0, 0, 0, 0, 0, 0, implicit $exec
%2:vgpr_32 = V_PK_SUB_I16 9, %0, 9, %0, 0, 0, 0, 0, 0, implicit $exec
%3:vgpr_32 = V_PK_SUB_I16 10, %0, 10, %0, 0, 0, 0, 0, 0, implicit $exec
S_NOP 0, implicit %1
S_NOP 0, implicit %2
S_NOP 0, implicit %3
S_ENDPGM 0, implicit %0
...
---
name: test_remat_v_pk_lshlrev_b16
tracksRegLiveness: true
body: |
bb.0:
liveins: $vgpr0
; GCN-LABEL: name: test_remat_v_pk_lshlrev_b16
; GCN: liveins: $vgpr0
; GCN-NEXT: {{ $}}
; GCN-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
; GCN-NEXT: [[V_PK_LSHLREV_B16_:%[0-9]+]]:vgpr_32 = V_PK_LSHLREV_B16 8, [[COPY]], 8, [[COPY]], 0, 0, 0, 0, 0, implicit $exec
; GCN-NEXT: [[V_PK_LSHLREV_B16_1:%[0-9]+]]:vgpr_32 = V_PK_LSHLREV_B16 9, [[COPY]], 9, [[COPY]], 0, 0, 0, 0, 0, implicit $exec
; GCN-NEXT: [[V_PK_LSHLREV_B16_2:%[0-9]+]]:vgpr_32 = V_PK_LSHLREV_B16 10, [[COPY]], 10, [[COPY]], 0, 0, 0, 0, 0, implicit $exec
; GCN-NEXT: S_NOP 0, implicit [[V_PK_LSHLREV_B16_]]
; GCN-NEXT: S_NOP 0, implicit [[V_PK_LSHLREV_B16_1]]
; GCN-NEXT: S_NOP 0, implicit [[V_PK_LSHLREV_B16_2]]
; GCN-NEXT: S_ENDPGM 0, implicit [[COPY]]
%0:vgpr_32 = COPY $vgpr0
%1:vgpr_32 = V_PK_LSHLREV_B16 8, %0, 8, %0, 0, 0, 0, 0, 0, implicit $exec
%2:vgpr_32 = V_PK_LSHLREV_B16 9, %0, 9, %0, 0, 0, 0, 0, 0, implicit $exec
%3:vgpr_32 = V_PK_LSHLREV_B16 10, %0, 10, %0, 0, 0, 0, 0, 0, implicit $exec
S_NOP 0, implicit %1
S_NOP 0, implicit %2
S_NOP 0, implicit %3
S_ENDPGM 0, implicit %0
...
---
name: test_remat_v_pk_ashrrev_i16
tracksRegLiveness: true
body: |
bb.0:
liveins: $vgpr0
; GCN-LABEL: name: test_remat_v_pk_ashrrev_i16
; GCN: liveins: $vgpr0
; GCN-NEXT: {{ $}}
; GCN-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
; GCN-NEXT: [[V_PK_ASHRREV_I16_:%[0-9]+]]:vgpr_32 = V_PK_ASHRREV_I16 8, [[COPY]], 8, [[COPY]], 0, 0, 0, 0, 0, implicit $exec
; GCN-NEXT: [[V_PK_ASHRREV_I16_1:%[0-9]+]]:vgpr_32 = V_PK_ASHRREV_I16 9, [[COPY]], 9, [[COPY]], 0, 0, 0, 0, 0, implicit $exec
; GCN-NEXT: [[V_PK_ASHRREV_I16_2:%[0-9]+]]:vgpr_32 = V_PK_ASHRREV_I16 10, [[COPY]], 10, [[COPY]], 0, 0, 0, 0, 0, implicit $exec
; GCN-NEXT: S_NOP 0, implicit [[V_PK_ASHRREV_I16_]]
; GCN-NEXT: S_NOP 0, implicit [[V_PK_ASHRREV_I16_1]]
; GCN-NEXT: S_NOP 0, implicit [[V_PK_ASHRREV_I16_2]]
; GCN-NEXT: S_ENDPGM 0, implicit [[COPY]]
%0:vgpr_32 = COPY $vgpr0
%1:vgpr_32 = V_PK_ASHRREV_I16 8, %0, 8, %0, 0, 0, 0, 0, 0, implicit $exec
%2:vgpr_32 = V_PK_ASHRREV_I16 9, %0, 9, %0, 0, 0, 0, 0, 0, implicit $exec
%3:vgpr_32 = V_PK_ASHRREV_I16 10, %0, 10, %0, 0, 0, 0, 0, 0, implicit $exec
S_NOP 0, implicit %1
S_NOP 0, implicit %2
S_NOP 0, implicit %3
S_ENDPGM 0, implicit %0
...
---
name: test_remat_v_pk_lshrrev_b16
tracksRegLiveness: true
body: |
bb.0:
liveins: $vgpr0
; GCN-LABEL: name: test_remat_v_pk_lshrrev_b16
; GCN: liveins: $vgpr0
; GCN-NEXT: {{ $}}
; GCN-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
; GCN-NEXT: [[V_PK_LSHRREV_B16_:%[0-9]+]]:vgpr_32 = V_PK_LSHRREV_B16 8, [[COPY]], 8, [[COPY]], 0, 0, 0, 0, 0, implicit $exec
; GCN-NEXT: [[V_PK_LSHRREV_B16_1:%[0-9]+]]:vgpr_32 = V_PK_LSHRREV_B16 9, [[COPY]], 9, [[COPY]], 0, 0, 0, 0, 0, implicit $exec
; GCN-NEXT: [[V_PK_LSHRREV_B16_2:%[0-9]+]]:vgpr_32 = V_PK_LSHRREV_B16 10, [[COPY]], 10, [[COPY]], 0, 0, 0, 0, 0, implicit $exec
; GCN-NEXT: S_NOP 0, implicit [[V_PK_LSHRREV_B16_]]
; GCN-NEXT: S_NOP 0, implicit [[V_PK_LSHRREV_B16_1]]
; GCN-NEXT: S_NOP 0, implicit [[V_PK_LSHRREV_B16_2]]
; GCN-NEXT: S_ENDPGM 0, implicit [[COPY]]
%0:vgpr_32 = COPY $vgpr0
%1:vgpr_32 = V_PK_LSHRREV_B16 8, %0, 8, %0, 0, 0, 0, 0, 0, implicit $exec
%2:vgpr_32 = V_PK_LSHRREV_B16 9, %0, 9, %0, 0, 0, 0, 0, 0, implicit $exec
%3:vgpr_32 = V_PK_LSHRREV_B16 10, %0, 10, %0, 0, 0, 0, 0, 0, implicit $exec
S_NOP 0, implicit %1
S_NOP 0, implicit %2
S_NOP 0, implicit %3
S_ENDPGM 0, implicit %0
...
---
name: test_remat_v_pk_add_f16
tracksRegLiveness: true
body: |
bb.0:
liveins: $vgpr0
; GCN-LABEL: name: test_remat_v_pk_add_f16
; GCN: liveins: $vgpr0
; GCN-NEXT: {{ $}}
; GCN-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
; GCN-NEXT: [[V_PK_ADD_F16_:%[0-9]+]]:vgpr_32 = nofpexcept V_PK_ADD_F16 8, [[COPY]], 8, [[COPY]], 0, 0, 0, 0, 0, implicit $mode, implicit $exec
; GCN-NEXT: [[V_PK_ADD_F16_1:%[0-9]+]]:vgpr_32 = nofpexcept V_PK_ADD_F16 9, [[COPY]], 9, [[COPY]], 0, 0, 0, 0, 0, implicit $mode, implicit $exec
; GCN-NEXT: [[V_PK_ADD_F16_2:%[0-9]+]]:vgpr_32 = nofpexcept V_PK_ADD_F16 10, [[COPY]], 10, [[COPY]], 0, 0, 0, 0, 0, implicit $mode, implicit $exec
; GCN-NEXT: S_NOP 0, implicit [[V_PK_ADD_F16_]]
; GCN-NEXT: S_NOP 0, implicit [[V_PK_ADD_F16_1]]
; GCN-NEXT: S_NOP 0, implicit [[V_PK_ADD_F16_2]]
; GCN-NEXT: S_ENDPGM 0, implicit [[COPY]]
%0:vgpr_32 = COPY $vgpr0
%1:vgpr_32 = nofpexcept V_PK_ADD_F16 8, %0, 8, %0, 0, 0, 0, 0, 0, implicit $mode, implicit $exec
%2:vgpr_32 = nofpexcept V_PK_ADD_F16 9, %0, 9, %0, 0, 0, 0, 0, 0, implicit $mode, implicit $exec
%3:vgpr_32 = nofpexcept V_PK_ADD_F16 10, %0, 10, %0, 0, 0, 0, 0, 0, implicit $mode, implicit $exec
S_NOP 0, implicit %1
S_NOP 0, implicit %2
S_NOP 0, implicit %3
S_ENDPGM 0, implicit %0
...
# Missing nofpexcept
---
name: test_no_remat_v_pk_add_f16
tracksRegLiveness: true
machineFunctionInfo:
stackPtrOffsetReg: $sgpr32
body: |
bb.0:
liveins: $vgpr0
; GCN-LABEL: name: test_no_remat_v_pk_add_f16
; GCN: liveins: $vgpr0
; GCN-NEXT: {{ $}}
; GCN-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
; GCN-NEXT: [[V_PK_ADD_F16_:%[0-9]+]]:vgpr_32 = V_PK_ADD_F16 8, [[COPY]], 8, [[COPY]], 0, 0, 0, 0, 0, implicit $mode, implicit $exec
; GCN-NEXT: [[V_PK_ADD_F16_1:%[0-9]+]]:vgpr_32 = V_PK_ADD_F16 9, [[COPY]], 9, [[COPY]], 0, 0, 0, 0, 0, implicit $mode, implicit $exec
; GCN-NEXT: [[V_PK_ADD_F16_2:%[0-9]+]]:vgpr_32 = V_PK_ADD_F16 10, [[COPY]], 10, [[COPY]], 0, 0, 0, 0, 0, implicit $mode, implicit $exec
; GCN-NEXT: S_NOP 0, implicit [[V_PK_ADD_F16_]]
; GCN-NEXT: S_NOP 0, implicit [[V_PK_ADD_F16_1]]
; GCN-NEXT: S_NOP 0, implicit [[V_PK_ADD_F16_2]]
; GCN-NEXT: S_ENDPGM 0, implicit [[COPY]]
%0:vgpr_32 = COPY $vgpr0
%1:vgpr_32 = V_PK_ADD_F16 8, %0, 8, %0, 0, 0, 0, 0, 0, implicit $mode, implicit $exec
%2:vgpr_32 = V_PK_ADD_F16 9, %0, 9, %0, 0, 0, 0, 0, 0, implicit $mode, implicit $exec
%3:vgpr_32 = V_PK_ADD_F16 10, %0, 10, %0, 0, 0, 0, 0, 0, implicit $mode, implicit $exec
S_NOP 0, implicit %1
S_NOP 0, implicit %2
S_NOP 0, implicit %3
S_ENDPGM 0, implicit %0
...
---
name: test_remat_v_pk_mul_f16
tracksRegLiveness: true
body: |
bb.0:
liveins: $vgpr0
; GCN-LABEL: name: test_remat_v_pk_mul_f16
; GCN: liveins: $vgpr0
; GCN-NEXT: {{ $}}
; GCN-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
; GCN-NEXT: [[V_PK_MUL_F16_:%[0-9]+]]:vgpr_32 = nofpexcept V_PK_MUL_F16 8, [[COPY]], 8, [[COPY]], 0, 0, 0, 0, 0, implicit $mode, implicit $exec
; GCN-NEXT: [[V_PK_MUL_F16_1:%[0-9]+]]:vgpr_32 = nofpexcept V_PK_MUL_F16 9, [[COPY]], 9, [[COPY]], 0, 0, 0, 0, 0, implicit $mode, implicit $exec
; GCN-NEXT: [[V_PK_MUL_F16_2:%[0-9]+]]:vgpr_32 = nofpexcept V_PK_MUL_F16 10, [[COPY]], 10, [[COPY]], 0, 0, 0, 0, 0, implicit $mode, implicit $exec
; GCN-NEXT: S_NOP 0, implicit [[V_PK_MUL_F16_]]
; GCN-NEXT: S_NOP 0, implicit [[V_PK_MUL_F16_1]]
; GCN-NEXT: S_NOP 0, implicit [[V_PK_MUL_F16_2]]
; GCN-NEXT: S_ENDPGM 0, implicit [[COPY]]
%0:vgpr_32 = COPY $vgpr0
%1:vgpr_32 = nofpexcept V_PK_MUL_F16 8, %0, 8, %0, 0, 0, 0, 0, 0, implicit $mode, implicit $exec
%2:vgpr_32 = nofpexcept V_PK_MUL_F16 9, %0, 9, %0, 0, 0, 0, 0, 0, implicit $mode, implicit $exec
%3:vgpr_32 = nofpexcept V_PK_MUL_F16 10, %0, 10, %0, 0, 0, 0, 0, 0, implicit $mode, implicit $exec
S_NOP 0, implicit %1
S_NOP 0, implicit %2
S_NOP 0, implicit %3
S_ENDPGM 0, implicit %0
...
---
name: test_remat_v_pk_min_f16
tracksRegLiveness: true
body: |
bb.0:
liveins: $vgpr0
; GCN-LABEL: name: test_remat_v_pk_min_f16
; GCN: liveins: $vgpr0
; GCN-NEXT: {{ $}}
; GCN-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
; GCN-NEXT: [[V_PK_MIN_F16_:%[0-9]+]]:vgpr_32 = nofpexcept V_PK_MIN_F16 8, [[COPY]], 8, [[COPY]], 0, 0, 0, 0, 0, implicit $mode, implicit $exec
; GCN-NEXT: [[V_PK_MIN_F16_1:%[0-9]+]]:vgpr_32 = nofpexcept V_PK_MIN_F16 9, [[COPY]], 9, [[COPY]], 0, 0, 0, 0, 0, implicit $mode, implicit $exec
; GCN-NEXT: [[V_PK_MIN_F16_2:%[0-9]+]]:vgpr_32 = nofpexcept V_PK_MIN_F16 10, [[COPY]], 10, [[COPY]], 0, 0, 0, 0, 0, implicit $mode, implicit $exec
; GCN-NEXT: S_NOP 0, implicit [[V_PK_MIN_F16_]]
; GCN-NEXT: S_NOP 0, implicit [[V_PK_MIN_F16_1]]
; GCN-NEXT: S_NOP 0, implicit [[V_PK_MIN_F16_2]]
; GCN-NEXT: S_ENDPGM 0, implicit [[COPY]]
%0:vgpr_32 = COPY $vgpr0
%1:vgpr_32 = nofpexcept V_PK_MIN_F16 8, %0, 8, %0, 0, 0, 0, 0, 0, implicit $mode, implicit $exec
%2:vgpr_32 = nofpexcept V_PK_MIN_F16 9, %0, 9, %0, 0, 0, 0, 0, 0, implicit $mode, implicit $exec
%3:vgpr_32 = nofpexcept V_PK_MIN_F16 10, %0, 10, %0, 0, 0, 0, 0, 0, implicit $mode, implicit $exec
S_NOP 0, implicit %1
S_NOP 0, implicit %2
S_NOP 0, implicit %3
S_ENDPGM 0, implicit %0
...
---
name: test_remat_v_pk_max_f16
tracksRegLiveness: true
body: |
bb.0:
liveins: $vgpr0
; GCN-LABEL: name: test_remat_v_pk_max_f16
; GCN: liveins: $vgpr0
; GCN-NEXT: {{ $}}
; GCN-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
; GCN-NEXT: [[V_PK_MAX_F16_:%[0-9]+]]:vgpr_32 = nofpexcept V_PK_MAX_F16 8, [[COPY]], 8, [[COPY]], 0, 0, 0, 0, 0, implicit $mode, implicit $exec
; GCN-NEXT: [[V_PK_MAX_F16_1:%[0-9]+]]:vgpr_32 = nofpexcept V_PK_MAX_F16 9, [[COPY]], 9, [[COPY]], 0, 0, 0, 0, 0, implicit $mode, implicit $exec
; GCN-NEXT: [[V_PK_MAX_F16_2:%[0-9]+]]:vgpr_32 = nofpexcept V_PK_MAX_F16 10, [[COPY]], 10, [[COPY]], 0, 0, 0, 0, 0, implicit $mode, implicit $exec
; GCN-NEXT: S_NOP 0, implicit [[V_PK_MAX_F16_]]
; GCN-NEXT: S_NOP 0, implicit [[V_PK_MAX_F16_1]]
; GCN-NEXT: S_NOP 0, implicit [[V_PK_MAX_F16_2]]
; GCN-NEXT: S_ENDPGM 0, implicit [[COPY]]
%0:vgpr_32 = COPY $vgpr0
%1:vgpr_32 = nofpexcept V_PK_MAX_F16 8, %0, 8, %0, 0, 0, 0, 0, 0, implicit $mode, implicit $exec
%2:vgpr_32 = nofpexcept V_PK_MAX_F16 9, %0, 9, %0, 0, 0, 0, 0, 0, implicit $mode, implicit $exec
%3:vgpr_32 = nofpexcept V_PK_MAX_F16 10, %0, 10, %0, 0, 0, 0, 0, 0, implicit $mode, implicit $exec
S_NOP 0, implicit %1
S_NOP 0, implicit %2
S_NOP 0, implicit %3
S_ENDPGM 0, implicit %0
...
---
name: test_remat_v_pk_fma_f16
tracksRegLiveness: true
body: |
bb.0:
liveins: $vgpr0
; GCN-LABEL: name: test_remat_v_pk_fma_f16
; GCN: liveins: $vgpr0
; GCN-NEXT: {{ $}}
; GCN-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
; GCN-NEXT: [[V_PK_FMA_F16_:%[0-9]+]]:vgpr_32 = nofpexcept V_PK_FMA_F16 8, [[COPY]], 8, [[COPY]], 8, [[COPY]], 0, 0, 0, 0, 0, implicit $mode, implicit $exec
; GCN-NEXT: [[V_PK_FMA_F16_1:%[0-9]+]]:vgpr_32 = nofpexcept V_PK_FMA_F16 9, [[COPY]], 9, [[COPY]], 9, [[COPY]], 0, 0, 0, 0, 0, implicit $mode, implicit $exec
; GCN-NEXT: [[V_PK_FMA_F16_2:%[0-9]+]]:vgpr_32 = nofpexcept V_PK_FMA_F16 10, [[COPY]], 10, [[COPY]], 10, [[COPY]], 0, 0, 0, 0, 0, implicit $mode, implicit $exec
; GCN-NEXT: S_NOP 0, implicit [[V_PK_FMA_F16_]]
; GCN-NEXT: S_NOP 0, implicit [[V_PK_FMA_F16_1]]
; GCN-NEXT: S_NOP 0, implicit [[V_PK_FMA_F16_2]]
; GCN-NEXT: S_ENDPGM 0, implicit [[COPY]]
%0:vgpr_32 = COPY $vgpr0
%1:vgpr_32 = nofpexcept V_PK_FMA_F16 8, %0, 8, %0, 8, %0, 0, 0, 0, 0, 0, implicit $mode, implicit $exec
%2:vgpr_32 = nofpexcept V_PK_FMA_F16 9, %0, 9, %0, 9, %0, 0, 0, 0, 0, 0, implicit $mode, implicit $exec
%3:vgpr_32 = nofpexcept V_PK_FMA_F16 10, %0, 10, %0, 10, %0, 0, 0, 0, 0, 0, implicit $mode, implicit $exec
S_NOP 0, implicit %1
S_NOP 0, implicit %2
S_NOP 0, implicit %3
S_ENDPGM 0, implicit %0
...
---
name: test_remat_v_mad_mix_f32
tracksRegLiveness: true
body: |
bb.0:
liveins: $vgpr0
; GCN-LABEL: name: test_remat_v_mad_mix_f32
; GCN: liveins: $vgpr0
; GCN-NEXT: {{ $}}
; GCN-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
; GCN-NEXT: [[V_MAD_MIX_F32_:%[0-9]+]]:vgpr_32 = nofpexcept V_MAD_MIX_F32 8, [[COPY]], 8, [[COPY]], 8, [[COPY]], 0, 0, 0, implicit $mode, implicit $exec
; GCN-NEXT: [[V_MAD_MIX_F32_1:%[0-9]+]]:vgpr_32 = nofpexcept V_MAD_MIX_F32 9, [[COPY]], 9, [[COPY]], 9, [[COPY]], 0, 0, 0, implicit $mode, implicit $exec
; GCN-NEXT: [[V_MAD_MIX_F32_2:%[0-9]+]]:vgpr_32 = nofpexcept V_MAD_MIX_F32 10, [[COPY]], 10, [[COPY]], 10, [[COPY]], 0, 0, 0, implicit $mode, implicit $exec
; GCN-NEXT: S_NOP 0, implicit [[V_MAD_MIX_F32_]]
; GCN-NEXT: S_NOP 0, implicit [[V_MAD_MIX_F32_1]]
; GCN-NEXT: S_NOP 0, implicit [[V_MAD_MIX_F32_2]]
; GCN-NEXT: S_ENDPGM 0, implicit [[COPY]]
%0:vgpr_32 = COPY $vgpr0
%1:vgpr_32 = nofpexcept V_MAD_MIX_F32 8, %0, 8, %0, 8, %0, 0, 0, 0, implicit $mode, implicit $exec
%2:vgpr_32 = nofpexcept V_MAD_MIX_F32 9, %0, 9, %0, 9, %0, 0, 0, 0, implicit $mode, implicit $exec
%3:vgpr_32 = nofpexcept V_MAD_MIX_F32 10, %0, 10, %0, 10, %0, 0, 0, 0, implicit $mode, implicit $exec
S_NOP 0, implicit %1
S_NOP 0, implicit %2
S_NOP 0, implicit %3
S_ENDPGM 0, implicit %0
...
---
name: test_remat_v_fma_mix_f32
tracksRegLiveness: true
body: |
bb.0:
liveins: $vgpr0
; GCN-LABEL: name: test_remat_v_fma_mix_f32
; GCN: liveins: $vgpr0
; GCN-NEXT: {{ $}}
; GCN-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
; GCN-NEXT: [[V_FMA_MIX_F32_:%[0-9]+]]:vgpr_32 = nofpexcept V_FMA_MIX_F32 8, [[COPY]], 8, [[COPY]], 8, [[COPY]], 0, 0, 0, implicit $mode, implicit $exec
; GCN-NEXT: [[V_FMA_MIX_F32_1:%[0-9]+]]:vgpr_32 = nofpexcept V_FMA_MIX_F32 9, [[COPY]], 9, [[COPY]], 9, [[COPY]], 0, 0, 0, implicit $mode, implicit $exec
; GCN-NEXT: [[V_FMA_MIX_F32_2:%[0-9]+]]:vgpr_32 = nofpexcept V_FMA_MIX_F32 10, [[COPY]], 10, [[COPY]], 10, [[COPY]], 0, 0, 0, implicit $mode, implicit $exec
; GCN-NEXT: S_NOP 0, implicit [[V_FMA_MIX_F32_]]
; GCN-NEXT: S_NOP 0, implicit [[V_FMA_MIX_F32_1]]
; GCN-NEXT: S_NOP 0, implicit [[V_FMA_MIX_F32_2]]
; GCN-NEXT: S_ENDPGM 0, implicit [[COPY]]
%0:vgpr_32 = COPY $vgpr0
%1:vgpr_32 = nofpexcept V_FMA_MIX_F32 8, %0, 8, %0, 8, %0, 0, 0, 0, implicit $mode, implicit $exec
%2:vgpr_32 = nofpexcept V_FMA_MIX_F32 9, %0, 9, %0, 9, %0, 0, 0, 0, implicit $mode, implicit $exec
%3:vgpr_32 = nofpexcept V_FMA_MIX_F32 10, %0, 10, %0, 10, %0, 0, 0, 0, implicit $mode, implicit $exec
S_NOP 0, implicit %1
S_NOP 0, implicit %2
S_NOP 0, implicit %3
S_ENDPGM 0, implicit %0
...
---
name: test_remat_v_pk_fma_f32
tracksRegLiveness: true
body: |
bb.0:
liveins: $vgpr0_vgpr1
; GCN-LABEL: name: test_remat_v_pk_fma_f32
; GCN: liveins: $vgpr0_vgpr1
; GCN-NEXT: {{ $}}
; GCN-NEXT: [[COPY:%[0-9]+]]:vreg_64_align2 = COPY $vgpr0_vgpr1
; GCN-NEXT: [[V_PK_FMA_F32_:%[0-9]+]]:vreg_64_align2 = nofpexcept V_PK_FMA_F32 8, [[COPY]], 8, [[COPY]], 11, [[COPY]], 0, 0, 0, 0, 0, implicit $mode, implicit $exec
; GCN-NEXT: [[V_PK_FMA_F32_1:%[0-9]+]]:vreg_64_align2 = nofpexcept V_PK_FMA_F32 8, [[COPY]], 8, [[COPY]], 11, [[COPY]], 0, 0, 0, 0, 0, implicit $mode, implicit $exec
; GCN-NEXT: [[V_PK_FMA_F32_2:%[0-9]+]]:vreg_64_align2 = nofpexcept V_PK_FMA_F32 8, [[COPY]], 8, [[COPY]], 11, [[COPY]], 0, 0, 0, 0, 0, implicit $mode, implicit $exec
; GCN-NEXT: S_NOP 0, implicit [[V_PK_FMA_F32_]]
; GCN-NEXT: S_NOP 0, implicit [[V_PK_FMA_F32_1]]
; GCN-NEXT: S_NOP 0, implicit [[V_PK_FMA_F32_2]]
; GCN-NEXT: S_ENDPGM 0, implicit [[COPY]]
%0:vreg_64_align2 = COPY $vgpr0_vgpr1
%1:vreg_64_align2 = nofpexcept V_PK_FMA_F32 8, %0, 8, %0, 11, %0, 0, 0, 0, 0, 0, implicit $mode, implicit $exec
%2:vreg_64_align2 = nofpexcept V_PK_FMA_F32 8, %0, 8, %0, 11, %0, 0, 0, 0, 0, 0, implicit $mode, implicit $exec
%3:vreg_64_align2 = nofpexcept V_PK_FMA_F32 8, %0, 8, %0, 11, %0, 0, 0, 0, 0, 0, implicit $mode, implicit $exec
S_NOP 0, implicit %1
S_NOP 0, implicit %2
S_NOP 0, implicit %3
S_ENDPGM 0, implicit %0
...
---
name: test_no_remat_v_pk_fma_f32
tracksRegLiveness: true
machineFunctionInfo:
stackPtrOffsetReg: $sgpr32
body: |
bb.0:
liveins: $vgpr0_vgpr1
; GCN-LABEL: name: test_no_remat_v_pk_fma_f32
; GCN: liveins: $vgpr0_vgpr1
; GCN-NEXT: {{ $}}
; GCN-NEXT: [[COPY:%[0-9]+]]:vreg_64_align2 = COPY $vgpr0_vgpr1
; GCN-NEXT: [[V_PK_FMA_F32_:%[0-9]+]]:vreg_64_align2 = V_PK_FMA_F32 8, [[COPY]], 8, [[COPY]], 11, [[COPY]], 0, 0, 0, 0, 0, implicit $mode, implicit $exec
; GCN-NEXT: [[V_PK_FMA_F32_1:%[0-9]+]]:vreg_64_align2 = V_PK_FMA_F32 8, [[COPY]], 8, [[COPY]], 11, [[COPY]], 0, 0, 0, 0, 0, implicit $mode, implicit $exec
; GCN-NEXT: [[V_PK_FMA_F32_2:%[0-9]+]]:vreg_64_align2 = V_PK_FMA_F32 8, [[COPY]], 8, [[COPY]], 11, [[COPY]], 0, 0, 0, 0, 0, implicit $mode, implicit $exec
; GCN-NEXT: S_NOP 0, implicit [[V_PK_FMA_F32_]]
; GCN-NEXT: S_NOP 0, implicit [[V_PK_FMA_F32_1]]
; GCN-NEXT: S_NOP 0, implicit [[V_PK_FMA_F32_2]]
; GCN-NEXT: S_ENDPGM 0, implicit [[COPY]]
%0:vreg_64_align2 = COPY $vgpr0_vgpr1
%1:vreg_64_align2 = V_PK_FMA_F32 8, %0, 8, %0, 11, %0, 0, 0, 0, 0, 0, implicit $mode, implicit $exec
%2:vreg_64_align2 = V_PK_FMA_F32 8, %0, 8, %0, 11, %0, 0, 0, 0, 0, 0, implicit $mode, implicit $exec
%3:vreg_64_align2 = V_PK_FMA_F32 8, %0, 8, %0, 11, %0, 0, 0, 0, 0, 0, implicit $mode, implicit $exec
S_NOP 0, implicit %1
S_NOP 0, implicit %2
S_NOP 0, implicit %3
S_ENDPGM 0, implicit %0
...
---
name: test_remat_v_pk_mul_f32
tracksRegLiveness: true
body: |
bb.0:
liveins: $vgpr0_vgpr1
; GCN-LABEL: name: test_remat_v_pk_mul_f32
; GCN: liveins: $vgpr0_vgpr1
; GCN-NEXT: {{ $}}
; GCN-NEXT: [[COPY:%[0-9]+]]:vreg_64_align2 = COPY $vgpr0_vgpr1
; GCN-NEXT: [[V_PK_MUL_F32_:%[0-9]+]]:vreg_64_align2 = nofpexcept V_PK_MUL_F32 8, [[COPY]], 8, [[COPY]], 11, 0, 0, 0, 0, implicit $mode, implicit $exec
; GCN-NEXT: [[V_PK_MUL_F32_1:%[0-9]+]]:vreg_64_align2 = nofpexcept V_PK_MUL_F32 8, [[COPY]], 8, [[COPY]], 11, 0, 0, 0, 0, implicit $mode, implicit $exec
; GCN-NEXT: [[V_PK_MUL_F32_2:%[0-9]+]]:vreg_64_align2 = nofpexcept V_PK_MUL_F32 8, [[COPY]], 8, [[COPY]], 11, 0, 0, 0, 0, implicit $mode, implicit $exec
; GCN-NEXT: S_NOP 0, implicit [[V_PK_MUL_F32_]]
; GCN-NEXT: S_NOP 0, implicit [[V_PK_MUL_F32_1]]
; GCN-NEXT: S_NOP 0, implicit [[V_PK_MUL_F32_2]]
; GCN-NEXT: S_ENDPGM 0, implicit [[COPY]]
%0:vreg_64_align2 = COPY $vgpr0_vgpr1
%1:vreg_64_align2 = nofpexcept V_PK_MUL_F32 8, %0, 8, %0, 11, 0, 0, 0, 0, implicit $mode, implicit $exec
%2:vreg_64_align2 = nofpexcept V_PK_MUL_F32 8, %0, 8, %0, 11, 0, 0, 0, 0, implicit $mode, implicit $exec
%3:vreg_64_align2 = nofpexcept V_PK_MUL_F32 8, %0, 8, %0, 11, 0, 0, 0, 0, implicit $mode, implicit $exec
S_NOP 0, implicit %1
S_NOP 0, implicit %2
S_NOP 0, implicit %3
S_ENDPGM 0, implicit %0
...
---
name: test_remat_v_pk_add_f32
tracksRegLiveness: true
body: |
bb.0:
liveins: $vgpr0_vgpr1
; GCN-LABEL: name: test_remat_v_pk_add_f32
; GCN: liveins: $vgpr0_vgpr1
; GCN-NEXT: {{ $}}
; GCN-NEXT: [[COPY:%[0-9]+]]:vreg_64_align2 = COPY $vgpr0_vgpr1
; GCN-NEXT: [[V_PK_ADD_F32_:%[0-9]+]]:vreg_64_align2 = nofpexcept V_PK_ADD_F32 8, [[COPY]], 8, [[COPY]], 11, 0, 0, 0, 0, implicit $mode, implicit $exec
; GCN-NEXT: [[V_PK_ADD_F32_1:%[0-9]+]]:vreg_64_align2 = nofpexcept V_PK_ADD_F32 8, [[COPY]], 8, [[COPY]], 11, 0, 0, 0, 0, implicit $mode, implicit $exec
; GCN-NEXT: [[V_PK_ADD_F32_2:%[0-9]+]]:vreg_64_align2 = nofpexcept V_PK_ADD_F32 8, [[COPY]], 8, [[COPY]], 11, 0, 0, 0, 0, implicit $mode, implicit $exec
; GCN-NEXT: S_NOP 0, implicit [[V_PK_ADD_F32_]]
; GCN-NEXT: S_NOP 0, implicit [[V_PK_ADD_F32_1]]
; GCN-NEXT: S_NOP 0, implicit [[V_PK_ADD_F32_2]]
; GCN-NEXT: S_ENDPGM 0, implicit [[COPY]]
%0:vreg_64_align2 = COPY $vgpr0_vgpr1
%1:vreg_64_align2 = nofpexcept V_PK_ADD_F32 8, %0, 8, %0, 11, 0, 0, 0, 0, implicit $mode, implicit $exec
%2:vreg_64_align2 = nofpexcept V_PK_ADD_F32 8, %0, 8, %0, 11, 0, 0, 0, 0, implicit $mode, implicit $exec
%3:vreg_64_align2 = nofpexcept V_PK_ADD_F32 8, %0, 8, %0, 11, 0, 0, 0, 0, implicit $mode, implicit $exec
S_NOP 0, implicit %1
S_NOP 0, implicit %2
S_NOP 0, implicit %3
S_ENDPGM 0, implicit %0
...
---
name: test_remat_v_pk_mov_b32
tracksRegLiveness: true
body: |
bb.0:
liveins: $vgpr0_vgpr1
; GCN-LABEL: name: test_remat_v_pk_mov_b32
; GCN: liveins: $vgpr0_vgpr1
; GCN-NEXT: {{ $}}
; GCN-NEXT: [[COPY:%[0-9]+]]:vreg_64_align2 = COPY $vgpr0_vgpr1
; GCN-NEXT: [[V_PK_MOV_B32_:%[0-9]+]]:vreg_64_align2 = V_PK_MOV_B32 8, [[COPY]], 8, [[COPY]], 11, 0, 0, 0, 0, implicit $exec
; GCN-NEXT: [[V_PK_MOV_B32_1:%[0-9]+]]:vreg_64_align2 = V_PK_MOV_B32 9, [[COPY]], 9, [[COPY]], 12, 0, 0, 0, 0, implicit $exec
; GCN-NEXT: [[V_PK_MOV_B32_2:%[0-9]+]]:vreg_64_align2 = V_PK_MOV_B32 10, [[COPY]], 10, [[COPY]], 13, 0, 0, 0, 0, implicit $exec
; GCN-NEXT: S_NOP 0, implicit [[V_PK_MOV_B32_]]
; GCN-NEXT: S_NOP 0, implicit [[V_PK_MOV_B32_1]]
; GCN-NEXT: S_NOP 0, implicit [[V_PK_MOV_B32_2]]
; GCN-NEXT: S_ENDPGM 0, implicit [[COPY]]
%0:vreg_64_align2 = COPY $vgpr0_vgpr1
%1:vreg_64_align2 = V_PK_MOV_B32 8, %0, 8, %0, 11, 0, 0, 0, 0, implicit $exec
%2:vreg_64_align2 = V_PK_MOV_B32 9, %0, 9, %0, 12, 0, 0, 0, 0, implicit $exec
%3:vreg_64_align2 = V_PK_MOV_B32 10, %0, 10, %0, 13, 0, 0, 0, 0, implicit $exec
S_NOP 0, implicit %1
S_NOP 0, implicit %2
S_NOP 0, implicit %3
S_ENDPGM 0, implicit %0
...
# Make sure there's no verifier error after making a subregister def dead. The
# dead interval still needs a subrange.
---
name: test_remat_subreg_def
tracksRegLiveness: true
body: |
bb.0:
; GCN-LABEL: name: test_remat_subreg_def
; GCN: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 1, implicit $exec
; GCN-NEXT: undef [[V_MOV_B32_e32_1:%[0-9]+]].sub0:vreg_64 = V_MOV_B32_e32 2, implicit $exec
; GCN-NEXT: [[V_MOV_B32_e32_2:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 3, implicit $exec
; GCN-NEXT: S_NOP 0, implicit [[V_MOV_B32_e32_]]
; GCN-NEXT: S_NOP 0, implicit [[V_MOV_B32_e32_2]]
; GCN-NEXT: S_NOP 0, implicit [[V_MOV_B32_e32_1]]
; GCN-NEXT: S_ENDPGM 0
%0:vgpr_32 = V_MOV_B32_e32 1, implicit $exec
undef %1.sub0:vreg_64 = V_MOV_B32_e32 2, implicit $exec
%2:vgpr_32 = V_MOV_B32_e32 3, implicit $exec
S_NOP 0, implicit %0
S_NOP 0, implicit %2
S_NOP 0, implicit %1
S_ENDPGM 0
...
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