llvm/llvm/test/CodeGen/AMDGPU/stale-livevar-in-twoaddr-pass.mir

# RUN: llc -mtriple=amdgcn -mcpu=gfx900 -run-pass=livevars,phi-node-elimination,twoaddressinstruction -verify-machineinstrs -o - %s | FileCheck %s
# RUN: llc -mtriple=amdgcn -mcpu=gfx900 --passes='require<live-vars>,phi-node-elimination,two-address-instruction' -verify-each -o - %s | FileCheck %s
# This used to fail under ASAN enabled build because we didn't update LiveVariables in SIInstrInfo::convertToThreeAddress()
# CHECK: _amdgpu_ps_main

---
name:            _amdgpu_ps_main
alignment:       1
tracksRegLiveness: true
body:             |
  bb.0:
    liveins: $sgpr2, $vgpr2, $vgpr3

    %0:vgpr_32 = COPY $vgpr3
    %1:vgpr_32 = COPY $vgpr2
    S_BRANCH %bb.3

  bb.1:
    %2:vgpr_32 = V_MAC_F32_e32 0, %0, %1, implicit $mode, implicit $exec
    %3:vgpr_32 = V_MED3_F32_e64 0, %1, 0, %2, 0, %2, 0, 0, implicit $mode, implicit $exec

  bb.2:
    %4:vgpr_32 = PHI %5, %bb.3, %3, %bb.1
    SI_END_CF %6, implicit-def dead $exec, implicit-def dead $scc, implicit $exec
    EXP_DONE 0, %4, %4, %4, %4, -1, 0, 15, implicit $exec
    S_ENDPGM 0

  bb.3:
    successors: %bb.1, %bb.2

    %5:vgpr_32 = V_MAC_F32_e32 0, %1, %0, implicit $mode, implicit $exec
    %7:vgpr_32 = V_CVT_I32_F32_e32 %5, implicit $mode, implicit $exec
    %8:sreg_64 = V_CMP_NE_U32_e64 1, %7, implicit $exec
    %6:sreg_64 = SI_IF %8, %bb.2, implicit-def dead $exec, implicit-def dead $scc, implicit $exec
    S_BRANCH %bb.1

...