llvm/llvm/test/CodeGen/AMDGPU/vcmpx-permlane-hazard-sdwa.mir

# RUN: llc -mtriple=amdgcn -mcpu=gfx1010 -verify-machineinstrs -run-pass post-RA-hazard-rec -o - %s | FileCheck -check-prefix=GCN %s

# GCN-LABEL: name: hazard_vcmpx_sdwa_permlane16
# GCN:      V_CMPX_LE_F32_nosdst_sdwa
# GCN:      S_ADD_U32
# GCN-NEXT: $vgpr1 = V_MOV_B32_e32 killed $vgpr1, implicit $exec
# GCN-NEXT: V_PERMLANE16_B32_e64
---
name:            hazard_vcmpx_sdwa_permlane16
body:            |
  bb.0:
    successors: %bb.1
    $vgpr0 = V_MOV_B32_e32 0, implicit $exec
    V_CMPX_LE_F32_nosdst_sdwa 0, $vgpr0, 0, $vgpr0, 0, 0, implicit-def $exec, implicit $mode, implicit $exec
    S_BRANCH %bb.1

  bb.1:
    $vgpr1 = IMPLICIT_DEF
    $vgpr2 = IMPLICIT_DEF
    $sgpr0 = IMPLICIT_DEF
    $sgpr1 = S_ADD_U32 $sgpr0, 0, implicit-def $scc
    $vgpr1 = V_PERMLANE16_B32_e64 0, killed $vgpr1, 0, killed $sgpr1, 0, killed $sgpr0, $vgpr1, 0, implicit $exec
    S_ENDPGM 0
...