llvm/llvm/test/CodeGen/AMDGPU/early-tailduplicator-nophis.mir

# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
# RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx900 -run-pass=early-tailduplication -verify-machineinstrs -o - %s | FileCheck %s

 # There are no phis in this testcase. Early tail duplication introduces them,
 # so the NoPHIs property needs to be cleared to avoid verifier errors

---
name:           tail_duplicate_nophis
tracksRegLiveness: true
body:             |
  ; CHECK-LABEL: name: tail_duplicate_nophis
  ; CHECK: bb.0:
  ; CHECK-NEXT:   successors: %bb.3(0x80000000)
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT:   [[S_MOV_B32_:%[0-9]+]]:sreg_32 = S_MOV_B32 0
  ; CHECK-NEXT:   S_BRANCH %bb.3
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT: bb.2:
  ; CHECK-NEXT:   successors: %bb.3(0x80000000)
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT:   [[DEF:%[0-9]+]]:sreg_32 = IMPLICIT_DEF
  ; CHECK-NEXT:   S_SLEEP 9
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT: bb.3:
  ; CHECK-NEXT:   successors: %bb.3(0x80000000)
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT:   [[PHI:%[0-9]+]]:sreg_32 = PHI [[DEF]], %bb.2, %1, %bb.3, [[S_MOV_B32_]], %bb.0
  ; CHECK-NEXT:   S_NOP 0, implicit [[PHI]]
  ; CHECK-NEXT:   S_SLEEP 1
  ; CHECK-NEXT:   [[S_MOV_B32_1:%[0-9]+]]:sreg_32 = S_MOV_B32 0
  ; CHECK-NEXT:   S_BRANCH %bb.3
  bb.1:

  bb.2:
    %5:sreg_32 = S_MOV_B32 0
    S_BRANCH %bb.4

  bb.3:
    S_SLEEP 9

  bb.4:
    S_NOP 0, implicit %5
    S_SLEEP 1
    S_BRANCH %bb.2

...