llvm/llvm/test/CodeGen/AMDGPU/schedule-ilp-liveness-tracking.mir

# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 2
# RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx90a -amdgpu-enable-max-ilp-scheduling-strategy -verify-machineinstrs -run-pass=machine-scheduler -verify-misched -o - %s | FileCheck %s

---
name:            max-ilp-liveness-tracking
tracksRegLiveness: true
body:             |
  ; CHECK-LABEL: name: max-ilp-liveness-tracking
  ; CHECK: bb.0:
  ; CHECK-NEXT:   successors: %bb.1(0x80000000)
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT:   %src0:vgpr_32 = V_MOV_B32_e64 0, implicit $exec
  ; CHECK-NEXT:   %src1:vgpr_32 = V_MOV_B32_e64 1, implicit $exec
  ; CHECK-NEXT:   %live0:vgpr_32 = V_ADD_U32_e32 %src0, %src1, implicit $exec
  ; CHECK-NEXT:   %live1:vgpr_32 = V_ADD_U32_e32 %live0, %src1, implicit $exec
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT: bb.1:
  ; CHECK-NEXT:   %out0:vgpr_32 = V_ADD_U32_e32 %live0, %live1, implicit $exec
  ; CHECK-NEXT:   dead %out1:vgpr_32 = V_ADD_U32_e32 %out0, %live1, implicit $exec
  ; CHECK-NEXT:   S_ENDPGM 0
  bb.0:
    successors: %bb.1
    %src0:vgpr_32 = V_MOV_B32_e64 0, implicit $exec
    %src1:vgpr_32 = V_MOV_B32_e64 1, implicit $exec
    %live0:vgpr_32 = V_ADD_U32_e32 %src0:vgpr_32, %src1:vgpr_32, implicit $exec
    %live1:vgpr_32 = V_ADD_U32_e32 %live0:vgpr_32, %src1:vgpr_32, implicit $exec

  bb.1:
    %out0:vgpr_32 = V_ADD_U32_e32 %live0:vgpr_32, %live1:vgpr_32, implicit $exec
    %out1:vgpr_32 = V_ADD_U32_e32 %out0:vgpr_32, %live1:vgpr_32, implicit $exec
    S_ENDPGM 0

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