postlegalizer-combiner-divrem.mir | Explore in Territory

# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
# RUN: llc -global-isel -mtriple=amdgcn-amd-amdhsa -mcpu=gfx900 -run-pass=amdgpu-postlegalizer-combiner -verify-machineinstrs -o - %s | FileCheck %s

# Post-legalizer should not generate divrem instruction.
---
name: test_sdiv_srem
tracksRegLiveness: true
legalized: true
body: |
  bb.0:
    liveins: $vgpr0, $vgpr1, $vgpr2_vgpr3, $vgpr4_vgpr5
    ; CHECK-LABEL: name: test_sdiv_srem
    ; CHECK: liveins: $vgpr0, $vgpr1, $vgpr2_vgpr3, $vgpr4_vgpr5
    ; CHECK-NEXT: {{  $}}
    ; CHECK-NEXT: %src1:_(s32) = COPY $vgpr0
    ; CHECK-NEXT: %src2:_(s32) = COPY $vgpr1
    ; CHECK-NEXT: %ptr1:_(p1) = COPY $vgpr2_vgpr3
    ; CHECK-NEXT: %ptr2:_(p1) = COPY $vgpr4_vgpr5
    ; CHECK-NEXT: %div:_(s32) = G_SDIV %src1, %src2
    ; CHECK-NEXT: G_STORE %div(s32), %ptr1(p1) :: (store (s32), addrspace 1)
    ; CHECK-NEXT: %rem:_(s32) = G_SREM %src1, %src2
    ; CHECK-NEXT: G_STORE %rem(s32), %ptr2(p1) :: (store (s32), addrspace 1)
    %src1:_(s32) = COPY $vgpr0
    %src2:_(s32) = COPY $vgpr1
    %ptr1:_(p1) = COPY $vgpr2_vgpr3
    %ptr2:_(p1) = COPY $vgpr4_vgpr5
    %div:_(s32) = G_SDIV %src1:_(s32), %src2:_(s32)
    G_STORE %div:_(s32), %ptr1:_(p1) :: (store (s32), addrspace 1, align 4)
    %rem:_(s32) = G_SREM %src1:_(s32), %src2:_(s32)
    G_STORE %rem:_(s32), %ptr2:_(p1) :: (store (s32), addrspace 1, align 4)
...
---
name: test_srem_sdiv
tracksRegLiveness: true
legalized: true
body: |
  bb.0:
    liveins: $vgpr0, $vgpr1, $vgpr2_vgpr3, $vgpr4_vgpr5
    ; CHECK-LABEL: name: test_srem_sdiv
    ; CHECK: liveins: $vgpr0, $vgpr1, $vgpr2_vgpr3, $vgpr4_vgpr5
    ; CHECK-NEXT: {{  $}}
    ; CHECK-NEXT: %src1:_(s32) = COPY $vgpr0
    ; CHECK-NEXT: %src2:_(s32) = COPY $vgpr1
    ; CHECK-NEXT: %ptr1:_(p1) = COPY $vgpr2_vgpr3
    ; CHECK-NEXT: %ptr2:_(p1) = COPY $vgpr4_vgpr5
    ; CHECK-NEXT: %rem:_(s32) = G_SREM %src1, %src2
    ; CHECK-NEXT: G_STORE %rem(s32), %ptr1(p1) :: (store (s32), addrspace 1)
    ; CHECK-NEXT: %div:_(s32) = G_SDIV %src1, %src2
    ; CHECK-NEXT: G_STORE %div(s32), %ptr2(p1) :: (store (s32), addrspace 1)
    %src1:_(s32) = COPY $vgpr0
    %src2:_(s32) = COPY $vgpr1
    %ptr1:_(p1) = COPY $vgpr2_vgpr3
    %ptr2:_(p1) = COPY $vgpr4_vgpr5
    %rem:_(s32) = G_SREM %src1:_(s32), %src2:_(s32)
    G_STORE %rem:_(s32), %ptr1:_(p1) :: (store (s32), addrspace 1, align 4)
    %div:_(s32) = G_SDIV %src1:_(s32), %src2:_(s32)
    G_STORE %div:_(s32), %ptr2:_(p1) :: (store (s32), addrspace 1, align 4)
...
---
name: test_udiv_urem
tracksRegLiveness: true
legalized: true
body: |
  bb.0:
    liveins: $vgpr0, $vgpr1, $vgpr2_vgpr3, $vgpr4_vgpr5
    ; CHECK-LABEL: name: test_udiv_urem
    ; CHECK: liveins: $vgpr0, $vgpr1, $vgpr2_vgpr3, $vgpr4_vgpr5
    ; CHECK-NEXT: {{  $}}
    ; CHECK-NEXT: %src1:_(s32) = COPY $vgpr0
    ; CHECK-NEXT: %src2:_(s32) = COPY $vgpr1
    ; CHECK-NEXT: %ptr1:_(p1) = COPY $vgpr2_vgpr3
    ; CHECK-NEXT: %ptr2:_(p1) = COPY $vgpr4_vgpr5
    ; CHECK-NEXT: %div:_(s32) = G_UDIV %src1, %src2
    ; CHECK-NEXT: G_STORE %div(s32), %ptr1(p1) :: (store (s32), addrspace 1)
    ; CHECK-NEXT: %rem:_(s32) = G_UREM %src1, %src2
    ; CHECK-NEXT: G_STORE %rem(s32), %ptr2(p1) :: (store (s32), addrspace 1)
    %src1:_(s32) = COPY $vgpr0
    %src2:_(s32) = COPY $vgpr1
    %ptr1:_(p1) = COPY $vgpr2_vgpr3
    %ptr2:_(p1) = COPY $vgpr4_vgpr5
    %div:_(s32) = G_UDIV %src1:_(s32), %src2:_(s32)
    G_STORE %div:_(s32), %ptr1:_(p1) :: (store (s32), addrspace 1, align 4)
    %rem:_(s32) = G_UREM %src1:_(s32), %src2:_(s32)
    G_STORE %rem:_(s32), %ptr2:_(p1) :: (store (s32), addrspace 1, align 4)
...
---
name: test_urem_udiv
tracksRegLiveness: true
legalized: true
body: |
  bb.0:
    liveins: $vgpr0, $vgpr1, $vgpr2_vgpr3, $vgpr4_vgpr5
    ; CHECK-LABEL: name: test_urem_udiv
    ; CHECK: liveins: $vgpr0, $vgpr1, $vgpr2_vgpr3, $vgpr4_vgpr5
    ; CHECK-NEXT: {{  $}}
    ; CHECK-NEXT: %src1:_(s32) = COPY $vgpr0
    ; CHECK-NEXT: %src2:_(s32) = COPY $vgpr1
    ; CHECK-NEXT: %ptr1:_(p1) = COPY $vgpr2_vgpr3
    ; CHECK-NEXT: %ptr2:_(p1) = COPY $vgpr4_vgpr5
    ; CHECK-NEXT: %rem:_(s32) = G_UREM %src1, %src2
    ; CHECK-NEXT: G_STORE %rem(s32), %ptr1(p1) :: (store (s32), addrspace 1)
    ; CHECK-NEXT: %div:_(s32) = G_UDIV %src1, %src2
    ; CHECK-NEXT: G_STORE %div(s32), %ptr2(p1) :: (store (s32), addrspace 1)
    %src1:_(s32) = COPY $vgpr0
    %src2:_(s32) = COPY $vgpr1
    %ptr1:_(p1) = COPY $vgpr2_vgpr3
    %ptr2:_(p1) = COPY $vgpr4_vgpr5
    %rem:_(s32) = G_UREM %src1:_(s32), %src2:_(s32)
    G_STORE %rem:_(s32), %ptr1:_(p1) :: (store (s32), addrspace 1, align 4)
    %div:_(s32) = G_UDIV %src1:_(s32), %src2:_(s32)
    G_STORE %div:_(s32), %ptr2:_(p1) :: (store (s32), addrspace 1, align 4)
...
---
name: test_sdiv_srem_v2
tracksRegLiveness: true
legalized: true
body: |
  bb.0:
    liveins: $vgpr0_vgpr1, $vgpr2_vgpr3, $vgpr4_vgpr5, $vgpr6_vgpr7
    ; CHECK-LABEL: name: test_sdiv_srem_v2
    ; CHECK: liveins: $vgpr0_vgpr1, $vgpr2_vgpr3, $vgpr4_vgpr5, $vgpr6_vgpr7
    ; CHECK-NEXT: {{  $}}
    ; CHECK-NEXT: %src1:_(<2 x s32>) = COPY $vgpr0_vgpr1
    ; CHECK-NEXT: %src2:_(<2 x s32>) = COPY $vgpr2_vgpr3
    ; CHECK-NEXT: %ptr1:_(p1) = COPY $vgpr4_vgpr5
    ; CHECK-NEXT: %ptr2:_(p1) = COPY $vgpr6_vgpr7
    ; CHECK-NEXT: %div:_(<2 x s32>) = G_SDIV %src1, %src2
    ; CHECK-NEXT: G_STORE %div(<2 x s32>), %ptr1(p1) :: (store (<2 x s32>), align 4, addrspace 1)
    ; CHECK-NEXT: %rem:_(<2 x s32>) = G_SREM %src1, %src2
    ; CHECK-NEXT: G_STORE %rem(<2 x s32>), %ptr2(p1) :: (store (<2 x s32>), align 4, addrspace 1)
    %src1:_(<2 x s32>) = COPY $vgpr0_vgpr1
    %src2:_(<2 x s32>) = COPY $vgpr2_vgpr3
    %ptr1:_(p1) = COPY $vgpr4_vgpr5
    %ptr2:_(p1) = COPY $vgpr6_vgpr7
    %div:_(<2 x s32>) = G_SDIV %src1:_(<2 x s32>), %src2:_(<2 x s32>)
    G_STORE %div:_(<2 x s32>), %ptr1:_(p1) :: (store (<2 x s32>), addrspace 1, align 4)
    %rem:_(<2 x s32>) = G_SREM %src1:_(<2 x s32>), %src2:_(<2 x s32>)
    G_STORE %rem:_(<2 x s32>), %ptr2:_(p1) :: (store (<2 x s32>), addrspace 1, align 4)
...
---
name: test_udiv_urem_v2
tracksRegLiveness: true
legalized: true
body: |
  bb.0:
    liveins: $vgpr0_vgpr1, $vgpr2_vgpr3, $vgpr4_vgpr5, $vgpr6_vgpr7
    ; CHECK-LABEL: name: test_udiv_urem_v2
    ; CHECK: liveins: $vgpr0_vgpr1, $vgpr2_vgpr3, $vgpr4_vgpr5, $vgpr6_vgpr7
    ; CHECK-NEXT: {{  $}}
    ; CHECK-NEXT: %src1:_(<2 x s32>) = COPY $vgpr0_vgpr1
    ; CHECK-NEXT: %src2:_(<2 x s32>) = COPY $vgpr2_vgpr3
    ; CHECK-NEXT: %ptr1:_(p1) = COPY $vgpr4_vgpr5
    ; CHECK-NEXT: %ptr2:_(p1) = COPY $vgpr6_vgpr7
    ; CHECK-NEXT: %div:_(<2 x s32>) = G_UDIV %src1, %src2
    ; CHECK-NEXT: G_STORE %div(<2 x s32>), %ptr1(p1) :: (store (<2 x s32>), align 4, addrspace 1)
    ; CHECK-NEXT: %rem:_(<2 x s32>) = G_UREM %src1, %src2
    ; CHECK-NEXT: G_STORE %rem(<2 x s32>), %ptr2(p1) :: (store (<2 x s32>), align 4, addrspace 1)
    %src1:_(<2 x s32>) = COPY $vgpr0_vgpr1
    %src2:_(<2 x s32>) = COPY $vgpr2_vgpr3
    %ptr1:_(p1) = COPY $vgpr4_vgpr5
    %ptr2:_(p1) = COPY $vgpr6_vgpr7
    %div:_(<2 x s32>) = G_UDIV %src1:_(<2 x s32>), %src2:_(<2 x s32>)
    G_STORE %div:_(<2 x s32>), %ptr1:_(p1) :: (store (<2 x s32>), addrspace 1, align 4)
    %rem:_(<2 x s32>) = G_UREM %src1:_(<2 x s32>), %src2:_(<2 x s32>)
    G_STORE %rem:_(<2 x s32>), %ptr2:_(p1) :: (store (<2 x s32>), addrspace 1, align 4)
...
---
name: test_sdiv_srem_extra_sdiv
tracksRegLiveness: true
legalized: true
body: |
  bb.0:
    liveins: $vgpr0, $vgpr1, $vgpr2_vgpr3, $vgpr4_vgpr5, $vgpr6_vgpr7
    ; CHECK-LABEL: name: test_sdiv_srem_extra_sdiv
    ; CHECK: liveins: $vgpr0, $vgpr1, $vgpr2_vgpr3, $vgpr4_vgpr5, $vgpr6_vgpr7
    ; CHECK-NEXT: {{  $}}
    ; CHECK-NEXT: %src1:_(s32) = COPY $vgpr0
    ; CHECK-NEXT: %src2:_(s32) = COPY $vgpr1
    ; CHECK-NEXT: %ptr1:_(p1) = COPY $vgpr2_vgpr3
    ; CHECK-NEXT: %ptr2:_(p1) = COPY $vgpr4_vgpr5
    ; CHECK-NEXT: %ptr3:_(p1) = COPY $vgpr6_vgpr7
    ; CHECK-NEXT: %div:_(s32) = G_SDIV %src1, %src2
    ; CHECK-NEXT: G_STORE %div(s32), %ptr1(p1) :: (store (s32), addrspace 1)
    ; CHECK-NEXT: %rem:_(s32) = G_SREM %src1, %src2
    ; CHECK-NEXT: G_STORE %rem(s32), %ptr2(p1) :: (store (s32), addrspace 1)
    ; CHECK-NEXT: %div2:_(s32) = G_SDIV %src1, %src2
    ; CHECK-NEXT: G_STORE %div2(s32), %ptr3(p1) :: (store (s32), addrspace 1)
    %src1:_(s32) = COPY $vgpr0
    %src2:_(s32) = COPY $vgpr1
    %ptr1:_(p1) = COPY $vgpr2_vgpr3
    %ptr2:_(p1) = COPY $vgpr4_vgpr5
    %ptr3:_(p1) = COPY $vgpr6_vgpr7
    %div:_(s32) = G_SDIV %src1:_(s32), %src2:_(s32)
    G_STORE %div:_(s32), %ptr1:_(p1) :: (store (s32), addrspace 1, align 4)
    %rem:_(s32) = G_SREM %src1:_(s32), %src2:_(s32)
    G_STORE %rem:_(s32), %ptr2:_(p1) :: (store (s32), addrspace 1, align 4)
    %div2:_(s32) = G_SDIV %src1:_(s32), %src2:_(s32)
    G_STORE %div2:_(s32), %ptr3:_(p1) :: (store (s32), addrspace 1, align 4)
...
---
name: test_sdiv_srem_extra_srem
tracksRegLiveness: true
legalized: true
body: |
  bb.0:
    liveins: $vgpr0, $vgpr1, $vgpr2_vgpr3, $vgpr4_vgpr5, $vgpr6_vgpr7
    ; CHECK-LABEL: name: test_sdiv_srem_extra_srem
    ; CHECK: liveins: $vgpr0, $vgpr1, $vgpr2_vgpr3, $vgpr4_vgpr5, $vgpr6_vgpr7
    ; CHECK-NEXT: {{  $}}
    ; CHECK-NEXT: %src1:_(s32) = COPY $vgpr0
    ; CHECK-NEXT: %src2:_(s32) = COPY $vgpr1
    ; CHECK-NEXT: %ptr1:_(p1) = COPY $vgpr2_vgpr3
    ; CHECK-NEXT: %ptr2:_(p1) = COPY $vgpr4_vgpr5
    ; CHECK-NEXT: %ptr3:_(p1) = COPY $vgpr6_vgpr7
    ; CHECK-NEXT: %div:_(s32) = G_SDIV %src1, %src2
    ; CHECK-NEXT: G_STORE %div(s32), %ptr1(p1) :: (store (s32), addrspace 1)
    ; CHECK-NEXT: %rem:_(s32) = G_SREM %src1, %src2
    ; CHECK-NEXT: G_STORE %rem(s32), %ptr2(p1) :: (store (s32), addrspace 1)
    ; CHECK-NEXT: %rem2:_(s32) = G_SREM %src1, %src2
    ; CHECK-NEXT: G_STORE %rem2(s32), %ptr3(p1) :: (store (s32), addrspace 1)
    %src1:_(s32) = COPY $vgpr0
    %src2:_(s32) = COPY $vgpr1
    %ptr1:_(p1) = COPY $vgpr2_vgpr3
    %ptr2:_(p1) = COPY $vgpr4_vgpr5
    %ptr3:_(p1) = COPY $vgpr6_vgpr7
    %div:_(s32) = G_SDIV %src1:_(s32), %src2:_(s32)
    G_STORE %div:_(s32), %ptr1:_(p1) :: (store (s32), addrspace 1, align 4)
    %rem:_(s32) = G_SREM %src1:_(s32), %src2:_(s32)
    G_STORE %rem:_(s32), %ptr2:_(p1) :: (store (s32), addrspace 1, align 4)
    %rem2:_(s32) = G_SREM %src1:_(s32), %src2:_(s32)
    G_STORE %rem2:_(s32), %ptr3:_(p1) :: (store (s32), addrspace 1, align 4)
...
llvm/llvm/test/CodeGen/AMDGPU/GlobalISel/postlegalizer-combiner-divrem.mir
