llvm/llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-ptrtoint.mir

# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
# RUN: llc -mtriple=amdgcn -mcpu=tahiti -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s
---

name: ptrtoint_s_p3_to_s_s32
legalized:       true
regBankSelected: true
tracksRegLiveness: true

body: |
  bb.0:
    liveins: $sgpr0

    ; CHECK-LABEL: name: ptrtoint_s_p3_to_s_s32
    ; CHECK: liveins: $sgpr0
    ; CHECK-NEXT: {{  $}}
    ; CHECK-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
    ; CHECK-NEXT: S_ENDPGM 0, implicit [[COPY]]
    %0:sgpr(p3) = COPY $sgpr0
    %1:sgpr(s32) = G_PTRTOINT %0
    S_ENDPGM 0, implicit %1
...

---

name: ptrtoint_s_p5_to_s_s32
legalized:       true
regBankSelected: true
tracksRegLiveness: true

body: |
  bb.0:
    liveins: $sgpr0

    ; CHECK-LABEL: name: ptrtoint_s_p5_to_s_s32
    ; CHECK: liveins: $sgpr0
    ; CHECK-NEXT: {{  $}}
    ; CHECK-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
    ; CHECK-NEXT: S_ENDPGM 0, implicit [[COPY]]
    %0:sgpr(p5) = COPY $sgpr0
    %1:sgpr(s32) = G_PTRTOINT %0
    S_ENDPGM 0, implicit %1
...

---

name: ptrtoint_s_p0_to_s_s64
legalized:       true
regBankSelected: true
tracksRegLiveness: true

body: |
  bb.0:
    liveins: $sgpr0_sgpr1

    ; CHECK-LABEL: name: ptrtoint_s_p0_to_s_s64
    ; CHECK: liveins: $sgpr0_sgpr1
    ; CHECK-NEXT: {{  $}}
    ; CHECK-NEXT: [[COPY:%[0-9]+]]:sreg_64 = COPY $sgpr0_sgpr1
    ; CHECK-NEXT: S_ENDPGM 0, implicit [[COPY]]
    %0:sgpr(p0) = COPY $sgpr0_sgpr1
    %1:sgpr(s64) = G_PTRTOINT %0
    S_ENDPGM 0, implicit %1
...

---

name: ptrtoint_s_p1_to_s_s64
legalized:       true
regBankSelected: true
tracksRegLiveness: true

body: |
  bb.0:
    liveins: $sgpr0_sgpr1

    ; CHECK-LABEL: name: ptrtoint_s_p1_to_s_s64
    ; CHECK: liveins: $sgpr0_sgpr1
    ; CHECK-NEXT: {{  $}}
    ; CHECK-NEXT: [[COPY:%[0-9]+]]:sreg_64 = COPY $sgpr0_sgpr1
    ; CHECK-NEXT: S_ENDPGM 0, implicit [[COPY]]
    %0:sgpr(p1) = COPY $sgpr0_sgpr1
    %1:sgpr(s64) = G_PTRTOINT %0
    S_ENDPGM 0, implicit %1
...

---

name: ptrtoint_s_p999_to_s_s64
legalized:       true
regBankSelected: true
tracksRegLiveness: true

body: |
  bb.0:
    liveins: $sgpr0_sgpr1

    ; CHECK-LABEL: name: ptrtoint_s_p999_to_s_s64
    ; CHECK: liveins: $sgpr0_sgpr1
    ; CHECK-NEXT: {{  $}}
    ; CHECK-NEXT: [[COPY:%[0-9]+]]:sreg_64 = COPY $sgpr0_sgpr1
    ; CHECK-NEXT: S_ENDPGM 0, implicit [[COPY]]
    %0:sgpr(p999) = COPY $sgpr0_sgpr1
    %1:sgpr(s64) = G_PTRTOINT %0
    S_ENDPGM 0, implicit %1
...