combine-fcanonicalize.mir | Explore in Territory

# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
# RUN: llc -mtriple=amdgcn-amd-amdhsa -run-pass=amdgpu-postlegalizer-combiner -verify-machineinstrs %s -o - | FileCheck %s

---
name: test_fcanonicalize
tracksRegLiveness: true
legalized: true
body: |
  bb.0:
    liveins: $vgpr0

    ; CHECK-LABEL: name: test_fcanonicalize
    ; CHECK: liveins: $vgpr0
    ; CHECK-NEXT: {{  $}}
    ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
    ; CHECK-NEXT: [[FCANONICALIZE:%[0-9]+]]:_(s32) = G_FCANONICALIZE [[COPY]]
    ; CHECK-NEXT: $vgpr0 = COPY [[FCANONICALIZE]](s32)
    %0:_(s32) = COPY $vgpr0
    %1:_(s32) = G_FCANONICALIZE %0
    %2:_(s32) = G_FCANONICALIZE %1
    $vgpr0 = COPY %2(s32)
...

---
name: test_fconstant
tracksRegLiveness: true
legalized: true
body: |
  bb.0:

    ; CHECK-LABEL: name: test_fconstant
    ; CHECK: [[C:%[0-9]+]]:_(s32) = G_FCONSTANT float 1.000000e+10
    ; CHECK-NEXT: $vgpr0 = COPY [[C]](s32)
    %0:_(s32) = G_FCONSTANT float 1.0e10
    %1:_(s32) = G_FCANONICALIZE %0
    $vgpr0 = COPY %1(s32)
...

# FIXME: Mode fields are redundant and not considered.
---
name: test_denormal_fconstant
tracksRegLiveness: true
legalized: true
machineFunctionInfo:
  mode:
    fp64-fp16-output-denormals: false
    fp64-fp16-input-denormals: false
body: |
  bb.0:

    ; CHECK-LABEL: name: test_denormal_fconstant
    ; CHECK: [[C:%[0-9]+]]:_(s64) = G_FCONSTANT double 1.618950e-319
    ; CHECK-NEXT: $vgpr0_vgpr1 = COPY [[C]](s64)
    %0:_(s64) = G_FCONSTANT double 0x0000000000008000
    %1:_(s64) = G_FCANONICALIZE %0
    $vgpr0_vgpr1 = COPY %1(s64)
...

---
name: test_fminnum_with_fminnum_argument_s32_ieee_mode_on
tracksRegLiveness: true
legalized: true
machineFunctionInfo:
  mode:
    ieee: true
body: |
  bb.0:
    liveins: $vgpr0, $vgpr1, $vgpr2

    ; CHECK-LABEL: name: test_fminnum_with_fminnum_argument_s32_ieee_mode_on
    ; CHECK: liveins: $vgpr0, $vgpr1, $vgpr2
    ; CHECK-NEXT: {{  $}}
    ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
    ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1
    ; CHECK-NEXT: [[FCANONICALIZE:%[0-9]+]]:_(s32) = G_FCANONICALIZE [[COPY]]
    ; CHECK-NEXT: [[FCANONICALIZE1:%[0-9]+]]:_(s32) = G_FCANONICALIZE [[COPY1]]
    ; CHECK-NEXT: [[FMINNUM_IEEE:%[0-9]+]]:_(s32) = G_FMINNUM_IEEE [[FCANONICALIZE]], [[FCANONICALIZE1]]
    ; CHECK-NEXT: [[COPY2:%[0-9]+]]:_(s32) = COPY $vgpr2
    ; CHECK-NEXT: [[FCANONICALIZE2:%[0-9]+]]:_(s32) = G_FCANONICALIZE [[COPY2]]
    ; CHECK-NEXT: [[FMINNUM_IEEE1:%[0-9]+]]:_(s32) = G_FMINNUM_IEEE [[FMINNUM_IEEE]], [[FCANONICALIZE2]]
    ; CHECK-NEXT: $vgpr0 = COPY [[FMINNUM_IEEE1]](s32)
    %0:_(s32) = COPY $vgpr0
    %1:_(s32) = COPY $vgpr1
    %7:_(s32) = G_FCANONICALIZE %0
    %8:_(s32) = G_FCANONICALIZE %1
    %2:_(s32) = G_FMINNUM_IEEE %7, %8
    %3:_(s32) = COPY $vgpr2
    %5:_(s32) = G_FCANONICALIZE %2
    %6:_(s32) = G_FCANONICALIZE %3
    %4:_(s32) = G_FMINNUM_IEEE %5, %6
    $vgpr0 = COPY %4(s32)
...

---
name: test_fminnum_with_fmaxnum_argument_s32_ieee_mode_on
tracksRegLiveness: true
legalized: true
machineFunctionInfo:
  mode:
    ieee: true
body: |
  bb.0:
    liveins: $vgpr0, $vgpr1, $vgpr2

    ; CHECK-LABEL: name: test_fminnum_with_fmaxnum_argument_s32_ieee_mode_on
    ; CHECK: liveins: $vgpr0, $vgpr1, $vgpr2
    ; CHECK-NEXT: {{  $}}
    ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
    ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1
    ; CHECK-NEXT: [[FCANONICALIZE:%[0-9]+]]:_(s32) = G_FCANONICALIZE [[COPY]]
    ; CHECK-NEXT: [[FCANONICALIZE1:%[0-9]+]]:_(s32) = G_FCANONICALIZE [[COPY1]]
    ; CHECK-NEXT: [[FMAXNUM_IEEE:%[0-9]+]]:_(s32) = G_FMAXNUM_IEEE [[FCANONICALIZE]], [[FCANONICALIZE1]]
    ; CHECK-NEXT: [[COPY2:%[0-9]+]]:_(s32) = COPY $vgpr2
    ; CHECK-NEXT: [[FCANONICALIZE2:%[0-9]+]]:_(s32) = G_FCANONICALIZE [[COPY2]]
    ; CHECK-NEXT: [[FMINNUM_IEEE:%[0-9]+]]:_(s32) = G_FMINNUM_IEEE [[FMAXNUM_IEEE]], [[FCANONICALIZE2]]
    ; CHECK-NEXT: $vgpr0 = COPY [[FMINNUM_IEEE]](s32)
    %0:_(s32) = COPY $vgpr0
    %1:_(s32) = COPY $vgpr1
    %7:_(s32) = G_FCANONICALIZE %0
    %8:_(s32) = G_FCANONICALIZE %1
    %2:_(s32) = G_FMAXNUM_IEEE %7, %8
    %3:_(s32) = COPY $vgpr2
    %5:_(s32) = G_FCANONICALIZE %2
    %6:_(s32) = G_FCANONICALIZE %3
    %4:_(s32) = G_FMINNUM_IEEE %5, %6
    $vgpr0 = COPY %4(s32)
...

---
name: test_fmaxnum_with_fmaxnum_argument_s32_ieee_mode_on
tracksRegLiveness: true
legalized: true
machineFunctionInfo:
  mode:
    ieee: true
body: |
  bb.0:
    liveins: $vgpr0, $vgpr1, $vgpr2

    ; CHECK-LABEL: name: test_fmaxnum_with_fmaxnum_argument_s32_ieee_mode_on
    ; CHECK: liveins: $vgpr0, $vgpr1, $vgpr2
    ; CHECK-NEXT: {{  $}}
    ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
    ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1
    ; CHECK-NEXT: [[FCANONICALIZE:%[0-9]+]]:_(s32) = G_FCANONICALIZE [[COPY]]
    ; CHECK-NEXT: [[FCANONICALIZE1:%[0-9]+]]:_(s32) = G_FCANONICALIZE [[COPY1]]
    ; CHECK-NEXT: [[FMAXNUM_IEEE:%[0-9]+]]:_(s32) = G_FMAXNUM_IEEE [[FCANONICALIZE]], [[FCANONICALIZE1]]
    ; CHECK-NEXT: [[COPY2:%[0-9]+]]:_(s32) = COPY $vgpr2
    ; CHECK-NEXT: [[FCANONICALIZE2:%[0-9]+]]:_(s32) = G_FCANONICALIZE [[COPY2]]
    ; CHECK-NEXT: [[FMAXNUM_IEEE1:%[0-9]+]]:_(s32) = G_FMAXNUM_IEEE [[FMAXNUM_IEEE]], [[FCANONICALIZE2]]
    ; CHECK-NEXT: $vgpr0 = COPY [[FMAXNUM_IEEE1]](s32)
    %0:_(s32) = COPY $vgpr0
    %1:_(s32) = COPY $vgpr1
    %7:_(s32) = G_FCANONICALIZE %0
    %8:_(s32) = G_FCANONICALIZE %1
    %2:_(s32) = G_FMAXNUM_IEEE %7, %8
    %3:_(s32) = COPY $vgpr2
    %5:_(s32) = G_FCANONICALIZE %2
    %6:_(s32) = G_FCANONICALIZE %3
    %4:_(s32) = G_FMAXNUM_IEEE %5, %6
    $vgpr0 = COPY %4(s32)
...

---
name: test_fmaxnum_with_fminnum_argument_s32_ieee_mode_on
tracksRegLiveness: true
legalized: true
machineFunctionInfo:
  mode:
    ieee: true
body: |
  bb.0:
    liveins: $vgpr0, $vgpr1, $vgpr2

    ; CHECK-LABEL: name: test_fmaxnum_with_fminnum_argument_s32_ieee_mode_on
    ; CHECK: liveins: $vgpr0, $vgpr1, $vgpr2
    ; CHECK-NEXT: {{  $}}
    ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
    ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1
    ; CHECK-NEXT: [[FCANONICALIZE:%[0-9]+]]:_(s32) = G_FCANONICALIZE [[COPY]]
    ; CHECK-NEXT: [[FCANONICALIZE1:%[0-9]+]]:_(s32) = G_FCANONICALIZE [[COPY1]]
    ; CHECK-NEXT: [[FMINNUM_IEEE:%[0-9]+]]:_(s32) = G_FMINNUM_IEEE [[FCANONICALIZE]], [[FCANONICALIZE1]]
    ; CHECK-NEXT: [[COPY2:%[0-9]+]]:_(s32) = COPY $vgpr2
    ; CHECK-NEXT: [[FCANONICALIZE2:%[0-9]+]]:_(s32) = G_FCANONICALIZE [[COPY2]]
    ; CHECK-NEXT: [[FMAXNUM_IEEE:%[0-9]+]]:_(s32) = G_FMAXNUM_IEEE [[FMINNUM_IEEE]], [[FCANONICALIZE2]]
    ; CHECK-NEXT: $vgpr0 = COPY [[FMAXNUM_IEEE]](s32)
    %0:_(s32) = COPY $vgpr0
    %1:_(s32) = COPY $vgpr1
    %7:_(s32) = G_FCANONICALIZE %0
    %8:_(s32) = G_FCANONICALIZE %1
    %2:_(s32) = G_FMINNUM_IEEE %7, %8
    %3:_(s32) = COPY $vgpr2
    %5:_(s32) = G_FCANONICALIZE %2
    %6:_(s32) = G_FCANONICALIZE %3
    %4:_(s32) = G_FMAXNUM_IEEE %5, %6
    $vgpr0 = COPY %4(s32)
...

---
name: test_multiple_uses
tracksRegLiveness: true
legalized: true
machineFunctionInfo:
  mode:
    ieee: true
body: |
  bb.0:
    liveins: $vgpr0, $vgpr1

    ; CHECK-LABEL: name: test_multiple_uses
    ; CHECK: liveins: $vgpr0, $vgpr1
    ; CHECK-NEXT: {{  $}}
    ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
    ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1
    ; CHECK-NEXT: [[FCANONICALIZE:%[0-9]+]]:_(s32) = G_FCANONICALIZE [[COPY]]
    ; CHECK-NEXT: [[FCANONICALIZE1:%[0-9]+]]:_(s32) = G_FCANONICALIZE [[COPY1]]
    ; CHECK-NEXT: [[FMINNUM_IEEE:%[0-9]+]]:_(s32) = G_FMINNUM_IEEE [[FCANONICALIZE]], [[FCANONICALIZE1]]
    ; CHECK-NEXT: [[FMAXNUM_IEEE:%[0-9]+]]:_(s32) = G_FMAXNUM_IEEE [[FMINNUM_IEEE]], [[FMINNUM_IEEE]]
    ; CHECK-NEXT: $vgpr0 = COPY [[FMAXNUM_IEEE]](s32)
    %0:_(s32) = COPY $vgpr0
    %1:_(s32) = COPY $vgpr1
    %6:_(s32) = G_FCANONICALIZE %0
    %7:_(s32) = G_FCANONICALIZE %1
    %2:_(s32) = G_FMINNUM_IEEE %6, %7
    %4:_(s32) = G_FCANONICALIZE %2
    %5:_(s32) = G_FCANONICALIZE %2
    %3:_(s32) = G_FMAXNUM_IEEE %4, %5
    $vgpr0 = COPY %3(s32)
...

---
name: test_splat_padded_with_undef
tracksRegLiveness: true
legalized: true
machineFunctionInfo:
  mode:
    ieee: true
body: |
  bb.0 :
    liveins: $vgpr0

    ; CHECK-LABEL: name: test_splat_padded_with_undef
    ; CHECK: liveins: $vgpr0
    ; CHECK-NEXT: {{  $}}
    ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<2 x s16>) = COPY $vgpr0
    ; CHECK-NEXT: %two:_(s16) = G_FCONSTANT half 0xH4000
    ; CHECK-NEXT: %two_s32:_(s32) = G_ANYEXT %two(s16)
    ; CHECK-NEXT: %two_splat:_(<2 x s16>) = G_BUILD_VECTOR_TRUNC %two_s32(s32), %two_s32(s32)
    ; CHECK-NEXT: %zero:_(s16) = G_FCONSTANT half 0xH0000
    ; CHECK-NEXT: %zero_s32:_(s32) = G_ANYEXT %zero(s16)
    ; CHECK-NEXT: %undef:_(s32) = G_IMPLICIT_DEF
    ; CHECK-NEXT: %zero_undef:_(<2 x s16>) = G_BUILD_VECTOR_TRUNC %zero_s32(s32), %undef(s32)
    ; CHECK-NEXT: %one:_(s16) = G_FCONSTANT half 0xH3C00
    ; CHECK-NEXT: %one_s32:_(s32) = G_ANYEXT %one(s16)
    ; CHECK-NEXT: %one_undef:_(<2 x s16>) = G_BUILD_VECTOR_TRUNC %one_s32(s32), %undef(s32)
    ; CHECK-NEXT: [[FMUL:%[0-9]+]]:_(<2 x s16>) = G_FMUL [[COPY]], %two_splat
    ; CHECK-NEXT: [[FMAXNUM_IEEE:%[0-9]+]]:_(<2 x s16>) = G_FMAXNUM_IEEE [[FMUL]], %zero_undef
    ; CHECK-NEXT: [[FMINNUM_IEEE:%[0-9]+]]:_(<2 x s16>) = G_FMINNUM_IEEE [[FMAXNUM_IEEE]], %one_undef
    ; CHECK-NEXT: $vgpr0 = COPY [[FMINNUM_IEEE]](<2 x s16>)
    %0:_(<2 x s16>) = COPY $vgpr0
    %two:_(s16) = G_FCONSTANT half 0xH4000
    %two_s32:_(s32) = G_ANYEXT %two(s16)
    %two_splat:_(<2 x s16>) = G_BUILD_VECTOR_TRUNC %two_s32(s32), %two_s32(s32)
    %zero:_(s16) = G_FCONSTANT half 0xH0000
    %zero_s32:_(s32) = G_ANYEXT %zero(s16)
    %undef:_(s32) = G_IMPLICIT_DEF
    %zero_undef:_(<2 x s16>) = G_BUILD_VECTOR_TRUNC %zero_s32(s32), %undef(s32)
    %one:_(s16) = G_FCONSTANT half 0xH3C00
    %one_s32:_(s32) = G_ANYEXT %one(s16)
    %one_undef:_(<2 x s16>) = G_BUILD_VECTOR_TRUNC %one_s32(s32), %undef(s32)
    %4:_(<2 x s16>) = G_FMUL %0, %two_splat
    %zero_undef_fcan:_(<2 x s16>) = G_FCANONICALIZE %zero_undef
    %16:_(<2 x s16>) = G_FCANONICALIZE %4
    %8:_(<2 x s16>) = G_FMAXNUM_IEEE %zero_undef_fcan, %16
    %one_undef_fcan:_(<2 x s16>) = G_FCANONICALIZE %one_undef
    %14:_(<2 x s16>) = G_FCANONICALIZE %8
    %11:_(<2 x s16>) = G_FMINNUM_IEEE %one_undef_fcan, %14
    $vgpr0 = COPY %11(<2 x s16>)
...

---
name: test_splat_SNaN_and_QNaN_padded_with_undef
tracksRegLiveness: true
legalized: true
machineFunctionInfo:
  mode:
    ieee: true
body: |
  bb.0 :
    liveins: $vgpr0

    ; CHECK-LABEL: name: test_splat_SNaN_and_QNaN_padded_with_undef
    ; CHECK: liveins: $vgpr0
    ; CHECK-NEXT: {{  $}}
    ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<2 x s16>) = COPY $vgpr0
    ; CHECK-NEXT: %two:_(s16) = G_FCONSTANT half 0xH4000
    ; CHECK-NEXT: %two_s32:_(s32) = G_ANYEXT %two(s16)
    ; CHECK-NEXT: %two_splat:_(<2 x s16>) = G_BUILD_VECTOR_TRUNC %two_s32(s32), %two_s32(s32)
    ; CHECK-NEXT: %snan:_(s16) = G_FCONSTANT half 0xH7C01
    ; CHECK-NEXT: %snan_s32:_(s32) = G_ANYEXT %snan(s16)
    ; CHECK-NEXT: %undef:_(s32) = G_IMPLICIT_DEF
    ; CHECK-NEXT: %snan_undef:_(<2 x s16>) = G_BUILD_VECTOR_TRUNC %snan_s32(s32), %undef(s32)
    ; CHECK-NEXT: %qnan:_(s16) = G_FCONSTANT half 0xH7E01
    ; CHECK-NEXT: %qnan_s32:_(s32) = G_ANYEXT %qnan(s16)
    ; CHECK-NEXT: %qnan_undef:_(<2 x s16>) = G_BUILD_VECTOR_TRUNC %qnan_s32(s32), %undef(s32)
    ; CHECK-NEXT: [[FMUL:%[0-9]+]]:_(<2 x s16>) = G_FMUL [[COPY]], %two_splat
    ; CHECK-NEXT: %snan_undef_fcan:_(<2 x s16>) = G_FCANONICALIZE %snan_undef
    ; CHECK-NEXT: [[FMAXNUM_IEEE:%[0-9]+]]:_(<2 x s16>) = G_FMAXNUM_IEEE %snan_undef_fcan, [[FMUL]]
    ; CHECK-NEXT: [[FMINNUM_IEEE:%[0-9]+]]:_(<2 x s16>) = G_FMINNUM_IEEE [[FMAXNUM_IEEE]], %qnan_undef
    ; CHECK-NEXT: $vgpr0 = COPY [[FMINNUM_IEEE]](<2 x s16>)
    %0:_(<2 x s16>) = COPY $vgpr0
    %two:_(s16) = G_FCONSTANT half 0xH4000
    %two_s32:_(s32) = G_ANYEXT %two(s16)
    %two_splat:_(<2 x s16>) = G_BUILD_VECTOR_TRUNC %two_s32(s32), %two_s32(s32)
    %snan:_(s16) = G_FCONSTANT half 0xH7C01
    %snan_s32:_(s32) = G_ANYEXT %snan(s16)
    %undef:_(s32) = G_IMPLICIT_DEF
    %snan_undef:_(<2 x s16>) = G_BUILD_VECTOR_TRUNC %snan_s32(s32), %undef(s32)
    %qnan:_(s16) = G_FCONSTANT half 0xH7E01
    %qnan_s32:_(s32) = G_ANYEXT %qnan(s16)
    %qnan_undef:_(<2 x s16>) = G_BUILD_VECTOR_TRUNC %qnan_s32(s32), %undef(s32)
    %4:_(<2 x s16>) = G_FMUL %0, %two_splat
    %snan_undef_fcan:_(<2 x s16>) = G_FCANONICALIZE %snan_undef
    %16:_(<2 x s16>) = G_FCANONICALIZE %4
    %8:_(<2 x s16>) = G_FMAXNUM_IEEE %snan_undef_fcan, %16
    %qnan_undef_fcan:_(<2 x s16>) = G_FCANONICALIZE %qnan_undef
    %14:_(<2 x s16>) = G_FCANONICALIZE %8
    %11:_(<2 x s16>) = G_FMINNUM_IEEE %qnan_undef_fcan, %14
    $vgpr0 = COPY %11(<2 x s16>)
...

---
name: test_fcanonicalize_log
tracksRegLiveness: true
legalized: true
body: |
  bb.0:
    liveins: $vgpr0

    ; CHECK-LABEL: name: test_fcanonicalize_log
    ; CHECK: liveins: $vgpr0
    ; CHECK-NEXT: {{  $}}
    ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
    ; CHECK-NEXT: [[INT:%[0-9]+]]:_(s32) = G_INTRINSIC intrinsic(@llvm.amdgcn.log), [[COPY]](s32)
    ; CHECK-NEXT: $vgpr0 = COPY [[INT]](s32)
    %0:_(s32) = COPY $vgpr0
    %1:_(s32) = G_INTRINSIC intrinsic(@llvm.amdgcn.log), %0
    %2:_(s32) = G_FCANONICALIZE %1
    $vgpr0 = COPY %2(s32)
...

---
name: test_fcanonicalize_exp2
tracksRegLiveness: true
legalized: true
body: |
  bb.0:
    liveins: $vgpr0

    ; CHECK-LABEL: name: test_fcanonicalize_exp2
    ; CHECK: liveins: $vgpr0
    ; CHECK-NEXT: {{  $}}
    ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
    ; CHECK-NEXT: [[INT:%[0-9]+]]:_(s32) = G_INTRINSIC intrinsic(@llvm.amdgcn.exp2), [[COPY]](s32)
    ; CHECK-NEXT: $vgpr0 = COPY [[INT]](s32)
    %0:_(s32) = COPY $vgpr0
    %1:_(s32) = G_INTRINSIC intrinsic(@llvm.amdgcn.exp2), %0
    %2:_(s32) = G_FCANONICALIZE %1
    $vgpr0 = COPY %2(s32)
...
llvm/llvm/test/CodeGen/AMDGPU/GlobalISel/combine-fcanonicalize.mir
