llvm/llvm/test/CodeGen/AMDGPU/sgpr-spills-empty-prolog-block.mir

# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 4
# RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx900 -verify-machineinstrs -run-pass=si-lower-sgpr-spills -o - %s | FileCheck %s

# Test that the si-lower-sgpr-spills pass does not defeference a
# machine instruction iterator that is equal to end().

---
name:            empty_prolog_block
stack:
  - { id: 0, name: '', type: spill-slot, offset: 0, size: 32, alignment: 4,
      stack-id: sgpr-spill, callee-saved-register: '', callee-saved-restored: true,
      debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
machineFunctionInfo:
  hasSpilledSGPRs: true
body:             |
  ; CHECK-LABEL: name: empty_prolog_block
  ; CHECK: bb.0:
  ; CHECK-NEXT:   successors: %bb.1(0x80000000)
  ; CHECK-NEXT:   liveins: $sgpr0
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT: bb.1:
  ; CHECK-NEXT:   [[DEF:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF
  ; CHECK-NEXT:   $sgpr0 = SI_RESTORE_S32_FROM_VGPR [[DEF]], 0
  ; CHECK-NEXT:   S_ENDPGM 0
  bb.0:
    liveins: $sgpr0
  bb.1:
    renamable $sgpr0 = SI_SPILL_S32_RESTORE %stack.0, implicit $exec, implicit $sgpr32
    S_ENDPGM 0

...