llvm/llvm/test/CodeGen/AMDGPU/no-corresponding-integer-type.ll

; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx942 %s -o - | FileCheck %s

define void @no_corresponding_integer_type(i8 %arg, ptr addrspace(1) %ptr) {
; CHECK-LABEL: no_corresponding_integer_type:
; CHECK:       ; %bb.0: ; %entry
; CHECK-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; CHECK-NEXT:    v_mov_b32_e32 v3, v2
; CHECK-NEXT:    v_mov_b32_e32 v2, v1
; CHECK-NEXT:    global_load_ushort v1, v[2:3], off
; CHECK-NEXT:    global_load_ubyte v4, v[2:3], off offset:2
; CHECK-NEXT:    s_mov_b32 s0, 0xc0c0400
; CHECK-NEXT:    s_mov_b32 s1, 0xc0c0000
; CHECK-NEXT:    s_waitcnt vmcnt(0)
; CHECK-NEXT:    v_lshl_or_b32 v1, v4, 16, v1
; CHECK-NEXT:    v_perm_b32 v1, v0, v1, s0
; CHECK-NEXT:    v_perm_b32 v0, v0, v0, s1
; CHECK-NEXT:    v_dot4_u32_u8 v0, v0, v1, 1
; CHECK-NEXT:    s_nop 2
; CHECK-NEXT:    global_store_byte v[2:3], v0, off
; CHECK-NEXT:    s_waitcnt vmcnt(0)
; CHECK-NEXT:    s_setpc_b64 s[30:31]
entry:
  %load = load <3 x i8>, ptr addrspace(1) %ptr, align 1
  %elt0 = extractelement <3 x i8> %load, i64 0
  %mul0 = mul i8 %elt0, %arg
  %or = or i8 %mul0, 1
  %mul1 = mul i8 %arg, %arg
  %add = add i8 %mul1, %or
  store i8 %add, ptr addrspace(1) %ptr, align 1
  ret void
}