llvm/llvm/test/CodeGen/AArch64/pr86717.ll

; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 4
; RUN: llc < %s -mtriple=aarch64 | FileCheck %s

define <16 x i8> @f(i32 %0) {
; CHECK-LABEL: f:
; CHECK:       // %bb.0:
; CHECK-NEXT:    sub sp, sp, #16
; CHECK-NEXT:    .cfi_def_cfa_offset 16
; CHECK-NEXT:    movi v0.2d, #0000000000000000
; CHECK-NEXT:    mov w8, #1 // =0x1
; CHECK-NEXT:    mov x9, sp
; CHECK-NEXT:    sub w8, w8, w0
; CHECK-NEXT:    bfxil x9, x8, #0, #4
; CHECK-NEXT:    mov w8, #3 // =0x3
; CHECK-NEXT:    str q0, [sp]
; CHECK-NEXT:    strb w8, [x9]
; CHECK-NEXT:    ldr q0, [sp], #16
; CHECK-NEXT:    ret
  %2 = sub nuw i32 1, %0
  %3 = insertelement <16 x i8> zeroinitializer, i8 3, i32 %2
  ret <16 x i8> %3
}