llvm/llvm/test/CodeGen/AArch64/interleaved-load-combine-pr90695.ll

; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 4
; RUN: opt -S -passes=interleaved-load-combine < %s | FileCheck %s

target triple = "aarch64-unknown-windows-gnu"

; Make sure we don't crash on loads of vectors of non-byte-sized types.
define <4 x i1> @test(ptr %p) {
; CHECK-LABEL: define <4 x i1> @test(
; CHECK-SAME: ptr [[P:%.*]]) {
; CHECK-NEXT:  entry:
; CHECK-NEXT:    [[LOAD:%.*]] = load <2 x i1>, ptr [[P]], align 1
; CHECK-NEXT:    [[SHUF:%.*]] = shufflevector <2 x i1> [[LOAD]], <2 x i1> zeroinitializer, <4 x i32> <i32 0, i32 1, i32 2, i32 2>
; CHECK-NEXT:    ret <4 x i1> [[SHUF]]
;
entry:
  %load = load <2 x i1>, ptr %p, align 1
  %shuf = shufflevector <2 x i1> %load, <2 x i1> zeroinitializer, <4 x i32> <i32 0, i32 1, i32 2, i32 2>
  ret <4 x i1> %shuf
}