; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 5
; RUN: opt < %s -aarch64-stack-tagging -S -o - | FileCheck %s
target datalayout = "e-m:e-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128"
target triple = "aarch64--linux-android"
declare void @use(ptr)
declare void @llvm.lifetime.start.p0(i64, ptr nocapture)
declare void @llvm.lifetime.end.p0(i64, ptr nocapture)
declare void @llvm.memset.p0.i64(ptr nocapture writeonly, i8, i64, i1 immarg)
define void @OneVarNoInit() sanitize_memtag {
; CHECK-LABEL: define void @OneVarNoInit(
; CHECK-SAME: ) #[[ATTR2:[0-9]+]] {
; CHECK-NEXT: [[ENTRY:.*:]]
; CHECK-NEXT: [[BASETAG:%.*]] = call ptr @llvm.aarch64.irg.sp(i64 0)
; CHECK-NEXT: [[X:%.*]] = alloca { i32, [12 x i8] }, align 16
; CHECK-NEXT: [[TX:%.*]] = call ptr @llvm.aarch64.tagp.p0(ptr [[X]], ptr [[BASETAG]], i64 0)
; CHECK-NEXT: call void @llvm.lifetime.start.p0(i64 4, ptr nonnull [[X]])
; CHECK-NEXT: call void @llvm.aarch64.settag(ptr [[TX]], i64 16)
; CHECK-NEXT: call void @use(ptr nonnull [[TX]])
; CHECK-NEXT: call void @llvm.aarch64.settag(ptr [[X]], i64 16)
; CHECK-NEXT: call void @llvm.lifetime.end.p0(i64 4, ptr nonnull [[X]])
; CHECK-NEXT: ret void
;
entry:
%x = alloca i32, align 4
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %x)
call void @use(ptr nonnull %x)
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %x)
ret void
}
define void @OneVarInitConst() sanitize_memtag {
; CHECK-LABEL: define void @OneVarInitConst(
; CHECK-SAME: ) #[[ATTR2]] {
; CHECK-NEXT: [[ENTRY:.*:]]
; CHECK-NEXT: [[BASETAG:%.*]] = call ptr @llvm.aarch64.irg.sp(i64 0)
; CHECK-NEXT: [[X:%.*]] = alloca { i32, [12 x i8] }, align 16
; CHECK-NEXT: [[TX:%.*]] = call ptr @llvm.aarch64.tagp.p0(ptr [[X]], ptr [[BASETAG]], i64 0)
; CHECK-NEXT: call void @llvm.lifetime.start.p0(i64 4, ptr nonnull [[X]])
; CHECK-NEXT: call void @llvm.aarch64.stgp(ptr [[TX]], i64 42, i64 0)
; CHECK-NEXT: call void @use(ptr nonnull [[TX]])
; CHECK-NEXT: call void @llvm.aarch64.settag(ptr [[X]], i64 16)
; CHECK-NEXT: call void @llvm.lifetime.end.p0(i64 4, ptr nonnull [[X]])
; CHECK-NEXT: ret void
;
entry:
%x = alloca i32, align 4
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %x)
store i32 42, ptr %x, align 4
call void @use(ptr nonnull %x)
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %x)
ret void
}
; Untagging before lifetime.end:
define void @ArrayInitConst() sanitize_memtag {
; CHECK-LABEL: define void @ArrayInitConst(
; CHECK-SAME: ) #[[ATTR2]] {
; CHECK-NEXT: [[ENTRY:.*:]]
; CHECK-NEXT: [[BASETAG:%.*]] = call ptr @llvm.aarch64.irg.sp(i64 0)
; CHECK-NEXT: [[X:%.*]] = alloca i32, i32 16, align 16
; CHECK-NEXT: [[TX:%.*]] = call ptr @llvm.aarch64.tagp.p0(ptr [[X]], ptr [[BASETAG]], i64 0)
; CHECK-NEXT: call void @llvm.lifetime.start.p0(i64 64, ptr nonnull [[X]])
; CHECK-NEXT: call void @llvm.aarch64.stgp(ptr [[TX]], i64 42, i64 0)
; CHECK-NEXT: [[TX8_16:%.*]] = getelementptr i8, ptr [[TX]], i32 16
; CHECK-NEXT: call void @llvm.aarch64.settag.zero(ptr [[TX8_16]], i64 48)
; CHECK-NEXT: call void @use(ptr nonnull [[TX]])
; CHECK-NEXT: call void @llvm.aarch64.settag(ptr [[X]], i64 64)
; CHECK-NEXT: call void @llvm.lifetime.end.p0(i64 64, ptr nonnull [[X]])
; CHECK-NEXT: ret void
;
entry:
%x = alloca i32, i32 16, align 4
call void @llvm.lifetime.start.p0(i64 64, ptr nonnull %x)
store i32 42, ptr %x, align 4
call void @use(ptr nonnull %x)
call void @llvm.lifetime.end.p0(i64 64, ptr nonnull %x)
ret void
}
define void @ArrayInitConst2() sanitize_memtag {
; CHECK-LABEL: define void @ArrayInitConst2(
; CHECK-SAME: ) #[[ATTR2]] {
; CHECK-NEXT: [[ENTRY:.*:]]
; CHECK-NEXT: [[BASETAG:%.*]] = call ptr @llvm.aarch64.irg.sp(i64 0)
; CHECK-NEXT: [[X:%.*]] = alloca i32, i32 16, align 16
; CHECK-NEXT: [[TX:%.*]] = call ptr @llvm.aarch64.tagp.p0(ptr [[X]], ptr [[BASETAG]], i64 0)
; CHECK-NEXT: call void @llvm.lifetime.start.p0(i64 64, ptr nonnull [[X]])
; CHECK-NEXT: [[TMP0:%.*]] = getelementptr i32, ptr [[TX]], i32 1
; CHECK-NEXT: [[TMP1:%.*]] = getelementptr i32, ptr [[TX]], i32 2
; CHECK-NEXT: call void @llvm.aarch64.stgp(ptr [[TX]], i64 184683593770, i64 -1)
; CHECK-NEXT: [[TX8_16:%.*]] = getelementptr i8, ptr [[TX]], i32 16
; CHECK-NEXT: call void @llvm.aarch64.settag.zero(ptr [[TX8_16]], i64 48)
; CHECK-NEXT: call void @use(ptr nonnull [[TX]])
; CHECK-NEXT: call void @llvm.aarch64.settag(ptr [[X]], i64 64)
; CHECK-NEXT: call void @llvm.lifetime.end.p0(i64 64, ptr nonnull [[X]])
; CHECK-NEXT: ret void
;
entry:
%x = alloca i32, i32 16, align 4
call void @llvm.lifetime.start.p0(i64 64, ptr nonnull %x)
store i32 42, ptr %x, align 4
%0 = getelementptr i32, ptr %x, i32 1
store i32 43, ptr %0, align 4
%1 = getelementptr i32, ptr %x, i32 2
store i64 -1, ptr %1, align 4
call void @use(ptr nonnull %x)
call void @llvm.lifetime.end.p0(i64 64, ptr nonnull %x)
ret void
}
define void @ArrayInitConstSplit() sanitize_memtag {
; CHECK-LABEL: define void @ArrayInitConstSplit(
; CHECK-SAME: ) #[[ATTR2]] {
; CHECK-NEXT: [[ENTRY:.*:]]
; CHECK-NEXT: [[BASETAG:%.*]] = call ptr @llvm.aarch64.irg.sp(i64 0)
; CHECK-NEXT: [[X:%.*]] = alloca i32, i32 16, align 16
; CHECK-NEXT: [[TX:%.*]] = call ptr @llvm.aarch64.tagp.p0(ptr [[X]], ptr [[BASETAG]], i64 0)
; CHECK-NEXT: call void @llvm.lifetime.start.p0(i64 64, ptr nonnull [[X]])
; CHECK-NEXT: [[TMP0:%.*]] = getelementptr i32, ptr [[TX]], i32 1
; CHECK-NEXT: call void @llvm.aarch64.stgp(ptr [[TX]], i64 -4294967296, i64 4294967295)
; CHECK-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TX]], i32 16
; CHECK-NEXT: call void @llvm.aarch64.settag.zero(ptr [[TMP1]], i64 48)
; CHECK-NEXT: call void @use(ptr nonnull [[TX]])
; CHECK-NEXT: call void @llvm.aarch64.settag(ptr [[X]], i64 64)
; CHECK-NEXT: call void @llvm.lifetime.end.p0(i64 64, ptr nonnull [[X]])
; CHECK-NEXT: ret void
;
entry:
%x = alloca i32, i32 16, align 4
call void @llvm.lifetime.start.p0(i64 64, ptr nonnull %x)
%0 = getelementptr i32, ptr %x, i32 1
store i64 -1, ptr %0, align 4
call void @use(ptr nonnull %x)
call void @llvm.lifetime.end.p0(i64 64, ptr nonnull %x)
ret void
}
define void @ArrayInitConstWithHoles() sanitize_memtag {
; CHECK-LABEL: define void @ArrayInitConstWithHoles(
; CHECK-SAME: ) #[[ATTR2]] {
; CHECK-NEXT: [[ENTRY:.*:]]
; CHECK-NEXT: [[BASETAG:%.*]] = call ptr @llvm.aarch64.irg.sp(i64 0)
; CHECK-NEXT: [[X:%.*]] = alloca i32, i32 32, align 16
; CHECK-NEXT: [[TX:%.*]] = call ptr @llvm.aarch64.tagp.p0(ptr [[X]], ptr [[BASETAG]], i64 0)
; CHECK-NEXT: call void @llvm.lifetime.start.p0(i64 128, ptr nonnull [[X]])
; CHECK-NEXT: [[TMP0:%.*]] = getelementptr i32, ptr [[TX]], i32 5
; CHECK-NEXT: [[TMP1:%.*]] = getelementptr i32, ptr [[TX]], i32 14
; CHECK-NEXT: call void @llvm.aarch64.settag.zero(ptr [[TX]], i64 16)
; CHECK-NEXT: [[TX8_16:%.*]] = getelementptr i8, ptr [[TX]], i32 16
; CHECK-NEXT: call void @llvm.aarch64.stgp(ptr [[TX8_16]], i64 180388626432, i64 0)
; CHECK-NEXT: [[TX8_32:%.*]] = getelementptr i8, ptr [[TX]], i32 32
; CHECK-NEXT: call void @llvm.aarch64.settag.zero(ptr [[TX8_32]], i64 16)
; CHECK-NEXT: [[TX8_48:%.*]] = getelementptr i8, ptr [[TX]], i32 48
; CHECK-NEXT: call void @llvm.aarch64.stgp(ptr [[TX8_48]], i64 0, i64 43)
; CHECK-NEXT: [[TX8_64:%.*]] = getelementptr i8, ptr [[TX]], i32 64
; CHECK-NEXT: call void @llvm.aarch64.settag.zero(ptr [[TX8_64]], i64 64)
; CHECK-NEXT: call void @use(ptr nonnull [[TX]])
; CHECK-NEXT: call void @llvm.aarch64.settag(ptr [[X]], i64 128)
; CHECK-NEXT: call void @llvm.lifetime.end.p0(i64 128, ptr nonnull [[X]])
; CHECK-NEXT: ret void
;
entry:
%x = alloca i32, i32 32, align 4
call void @llvm.lifetime.start.p0(i64 128, ptr nonnull %x)
%0 = getelementptr i32, ptr %x, i32 5
store i32 42, ptr %0, align 4
%1 = getelementptr i32, ptr %x, i32 14
store i32 43, ptr %1, align 4
call void @use(ptr nonnull %x)
call void @llvm.lifetime.end.p0(i64 128, ptr nonnull %x)
ret void
}
define void @InitNonConst(i32 %v) sanitize_memtag {
; CHECK-LABEL: define void @InitNonConst(
; CHECK-SAME: i32 [[V:%.*]]) #[[ATTR2]] {
; CHECK-NEXT: [[ENTRY:.*:]]
; CHECK-NEXT: [[BASETAG:%.*]] = call ptr @llvm.aarch64.irg.sp(i64 0)
; CHECK-NEXT: [[X:%.*]] = alloca { i32, [12 x i8] }, align 16
; CHECK-NEXT: [[X_TAG:%.*]] = call ptr @llvm.aarch64.tagp.p0(ptr [[X]], ptr [[BASETAG]], i64 0)
; CHECK-NEXT: call void @llvm.lifetime.start.p0(i64 4, ptr nonnull [[X]])
; CHECK-NEXT: [[TMP0:%.*]] = zext i32 [[V]] to i64
; CHECK-NEXT: call void @llvm.aarch64.stgp(ptr [[X_TAG]], i64 [[TMP0]], i64 0)
; CHECK-NEXT: call void @use(ptr nonnull [[X_TAG]])
; CHECK-NEXT: call void @llvm.aarch64.settag(ptr [[X]], i64 16)
; CHECK-NEXT: call void @llvm.lifetime.end.p0(i64 4, ptr nonnull [[X]])
; CHECK-NEXT: ret void
;
entry:
%x = alloca i32, align 4
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %x)
store i32 %v, ptr %x, align 4
call void @use(ptr nonnull %x)
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %x)
ret void
}
define void @InitNonConst2(i32 %v, i32 %w) sanitize_memtag {
; CHECK-LABEL: define void @InitNonConst2(
; CHECK-SAME: i32 [[V:%.*]], i32 [[W:%.*]]) #[[ATTR2]] {
; CHECK-NEXT: [[ENTRY:.*:]]
; CHECK-NEXT: [[BASETAG:%.*]] = call ptr @llvm.aarch64.irg.sp(i64 0)
; CHECK-NEXT: [[X:%.*]] = alloca i32, i32 4, align 16
; CHECK-NEXT: [[TX:%.*]] = call ptr @llvm.aarch64.tagp.p0(ptr [[X]], ptr [[BASETAG]], i64 0)
; CHECK-NEXT: call void @llvm.lifetime.start.p0(i64 16, ptr nonnull [[X]])
; CHECK-NEXT: [[TMP0:%.*]] = zext i32 [[V]] to i64
; CHECK-NEXT: [[TMP1:%.*]] = getelementptr i32, ptr [[TX]], i32 1
; CHECK-NEXT: [[TMP2:%.*]] = zext i32 [[W]] to i64
; CHECK-NEXT: [[TMP3:%.*]] = shl i64 [[TMP2]], 32
; CHECK-NEXT: [[VW:%.*]] = or i64 [[TMP0]], [[TMP3]]
; CHECK-NEXT: call void @llvm.aarch64.stgp(ptr [[TX]], i64 [[VW]], i64 0)
; CHECK-NEXT: call void @use(ptr nonnull [[TX]])
; CHECK-NEXT: call void @llvm.aarch64.settag(ptr [[X]], i64 16)
; CHECK-NEXT: call void @llvm.lifetime.end.p0(i64 16, ptr nonnull [[X]])
; CHECK-NEXT: ret void
;
entry:
%x = alloca i32, i32 4, align 4
call void @llvm.lifetime.start.p0(i64 16, ptr nonnull %x)
store i32 %v, ptr %x, align 4
%0 = getelementptr i32, ptr %x, i32 1
store i32 %w, ptr %0, align 4
call void @use(ptr nonnull %x)
call void @llvm.lifetime.end.p0(i64 16, ptr nonnull %x)
ret void
}
define void @InitVector() sanitize_memtag {
; CHECK-LABEL: define void @InitVector(
; CHECK-SAME: ) #[[ATTR2]] {
; CHECK-NEXT: [[ENTRY:.*:]]
; CHECK-NEXT: [[BASETAG:%.*]] = call ptr @llvm.aarch64.irg.sp(i64 0)
; CHECK-NEXT: [[X:%.*]] = alloca i32, i32 4, align 16
; CHECK-NEXT: [[TX:%.*]] = call ptr @llvm.aarch64.tagp.p0(ptr [[X]], ptr [[BASETAG]], i64 0)
; CHECK-NEXT: call void @llvm.lifetime.start.p0(i64 16, ptr nonnull [[X]])
; CHECK-NEXT: call void @llvm.aarch64.stgp(ptr [[TX]], i64 bitcast (<2 x i32> <i32 1, i32 2> to i64), i64 0)
; CHECK-NEXT: call void @use(ptr nonnull [[TX]])
; CHECK-NEXT: call void @llvm.aarch64.settag(ptr [[X]], i64 16)
; CHECK-NEXT: call void @llvm.lifetime.end.p0(i64 16, ptr nonnull [[X]])
; CHECK-NEXT: ret void
;
entry:
%x = alloca i32, i32 4, align 4
call void @llvm.lifetime.start.p0(i64 16, ptr nonnull %x)
store <2 x i32> <i32 1, i32 2>, ptr %x, align 4
call void @use(ptr nonnull %x)
call void @llvm.lifetime.end.p0(i64 16, ptr nonnull %x)
ret void
}
define void @InitVectorPtr(ptr %p) sanitize_memtag {
; CHECK-LABEL: define void @InitVectorPtr(
; CHECK-SAME: ptr [[P:%.*]]) #[[ATTR2]] {
; CHECK-NEXT: [[ENTRY:.*:]]
; CHECK-NEXT: [[BASETAG:%.*]] = call ptr @llvm.aarch64.irg.sp(i64 0)
; CHECK-NEXT: [[S:%.*]] = alloca <4 x ptr>, align 16
; CHECK-NEXT: [[S_TAG:%.*]] = call ptr @llvm.aarch64.tagp.p0(ptr [[S]], ptr [[BASETAG]], i64 0)
; CHECK-NEXT: [[V0:%.*]] = insertelement <4 x ptr> undef, ptr [[P]], i32 0
; CHECK-NEXT: [[V1:%.*]] = shufflevector <4 x ptr> [[V0]], <4 x ptr> undef, <4 x i32> zeroinitializer
; CHECK-NEXT: [[V2:%.*]] = ptrtoint <4 x ptr> [[V1]] to <4 x i64>
; CHECK-NEXT: [[V3:%.*]] = bitcast <4 x i64> [[V2]] to i256
; CHECK-NEXT: [[A1:%.*]] = trunc i256 [[V3]] to i64
; CHECK-NEXT: [[A2_:%.*]] = lshr i256 [[V3]], 64
; CHECK-NEXT: [[A2:%.*]] = trunc i256 [[A2_]] to i64
; CHECK-NEXT: [[A3_:%.*]] = lshr i256 [[V3]], 128
; CHECK-NEXT: [[A3:%.*]] = trunc i256 [[A3_]] to i64
; CHECK-NEXT: [[A4_:%.*]] = lshr i256 [[V3]], 192
; CHECK-NEXT: [[A4:%.*]] = trunc i256 [[A4_]] to i64
; CHECK-NEXT: call void @llvm.aarch64.stgp(ptr [[S_TAG]], i64 [[A1]], i64 [[A2]])
; CHECK-NEXT: [[TMP9:%.*]] = getelementptr i8, ptr [[S_TAG]], i32 16
; CHECK-NEXT: call void @llvm.aarch64.stgp(ptr [[TMP9]], i64 [[A3]], i64 [[A4]])
; CHECK-NEXT: call void @use(ptr nonnull [[S_TAG]])
; CHECK-NEXT: call void @llvm.aarch64.settag(ptr [[S]], i64 32)
; CHECK-NEXT: ret void
;
entry:
%s = alloca <4 x ptr>, align 8
%v0 = insertelement <4 x ptr> undef, ptr %p, i32 0
%v1 = shufflevector <4 x ptr> %v0, <4 x ptr> undef, <4 x i32> zeroinitializer
store <4 x ptr> %v1, ptr %s
call void @use(ptr nonnull %s)
ret void
}
define void @InitVectorSplit() sanitize_memtag {
; CHECK-LABEL: define void @InitVectorSplit(
; CHECK-SAME: ) #[[ATTR2]] {
; CHECK-NEXT: [[ENTRY:.*:]]
; CHECK-NEXT: [[BASETAG:%.*]] = call ptr @llvm.aarch64.irg.sp(i64 0)
; CHECK-NEXT: [[X:%.*]] = alloca i32, i32 4, align 16
; CHECK-NEXT: [[TX:%.*]] = call ptr @llvm.aarch64.tagp.p0(ptr [[X]], ptr [[BASETAG]], i64 0)
; CHECK-NEXT: call void @llvm.lifetime.start.p0(i64 16, ptr nonnull [[X]])
; CHECK-NEXT: [[TMP0:%.*]] = getelementptr i32, ptr [[TX]], i32 1
; CHECK-NEXT: [[TMP1:%.*]] = shl i64 bitcast (<2 x i32> <i32 1, i32 2> to i64), 32
; CHECK-NEXT: [[LSHR:%.*]] = lshr i64 bitcast (<2 x i32> <i32 1, i32 2> to i64), 32
; CHECK-NEXT: call void @llvm.aarch64.stgp(ptr [[TX]], i64 [[TMP1]], i64 [[LSHR]])
; CHECK-NEXT: call void @use(ptr nonnull [[TX]])
; CHECK-NEXT: call void @llvm.aarch64.settag(ptr [[X]], i64 16)
; CHECK-NEXT: call void @llvm.lifetime.end.p0(i64 16, ptr nonnull [[X]])
; CHECK-NEXT: ret void
;
entry:
%x = alloca i32, i32 4, align 4
call void @llvm.lifetime.start.p0(i64 16, ptr nonnull %x)
%0 = getelementptr i32, ptr %x, i32 1
store <2 x i32> <i32 1, i32 2>, ptr %0, align 4
call void @use(ptr nonnull %x)
call void @llvm.lifetime.end.p0(i64 16, ptr nonnull %x)
ret void
}
define void @MemSetZero() sanitize_memtag {
; CHECK-LABEL: define void @MemSetZero(
; CHECK-SAME: ) #[[ATTR2]] {
; CHECK-NEXT: [[ENTRY:.*:]]
; CHECK-NEXT: [[BASETAG:%.*]] = call ptr @llvm.aarch64.irg.sp(i64 0)
; CHECK-NEXT: [[X:%.*]] = alloca i32, i32 8, align 16
; CHECK-NEXT: [[TX:%.*]] = call ptr @llvm.aarch64.tagp.p0(ptr [[X]], ptr [[BASETAG]], i64 0)
; CHECK-NEXT: call void @llvm.aarch64.settag.zero(ptr [[TX]], i64 32)
; CHECK-NEXT: call void @use(ptr nonnull [[TX]])
; CHECK-NEXT: call void @llvm.aarch64.settag(ptr [[X]], i64 32)
; CHECK-NEXT: ret void
;
entry:
%x = alloca i32, i32 8, align 16
call void @llvm.memset.p0.i64(ptr nonnull align 16 %x, i8 0, i64 32, i1 false)
call void @use(ptr nonnull %x)
ret void
}
define void @MemSetNonZero() sanitize_memtag {
; CHECK-LABEL: define void @MemSetNonZero(
; CHECK-SAME: ) #[[ATTR2]] {
; CHECK-NEXT: [[ENTRY:.*:]]
; CHECK-NEXT: [[BASETAG:%.*]] = call ptr @llvm.aarch64.irg.sp(i64 0)
; CHECK-NEXT: [[X:%.*]] = alloca i32, i32 8, align 16
; CHECK-NEXT: [[X_TAG:%.*]] = call ptr @llvm.aarch64.tagp.p0(ptr [[X]], ptr [[BASETAG]], i64 0)
; CHECK-NEXT: call void @llvm.aarch64.stgp(ptr [[X_TAG]], i64 3038287259199220266, i64 3038287259199220266)
; CHECK-NEXT: [[TMP0:%.*]] = getelementptr i8, ptr [[X_TAG]], i32 16
; CHECK-NEXT: call void @llvm.aarch64.stgp(ptr [[TMP0]], i64 3038287259199220266, i64 3038287259199220266)
; CHECK-NEXT: call void @use(ptr nonnull [[X_TAG]])
; CHECK-NEXT: call void @llvm.aarch64.settag(ptr [[X]], i64 32)
; CHECK-NEXT: ret void
;
entry:
%x = alloca i32, i32 8, align 16
call void @llvm.memset.p0.i64(ptr nonnull align 16 %x, i8 42, i64 32, i1 false)
call void @use(ptr nonnull %x)
ret void
}
define void @MemSetNonZero2() sanitize_memtag {
; CHECK-LABEL: define void @MemSetNonZero2(
; CHECK-SAME: ) #[[ATTR2]] {
; CHECK-NEXT: [[ENTRY:.*:]]
; CHECK-NEXT: [[BASETAG:%.*]] = call ptr @llvm.aarch64.irg.sp(i64 0)
; CHECK-NEXT: [[X:%.*]] = alloca [32 x i8], align 16
; CHECK-NEXT: [[X_TAG:%.*]] = call ptr @llvm.aarch64.tagp.p0(ptr [[X]], ptr [[BASETAG]], i64 0)
; CHECK-NEXT: [[TMP0:%.*]] = getelementptr inbounds [32 x i8], ptr [[X_TAG]], i64 0, i64 2
; CHECK-NEXT: call void @llvm.aarch64.stgp(ptr [[X_TAG]], i64 3038287259199209472, i64 3038287259199220266)
; CHECK-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[X_TAG]], i32 16
; CHECK-NEXT: call void @llvm.aarch64.stgp(ptr [[TMP1]], i64 3038287259199220266, i64 46360584399402)
; CHECK-NEXT: call void @use(ptr nonnull [[TMP0]])
; CHECK-NEXT: call void @llvm.aarch64.settag(ptr [[X]], i64 32)
; CHECK-NEXT: ret void
;
entry:
%x = alloca [32 x i8], align 16
%0 = getelementptr inbounds [32 x i8], ptr %x, i64 0, i64 2
call void @llvm.memset.p0.i64(ptr nonnull %0, i8 42, i64 28, i1 false)
call void @use(ptr nonnull %0)
ret void
}
define void @MemSetNonZero3() sanitize_memtag {
; CHECK-LABEL: define void @MemSetNonZero3(
; CHECK-SAME: ) #[[ATTR2]] {
; CHECK-NEXT: [[ENTRY:.*:]]
; CHECK-NEXT: [[BASETAG:%.*]] = call ptr @llvm.aarch64.irg.sp(i64 0)
; CHECK-NEXT: [[X:%.*]] = alloca [32 x i8], align 16
; CHECK-NEXT: [[X_TAG:%.*]] = call ptr @llvm.aarch64.tagp.p0(ptr [[X]], ptr [[BASETAG]], i64 0)
; CHECK-NEXT: [[TMP0:%.*]] = getelementptr inbounds [32 x i8], ptr [[X_TAG]], i64 0, i64 2
; CHECK-NEXT: [[TMP1:%.*]] = getelementptr inbounds [32 x i8], ptr [[X_TAG]], i64 0, i64 24
; CHECK-NEXT: call void @llvm.aarch64.stgp(ptr [[X_TAG]], i64 46360584388608, i64 0)
; CHECK-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[X_TAG]], i32 16
; CHECK-NEXT: call void @llvm.aarch64.stgp(ptr [[TMP2]], i64 0, i64 3038287259199220266)
; CHECK-NEXT: call void @use(ptr nonnull [[TMP0]])
; CHECK-NEXT: call void @llvm.aarch64.settag(ptr [[X]], i64 32)
; CHECK-NEXT: ret void
;
entry:
%x = alloca [32 x i8], align 16
%0 = getelementptr inbounds [32 x i8], ptr %x, i64 0, i64 2
call void @llvm.memset.p0.i64(ptr nonnull %0, i8 42, i64 4, i1 false)
%1 = getelementptr inbounds [32 x i8], ptr %x, i64 0, i64 24
call void @llvm.memset.p0.i64(ptr nonnull %1, i8 42, i64 8, i1 false)
call void @use(ptr nonnull %0)
ret void
}
define void @LargeAlloca() sanitize_memtag {
; CHECK-LABEL: define void @LargeAlloca(
; CHECK-SAME: ) #[[ATTR2]] {
; CHECK-NEXT: [[ENTRY:.*:]]
; CHECK-NEXT: [[BASETAG:%.*]] = call ptr @llvm.aarch64.irg.sp(i64 0)
; CHECK-NEXT: [[X:%.*]] = alloca i32, i32 256, align 16
; CHECK-NEXT: [[X_TAG:%.*]] = call ptr @llvm.aarch64.tagp.p0(ptr [[X]], ptr [[BASETAG]], i64 0)
; CHECK-NEXT: call void @llvm.aarch64.settag(ptr [[X_TAG]], i64 1024)
; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr nonnull align 16 [[X_TAG]], i8 42, i64 256, i1 false)
; CHECK-NEXT: call void @use(ptr nonnull [[X_TAG]])
; CHECK-NEXT: call void @llvm.aarch64.settag(ptr [[X]], i64 1024)
; CHECK-NEXT: ret void
;
entry:
%x = alloca i32, i32 256, align 16
call void @llvm.memset.p0.i64(ptr nonnull align 16 %x, i8 42, i64 256, i1 false)
call void @use(ptr nonnull %x)
ret void
}
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