llvm/llvm/test/CodeGen/LoongArch/lsx/intrinsic-extl.ll

; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc --mtriple=loongarch64 --mattr=+lsx < %s | FileCheck %s

declare <2 x i64> @llvm.loongarch.lsx.vextl.q.d(<2 x i64>)

define <2 x i64> @lsx_vextl_q_d(<2 x i64> %va) nounwind {
; CHECK-LABEL: lsx_vextl_q_d:
; CHECK:       # %bb.0: # %entry
; CHECK-NEXT:    vextl.q.d $vr0, $vr0
; CHECK-NEXT:    ret
entry:
  %res = call <2 x i64> @llvm.loongarch.lsx.vextl.q.d(<2 x i64> %va)
  ret <2 x i64> %res
}

declare <2 x i64> @llvm.loongarch.lsx.vextl.qu.du(<2 x i64>)

define <2 x i64> @lsx_vextl_qu_du(<2 x i64> %va) nounwind {
; CHECK-LABEL: lsx_vextl_qu_du:
; CHECK:       # %bb.0: # %entry
; CHECK-NEXT:    vextl.qu.du $vr0, $vr0
; CHECK-NEXT:    ret
entry:
  %res = call <2 x i64> @llvm.loongarch.lsx.vextl.qu.du(<2 x i64> %va)
  ret <2 x i64> %res
}