# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
# RUN: llc -mtriple=riscv32 -mattr=+f -run-pass=instruction-select -simplify-mir -verify-machineinstrs %s -o - \
# RUN: | FileCheck -check-prefix=RV32F %s
---
name: implicit_def_gpr
legalized: true
regBankSelected: true
body: |
bb.0:
; RV32F-LABEL: name: implicit_def_gpr
; RV32F: [[DEF:%[0-9]+]]:gpr = IMPLICIT_DEF
; RV32F-NEXT: [[ADD:%[0-9]+]]:gpr = ADD [[DEF]], [[DEF]]
; RV32F-NEXT: $x10 = COPY [[ADD]]
%0:gprb(s32) = G_IMPLICIT_DEF
%1:gprb(s32) = G_ADD %0, %0
$x10 = COPY %1(s32)
...
---
name: implicit_def_copy_gpr
legalized: true
regBankSelected: true
body: |
bb.0:
; RV32F-LABEL: name: implicit_def_copy_gpr
; RV32F: [[DEF:%[0-9]+]]:gpr = IMPLICIT_DEF
; RV32F-NEXT: $x10 = COPY [[DEF]]
%0:gprb(s32) = G_IMPLICIT_DEF
%1:gprb(s32) = COPY %0(s32)
$x10 = COPY %1(s32)
...
---
name: implicit_def_fpr
legalized: true
regBankSelected: true
body: |
bb.0:
; RV32F-LABEL: name: implicit_def_fpr
; RV32F: [[DEF:%[0-9]+]]:fpr32 = IMPLICIT_DEF
; RV32F-NEXT: [[FADD_S:%[0-9]+]]:fpr32 = nofpexcept FADD_S [[DEF]], [[DEF]], 7
; RV32F-NEXT: $f10_f = COPY [[FADD_S]]
%0:fprb(s32) = G_IMPLICIT_DEF
%1:fprb(s32) = G_FADD %0, %0
$f10_f = COPY %1(s32)
...
---
name: implicit_def_copy_fpr
legalized: true
regBankSelected: true
body: |
bb.0:
; RV32F-LABEL: name: implicit_def_copy_fpr
; RV32F: [[DEF:%[0-9]+]]:fpr32 = IMPLICIT_DEF
; RV32F-NEXT: $f10_f = COPY [[DEF]]
%0:fprb(s32) = G_IMPLICIT_DEF
%1:fprb(s32) = COPY %0(s32)
$f10_f = COPY %1(s32)
...