llvm/llvm/test/CodeGen/RISCV/GlobalISel/instruction-select/constant64.mir

# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
# RUN: llc -mtriple=riscv64 -run-pass=instruction-select %s -o - \
# RUN: | FileCheck %s
---
name:            const_i64_INT_MIN
legalized:       true
regBankSelected: true
tracksRegLiveness: true
body:            |
  bb.0:
    liveins: $x10

    ; CHECK-LABEL: name: const_i64_INT_MIN
    ; CHECK: liveins: $x10
    ; CHECK-NEXT: {{  $}}
    ; CHECK-NEXT: [[ADDI:%[0-9]+]]:gpr = ADDI $x0, -1
    ; CHECK-NEXT: [[SLLI:%[0-9]+]]:gpr = SLLI [[ADDI]], 63
    ; CHECK-NEXT: $x10 = COPY [[SLLI]]
    ; CHECK-NEXT: PseudoRET implicit $x10
    %0:gprb(s64) = G_CONSTANT i64 -9223372036854775808
    $x10 = COPY %0(s64)
    PseudoRET implicit $x10

...
---
name:            const_i64_neg_9223372036854775000
legalized:       true
regBankSelected: true
tracksRegLiveness: true
body:            |
  bb.0:
    liveins: $x10

    ; CHECK-LABEL: name: const_i64_neg_9223372036854775000
    ; CHECK: liveins: $x10
    ; CHECK-NEXT: {{  $}}
    ; CHECK-NEXT: [[ADDI:%[0-9]+]]:gpr = ADDI $x0, -1
    ; CHECK-NEXT: [[SLLI:%[0-9]+]]:gpr = SLLI [[ADDI]], 63
    ; CHECK-NEXT: [[ADDI1:%[0-9]+]]:gpr = ADDI [[SLLI]], 808
    ; CHECK-NEXT: $x10 = COPY [[ADDI1]]
    ; CHECK-NEXT: PseudoRET implicit $x10
    %0:gprb(s64) = G_CONSTANT i64 -9223372036854775000
    $x10 = COPY %0(s64)
    PseudoRET implicit $x10

...
---
name:            const_i64_INT_MAX
legalized:       true
regBankSelected: true
tracksRegLiveness: true
body:            |
  bb.0:
    liveins: $x10

    ; CHECK-LABEL: name: const_i64_INT_MAX
    ; CHECK: liveins: $x10
    ; CHECK-NEXT: {{  $}}
    ; CHECK-NEXT: [[ADDI:%[0-9]+]]:gpr = ADDI $x0, -1
    ; CHECK-NEXT: [[SRLI:%[0-9]+]]:gpr = SRLI [[ADDI]], 1
    ; CHECK-NEXT: $x10 = COPY [[SRLI]]
    ; CHECK-NEXT: PseudoRET implicit $x10
    %0:gprb(s64) = G_CONSTANT i64 9223372036854775807
    $x10 = COPY %0(s64)
    PseudoRET implicit $x10

...
---
name:            const_i64_9223372036854775000
legalized:       true
regBankSelected: true
tracksRegLiveness: true
body:            |
  bb.0:
    liveins: $x10

    ; CHECK-LABEL: name: const_i64_9223372036854775000
    ; CHECK: liveins: $x10
    ; CHECK-NEXT: {{  $}}
    ; CHECK-NEXT: [[ADDI:%[0-9]+]]:gpr = ADDI $x0, -1615
    ; CHECK-NEXT: [[SRLI:%[0-9]+]]:gpr = SRLI [[ADDI]], 1
    ; CHECK-NEXT: $x10 = COPY [[SRLI]]
    ; CHECK-NEXT: PseudoRET implicit $x10
    %0:gprb(s64) = G_CONSTANT i64 9223372036854775000
    $x10 = COPY %0(s64)
    PseudoRET implicit $x10

...
---
name:            const_i64_256
legalized:       true
regBankSelected: true
tracksRegLiveness: true
body:            |
  bb.0:
    liveins: $x10

    ; CHECK-LABEL: name: const_i64_256
    ; CHECK: liveins: $x10
    ; CHECK-NEXT: {{  $}}
    ; CHECK-NEXT: [[ADDI:%[0-9]+]]:gpr = ADDI $x0, 256
    ; CHECK-NEXT: $x10 = COPY [[ADDI]]
    ; CHECK-NEXT: PseudoRET implicit $x10
    %0:gprb(s64) = G_CONSTANT i64 256
    $x10 = COPY %0(s64)
    PseudoRET implicit $x10

...
---
name:            const_i64_0
legalized:       true
regBankSelected: true
tracksRegLiveness: true
body:            |
  bb.0:
    liveins: $x10

    ; CHECK-LABEL: name: const_i64_0
    ; CHECK: liveins: $x10
    ; CHECK-NEXT: {{  $}}
    ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr = COPY $x0
    ; CHECK-NEXT: $x10 = COPY [[COPY]]
    ; CHECK-NEXT: PseudoRET implicit $x10
    %0:gprb(s64) = G_CONSTANT i64 0
    $x10 = COPY %0(s64)
    PseudoRET implicit $x10

...
---
name:            const_i32_INT_MIN
legalized:       true
regBankSelected: true
tracksRegLiveness: true
body:            |
  bb.0:
    liveins: $x10

    ; CHECK-LABEL: name: const_i32_INT_MIN
    ; CHECK: liveins: $x10
    ; CHECK-NEXT: {{  $}}
    ; CHECK-NEXT: [[LUI:%[0-9]+]]:gpr = LUI 524288
    ; CHECK-NEXT: $x10 = COPY [[LUI]]
    ; CHECK-NEXT: PseudoRET implicit $x10
    %0:gprb(s32) = G_CONSTANT i32 -2147483648
    %1:gprb(s64) = G_ANYEXT %0(s32)
    $x10 = COPY %1(s64)
    PseudoRET implicit $x10

...
---
name:            const_i32_neg_2147483000
legalized:       true
regBankSelected: true
tracksRegLiveness: true
body:            |
  bb.0:
    liveins: $x10

    ; CHECK-LABEL: name: const_i32_neg_2147483000
    ; CHECK: liveins: $x10
    ; CHECK-NEXT: {{  $}}
    ; CHECK-NEXT: [[LUI:%[0-9]+]]:gpr = LUI 524288
    ; CHECK-NEXT: [[ADDIW:%[0-9]+]]:gpr = ADDIW [[LUI]], 648
    ; CHECK-NEXT: $x10 = COPY [[ADDIW]]
    ; CHECK-NEXT: PseudoRET implicit $x10
    %0:gprb(s32) = G_CONSTANT i32 -2147483000
    %1:gprb(s64) = G_ANYEXT %0(s32)
    $x10 = COPY %1(s64)
    PseudoRET implicit $x10

...
---
name:            const_i32_INT_MAX
legalized:       true
regBankSelected: true
tracksRegLiveness: true
body:            |
  bb.0:
    liveins: $x10

    ; CHECK-LABEL: name: const_i32_INT_MAX
    ; CHECK: liveins: $x10
    ; CHECK-NEXT: {{  $}}
    ; CHECK-NEXT: [[LUI:%[0-9]+]]:gpr = LUI 524288
    ; CHECK-NEXT: $x10 = COPY [[LUI]]
    ; CHECK-NEXT: PseudoRET implicit $x10
    %0:gprb(s32) = G_CONSTANT i32 2147483648
    %1:gprb(s64) = G_ANYEXT %0(s32)
    $x10 = COPY %1(s64)
    PseudoRET implicit $x10

...
---
name:            const_i32_2147483000
legalized:       true
regBankSelected: true
tracksRegLiveness: true
body:            |
  bb.0:
    liveins: $x10

    ; CHECK-LABEL: name: const_i32_2147483000
    ; CHECK: liveins: $x10
    ; CHECK-NEXT: {{  $}}
    ; CHECK-NEXT: [[LUI:%[0-9]+]]:gpr = LUI 524288
    ; CHECK-NEXT: [[ADDIW:%[0-9]+]]:gpr = ADDIW [[LUI]], -648
    ; CHECK-NEXT: $x10 = COPY [[ADDIW]]
    ; CHECK-NEXT: PseudoRET implicit $x10
    %0:gprb(s32) = G_CONSTANT i32 2147483000
    %1:gprb(s64) = G_ANYEXT %0(s32)
    $x10 = COPY %1(s64)
    PseudoRET implicit $x10

...
---
name:            const_i32_256
legalized:       true
regBankSelected: true
tracksRegLiveness: true
body:            |
  bb.0:
    liveins: $x10

    ; CHECK-LABEL: name: const_i32_256
    ; CHECK: liveins: $x10
    ; CHECK-NEXT: {{  $}}
    ; CHECK-NEXT: [[ADDI:%[0-9]+]]:gpr = ADDI $x0, 256
    ; CHECK-NEXT: $x10 = COPY [[ADDI]]
    ; CHECK-NEXT: PseudoRET implicit $x10
    %0:gprb(s32) = G_CONSTANT i32 256
    %1:gprb(s64) = G_ANYEXT %0(s32)
    $x10 = COPY %1(s64)
    PseudoRET implicit $x10

...
---
name:            const_i32_0
legalized:       true
regBankSelected: true
tracksRegLiveness: true
body:            |
  bb.0:
    liveins: $x10

    ; CHECK-LABEL: name: const_i32_0
    ; CHECK: liveins: $x10
    ; CHECK-NEXT: {{  $}}
    ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr = COPY $x0
    ; CHECK-NEXT: $x10 = COPY [[COPY]]
    ; CHECK-NEXT: PseudoRET implicit $x10
    %0:gprb(s32) = G_CONSTANT i32 0
    %1:gprb(s64) = G_ANYEXT %0(s32)
    $x10 = COPY %1(s64)
    PseudoRET implicit $x10

...