llvm/llvm/test/CodeGen/RISCV/GlobalISel/instruction-select/itofp-rv32.mir

# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
# RUN: llc -mtriple=riscv32 -mattr=+d -run-pass=instruction-select \
# RUN:   -simplify-mir -verify-machineinstrs %s -o - | FileCheck %s

---
name:            sitofp_s32_s32
legalized:       true
regBankSelected: true
tracksRegLiveness: true
body:             |
  bb.0:
    liveins: $x10

    ; CHECK-LABEL: name: sitofp_s32_s32
    ; CHECK: liveins: $x10
    ; CHECK-NEXT: {{  $}}
    ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr = COPY $x10
    ; CHECK-NEXT: [[FCVT_S_W:%[0-9]+]]:fpr32 = nofpexcept FCVT_S_W [[COPY]], 7
    ; CHECK-NEXT: $f10_f = COPY [[FCVT_S_W]]
    ; CHECK-NEXT: PseudoRET implicit $f10_f
    %0:gprb(s32) = COPY $x10
    %1:fprb(s32) = G_SITOFP %0(s32)
    $f10_f = COPY %1(s32)
    PseudoRET implicit $f10_f

...
---
name:            uitofp_s32_s32
legalized:       true
regBankSelected: true
tracksRegLiveness: true
body:             |
  bb.0:
    liveins: $x10

    ; CHECK-LABEL: name: uitofp_s32_s32
    ; CHECK: liveins: $x10
    ; CHECK-NEXT: {{  $}}
    ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr = COPY $x10
    ; CHECK-NEXT: [[FCVT_S_WU:%[0-9]+]]:fpr32 = nofpexcept FCVT_S_WU [[COPY]], 7
    ; CHECK-NEXT: $f10_f = COPY [[FCVT_S_WU]]
    ; CHECK-NEXT: PseudoRET implicit $f10_f
    %0:gprb(s32) = COPY $x10
    %1:fprb(s32) = G_UITOFP %0(s32)
    $f10_f = COPY %1(s32)
    PseudoRET implicit $f10_f

...
---
name:            sitofp_s64_s32
legalized:       true
regBankSelected: true
tracksRegLiveness: true
body:             |
  bb.0:
    liveins: $x10

    ; CHECK-LABEL: name: sitofp_s64_s32
    ; CHECK: liveins: $x10
    ; CHECK-NEXT: {{  $}}
    ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr = COPY $x10
    ; CHECK-NEXT: [[FCVT_D_W:%[0-9]+]]:fpr64 = nofpexcept FCVT_D_W [[COPY]], 0
    ; CHECK-NEXT: $f10_d = COPY [[FCVT_D_W]]
    ; CHECK-NEXT: PseudoRET implicit $f10_d
    %0:gprb(s32) = COPY $x10
    %1:fprb(s64) = G_SITOFP %0(s32)
    $f10_d = COPY %1(s64)
    PseudoRET implicit $f10_d

...
---
name:            uitofp_s64_s32
legalized:       true
regBankSelected: true
tracksRegLiveness: true
body:             |
  bb.0:
    liveins: $x10

    ; CHECK-LABEL: name: uitofp_s64_s32
    ; CHECK: liveins: $x10
    ; CHECK-NEXT: {{  $}}
    ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr = COPY $x10
    ; CHECK-NEXT: [[FCVT_D_WU:%[0-9]+]]:fpr64 = nofpexcept FCVT_D_WU [[COPY]], 0
    ; CHECK-NEXT: $f10_d = COPY [[FCVT_D_WU]]
    ; CHECK-NEXT: PseudoRET implicit $f10_d
    %0:gprb(s32) = COPY $x10
    %1:fprb(s64) = G_UITOFP %0(s32)
    $f10_d = COPY %1(s64)
    PseudoRET implicit $f10_d

...