llvm/llvm/test/CodeGen/RISCV/GlobalISel/instruction-select/zba-rv32.mir

# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 3
# RUN: llc -mtriple=riscv32 -mattr='+zba' -run-pass=instruction-select -simplify-mir -verify-machineinstrs %s -o - \
# RUN: | FileCheck %s

---
name:            sh1add
legalized:       true
regBankSelected: true
tracksRegLiveness: true
body:             |
  bb.0.entry:
    liveins: $x10, $x11

    ; CHECK-LABEL: name: sh1add
    ; CHECK: liveins: $x10, $x11
    ; CHECK-NEXT: {{  $}}
    ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr = COPY $x10
    ; CHECK-NEXT: [[COPY1:%[0-9]+]]:gpr = COPY $x11
    ; CHECK-NEXT: [[SH1ADD:%[0-9]+]]:gpr = SH1ADD [[COPY]], [[COPY1]]
    ; CHECK-NEXT: $x10 = COPY [[SH1ADD]]
    %0:gprb(s32) = COPY $x10
    %1:gprb(s32) = COPY $x11
    %2:gprb(s32) = G_CONSTANT i32 1
    %3:gprb(s32) = G_SHL %0, %2
    %4:gprb(s32) = G_ADD %3, %1
    $x10 = COPY %4(s32)
...
---
name:            sh2add
legalized:       true
regBankSelected: true
tracksRegLiveness: true
body:             |
  bb.0.entry:
    liveins: $x10, $x11

    ; CHECK-LABEL: name: sh2add
    ; CHECK: liveins: $x10, $x11
    ; CHECK-NEXT: {{  $}}
    ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr = COPY $x10
    ; CHECK-NEXT: [[COPY1:%[0-9]+]]:gpr = COPY $x11
    ; CHECK-NEXT: [[SH2ADD:%[0-9]+]]:gpr = SH2ADD [[COPY]], [[COPY1]]
    ; CHECK-NEXT: $x10 = COPY [[SH2ADD]]
    %0:gprb(s32) = COPY $x10
    %1:gprb(s32) = COPY $x11
    %2:gprb(s32) = G_CONSTANT i32 2
    %3:gprb(s32) = G_SHL %0, %2
    %4:gprb(s32) = G_ADD %3, %1
    $x10 = COPY %4(s32)
...
---
name:            sh3add
legalized:       true
regBankSelected: true
tracksRegLiveness: true
body:             |
  bb.0.entry:
    liveins: $x10, $x11

    ; CHECK-LABEL: name: sh3add
    ; CHECK: liveins: $x10, $x11
    ; CHECK-NEXT: {{  $}}
    ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr = COPY $x10
    ; CHECK-NEXT: [[COPY1:%[0-9]+]]:gpr = COPY $x11
    ; CHECK-NEXT: [[SH3ADD:%[0-9]+]]:gpr = SH3ADD [[COPY]], [[COPY1]]
    ; CHECK-NEXT: $x10 = COPY [[SH3ADD]]
    %0:gprb(s32) = COPY $x10
    %1:gprb(s32) = COPY $x11
    %2:gprb(s32) = G_CONSTANT i32 3
    %3:gprb(s32) = G_SHL %0, %2
    %4:gprb(s32) = G_ADD %3, %1
    $x10 = COPY %4(s32)
...
---
name:            no_sh1add
legalized:       true
regBankSelected: true
tracksRegLiveness: true
body:             |
  bb.0.entry:
    liveins: $x10, $x11

    ; CHECK-LABEL: name: no_sh1add
    ; CHECK: liveins: $x10, $x11
    ; CHECK-NEXT: {{  $}}
    ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr = COPY $x10
    ; CHECK-NEXT: [[SLLI:%[0-9]+]]:gpr = SLLI [[COPY]], 1
    ; CHECK-NEXT: [[ADDI:%[0-9]+]]:gpr = ADDI [[SLLI]], 37
    ; CHECK-NEXT: $x10 = COPY [[ADDI]]
    %0:gprb(s32) = COPY $x10
    %1:gprb(s32) = G_CONSTANT i32 37
    %2:gprb(s32) = G_CONSTANT i32 1
    %3:gprb(s32) = G_SHL %0, %2
    %4:gprb(s32) = G_ADD %3, %1
    $x10 = COPY %4(s32)
...
---
name:            shXadd_complex_shl_and
legalized:       true
regBankSelected: true
tracksRegLiveness: true
body:             |
  bb.0.entry:
    liveins: $x10, $x11

    ; CHECK-LABEL: name: shXadd_complex_shl_and
    ; CHECK: liveins: $x10, $x11
    ; CHECK-NEXT: {{  $}}
    ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr = COPY $x10
    ; CHECK-NEXT: [[COPY1:%[0-9]+]]:gpr = COPY $x11
    ; CHECK-NEXT: [[SRLI:%[0-9]+]]:gpr = SRLI [[COPY]], 1
    ; CHECK-NEXT: [[SH2ADD:%[0-9]+]]:gpr = SH2ADD [[SRLI]], [[COPY1]]
    ; CHECK-NEXT: $x10 = COPY [[SH2ADD]]
    %0:gprb(s32) = COPY $x10
    %1:gprb(s32) = COPY $x11

    %2:gprb(s32) = G_CONSTANT i32 1
    %3:gprb(s32) = G_SHL %0, %2
    %4:gprb(s32) = G_CONSTANT i32 4294967292
    %5:gprb(s32) = G_AND %3, %4

    %6:gprb(s32) = G_ADD %5, %1
    $x10 = COPY %6(s32)
...
---
name:            shXadd_complex_lshr_and
legalized:       true
regBankSelected: true
tracksRegLiveness: true
body:             |
  bb.0.entry:
    liveins: $x10, $x11

    ; CHECK-LABEL: name: shXadd_complex_lshr_and
    ; CHECK: liveins: $x10, $x11
    ; CHECK-NEXT: {{  $}}
    ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr = COPY $x10
    ; CHECK-NEXT: [[COPY1:%[0-9]+]]:gpr = COPY $x11
    ; CHECK-NEXT: [[SRLI:%[0-9]+]]:gpr = SRLI [[COPY]], 29
    ; CHECK-NEXT: [[SH2ADD:%[0-9]+]]:gpr = SH2ADD [[SRLI]], [[COPY1]]
    ; CHECK-NEXT: $x10 = COPY [[SH2ADD]]
    %0:gprb(s32) = COPY $x10
    %1:gprb(s32) = COPY $x11

    %2:gprb(s32) = G_CONSTANT i32 27
    %3:gprb(s32) = G_LSHR %0, %2
    %4:gprb(s32) = G_CONSTANT i32 60
    %5:gprb(s32) = G_AND %3, %4

    %6:gprb(s32) = G_ADD %5, %1
    $x10 = COPY %6(s32)
...