llvm/llvm/test/CodeGen/RISCV/GlobalISel/instruction-select/fptoi-rv64.mir

# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
# RUN: llc -mtriple=riscv64 -mattr=+d -run-pass=instruction-select \
# RUN:   -simplify-mir -verify-machineinstrs %s -o - | FileCheck %s

---
name:            fptosi_s32_s32
legalized:       true
regBankSelected: true
tracksRegLiveness: true
body:             |
  bb.1:
    liveins: $f10_f

    ; CHECK-LABEL: name: fptosi_s32_s32
    ; CHECK: liveins: $f10_f
    ; CHECK-NEXT: {{  $}}
    ; CHECK-NEXT: [[COPY:%[0-9]+]]:fpr32 = COPY $f10_f
    ; CHECK-NEXT: [[FCVT_W_S:%[0-9]+]]:gpr = nofpexcept FCVT_W_S [[COPY]], 1
    ; CHECK-NEXT: $x10 = COPY [[FCVT_W_S]]
    ; CHECK-NEXT: PseudoRET implicit $x10
    %0:fprb(s32) = COPY $f10_f
    %1:gprb(s32) = G_FPTOSI %0(s32)
    %2:gprb(s64) = G_ANYEXT %1(s32)
    $x10 = COPY %2(s64)
    PseudoRET implicit $x10

...
---
name:            fptoui_s32_s32
legalized:       true
regBankSelected: true
tracksRegLiveness: true
body:             |
  bb.1:
    liveins: $f10_f

    ; CHECK-LABEL: name: fptoui_s32_s32
    ; CHECK: liveins: $f10_f
    ; CHECK-NEXT: {{  $}}
    ; CHECK-NEXT: [[COPY:%[0-9]+]]:fpr32 = COPY $f10_f
    ; CHECK-NEXT: [[FCVT_WU_S:%[0-9]+]]:gpr = nofpexcept FCVT_WU_S [[COPY]], 1
    ; CHECK-NEXT: $x10 = COPY [[FCVT_WU_S]]
    ; CHECK-NEXT: PseudoRET implicit $x10
    %0:fprb(s32) = COPY $f10_f
    %1:gprb(s32) = G_FPTOUI %0(s32)
    %2:gprb(s64) = G_ANYEXT %1(s32)
    $x10 = COPY %2(s64)
    PseudoRET implicit $x10

...
---
name:            fptosi_s64_s32
legalized:       true
regBankSelected: true
tracksRegLiveness: true
body:             |
  bb.1:
    liveins: $f10_f

    ; CHECK-LABEL: name: fptosi_s64_s32
    ; CHECK: liveins: $f10_f
    ; CHECK-NEXT: {{  $}}
    ; CHECK-NEXT: [[COPY:%[0-9]+]]:fpr32 = COPY $f10_f
    ; CHECK-NEXT: [[FCVT_L_S:%[0-9]+]]:gpr = nofpexcept FCVT_L_S [[COPY]], 1
    ; CHECK-NEXT: $x10 = COPY [[FCVT_L_S]]
    ; CHECK-NEXT: PseudoRET implicit $x10
    %0:fprb(s32) = COPY $f10_f
    %1:gprb(s64) = G_FPTOSI %0(s32)
    $x10 = COPY %1(s64)
    PseudoRET implicit $x10

...
---
name:            fptoui_s64_s32
legalized:       true
regBankSelected: true
tracksRegLiveness: true
body:             |
  bb.1:
    liveins: $f10_f

    ; CHECK-LABEL: name: fptoui_s64_s32
    ; CHECK: liveins: $f10_f
    ; CHECK-NEXT: {{  $}}
    ; CHECK-NEXT: [[COPY:%[0-9]+]]:fpr32 = COPY $f10_f
    ; CHECK-NEXT: [[FCVT_LU_S:%[0-9]+]]:gpr = nofpexcept FCVT_LU_S [[COPY]], 1
    ; CHECK-NEXT: $x10 = COPY [[FCVT_LU_S]]
    ; CHECK-NEXT: PseudoRET implicit $x10
    %0:fprb(s32) = COPY $f10_f
    %1:gprb(s64) = G_FPTOUI %0(s32)
    $x10 = COPY %1(s64)
    PseudoRET implicit $x10

...
---
name:            fptosi_s32_s64
legalized:       true
regBankSelected: true
tracksRegLiveness: true
body:             |
  bb.1:
    liveins: $f10_d

    ; CHECK-LABEL: name: fptosi_s32_s64
    ; CHECK: liveins: $f10_d
    ; CHECK-NEXT: {{  $}}
    ; CHECK-NEXT: [[COPY:%[0-9]+]]:fpr64 = COPY $f10_d
    ; CHECK-NEXT: [[FCVT_W_D:%[0-9]+]]:gpr = nofpexcept FCVT_W_D [[COPY]], 1
    ; CHECK-NEXT: $x10 = COPY [[FCVT_W_D]]
    ; CHECK-NEXT: PseudoRET implicit $x10
    %0:fprb(s64) = COPY $f10_d
    %1:gprb(s32) = G_FPTOSI %0(s64)
    %2:gprb(s64) = G_ANYEXT %1(s32)
    $x10 = COPY %2(s64)
    PseudoRET implicit $x10

...
---
name:            fptoui_s32_s64
legalized:       true
regBankSelected: true
tracksRegLiveness: true
body:             |
  bb.1:
    liveins: $f10_d

    ; CHECK-LABEL: name: fptoui_s32_s64
    ; CHECK: liveins: $f10_d
    ; CHECK-NEXT: {{  $}}
    ; CHECK-NEXT: [[COPY:%[0-9]+]]:fpr64 = COPY $f10_d
    ; CHECK-NEXT: [[FCVT_WU_D:%[0-9]+]]:gpr = nofpexcept FCVT_WU_D [[COPY]], 1
    ; CHECK-NEXT: $x10 = COPY [[FCVT_WU_D]]
    ; CHECK-NEXT: PseudoRET implicit $x10
    %0:fprb(s64) = COPY $f10_d
    %1:gprb(s32) = G_FPTOUI %0(s64)
    %2:gprb(s64) = G_ANYEXT %1(s32)
    $x10 = COPY %2(s64)
    PseudoRET implicit $x10

...
---
name:            fptosi_s64_s64
legalized:       true
regBankSelected: true
tracksRegLiveness: true
body:             |
  bb.1:
    liveins: $f10_d

    ; CHECK-LABEL: name: fptosi_s64_s64
    ; CHECK: liveins: $f10_d
    ; CHECK-NEXT: {{  $}}
    ; CHECK-NEXT: [[COPY:%[0-9]+]]:fpr64 = COPY $f10_d
    ; CHECK-NEXT: [[FCVT_L_D:%[0-9]+]]:gpr = nofpexcept FCVT_L_D [[COPY]], 1
    ; CHECK-NEXT: $x10 = COPY [[FCVT_L_D]]
    ; CHECK-NEXT: PseudoRET implicit $x10
    %0:fprb(s64) = COPY $f10_d
    %1:gprb(s64) = G_FPTOSI %0(s64)
    $x10 = COPY %1(s64)
    PseudoRET implicit $x10

...
---
name:            fptoui_s64_s64
legalized:       true
regBankSelected: true
tracksRegLiveness: true
body:             |
  bb.1:
    liveins: $f10_d

    ; CHECK-LABEL: name: fptoui_s64_s64
    ; CHECK: liveins: $f10_d
    ; CHECK-NEXT: {{  $}}
    ; CHECK-NEXT: [[COPY:%[0-9]+]]:fpr64 = COPY $f10_d
    ; CHECK-NEXT: [[FCVT_LU_D:%[0-9]+]]:gpr = nofpexcept FCVT_LU_D [[COPY]], 1
    ; CHECK-NEXT: $x10 = COPY [[FCVT_LU_D]]
    ; CHECK-NEXT: PseudoRET implicit $x10
    %0:fprb(s64) = COPY $f10_d
    %1:gprb(s64) = G_FPTOUI %0(s64)
    $x10 = COPY %1(s64)
    PseudoRET implicit $x10

...