llvm/llvm/test/CodeGen/RISCV/GlobalISel/regbankselect/fp-select-rv64.mir

# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
# RUN: llc -mtriple=riscv64 -mattr=+d -run-pass=regbankselect \
# RUN:   -disable-gisel-legality-check -simplify-mir -verify-machineinstrs %s \
# RUN:   -o - | FileCheck -check-prefix=RV32I %s

---
name:            fp_select_s32
legalized:       true
tracksRegLiveness: true
body:             |
  bb.0.entry:
    liveins: $x10, $f10_f, $f11_f

    ; RV32I-LABEL: name: fp_select_s32
    ; RV32I: liveins: $x10, $f10_f, $f11_f
    ; RV32I-NEXT: {{  $}}
    ; RV32I-NEXT: [[COPY:%[0-9]+]]:gprb(s64) = COPY $x10
    ; RV32I-NEXT: [[COPY1:%[0-9]+]]:fprb(s32) = COPY $f10_f
    ; RV32I-NEXT: [[COPY2:%[0-9]+]]:fprb(s32) = COPY $f11_f
    ; RV32I-NEXT: [[C:%[0-9]+]]:gprb(s64) = G_CONSTANT i64 1
    ; RV32I-NEXT: [[AND:%[0-9]+]]:gprb(s64) = G_AND [[COPY]], [[C]]
    ; RV32I-NEXT: [[SELECT:%[0-9]+]]:fprb(s32) = G_SELECT [[AND]](s64), [[COPY1]], [[COPY2]]
    ; RV32I-NEXT: $f10_f = COPY [[SELECT]](s32)
    ; RV32I-NEXT: PseudoRET implicit $f10_f
    %3:_(s64) = COPY $x10
    %4:_(s32) = COPY $f10_f
    %5:_(s32) = COPY $f11_f
    %12:_(s64) = G_CONSTANT i64 1
    %11:_(s64) = G_AND %3, %12
    %10:_(s32) = G_SELECT %11(s64), %4(s32), %5
    $f10_f = COPY %10(s32)
    PseudoRET implicit $f10_f

...
---
name:            fp_select_s64
legalized:       true
tracksRegLiveness: true
body:             |
  bb.0.entry:
    liveins: $x10, $f10_d, $f11_d

    ; RV32I-LABEL: name: fp_select_s64
    ; RV32I: liveins: $x10, $f10_d, $f11_d
    ; RV32I-NEXT: {{  $}}
    ; RV32I-NEXT: [[COPY:%[0-9]+]]:gprb(s64) = COPY $x10
    ; RV32I-NEXT: [[COPY1:%[0-9]+]]:fprb(s64) = COPY $f10_d
    ; RV32I-NEXT: [[COPY2:%[0-9]+]]:fprb(s64) = COPY $f11_d
    ; RV32I-NEXT: [[C:%[0-9]+]]:gprb(s64) = G_CONSTANT i64 1
    ; RV32I-NEXT: [[AND:%[0-9]+]]:gprb(s64) = G_AND [[COPY]], [[C]]
    ; RV32I-NEXT: [[SELECT:%[0-9]+]]:fprb(s64) = G_SELECT [[AND]](s64), [[COPY1]], [[COPY2]]
    ; RV32I-NEXT: $f10_d = COPY [[SELECT]](s64)
    ; RV32I-NEXT: PseudoRET implicit $f10_d
    %3:_(s64) = COPY $x10
    %4:_(s64) = COPY $f10_d
    %5:_(s64) = COPY $f11_d
    %12:_(s64) = G_CONSTANT i64 1
    %11:_(s64) = G_AND %3, %12
    %10:_(s64) = G_SELECT %11(s64), %4, %5
    $f10_d = COPY %10(s64)
    PseudoRET implicit $f10_d

...
---
name:            fp_select_gpr_use_s32
legalized:       true
tracksRegLiveness: true
body:             |
  bb.0.entry:
    liveins: $x10, $f10_f, $f11_f

    ; RV32I-LABEL: name: fp_select_gpr_use_s32
    ; RV32I: liveins: $x10, $f10_f, $f11_f
    ; RV32I-NEXT: {{  $}}
    ; RV32I-NEXT: [[COPY:%[0-9]+]]:gprb(s64) = COPY $x10
    ; RV32I-NEXT: [[COPY1:%[0-9]+]]:fprb(s32) = COPY $f10_f
    ; RV32I-NEXT: [[COPY2:%[0-9]+]]:fprb(s32) = COPY $f11_f
    ; RV32I-NEXT: [[C:%[0-9]+]]:gprb(s64) = G_CONSTANT i64 1
    ; RV32I-NEXT: [[AND:%[0-9]+]]:gprb(s64) = G_AND [[COPY]], [[C]]
    ; RV32I-NEXT: [[SELECT:%[0-9]+]]:fprb(s32) = G_SELECT [[AND]](s64), [[COPY1]], [[COPY2]]
    ; RV32I-NEXT: [[COPY3:%[0-9]+]]:gprb(s32) = COPY [[SELECT]](s32)
    ; RV32I-NEXT: [[ANYEXT:%[0-9]+]]:gprb(s64) = G_ANYEXT [[COPY3]](s32)
    ; RV32I-NEXT: $x10 = COPY [[ANYEXT]](s64)
    ; RV32I-NEXT: PseudoRET implicit $x10
    %3:_(s64) = COPY $x10
    %4:_(s32) = COPY $f10_f
    %5:_(s32) = COPY $f11_f
    %12:_(s64) = G_CONSTANT i64 1
    %11:_(s64) = G_AND %3, %12
    %10:_(s32) = G_SELECT %11(s64), %4(s32), %5
    %13:_(s64) = G_ANYEXT %10(s32)
    $x10 = COPY %13(s64)
    PseudoRET implicit $x10

...
---
name:            fp_select_gpr_use_s64
legalized:       true
tracksRegLiveness: true
body:             |
  bb.0.entry:
    liveins: $x10, $f10_d, $f11_d

    ; RV32I-LABEL: name: fp_select_gpr_use_s64
    ; RV32I: liveins: $x10, $f10_d, $f11_d
    ; RV32I-NEXT: {{  $}}
    ; RV32I-NEXT: [[COPY:%[0-9]+]]:gprb(s64) = COPY $x10
    ; RV32I-NEXT: [[COPY1:%[0-9]+]]:fprb(s64) = COPY $f10_d
    ; RV32I-NEXT: [[COPY2:%[0-9]+]]:fprb(s64) = COPY $f11_d
    ; RV32I-NEXT: [[C:%[0-9]+]]:gprb(s64) = G_CONSTANT i64 1
    ; RV32I-NEXT: [[AND:%[0-9]+]]:gprb(s64) = G_AND [[COPY]], [[C]]
    ; RV32I-NEXT: [[SELECT:%[0-9]+]]:fprb(s64) = G_SELECT [[AND]](s64), [[COPY1]], [[COPY2]]
    ; RV32I-NEXT: $x10 = COPY [[SELECT]](s64)
    ; RV32I-NEXT: PseudoRET implicit $x10
    %3:_(s64) = COPY $x10
    %4:_(s64) = COPY $f10_d
    %5:_(s64) = COPY $f11_d
    %12:_(s64) = G_CONSTANT i64 1
    %11:_(s64) = G_AND %3, %12
    %10:_(s64) = G_SELECT %11(s64), %4, %5
    $x10 = COPY %10(s64)
    PseudoRET implicit $x10

...
---
name:            fp_select_gpr_def_s32
legalized:       true
tracksRegLiveness: true
body:             |
  bb.0.entry:
    liveins: $x10, $x11, $f10_f

    ; RV32I-LABEL: name: fp_select_gpr_def_s32
    ; RV32I: liveins: $x10, $x11, $f10_f
    ; RV32I-NEXT: {{  $}}
    ; RV32I-NEXT: [[COPY:%[0-9]+]]:gprb(s64) = COPY $x10
    ; RV32I-NEXT: [[COPY1:%[0-9]+]]:fprb(s32) = COPY $f10_f
    ; RV32I-NEXT: [[COPY2:%[0-9]+]]:gprb(s64) = COPY $x11
    ; RV32I-NEXT: [[TRUNC:%[0-9]+]]:gprb(s32) = G_TRUNC [[COPY2]](s64)
    ; RV32I-NEXT: [[C:%[0-9]+]]:gprb(s64) = G_CONSTANT i64 1
    ; RV32I-NEXT: [[AND:%[0-9]+]]:gprb(s64) = G_AND [[COPY]], [[C]]
    ; RV32I-NEXT: [[COPY3:%[0-9]+]]:fprb(s32) = COPY [[TRUNC]](s32)
    ; RV32I-NEXT: [[SELECT:%[0-9]+]]:fprb(s32) = G_SELECT [[AND]](s64), [[COPY3]], [[COPY1]]
    ; RV32I-NEXT: $f10_f = COPY [[SELECT]](s32)
    ; RV32I-NEXT: PseudoRET implicit $f10_f
    %3:_(s64) = COPY $x10
    %4:_(s32) = COPY $f10_f
    %5:_(s64) = COPY $x11
    %6:_(s32) = G_TRUNC %5(s64)
    %12:_(s64) = G_CONSTANT i64 1
    %11:_(s64) = G_AND %3, %12
    %10:_(s32) = G_SELECT %11(s64), %6(s32), %4
    $f10_f = COPY %10(s32)
    PseudoRET implicit $f10_f

...
---
name:            fp_select_gpr_def_s64
legalized:       true
tracksRegLiveness: true
body:             |
  bb.0.entry:
    liveins: $x10, $x11, $f10_d

    ; RV32I-LABEL: name: fp_select_gpr_def_s64
    ; RV32I: liveins: $x10, $x11, $f10_d
    ; RV32I-NEXT: {{  $}}
    ; RV32I-NEXT: [[COPY:%[0-9]+]]:gprb(s64) = COPY $x10
    ; RV32I-NEXT: [[COPY1:%[0-9]+]]:fprb(s64) = COPY $f10_d
    ; RV32I-NEXT: [[COPY2:%[0-9]+]]:gprb(s64) = COPY $x11
    ; RV32I-NEXT: [[C:%[0-9]+]]:gprb(s64) = G_CONSTANT i64 1
    ; RV32I-NEXT: [[AND:%[0-9]+]]:gprb(s64) = G_AND [[COPY]], [[C]]
    ; RV32I-NEXT: [[COPY3:%[0-9]+]]:fprb(s64) = COPY [[COPY2]](s64)
    ; RV32I-NEXT: [[SELECT:%[0-9]+]]:fprb(s64) = G_SELECT [[AND]](s64), [[COPY1]], [[COPY3]]
    ; RV32I-NEXT: $f10_d = COPY [[SELECT]](s64)
    ; RV32I-NEXT: PseudoRET implicit $f10_d
    %3:_(s64) = COPY $x10
    %4:_(s64) = COPY $f10_d
    %5:_(s64) = COPY $x11
    %12:_(s64) = G_CONSTANT i64 1
    %11:_(s64) = G_AND %3, %12
    %10:_(s64) = G_SELECT %11(s64), %4, %5
    $f10_d = COPY %10(s64)
    PseudoRET implicit $f10_d

...
---
name:            fp_select_only_fpr_use_s64
legalized:       true
tracksRegLiveness: true
body:             |
  bb.0.entry:
    liveins: $x10, $x11, $x12

    ; RV32I-LABEL: name: fp_select_only_fpr_use_s64
    ; RV32I: liveins: $x10, $x11, $x12
    ; RV32I-NEXT: {{  $}}
    ; RV32I-NEXT: [[COPY:%[0-9]+]]:gprb(s64) = COPY $x10
    ; RV32I-NEXT: [[COPY1:%[0-9]+]]:gprb(s64) = COPY $x11
    ; RV32I-NEXT: [[COPY2:%[0-9]+]]:gprb(s64) = COPY $x12
    ; RV32I-NEXT: [[C:%[0-9]+]]:gprb(s64) = G_CONSTANT i64 1
    ; RV32I-NEXT: [[AND:%[0-9]+]]:gprb(s64) = G_AND [[COPY]], [[C]]
    ; RV32I-NEXT: [[SELECT:%[0-9]+]]:gprb(s64) = G_SELECT [[AND]](s64), [[COPY1]], [[COPY2]]
    ; RV32I-NEXT: $f10_d = COPY [[SELECT]](s64)
    ; RV32I-NEXT: PseudoRET implicit $f10_d
    %3:_(s64) = COPY $x10
    %4:_(s64) = COPY $x11
    %5:_(s64) = COPY $x12
    %12:_(s64) = G_CONSTANT i64 1
    %11:_(s64) = G_AND %3, %12
    %10:_(s64) = G_SELECT %11(s64), %4, %5
    $f10_d = COPY %10(s64)
    PseudoRET implicit $f10_d

...
---
name:            fp_select_only_one_fpr_def_s64
legalized:       true
tracksRegLiveness: true
body:             |
  bb.0.entry:
    liveins: $x10, $x11, $f10_d

    ; RV32I-LABEL: name: fp_select_only_one_fpr_def_s64
    ; RV32I: liveins: $x10, $x11, $f10_d
    ; RV32I-NEXT: {{  $}}
    ; RV32I-NEXT: [[COPY:%[0-9]+]]:gprb(s64) = COPY $x10
    ; RV32I-NEXT: [[COPY1:%[0-9]+]]:fprb(s64) = COPY $f10_d
    ; RV32I-NEXT: [[COPY2:%[0-9]+]]:gprb(s64) = COPY $x11
    ; RV32I-NEXT: [[C:%[0-9]+]]:gprb(s64) = G_CONSTANT i64 1
    ; RV32I-NEXT: [[AND:%[0-9]+]]:gprb(s64) = G_AND [[COPY]], [[C]]
    ; RV32I-NEXT: [[COPY3:%[0-9]+]]:gprb(s64) = COPY [[COPY1]](s64)
    ; RV32I-NEXT: [[SELECT:%[0-9]+]]:gprb(s64) = G_SELECT [[AND]](s64), [[COPY3]], [[COPY2]]
    ; RV32I-NEXT: $x10 = COPY [[SELECT]](s64)
    ; RV32I-NEXT: PseudoRET implicit $x10
    %3:_(s64) = COPY $x10
    %4:_(s64) = COPY $f10_d
    %5:_(s64) = COPY $x11
    %12:_(s64) = G_CONSTANT i64 1
    %11:_(s64) = G_AND %3, %12
    %10:_(s64) = G_SELECT %11(s64), %4, %5
    $x10 = COPY %10(s64)
    PseudoRET implicit $x10

...