llvm/llvm/test/CodeGen/PowerPC/pr70208.ll

; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 3
; RUN: llc -verify-machineinstrs -mtriple=ppc64le-unknown-linux-gnu < %s | FileCheck %s

define <4 x i64> @widget(<8 x i16> %call) {
; CHECK-LABEL: widget:
; CHECK:       # %bb.0:
; CHECK-NEXT:    addis 3, 2, .LCPI0_0@toc@ha
; CHECK-NEXT:    xxlxor 32, 32, 32
; CHECK-NEXT:    addi 3, 3, .LCPI0_0@toc@l
; CHECK-NEXT:    lxvd2x 0, 0, 3
; CHECK-NEXT:    addis 3, 2, .LCPI0_1@toc@ha
; CHECK-NEXT:    addi 3, 3, .LCPI0_1@toc@l
; CHECK-NEXT:    xxswapd 35, 0
; CHECK-NEXT:    lxvd2x 0, 0, 3
; CHECK-NEXT:    vperm 4, 0, 2, 3
; CHECK-NEXT:    xxswapd 37, 0
; CHECK-NEXT:    vperm 3, 0, 2, 5
; CHECK-NEXT:    vmr 2, 4
; CHECK-NEXT:    blr
  %bitcast = bitcast <8 x i16> %call to <16 x i8>
  %shufflevector = shufflevector <16 x i8> <i8 poison, i8 poison, i8 0, i8 0, i8 poison, i8 poison, i8 0, i8 0, i8 poison, i8 poison, i8 0, i8 0, i8 poison, i8 poison, i8 0, i8 0>, <16 x i8> %bitcast, <16 x i32> <i32 16, i32 17, i32 2, i32 3, i32 18, i32 19, i32 6, i32 7, i32 20, i32 21, i32 10, i32 11, i32 22, i32 23, i32 14, i32 15>
  %bitcast1 = bitcast <16 x i8> %shufflevector to <4 x i32>
  %zext = zext <4 x i32> %bitcast1 to <4 x i64>
  ret <4 x i64> %zext
}