llvm/llvm/test/CodeGen/PowerPC/spill-nor0.mir

# RUN: llc -o - %s -mtriple=powerpc64-- -run-pass=regallocfast | FileCheck %s
# RUN: llc -o - %s -mtriple=powerpc64-- -passes=regallocfast | FileCheck %s
---
# CHECK-LABEL: name: func
name: func
tracksRegLiveness: true
body: |
  bb.0:
    %0 : gprc = LI 42
    %1 : gprc_nor0 = COPY %0
    ; CHECK: STW

    ; Clobber all regs to force a spill
    NOP csr_noregs

    ; CHECK: LWZ
    NOP implicit %1
...