llvm/llvm/test/CodeGen/PowerPC/and-extend-combine.ll

; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 2
; RUN: llc < %s -mtriple=powerpc64le-unknown-unknown -ppc-asm-full-reg-names \
; RUN:   -mcpu=pwr8 -verify-machineinstrs | FileCheck %s

define dso_local ptr @foo(i32 noundef zeroext %arg, ptr nocapture noundef readonly %arg1, ptr noundef writeonly %arg2) local_unnamed_addr {
; CHECK-LABEL: foo:
; CHECK:       # %bb.0: # %bb
; CHECK-NEXT:    rlwinm r3, r3, 31, 17, 28
; CHECK-NEXT:    ldx r3, r4, r3
; CHECK-NEXT:    clrldi r4, r3, 56
; CHECK-NEXT:    std r3, 0(r5)
; CHECK-NEXT:    add r3, r5, r4
; CHECK-NEXT:    blr
bb:
  %i = lshr i32 %arg, 1
  %i3 = and i32 %i, 32760
  %i4 = zext i32 %i3 to i64
  %i5 = getelementptr inbounds i8, ptr %arg1, i64 %i4
  %i6 = load i64, ptr %i5, align 8
  %i7 = and i64 %i6, 255
  store i64 %i6, ptr %arg2, align 8
  %i8 = getelementptr inbounds i8, ptr %arg2, i64 %i7
  ret ptr %i8
}

define void @pr68783(i32 %x, ptr %p) {
; CHECK-LABEL: pr68783:
; CHECK:       # %bb.0:
; CHECK-NEXT:    rlwinm r3, r3, 31, 24, 31
; CHECK-NEXT:    li r5, 0
; CHECK-NEXT:    sth r5, 4(r4)
; CHECK-NEXT:    stw r3, 0(r4)
; CHECK-NEXT:    blr
  %lshr = lshr i32 %x, 1
  %zext = zext i32 %lshr to i48
  %and = and i48 %zext, 255
  store i48 %and, ptr %p
  ret void
}