llvm/llvm/test/CodeGen/Mips/longbranch/branch-limits-int-mipsr6.mir

# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
# RUN: llc -mtriple=mips-img-linux-gnu -mcpu=mips32r6 -o - %s -start-before mips-delay-slot-filler -stop-after mips-branch-expansion | FileCheck %s --check-prefix=R6
# RUN: llc -mtriple=mips-img-linux-gnu -mcpu=mips32r6 -o - %s -start-before mips-delay-slot-filler -stop-after mips-branch-expansion -relocation-model=pic | FileCheck %s --check-prefix=PIC

# Test the long branch expansion of various branches

--- |
  define void @expand_BEQC(i1 %a) {
    br i1 %a, label %iftrue, label %tail

  iftrue:
    call void asm sideeffect ".space 131068", ""()
    br label %tail

  tail:
    ret void
  }

  define void @expand_BNEC(i1 %a) {
    br i1 %a, label %iftrue, label %tail

  iftrue:
    call void asm sideeffect ".space 131068", ""()
    br label %tail

  tail:
    ret void
  }

  define void @expand_BGEC(i1 %a) {
    br i1 %a, label %iftrue, label %tail

  iftrue:
    call void asm sideeffect ".space 131068", ""()
    br label %tail

  tail:
    ret void
  }

  define void @expand_BGEUC(i1 %a) {
    br i1 %a, label %iftrue, label %tail

  iftrue:
    call void asm sideeffect ".space 131068", ""()
    br label %tail

  tail:
    ret void
  }

  define void @expand_BGEZC(i1 %a) {
    br i1 %a, label %iftrue, label %tail

  iftrue:
    call void asm sideeffect ".space 131068", ""()
    br label %tail

  tail:
    ret void
  }

  define void @expand_BGTZC(i1 %a) {
    br i1 %a, label %iftrue, label %tail

  iftrue:
    call void asm sideeffect ".space 131068", ""()
    br label %tail

  tail:
    ret void
  }

  define void @expand_BLEZC(i1 %a) {
    br i1 %a, label %iftrue, label %tail

  iftrue:
    call void asm sideeffect ".space 131068", ""()
    br label %tail

  tail:
    ret void
  }

  define void @expand_BLTC(i1 %a) {
    br i1 %a, label %iftrue, label %tail

  iftrue:
    call void asm sideeffect ".space 131068", ""()
    br label %tail

  tail:
    ret void
  }

  define void @expand_BLTUC(i1 %a) {
    br i1 %a, label %iftrue, label %tail

  iftrue:
    call void asm sideeffect ".space 131068", ""()
    br label %tail

  tail:
    ret void
  }

  define void @expand_BLTZC(i1 %a) {
    br i1 %a, label %iftrue, label %tail

  iftrue:
    call void asm sideeffect ".space 131068", ""()
    br label %tail

  tail:
    ret void
  }

  define void @expand_BEQZC(i1 %a) {
    br i1 %a, label %iftrue, label %tail

  iftrue:
    call void asm sideeffect ".space 8388608", ""()
    br label %tail

  tail:
    ret void
  }

  define void @expand_BNEZC(i1 %a) {
    br i1 %a, label %iftrue, label %tail

  iftrue:
    call void asm sideeffect ".space 8388608", ""()
    br label %tail

  tail:
    ret void
  }

...
---

name:            expand_BEQC
alignment:       4
exposesReturnsTwice: false
legalized:       false
regBankSelected: false
selected:        false
failedISel:      false
tracksRegLiveness: true
registers:
liveins:
  - { reg: '$a0', virtual-reg: '' }
frameInfo:
  isFrameAddressTaken: false
  isReturnAddressTaken: false
  hasStackMap:     false
  hasPatchPoint:   false
  stackSize:       0
  offsetAdjustment: 0
  maxAlignment:    1
  adjustsStack:    false
  hasCalls:        false
  stackProtector:  ''
  maxCallFrameSize: 0
  hasOpaqueSPAdjustment: false
  hasVAStart:      false
  hasMustTailInVarArgFunc: false
  localFrameSize:  0
  savePoint:       ''
  restorePoint:    ''
fixedStack:
stack:
constants:
body:             |
  ; R6-LABEL: name: expand_BEQC
  ; R6: bb.0 (%ir-block.0):
  ; R6:   successors: %bb.2(0x40000000), %bb.1(0x40000000)
  ; R6:   renamable $at = ANDi killed renamable $a0, 1
  ; R6:   BNEC $at, $zero, %bb.2, implicit-def $at
  ; R6: bb.1 (%ir-block.0):
  ; R6:   successors: %bb.3(0x80000000)
  ; R6:   BC %bb.3
  ; R6: bb.2.iftrue:
  ; R6:   successors: %bb.3(0x80000000)
  ; R6:   INLINEASM &".space 131068", 1
  ; R6: bb.3.tail:
  ; R6:   JIC undef $ra, 0, implicit-def $at
  ; PIC-LABEL: name: expand_BEQC
  ; PIC: bb.0 (%ir-block.0):
  ; PIC:   successors: %bb.3(0x40000000), %bb.1(0x40000000)
  ; PIC:   renamable $at = ANDi killed renamable $a0, 1
  ; PIC:   BNEC $at, $zero, %bb.3, implicit-def $at
  ; PIC: bb.1 (%ir-block.0):
  ; PIC:   successors: %bb.2(0x80000000)
  ; PIC:   $sp = ADDiu $sp, -8
  ; PIC:   SW $ra, $sp, 0
  ; PIC:   $at = LONG_BRANCH_LUi target-flags(mips-abs-hi) %bb.4, %bb.2
  ; PIC:   $at = LONG_BRANCH_ADDiu $at, target-flags(mips-abs-lo) %bb.4, %bb.2
  ; PIC:   BALC %bb.2, implicit-def $ra
  ; PIC: bb.2 (%ir-block.0):
  ; PIC:   successors: %bb.4(0x80000000)
  ; PIC:   $at = ADDu $ra, $at
  ; PIC:   $ra = LW $sp, 0
  ; PIC:   $sp = ADDiu $sp, 8
  ; PIC:   JIC $at, 0, implicit-def $at
  ; PIC: bb.3.iftrue:
  ; PIC:   successors: %bb.4(0x80000000)
  ; PIC:   INLINEASM &".space 131068", 1
  ; PIC: bb.4.tail:
  ; PIC:   JIC undef $ra, 0, implicit-def $at
  bb.0 (%ir-block.0):
    successors: %bb.1(0x40000000), %bb.2(0x40000000)
    liveins: $a0

    renamable $at = ANDi killed renamable $a0, 1
    BEQC killed renamable $at, $zero, %bb.2, implicit-def $at

  bb.1.iftrue:
    successors: %bb.2(0x80000000)

    INLINEASM &".space 131068", 1

  bb.2.tail:
    PseudoReturn undef $ra

...
---

name:            expand_BNEC
alignment:       4
exposesReturnsTwice: false
legalized:       false
regBankSelected: false
selected:        false
failedISel:      false
tracksRegLiveness: true
registers:
liveins:
  - { reg: '$a0', virtual-reg: '' }
frameInfo:
  isFrameAddressTaken: false
  isReturnAddressTaken: false
  hasStackMap:     false
  hasPatchPoint:   false
  stackSize:       0
  offsetAdjustment: 0
  maxAlignment:    1
  adjustsStack:    false
  hasCalls:        false
  stackProtector:  ''
  maxCallFrameSize: 0
  hasOpaqueSPAdjustment: false
  hasVAStart:      false
  hasMustTailInVarArgFunc: false
  localFrameSize:  0
  savePoint:       ''
  restorePoint:    ''
fixedStack:
stack:
constants:
body:             |
  ; R6-LABEL: name: expand_BNEC
  ; R6: bb.0 (%ir-block.0):
  ; R6:   successors: %bb.2(0x40000000), %bb.1(0x40000000)
  ; R6:   renamable $at = ANDi killed renamable $a0, 1
  ; R6:   BEQC $at, $zero, %bb.2, implicit-def $at
  ; R6: bb.1 (%ir-block.0):
  ; R6:   successors: %bb.3(0x80000000)
  ; R6:   BC %bb.3
  ; R6: bb.2.iftrue:
  ; R6:   successors: %bb.3(0x80000000)
  ; R6:   INLINEASM &".space 131068", 1
  ; R6: bb.3.tail:
  ; R6:   JIC undef $ra, 0, implicit-def $at
  ; PIC-LABEL: name: expand_BNEC
  ; PIC: bb.0 (%ir-block.0):
  ; PIC:   successors: %bb.3(0x40000000), %bb.1(0x40000000)
  ; PIC:   renamable $at = ANDi killed renamable $a0, 1
  ; PIC:   BEQC $at, $zero, %bb.3, implicit-def $at
  ; PIC: bb.1 (%ir-block.0):
  ; PIC:   successors: %bb.2(0x80000000)
  ; PIC:   $sp = ADDiu $sp, -8
  ; PIC:   SW $ra, $sp, 0
  ; PIC:   $at = LONG_BRANCH_LUi target-flags(mips-abs-hi) %bb.4, %bb.2
  ; PIC:   $at = LONG_BRANCH_ADDiu $at, target-flags(mips-abs-lo) %bb.4, %bb.2
  ; PIC:   BALC %bb.2, implicit-def $ra
  ; PIC: bb.2 (%ir-block.0):
  ; PIC:   successors: %bb.4(0x80000000)
  ; PIC:   $at = ADDu $ra, $at
  ; PIC:   $ra = LW $sp, 0
  ; PIC:   $sp = ADDiu $sp, 8
  ; PIC:   JIC $at, 0, implicit-def $at
  ; PIC: bb.3.iftrue:
  ; PIC:   successors: %bb.4(0x80000000)
  ; PIC:   INLINEASM &".space 131068", 1
  ; PIC: bb.4.tail:
  ; PIC:   JIC undef $ra, 0, implicit-def $at
  bb.0 (%ir-block.0):
    successors: %bb.1(0x40000000), %bb.2(0x40000000)
    liveins: $a0

    renamable $at = ANDi killed renamable $a0, 1
    BNEC killed renamable $at, $zero, %bb.2, implicit-def $at

  bb.1.iftrue:
    successors: %bb.2(0x80000000)

    INLINEASM &".space 131068", 1

  bb.2.tail:
    PseudoReturn undef $ra

...
---

name:            expand_BGEC
alignment:       4
exposesReturnsTwice: false
legalized:       false
regBankSelected: false
selected:        false
failedISel:      false
tracksRegLiveness: true
registers:
liveins:
  - { reg: '$a0', virtual-reg: '' }
frameInfo:
  isFrameAddressTaken: false
  isReturnAddressTaken: false
  hasStackMap:     false
  hasPatchPoint:   false
  stackSize:       0
  offsetAdjustment: 0
  maxAlignment:    1
  adjustsStack:    false
  hasCalls:        false
  stackProtector:  ''
  maxCallFrameSize: 0
  hasOpaqueSPAdjustment: false
  hasVAStart:      false
  hasMustTailInVarArgFunc: false
  localFrameSize:  0
  savePoint:       ''
  restorePoint:    ''
fixedStack:
stack:
constants:
body:             |
  ; R6-LABEL: name: expand_BGEC
  ; R6: bb.0 (%ir-block.0):
  ; R6:   successors: %bb.2(0x40000000), %bb.1(0x40000000)
  ; R6:   renamable $at = ANDi killed renamable $a0, 1
  ; R6:   BLTC $at, $zero, %bb.2, implicit-def $at
  ; R6: bb.1 (%ir-block.0):
  ; R6:   successors: %bb.3(0x80000000)
  ; R6:   BC %bb.3
  ; R6: bb.2.iftrue:
  ; R6:   successors: %bb.3(0x80000000)
  ; R6:   INLINEASM &".space 131068", 1
  ; R6: bb.3.tail:
  ; R6:   JIC undef $ra, 0, implicit-def $at
  ; PIC-LABEL: name: expand_BGEC
  ; PIC: bb.0 (%ir-block.0):
  ; PIC:   successors: %bb.3(0x40000000), %bb.1(0x40000000)
  ; PIC:   renamable $at = ANDi killed renamable $a0, 1
  ; PIC:   BLTC $at, $zero, %bb.3, implicit-def $at
  ; PIC: bb.1 (%ir-block.0):
  ; PIC:   successors: %bb.2(0x80000000)
  ; PIC:   $sp = ADDiu $sp, -8
  ; PIC:   SW $ra, $sp, 0
  ; PIC:   $at = LONG_BRANCH_LUi target-flags(mips-abs-hi) %bb.4, %bb.2
  ; PIC:   $at = LONG_BRANCH_ADDiu $at, target-flags(mips-abs-lo) %bb.4, %bb.2
  ; PIC:   BALC %bb.2, implicit-def $ra
  ; PIC: bb.2 (%ir-block.0):
  ; PIC:   successors: %bb.4(0x80000000)
  ; PIC:   $at = ADDu $ra, $at
  ; PIC:   $ra = LW $sp, 0
  ; PIC:   $sp = ADDiu $sp, 8
  ; PIC:   JIC $at, 0, implicit-def $at
  ; PIC: bb.3.iftrue:
  ; PIC:   successors: %bb.4(0x80000000)
  ; PIC:   INLINEASM &".space 131068", 1
  ; PIC: bb.4.tail:
  ; PIC:   JIC undef $ra, 0, implicit-def $at
  bb.0 (%ir-block.0):
    successors: %bb.1(0x40000000), %bb.2(0x40000000)
    liveins: $a0

    renamable $at = ANDi killed renamable $a0, 1
    BGEC killed renamable $at, $zero, %bb.2, implicit-def $at

  bb.1.iftrue:
    successors: %bb.2(0x80000000)

    INLINEASM &".space 131068", 1

  bb.2.tail:
    PseudoReturn undef $ra

...
---

name:            expand_BGEUC
alignment:       4
exposesReturnsTwice: false
legalized:       false
regBankSelected: false
selected:        false
failedISel:      false
tracksRegLiveness: true
registers:
liveins:
  - { reg: '$a0', virtual-reg: '' }
frameInfo:
  isFrameAddressTaken: false
  isReturnAddressTaken: false
  hasStackMap:     false
  hasPatchPoint:   false
  stackSize:       0
  offsetAdjustment: 0
  maxAlignment:    1
  adjustsStack:    false
  hasCalls:        false
  stackProtector:  ''
  maxCallFrameSize: 0
  hasOpaqueSPAdjustment: false
  hasVAStart:      false
  hasMustTailInVarArgFunc: false
  localFrameSize:  0
  savePoint:       ''
  restorePoint:    ''
fixedStack:
stack:
constants:
body:             |
  ; R6-LABEL: name: expand_BGEUC
  ; R6: bb.0 (%ir-block.0):
  ; R6:   successors: %bb.2(0x40000000), %bb.1(0x40000000)
  ; R6:   renamable $at = ANDi killed renamable $a0, 1
  ; R6:   BLTUC $at, $zero, %bb.2, implicit-def $at
  ; R6: bb.1 (%ir-block.0):
  ; R6:   successors: %bb.3(0x80000000)
  ; R6:   BC %bb.3
  ; R6: bb.2.iftrue:
  ; R6:   successors: %bb.3(0x80000000)
  ; R6:   INLINEASM &".space 131068", 1
  ; R6: bb.3.tail:
  ; R6:   JIC undef $ra, 0, implicit-def $at
  ; PIC-LABEL: name: expand_BGEUC
  ; PIC: bb.0 (%ir-block.0):
  ; PIC:   successors: %bb.3(0x40000000), %bb.1(0x40000000)
  ; PIC:   renamable $at = ANDi killed renamable $a0, 1
  ; PIC:   BLTUC $at, $zero, %bb.3, implicit-def $at
  ; PIC: bb.1 (%ir-block.0):
  ; PIC:   successors: %bb.2(0x80000000)
  ; PIC:   $sp = ADDiu $sp, -8
  ; PIC:   SW $ra, $sp, 0
  ; PIC:   $at = LONG_BRANCH_LUi target-flags(mips-abs-hi) %bb.4, %bb.2
  ; PIC:   $at = LONG_BRANCH_ADDiu $at, target-flags(mips-abs-lo) %bb.4, %bb.2
  ; PIC:   BALC %bb.2, implicit-def $ra
  ; PIC: bb.2 (%ir-block.0):
  ; PIC:   successors: %bb.4(0x80000000)
  ; PIC:   $at = ADDu $ra, $at
  ; PIC:   $ra = LW $sp, 0
  ; PIC:   $sp = ADDiu $sp, 8
  ; PIC:   JIC $at, 0, implicit-def $at
  ; PIC: bb.3.iftrue:
  ; PIC:   successors: %bb.4(0x80000000)
  ; PIC:   INLINEASM &".space 131068", 1
  ; PIC: bb.4.tail:
  ; PIC:   JIC undef $ra, 0, implicit-def $at
  bb.0 (%ir-block.0):
    successors: %bb.1(0x40000000), %bb.2(0x40000000)
    liveins: $a0

    renamable $at = ANDi killed renamable $a0, 1
    BGEUC killed renamable $at, $zero, %bb.2, implicit-def $at

  bb.1.iftrue:
    successors: %bb.2(0x80000000)

    INLINEASM &".space 131068", 1

  bb.2.tail:
    PseudoReturn undef $ra

...
---

name:            expand_BGEZC
alignment:       4
exposesReturnsTwice: false
legalized:       false
regBankSelected: false
selected:        false
failedISel:      false
tracksRegLiveness: true
registers:
liveins:
  - { reg: '$a0', virtual-reg: '' }
frameInfo:
  isFrameAddressTaken: false
  isReturnAddressTaken: false
  hasStackMap:     false
  hasPatchPoint:   false
  stackSize:       0
  offsetAdjustment: 0
  maxAlignment:    1
  adjustsStack:    false
  hasCalls:        false
  stackProtector:  ''
  maxCallFrameSize: 0
  hasOpaqueSPAdjustment: false
  hasVAStart:      false
  hasMustTailInVarArgFunc: false
  localFrameSize:  0
  savePoint:       ''
  restorePoint:    ''
fixedStack:
stack:
constants:
body:             |
  ; R6-LABEL: name: expand_BGEZC
  ; R6: bb.0 (%ir-block.0):
  ; R6:   successors: %bb.2(0x40000000), %bb.1(0x40000000)
  ; R6:   renamable $at = ANDi killed renamable $a0, 1
  ; R6:   BLTZC $at, %bb.2, implicit-def $at
  ; R6: bb.1 (%ir-block.0):
  ; R6:   successors: %bb.3(0x80000000)
  ; R6:   BC %bb.3
  ; R6: bb.2.iftrue:
  ; R6:   successors: %bb.3(0x80000000)
  ; R6:   INLINEASM &".space 131068", 1
  ; R6: bb.3.tail:
  ; R6:   JIC undef $ra, 0, implicit-def $at
  ; PIC-LABEL: name: expand_BGEZC
  ; PIC: bb.0 (%ir-block.0):
  ; PIC:   successors: %bb.3(0x40000000), %bb.1(0x40000000)
  ; PIC:   renamable $at = ANDi killed renamable $a0, 1
  ; PIC:   BLTZC $at, %bb.3, implicit-def $at
  ; PIC: bb.1 (%ir-block.0):
  ; PIC:   successors: %bb.2(0x80000000)
  ; PIC:   $sp = ADDiu $sp, -8
  ; PIC:   SW $ra, $sp, 0
  ; PIC:   $at = LONG_BRANCH_LUi target-flags(mips-abs-hi) %bb.4, %bb.2
  ; PIC:   $at = LONG_BRANCH_ADDiu $at, target-flags(mips-abs-lo) %bb.4, %bb.2
  ; PIC:   BALC %bb.2, implicit-def $ra
  ; PIC: bb.2 (%ir-block.0):
  ; PIC:   successors: %bb.4(0x80000000)
  ; PIC:   $at = ADDu $ra, $at
  ; PIC:   $ra = LW $sp, 0
  ; PIC:   $sp = ADDiu $sp, 8
  ; PIC:   JIC $at, 0, implicit-def $at
  ; PIC: bb.3.iftrue:
  ; PIC:   successors: %bb.4(0x80000000)
  ; PIC:   INLINEASM &".space 131068", 1
  ; PIC: bb.4.tail:
  ; PIC:   JIC undef $ra, 0, implicit-def $at
  bb.0 (%ir-block.0):
    successors: %bb.1(0x40000000), %bb.2(0x40000000)
    liveins: $a0

    renamable $at = ANDi killed renamable $a0, 1
    BGEZC killed renamable $at, %bb.2, implicit-def $at

  bb.1.iftrue:
    successors: %bb.2(0x80000000)

    INLINEASM &".space 131068", 1

  bb.2.tail:
    PseudoReturn undef $ra

...
---

name:            expand_BGTZC
alignment:       4
exposesReturnsTwice: false
legalized:       false
regBankSelected: false
selected:        false
failedISel:      false
tracksRegLiveness: true
registers:
liveins:
  - { reg: '$a0', virtual-reg: '' }
frameInfo:
  isFrameAddressTaken: false
  isReturnAddressTaken: false
  hasStackMap:     false
  hasPatchPoint:   false
  stackSize:       0
  offsetAdjustment: 0
  maxAlignment:    1
  adjustsStack:    false
  hasCalls:        false
  stackProtector:  ''
  maxCallFrameSize: 0
  hasOpaqueSPAdjustment: false
  hasVAStart:      false
  hasMustTailInVarArgFunc: false
  localFrameSize:  0
  savePoint:       ''
  restorePoint:    ''
fixedStack:
stack:
constants:
body:             |
  ; R6-LABEL: name: expand_BGTZC
  ; R6: bb.0 (%ir-block.0):
  ; R6:   successors: %bb.2(0x40000000), %bb.1(0x40000000)
  ; R6:   renamable $at = ANDi killed renamable $a0, 1
  ; R6:   BLEZC $at, %bb.2, implicit-def $at
  ; R6: bb.1 (%ir-block.0):
  ; R6:   successors: %bb.3(0x80000000)
  ; R6:   BC %bb.3
  ; R6: bb.2.iftrue:
  ; R6:   successors: %bb.3(0x80000000)
  ; R6:   INLINEASM &".space 131068", 1
  ; R6: bb.3.tail:
  ; R6:   JIC undef $ra, 0, implicit-def $at
  ; PIC-LABEL: name: expand_BGTZC
  ; PIC: bb.0 (%ir-block.0):
  ; PIC:   successors: %bb.3(0x40000000), %bb.1(0x40000000)
  ; PIC:   renamable $at = ANDi killed renamable $a0, 1
  ; PIC:   BLEZC $at, %bb.3, implicit-def $at
  ; PIC: bb.1 (%ir-block.0):
  ; PIC:   successors: %bb.2(0x80000000)
  ; PIC:   $sp = ADDiu $sp, -8
  ; PIC:   SW $ra, $sp, 0
  ; PIC:   $at = LONG_BRANCH_LUi target-flags(mips-abs-hi) %bb.4, %bb.2
  ; PIC:   $at = LONG_BRANCH_ADDiu $at, target-flags(mips-abs-lo) %bb.4, %bb.2
  ; PIC:   BALC %bb.2, implicit-def $ra
  ; PIC: bb.2 (%ir-block.0):
  ; PIC:   successors: %bb.4(0x80000000)
  ; PIC:   $at = ADDu $ra, $at
  ; PIC:   $ra = LW $sp, 0
  ; PIC:   $sp = ADDiu $sp, 8
  ; PIC:   JIC $at, 0, implicit-def $at
  ; PIC: bb.3.iftrue:
  ; PIC:   successors: %bb.4(0x80000000)
  ; PIC:   INLINEASM &".space 131068", 1
  ; PIC: bb.4.tail:
  ; PIC:   JIC undef $ra, 0, implicit-def $at
  bb.0 (%ir-block.0):
    successors: %bb.1(0x40000000), %bb.2(0x40000000)
    liveins: $a0

    renamable $at = ANDi killed renamable $a0, 1
    BGTZC killed renamable $at, %bb.2, implicit-def $at

  bb.1.iftrue:
    successors: %bb.2(0x80000000)

    INLINEASM &".space 131068", 1

  bb.2.tail:
    PseudoReturn undef $ra

...
---

name:            expand_BLEZC
alignment:       4
exposesReturnsTwice: false
legalized:       false
regBankSelected: false
selected:        false
failedISel:      false
tracksRegLiveness: true
registers:
liveins:
  - { reg: '$a0', virtual-reg: '' }
frameInfo:
  isFrameAddressTaken: false
  isReturnAddressTaken: false
  hasStackMap:     false
  hasPatchPoint:   false
  stackSize:       0
  offsetAdjustment: 0
  maxAlignment:    1
  adjustsStack:    false
  hasCalls:        false
  stackProtector:  ''
  maxCallFrameSize: 0
  hasOpaqueSPAdjustment: false
  hasVAStart:      false
  hasMustTailInVarArgFunc: false
  localFrameSize:  0
  savePoint:       ''
  restorePoint:    ''
fixedStack:
stack:
constants:
body:             |
  ; R6-LABEL: name: expand_BLEZC
  ; R6: bb.0 (%ir-block.0):
  ; R6:   successors: %bb.2(0x40000000), %bb.1(0x40000000)
  ; R6:   renamable $at = ANDi killed renamable $a0, 1
  ; R6:   BGTZC $at, %bb.2, implicit-def $at
  ; R6: bb.1 (%ir-block.0):
  ; R6:   successors: %bb.3(0x80000000)
  ; R6:   BC %bb.3
  ; R6: bb.2.iftrue:
  ; R6:   successors: %bb.3(0x80000000)
  ; R6:   INLINEASM &".space 131068", 1
  ; R6: bb.3.tail:
  ; R6:   JIC undef $ra, 0, implicit-def $at
  ; PIC-LABEL: name: expand_BLEZC
  ; PIC: bb.0 (%ir-block.0):
  ; PIC:   successors: %bb.3(0x40000000), %bb.1(0x40000000)
  ; PIC:   renamable $at = ANDi killed renamable $a0, 1
  ; PIC:   BGTZC $at, %bb.3, implicit-def $at
  ; PIC: bb.1 (%ir-block.0):
  ; PIC:   successors: %bb.2(0x80000000)
  ; PIC:   $sp = ADDiu $sp, -8
  ; PIC:   SW $ra, $sp, 0
  ; PIC:   $at = LONG_BRANCH_LUi target-flags(mips-abs-hi) %bb.4, %bb.2
  ; PIC:   $at = LONG_BRANCH_ADDiu $at, target-flags(mips-abs-lo) %bb.4, %bb.2
  ; PIC:   BALC %bb.2, implicit-def $ra
  ; PIC: bb.2 (%ir-block.0):
  ; PIC:   successors: %bb.4(0x80000000)
  ; PIC:   $at = ADDu $ra, $at
  ; PIC:   $ra = LW $sp, 0
  ; PIC:   $sp = ADDiu $sp, 8
  ; PIC:   JIC $at, 0, implicit-def $at
  ; PIC: bb.3.iftrue:
  ; PIC:   successors: %bb.4(0x80000000)
  ; PIC:   INLINEASM &".space 131068", 1
  ; PIC: bb.4.tail:
  ; PIC:   JIC undef $ra, 0, implicit-def $at
  bb.0 (%ir-block.0):
    successors: %bb.1(0x40000000), %bb.2(0x40000000)
    liveins: $a0

    renamable $at = ANDi killed renamable $a0, 1
    BLEZC killed renamable $at, %bb.2, implicit-def $at

  bb.1.iftrue:
    successors: %bb.2(0x80000000)

    INLINEASM &".space 131068", 1

  bb.2.tail:
    PseudoReturn undef $ra

...
---

name:            expand_BLTC
alignment:       4
exposesReturnsTwice: false
legalized:       false
regBankSelected: false
selected:        false
failedISel:      false
tracksRegLiveness: true
registers:
liveins:
  - { reg: '$a0', virtual-reg: '' }
frameInfo:
  isFrameAddressTaken: false
  isReturnAddressTaken: false
  hasStackMap:     false
  hasPatchPoint:   false
  stackSize:       0
  offsetAdjustment: 0
  maxAlignment:    1
  adjustsStack:    false
  hasCalls:        false
  stackProtector:  ''
  maxCallFrameSize: 0
  hasOpaqueSPAdjustment: false
  hasVAStart:      false
  hasMustTailInVarArgFunc: false
  localFrameSize:  0
  savePoint:       ''
  restorePoint:    ''
fixedStack:
stack:
constants:
body:             |
  ; R6-LABEL: name: expand_BLTC
  ; R6: bb.0 (%ir-block.0):
  ; R6:   successors: %bb.2(0x40000000), %bb.1(0x40000000)
  ; R6:   renamable $at = ANDi killed renamable $a0, 1
  ; R6:   BGEC $at, $zero, %bb.2, implicit-def $at
  ; R6: bb.1 (%ir-block.0):
  ; R6:   successors: %bb.3(0x80000000)
  ; R6:   BC %bb.3
  ; R6: bb.2.iftrue:
  ; R6:   successors: %bb.3(0x80000000)
  ; R6:   INLINEASM &".space 131068", 1
  ; R6: bb.3.tail:
  ; R6:   JIC undef $ra, 0, implicit-def $at
  ; PIC-LABEL: name: expand_BLTC
  ; PIC: bb.0 (%ir-block.0):
  ; PIC:   successors: %bb.3(0x40000000), %bb.1(0x40000000)
  ; PIC:   renamable $at = ANDi killed renamable $a0, 1
  ; PIC:   BGEC $at, $zero, %bb.3, implicit-def $at
  ; PIC: bb.1 (%ir-block.0):
  ; PIC:   successors: %bb.2(0x80000000)
  ; PIC:   $sp = ADDiu $sp, -8
  ; PIC:   SW $ra, $sp, 0
  ; PIC:   $at = LONG_BRANCH_LUi target-flags(mips-abs-hi) %bb.4, %bb.2
  ; PIC:   $at = LONG_BRANCH_ADDiu $at, target-flags(mips-abs-lo) %bb.4, %bb.2
  ; PIC:   BALC %bb.2, implicit-def $ra
  ; PIC: bb.2 (%ir-block.0):
  ; PIC:   successors: %bb.4(0x80000000)
  ; PIC:   $at = ADDu $ra, $at
  ; PIC:   $ra = LW $sp, 0
  ; PIC:   $sp = ADDiu $sp, 8
  ; PIC:   JIC $at, 0, implicit-def $at
  ; PIC: bb.3.iftrue:
  ; PIC:   successors: %bb.4(0x80000000)
  ; PIC:   INLINEASM &".space 131068", 1
  ; PIC: bb.4.tail:
  ; PIC:   JIC undef $ra, 0, implicit-def $at
  bb.0 (%ir-block.0):
    successors: %bb.1(0x40000000), %bb.2(0x40000000)
    liveins: $a0

    renamable $at = ANDi killed renamable $a0, 1
    BLTC killed renamable $at, $zero, %bb.2, implicit-def $at

  bb.1.iftrue:
    successors: %bb.2(0x80000000)

    INLINEASM &".space 131068", 1

  bb.2.tail:
    PseudoReturn undef $ra

...
---

name:            expand_BLTUC
alignment:       4
exposesReturnsTwice: false
legalized:       false
regBankSelected: false
selected:        false
failedISel:      false
tracksRegLiveness: true
registers:
liveins:
  - { reg: '$a0', virtual-reg: '' }
frameInfo:
  isFrameAddressTaken: false
  isReturnAddressTaken: false
  hasStackMap:     false
  hasPatchPoint:   false
  stackSize:       0
  offsetAdjustment: 0
  maxAlignment:    1
  adjustsStack:    false
  hasCalls:        false
  stackProtector:  ''
  maxCallFrameSize: 0
  hasOpaqueSPAdjustment: false
  hasVAStart:      false
  hasMustTailInVarArgFunc: false
  localFrameSize:  0
  savePoint:       ''
  restorePoint:    ''
fixedStack:
stack:
constants:
body:             |
  ; R6-LABEL: name: expand_BLTUC
  ; R6: bb.0 (%ir-block.0):
  ; R6:   successors: %bb.2(0x40000000), %bb.1(0x40000000)
  ; R6:   renamable $at = ANDi killed renamable $a0, 1
  ; R6:   BGEUC $at, $zero, %bb.2, implicit-def $at
  ; R6: bb.1 (%ir-block.0):
  ; R6:   successors: %bb.3(0x80000000)
  ; R6:   BC %bb.3
  ; R6: bb.2.iftrue:
  ; R6:   successors: %bb.3(0x80000000)
  ; R6:   INLINEASM &".space 131068", 1
  ; R6: bb.3.tail:
  ; R6:   JIC undef $ra, 0, implicit-def $at
  ; PIC-LABEL: name: expand_BLTUC
  ; PIC: bb.0 (%ir-block.0):
  ; PIC:   successors: %bb.3(0x40000000), %bb.1(0x40000000)
  ; PIC:   renamable $at = ANDi killed renamable $a0, 1
  ; PIC:   BGEUC $at, $zero, %bb.3, implicit-def $at
  ; PIC: bb.1 (%ir-block.0):
  ; PIC:   successors: %bb.2(0x80000000)
  ; PIC:   $sp = ADDiu $sp, -8
  ; PIC:   SW $ra, $sp, 0
  ; PIC:   $at = LONG_BRANCH_LUi target-flags(mips-abs-hi) %bb.4, %bb.2
  ; PIC:   $at = LONG_BRANCH_ADDiu $at, target-flags(mips-abs-lo) %bb.4, %bb.2
  ; PIC:   BALC %bb.2, implicit-def $ra
  ; PIC: bb.2 (%ir-block.0):
  ; PIC:   successors: %bb.4(0x80000000)
  ; PIC:   $at = ADDu $ra, $at
  ; PIC:   $ra = LW $sp, 0
  ; PIC:   $sp = ADDiu $sp, 8
  ; PIC:   JIC $at, 0, implicit-def $at
  ; PIC: bb.3.iftrue:
  ; PIC:   successors: %bb.4(0x80000000)
  ; PIC:   INLINEASM &".space 131068", 1
  ; PIC: bb.4.tail:
  ; PIC:   JIC undef $ra, 0, implicit-def $at
  bb.0 (%ir-block.0):
    successors: %bb.1(0x40000000), %bb.2(0x40000000)
    liveins: $a0

    renamable $at = ANDi killed renamable $a0, 1
    BLTUC killed renamable $at, $zero, %bb.2, implicit-def $at

  bb.1.iftrue:
    successors: %bb.2(0x80000000)

    INLINEASM &".space 131068", 1

  bb.2.tail:
    PseudoReturn undef $ra

...
---

name:            expand_BLTZC
alignment:       4
exposesReturnsTwice: false
legalized:       false
regBankSelected: false
selected:        false
failedISel:      false
tracksRegLiveness: true
registers:
liveins:
  - { reg: '$a0', virtual-reg: '' }
frameInfo:
  isFrameAddressTaken: false
  isReturnAddressTaken: false
  hasStackMap:     false
  hasPatchPoint:   false
  stackSize:       0
  offsetAdjustment: 0
  maxAlignment:    1
  adjustsStack:    false
  hasCalls:        false
  stackProtector:  ''
  maxCallFrameSize: 0
  hasOpaqueSPAdjustment: false
  hasVAStart:      false
  hasMustTailInVarArgFunc: false
  localFrameSize:  0
  savePoint:       ''
  restorePoint:    ''
fixedStack:
stack:
constants:
body:             |
  ; R6-LABEL: name: expand_BLTZC
  ; R6: bb.0 (%ir-block.0):
  ; R6:   successors: %bb.2(0x40000000), %bb.1(0x40000000)
  ; R6:   renamable $at = ANDi killed renamable $a0, 1
  ; R6:   BGEZC $at, %bb.2, implicit-def $at
  ; R6: bb.1 (%ir-block.0):
  ; R6:   successors: %bb.3(0x80000000)
  ; R6:   BC %bb.3
  ; R6: bb.2.iftrue:
  ; R6:   successors: %bb.3(0x80000000)
  ; R6:   INLINEASM &".space 131068", 1
  ; R6: bb.3.tail:
  ; R6:   JIC undef $ra, 0, implicit-def $at
  ; PIC-LABEL: name: expand_BLTZC
  ; PIC: bb.0 (%ir-block.0):
  ; PIC:   successors: %bb.3(0x40000000), %bb.1(0x40000000)
  ; PIC:   renamable $at = ANDi killed renamable $a0, 1
  ; PIC:   BGEZC $at, %bb.3, implicit-def $at
  ; PIC: bb.1 (%ir-block.0):
  ; PIC:   successors: %bb.2(0x80000000)
  ; PIC:   $sp = ADDiu $sp, -8
  ; PIC:   SW $ra, $sp, 0
  ; PIC:   $at = LONG_BRANCH_LUi target-flags(mips-abs-hi) %bb.4, %bb.2
  ; PIC:   $at = LONG_BRANCH_ADDiu $at, target-flags(mips-abs-lo) %bb.4, %bb.2
  ; PIC:   BALC %bb.2, implicit-def $ra
  ; PIC: bb.2 (%ir-block.0):
  ; PIC:   successors: %bb.4(0x80000000)
  ; PIC:   $at = ADDu $ra, $at
  ; PIC:   $ra = LW $sp, 0
  ; PIC:   $sp = ADDiu $sp, 8
  ; PIC:   JIC $at, 0, implicit-def $at
  ; PIC: bb.3.iftrue:
  ; PIC:   successors: %bb.4(0x80000000)
  ; PIC:   INLINEASM &".space 131068", 1
  ; PIC: bb.4.tail:
  ; PIC:   JIC undef $ra, 0, implicit-def $at
  bb.0 (%ir-block.0):
    successors: %bb.1(0x40000000), %bb.2(0x40000000)
    liveins: $a0

    renamable $at = ANDi killed renamable $a0, 1
    BLTZC killed renamable $at, %bb.2, implicit-def $at

  bb.1.iftrue:
    successors: %bb.2(0x80000000)

    INLINEASM &".space 131068", 1

  bb.2.tail:
    PseudoReturn undef $ra

...
---

name:            expand_BEQZC
alignment:       4
exposesReturnsTwice: false
legalized:       false
regBankSelected: false
selected:        false
failedISel:      false
tracksRegLiveness: true
registers:
liveins:
  - { reg: '$a0', virtual-reg: '' }
frameInfo:
  isFrameAddressTaken: false
  isReturnAddressTaken: false
  hasStackMap:     false
  hasPatchPoint:   false
  stackSize:       0
  offsetAdjustment: 0
  maxAlignment:    1
  adjustsStack:    false
  hasCalls:        false
  stackProtector:  ''
  maxCallFrameSize: 0
  hasOpaqueSPAdjustment: false
  hasVAStart:      false
  hasMustTailInVarArgFunc: false
  localFrameSize:  0
  savePoint:       ''
  restorePoint:    ''
fixedStack:
stack:
constants:
body:             |
  ; R6-LABEL: name: expand_BEQZC
  ; R6: bb.0 (%ir-block.0):
  ; R6:   successors: %bb.2(0x40000000), %bb.1(0x40000000)
  ; R6:   renamable $at = ANDi killed renamable $a0, 1
  ; R6:   BNEZC $at, %bb.2, implicit-def $at
  ; R6: bb.1 (%ir-block.0):
  ; R6:   successors: %bb.3(0x80000000)
  ; R6:   BC %bb.3
  ; R6: bb.2.iftrue:
  ; R6:   successors: %bb.3(0x80000000)
  ; R6:   INLINEASM &".space 8388608", 1
  ; R6: bb.3.tail:
  ; R6:   JIC undef $ra, 0, implicit-def $at
  ; PIC-LABEL: name: expand_BEQZC
  ; PIC: bb.0 (%ir-block.0):
  ; PIC:   successors: %bb.3(0x40000000), %bb.1(0x40000000)
  ; PIC:   renamable $at = ANDi killed renamable $a0, 1
  ; PIC:   BNEZC $at, %bb.3, implicit-def $at
  ; PIC: bb.1 (%ir-block.0):
  ; PIC:   successors: %bb.2(0x80000000)
  ; PIC:   $sp = ADDiu $sp, -8
  ; PIC:   SW $ra, $sp, 0
  ; PIC:   $at = LONG_BRANCH_LUi target-flags(mips-abs-hi) %bb.4, %bb.2
  ; PIC:   $at = LONG_BRANCH_ADDiu $at, target-flags(mips-abs-lo) %bb.4, %bb.2
  ; PIC:   BALC %bb.2, implicit-def $ra
  ; PIC: bb.2 (%ir-block.0):
  ; PIC:   successors: %bb.4(0x80000000)
  ; PIC:   $at = ADDu $ra, $at
  ; PIC:   $ra = LW $sp, 0
  ; PIC:   $sp = ADDiu $sp, 8
  ; PIC:   JIC $at, 0, implicit-def $at
  ; PIC: bb.3.iftrue:
  ; PIC:   successors: %bb.4(0x80000000)
  ; PIC:   INLINEASM &".space 8388608", 1
  ; PIC: bb.4.tail:
  ; PIC:   JIC undef $ra, 0, implicit-def $at
  bb.0 (%ir-block.0):
    successors: %bb.1(0x40000000), %bb.2(0x40000000)
    liveins: $a0

    renamable $at = ANDi killed renamable $a0, 1
    BEQZC killed renamable $at, %bb.2, implicit-def $at

  bb.1.iftrue:
    successors: %bb.2(0x80000000)

    INLINEASM &".space 8388608", 1

  bb.2.tail:
    PseudoReturn undef $ra

...
---

name:            expand_BNEZC
alignment:       4
exposesReturnsTwice: false
legalized:       false
regBankSelected: false
selected:        false
failedISel:      false
tracksRegLiveness: true
registers:
liveins:
  - { reg: '$a0', virtual-reg: '' }
frameInfo:
  isFrameAddressTaken: false
  isReturnAddressTaken: false
  hasStackMap:     false
  hasPatchPoint:   false
  stackSize:       0
  offsetAdjustment: 0
  maxAlignment:    1
  adjustsStack:    false
  hasCalls:        false
  stackProtector:  ''
  maxCallFrameSize: 0
  hasOpaqueSPAdjustment: false
  hasVAStart:      false
  hasMustTailInVarArgFunc: false
  localFrameSize:  0
  savePoint:       ''
  restorePoint:    ''
fixedStack:
stack:
constants:
body:             |
  ; R6-LABEL: name: expand_BNEZC
  ; R6: bb.0 (%ir-block.0):
  ; R6:   successors: %bb.2(0x40000000), %bb.1(0x40000000)
  ; R6:   renamable $at = ANDi killed renamable $a0, 1
  ; R6:   BEQZC $at, %bb.2, implicit-def $at
  ; R6: bb.1 (%ir-block.0):
  ; R6:   successors: %bb.3(0x80000000)
  ; R6:   BC %bb.3
  ; R6: bb.2.iftrue:
  ; R6:   successors: %bb.3(0x80000000)
  ; R6:   INLINEASM &".space 8388608", 1
  ; R6: bb.3.tail:
  ; R6:   JIC undef $ra, 0, implicit-def $at
  ; PIC-LABEL: name: expand_BNEZC
  ; PIC: bb.0 (%ir-block.0):
  ; PIC:   successors: %bb.3(0x40000000), %bb.1(0x40000000)
  ; PIC:   renamable $at = ANDi killed renamable $a0, 1
  ; PIC:   BEQZC $at, %bb.3, implicit-def $at
  ; PIC: bb.1 (%ir-block.0):
  ; PIC:   successors: %bb.2(0x80000000)
  ; PIC:   $sp = ADDiu $sp, -8
  ; PIC:   SW $ra, $sp, 0
  ; PIC:   $at = LONG_BRANCH_LUi target-flags(mips-abs-hi) %bb.4, %bb.2
  ; PIC:   $at = LONG_BRANCH_ADDiu $at, target-flags(mips-abs-lo) %bb.4, %bb.2
  ; PIC:   BALC %bb.2, implicit-def $ra
  ; PIC: bb.2 (%ir-block.0):
  ; PIC:   successors: %bb.4(0x80000000)
  ; PIC:   $at = ADDu $ra, $at
  ; PIC:   $ra = LW $sp, 0
  ; PIC:   $sp = ADDiu $sp, 8
  ; PIC:   JIC $at, 0, implicit-def $at
  ; PIC: bb.3.iftrue:
  ; PIC:   successors: %bb.4(0x80000000)
  ; PIC:   INLINEASM &".space 8388608", 1
  ; PIC: bb.4.tail:
  ; PIC:   JIC undef $ra, 0, implicit-def $at
  bb.0 (%ir-block.0):
    successors: %bb.1(0x40000000), %bb.2(0x40000000)
    liveins: $a0

    renamable $at = ANDi killed renamable $a0, 1
    BNEZC killed renamable $at, %bb.2, implicit-def $at

  bb.1.iftrue:
    successors: %bb.2(0x80000000)

    INLINEASM &".space 8388608", 1

  bb.2.tail:
    PseudoReturn undef $ra

...