# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
# RUN: llc -mtriple=mips-mti-linux-gnu -o - %s -start-before mips-delay-slot-filler -stop-after mips-branch-expansion | FileCheck %s --check-prefix=MIPS
# RUN: llc -mtriple=mips-mti-linux-gnu -o - %s -start-before mips-delay-slot-filler -stop-after mips-branch-expansion -relocation-model=pic | FileCheck %s --check-prefix=PIC
# Test the long branch expansion of various branches
--- |
define void @expand_BEQ(i1 %a) {
br i1 %a, label %iftrue, label %tail
iftrue:
call void asm sideeffect ".space 131068", ""()
br label %tail
tail:
ret void
}
define void @expand_BGEZ(i1 %a) {
br i1 %a, label %iftrue, label %tail
iftrue:
call void asm sideeffect ".space 131068", ""()
br label %tail
tail:
ret void
}
define void @expand_BGTZ(i1 %a) {
br i1 %a, label %iftrue, label %tail
iftrue:
call void asm sideeffect ".space 131068", ""()
br label %tail
tail:
ret void
}
define void @expand_BLEZ(i1 %a) {
br i1 %a, label %iftrue, label %tail
iftrue:
call void asm sideeffect ".space 131068", ""()
br label %tail
tail:
ret void
}
define void @expand_BLTZ(i1 %a) {
br i1 %a, label %iftrue, label %tail
iftrue:
call void asm sideeffect ".space 131068", ""()
br label %tail
tail:
ret void
}
define void @expand_BNE(i1 %a) {
br i1 %a, label %iftrue, label %tail
iftrue:
call void asm sideeffect ".space 131068", ""()
br label %tail
tail:
ret void
}
...
---
name: expand_BEQ
alignment: 4
exposesReturnsTwice: false
legalized: false
regBankSelected: false
selected: false
failedISel: false
tracksRegLiveness: true
registers:
liveins:
- { reg: '$a0', virtual-reg: '' }
frameInfo:
isFrameAddressTaken: false
isReturnAddressTaken: false
hasStackMap: false
hasPatchPoint: false
stackSize: 0
offsetAdjustment: 0
maxAlignment: 1
adjustsStack: false
hasCalls: false
stackProtector: ''
maxCallFrameSize: 0
hasOpaqueSPAdjustment: false
hasVAStart: false
hasMustTailInVarArgFunc: false
localFrameSize: 0
savePoint: ''
restorePoint: ''
fixedStack:
stack:
constants:
body: |
; MIPS-LABEL: name: expand_BEQ
; MIPS: bb.0 (%ir-block.0):
; MIPS: successors: %bb.2(0x40000000), %bb.1(0x40000000)
; MIPS: renamable $at = ANDi killed renamable $a0, 1
; MIPS: BNE $at, $zero, %bb.2, implicit-def $at {
; MIPS: $zero = SLL $zero, 0
; MIPS: }
; MIPS: bb.1 (%ir-block.0):
; MIPS: successors: %bb.3(0x80000000)
; MIPS: J %bb.3, implicit-def $at {
; MIPS: $zero = SLL $zero, 0
; MIPS: }
; MIPS: bb.2.iftrue:
; MIPS: successors: %bb.3(0x80000000)
; MIPS: INLINEASM &".space 131068", 1
; MIPS: bb.3.tail:
; MIPS: PseudoReturn undef $ra {
; MIPS: $zero = SLL $zero, 0
; MIPS: }
; PIC-LABEL: name: expand_BEQ
; PIC: bb.0 (%ir-block.0):
; PIC: successors: %bb.3(0x40000000), %bb.1(0x40000000)
; PIC: renamable $at = ANDi killed renamable $a0, 1
; PIC: BNE $at, $zero, %bb.3, implicit-def $at {
; PIC: $zero = SLL $zero, 0
; PIC: }
; PIC: bb.1 (%ir-block.0):
; PIC: successors: %bb.2(0x80000000)
; PIC: $sp = ADDiu $sp, -8
; PIC: SW $ra, $sp, 0
; PIC: $at = LONG_BRANCH_LUi target-flags(mips-abs-hi) %bb.4, %bb.2
; PIC: BAL_BR %bb.2, implicit-def $ra {
; PIC: $at = LONG_BRANCH_ADDiu $at, target-flags(mips-abs-lo) %bb.4, %bb.2
; PIC: }
; PIC: bb.2 (%ir-block.0):
; PIC: successors: %bb.4(0x80000000)
; PIC: $at = ADDu $ra, $at
; PIC: $ra = LW $sp, 0
; PIC: JR $at {
; PIC: $sp = ADDiu $sp, 8
; PIC: }
; PIC: bb.3.iftrue:
; PIC: successors: %bb.4(0x80000000)
; PIC: INLINEASM &".space 131068", 1
; PIC: bb.4.tail:
; PIC: PseudoReturn undef $ra {
; PIC: $zero = SLL $zero, 0
; PIC: }
bb.0 (%ir-block.0):
successors: %bb.1(0x40000000), %bb.2(0x40000000)
liveins: $a0
renamable $at = ANDi killed renamable $a0, 1
BEQ killed renamable $at, $zero, %bb.2, implicit-def $at
bb.1.iftrue:
successors: %bb.2(0x80000000)
INLINEASM &".space 131068", 1
bb.2.tail:
PseudoReturn undef $ra
...
---
name: expand_BGEZ
alignment: 4
exposesReturnsTwice: false
legalized: false
regBankSelected: false
selected: false
failedISel: false
tracksRegLiveness: true
registers:
liveins:
- { reg: '$a0', virtual-reg: '' }
frameInfo:
isFrameAddressTaken: false
isReturnAddressTaken: false
hasStackMap: false
hasPatchPoint: false
stackSize: 0
offsetAdjustment: 0
maxAlignment: 1
adjustsStack: false
hasCalls: false
stackProtector: ''
maxCallFrameSize: 0
hasOpaqueSPAdjustment: false
hasVAStart: false
hasMustTailInVarArgFunc: false
localFrameSize: 0
savePoint: ''
restorePoint: ''
fixedStack:
stack:
constants:
body: |
; MIPS-LABEL: name: expand_BGEZ
; MIPS: bb.0 (%ir-block.0):
; MIPS: successors: %bb.2(0x40000000), %bb.1(0x40000000)
; MIPS: renamable $at = ANDi killed renamable $a0, 1
; MIPS: BLTZ $at, %bb.2, implicit-def $at {
; MIPS: $zero = SLL $zero, 0
; MIPS: }
; MIPS: bb.1 (%ir-block.0):
; MIPS: successors: %bb.3(0x80000000)
; MIPS: J %bb.3, implicit-def $at {
; MIPS: $zero = SLL $zero, 0
; MIPS: }
; MIPS: bb.2.iftrue:
; MIPS: successors: %bb.3(0x80000000)
; MIPS: INLINEASM &".space 131068", 1
; MIPS: bb.3.tail:
; MIPS: PseudoReturn undef $ra {
; MIPS: $zero = SLL $zero, 0
; MIPS: }
; PIC-LABEL: name: expand_BGEZ
; PIC: bb.0 (%ir-block.0):
; PIC: successors: %bb.3(0x40000000), %bb.1(0x40000000)
; PIC: renamable $at = ANDi killed renamable $a0, 1
; PIC: BLTZ $at, %bb.3, implicit-def $at {
; PIC: $zero = SLL $zero, 0
; PIC: }
; PIC: bb.1 (%ir-block.0):
; PIC: successors: %bb.2(0x80000000)
; PIC: $sp = ADDiu $sp, -8
; PIC: SW $ra, $sp, 0
; PIC: $at = LONG_BRANCH_LUi target-flags(mips-abs-hi) %bb.4, %bb.2
; PIC: BAL_BR %bb.2, implicit-def $ra {
; PIC: $at = LONG_BRANCH_ADDiu $at, target-flags(mips-abs-lo) %bb.4, %bb.2
; PIC: }
; PIC: bb.2 (%ir-block.0):
; PIC: successors: %bb.4(0x80000000)
; PIC: $at = ADDu $ra, $at
; PIC: $ra = LW $sp, 0
; PIC: JR $at {
; PIC: $sp = ADDiu $sp, 8
; PIC: }
; PIC: bb.3.iftrue:
; PIC: successors: %bb.4(0x80000000)
; PIC: INLINEASM &".space 131068", 1
; PIC: bb.4.tail:
; PIC: PseudoReturn undef $ra {
; PIC: $zero = SLL $zero, 0
; PIC: }
bb.0 (%ir-block.0):
successors: %bb.1(0x40000000), %bb.2(0x40000000)
liveins: $a0
renamable $at = ANDi killed renamable $a0, 1
BGEZ killed renamable $at, %bb.2, implicit-def $at
bb.1.iftrue:
successors: %bb.2(0x80000000)
INLINEASM &".space 131068", 1
bb.2.tail:
PseudoReturn undef $ra
...
---
name: expand_BGTZ
alignment: 4
exposesReturnsTwice: false
legalized: false
regBankSelected: false
selected: false
failedISel: false
tracksRegLiveness: true
registers:
liveins:
- { reg: '$a0', virtual-reg: '' }
frameInfo:
isFrameAddressTaken: false
isReturnAddressTaken: false
hasStackMap: false
hasPatchPoint: false
stackSize: 0
offsetAdjustment: 0
maxAlignment: 1
adjustsStack: false
hasCalls: false
stackProtector: ''
maxCallFrameSize: 0
hasOpaqueSPAdjustment: false
hasVAStart: false
hasMustTailInVarArgFunc: false
localFrameSize: 0
savePoint: ''
restorePoint: ''
fixedStack:
stack:
constants:
body: |
; MIPS-LABEL: name: expand_BGTZ
; MIPS: bb.0 (%ir-block.0):
; MIPS: successors: %bb.2(0x40000000), %bb.1(0x40000000)
; MIPS: renamable $at = ANDi killed renamable $a0, 1
; MIPS: BLEZ $at, %bb.2, implicit-def $at {
; MIPS: $zero = SLL $zero, 0
; MIPS: }
; MIPS: bb.1 (%ir-block.0):
; MIPS: successors: %bb.3(0x80000000)
; MIPS: J %bb.3, implicit-def $at {
; MIPS: $zero = SLL $zero, 0
; MIPS: }
; MIPS: bb.2.iftrue:
; MIPS: successors: %bb.3(0x80000000)
; MIPS: INLINEASM &".space 131068", 1
; MIPS: bb.3.tail:
; MIPS: PseudoReturn undef $ra {
; MIPS: $zero = SLL $zero, 0
; MIPS: }
; PIC-LABEL: name: expand_BGTZ
; PIC: bb.0 (%ir-block.0):
; PIC: successors: %bb.3(0x40000000), %bb.1(0x40000000)
; PIC: renamable $at = ANDi killed renamable $a0, 1
; PIC: BLEZ $at, %bb.3, implicit-def $at {
; PIC: $zero = SLL $zero, 0
; PIC: }
; PIC: bb.1 (%ir-block.0):
; PIC: successors: %bb.2(0x80000000)
; PIC: $sp = ADDiu $sp, -8
; PIC: SW $ra, $sp, 0
; PIC: $at = LONG_BRANCH_LUi target-flags(mips-abs-hi) %bb.4, %bb.2
; PIC: BAL_BR %bb.2, implicit-def $ra {
; PIC: $at = LONG_BRANCH_ADDiu $at, target-flags(mips-abs-lo) %bb.4, %bb.2
; PIC: }
; PIC: bb.2 (%ir-block.0):
; PIC: successors: %bb.4(0x80000000)
; PIC: $at = ADDu $ra, $at
; PIC: $ra = LW $sp, 0
; PIC: JR $at {
; PIC: $sp = ADDiu $sp, 8
; PIC: }
; PIC: bb.3.iftrue:
; PIC: successors: %bb.4(0x80000000)
; PIC: INLINEASM &".space 131068", 1
; PIC: bb.4.tail:
; PIC: PseudoReturn undef $ra {
; PIC: $zero = SLL $zero, 0
; PIC: }
bb.0 (%ir-block.0):
successors: %bb.1(0x40000000), %bb.2(0x40000000)
liveins: $a0
renamable $at = ANDi killed renamable $a0, 1
BGTZ killed renamable $at, %bb.2, implicit-def $at
bb.1.iftrue:
successors: %bb.2(0x80000000)
INLINEASM &".space 131068", 1
bb.2.tail:
PseudoReturn undef $ra
...
---
name: expand_BLEZ
alignment: 4
exposesReturnsTwice: false
legalized: false
regBankSelected: false
selected: false
failedISel: false
tracksRegLiveness: true
registers:
liveins:
- { reg: '$a0', virtual-reg: '' }
frameInfo:
isFrameAddressTaken: false
isReturnAddressTaken: false
hasStackMap: false
hasPatchPoint: false
stackSize: 0
offsetAdjustment: 0
maxAlignment: 1
adjustsStack: false
hasCalls: false
stackProtector: ''
maxCallFrameSize: 0
hasOpaqueSPAdjustment: false
hasVAStart: false
hasMustTailInVarArgFunc: false
localFrameSize: 0
savePoint: ''
restorePoint: ''
fixedStack:
stack:
constants:
body: |
; MIPS-LABEL: name: expand_BLEZ
; MIPS: bb.0 (%ir-block.0):
; MIPS: successors: %bb.2(0x40000000), %bb.1(0x40000000)
; MIPS: renamable $at = ANDi killed renamable $a0, 1
; MIPS: BGTZ $at, %bb.2, implicit-def $at {
; MIPS: $zero = SLL $zero, 0
; MIPS: }
; MIPS: bb.1 (%ir-block.0):
; MIPS: successors: %bb.3(0x80000000)
; MIPS: J %bb.3, implicit-def $at {
; MIPS: $zero = SLL $zero, 0
; MIPS: }
; MIPS: bb.2.iftrue:
; MIPS: successors: %bb.3(0x80000000)
; MIPS: INLINEASM &".space 131068", 1
; MIPS: bb.3.tail:
; MIPS: PseudoReturn undef $ra {
; MIPS: $zero = SLL $zero, 0
; MIPS: }
; PIC-LABEL: name: expand_BLEZ
; PIC: bb.0 (%ir-block.0):
; PIC: successors: %bb.3(0x40000000), %bb.1(0x40000000)
; PIC: renamable $at = ANDi killed renamable $a0, 1
; PIC: BGTZ $at, %bb.3, implicit-def $at {
; PIC: $zero = SLL $zero, 0
; PIC: }
; PIC: bb.1 (%ir-block.0):
; PIC: successors: %bb.2(0x80000000)
; PIC: $sp = ADDiu $sp, -8
; PIC: SW $ra, $sp, 0
; PIC: $at = LONG_BRANCH_LUi target-flags(mips-abs-hi) %bb.4, %bb.2
; PIC: BAL_BR %bb.2, implicit-def $ra {
; PIC: $at = LONG_BRANCH_ADDiu $at, target-flags(mips-abs-lo) %bb.4, %bb.2
; PIC: }
; PIC: bb.2 (%ir-block.0):
; PIC: successors: %bb.4(0x80000000)
; PIC: $at = ADDu $ra, $at
; PIC: $ra = LW $sp, 0
; PIC: JR $at {
; PIC: $sp = ADDiu $sp, 8
; PIC: }
; PIC: bb.3.iftrue:
; PIC: successors: %bb.4(0x80000000)
; PIC: INLINEASM &".space 131068", 1
; PIC: bb.4.tail:
; PIC: PseudoReturn undef $ra {
; PIC: $zero = SLL $zero, 0
; PIC: }
bb.0 (%ir-block.0):
successors: %bb.1(0x40000000), %bb.2(0x40000000)
liveins: $a0
renamable $at = ANDi killed renamable $a0, 1
BLEZ killed renamable $at, %bb.2, implicit-def $at
bb.1.iftrue:
successors: %bb.2(0x80000000)
INLINEASM &".space 131068", 1
bb.2.tail:
PseudoReturn undef $ra
...
---
name: expand_BLTZ
alignment: 4
exposesReturnsTwice: false
legalized: false
regBankSelected: false
selected: false
failedISel: false
tracksRegLiveness: true
registers:
liveins:
- { reg: '$a0', virtual-reg: '' }
frameInfo:
isFrameAddressTaken: false
isReturnAddressTaken: false
hasStackMap: false
hasPatchPoint: false
stackSize: 0
offsetAdjustment: 0
maxAlignment: 1
adjustsStack: false
hasCalls: false
stackProtector: ''
maxCallFrameSize: 0
hasOpaqueSPAdjustment: false
hasVAStart: false
hasMustTailInVarArgFunc: false
localFrameSize: 0
savePoint: ''
restorePoint: ''
fixedStack:
stack:
constants:
body: |
; MIPS-LABEL: name: expand_BLTZ
; MIPS: bb.0 (%ir-block.0):
; MIPS: successors: %bb.2(0x40000000), %bb.1(0x40000000)
; MIPS: renamable $at = ANDi killed renamable $a0, 1
; MIPS: BGEZ $at, %bb.2, implicit-def $at {
; MIPS: $zero = SLL $zero, 0
; MIPS: }
; MIPS: bb.1 (%ir-block.0):
; MIPS: successors: %bb.3(0x80000000)
; MIPS: J %bb.3, implicit-def $at {
; MIPS: $zero = SLL $zero, 0
; MIPS: }
; MIPS: bb.2.iftrue:
; MIPS: successors: %bb.3(0x80000000)
; MIPS: INLINEASM &".space 131068", 1
; MIPS: bb.3.tail:
; MIPS: PseudoReturn undef $ra {
; MIPS: $zero = SLL $zero, 0
; MIPS: }
; PIC-LABEL: name: expand_BLTZ
; PIC: bb.0 (%ir-block.0):
; PIC: successors: %bb.3(0x40000000), %bb.1(0x40000000)
; PIC: renamable $at = ANDi killed renamable $a0, 1
; PIC: BGEZ $at, %bb.3, implicit-def $at {
; PIC: $zero = SLL $zero, 0
; PIC: }
; PIC: bb.1 (%ir-block.0):
; PIC: successors: %bb.2(0x80000000)
; PIC: $sp = ADDiu $sp, -8
; PIC: SW $ra, $sp, 0
; PIC: $at = LONG_BRANCH_LUi target-flags(mips-abs-hi) %bb.4, %bb.2
; PIC: BAL_BR %bb.2, implicit-def $ra {
; PIC: $at = LONG_BRANCH_ADDiu $at, target-flags(mips-abs-lo) %bb.4, %bb.2
; PIC: }
; PIC: bb.2 (%ir-block.0):
; PIC: successors: %bb.4(0x80000000)
; PIC: $at = ADDu $ra, $at
; PIC: $ra = LW $sp, 0
; PIC: JR $at {
; PIC: $sp = ADDiu $sp, 8
; PIC: }
; PIC: bb.3.iftrue:
; PIC: successors: %bb.4(0x80000000)
; PIC: INLINEASM &".space 131068", 1
; PIC: bb.4.tail:
; PIC: PseudoReturn undef $ra {
; PIC: $zero = SLL $zero, 0
; PIC: }
bb.0 (%ir-block.0):
successors: %bb.1(0x40000000), %bb.2(0x40000000)
liveins: $a0
renamable $at = ANDi killed renamable $a0, 1
BLTZ killed renamable $at, %bb.2, implicit-def $at
bb.1.iftrue:
successors: %bb.2(0x80000000)
INLINEASM &".space 131068", 1
bb.2.tail:
PseudoReturn undef $ra
...
---
name: expand_BNE
alignment: 4
exposesReturnsTwice: false
legalized: false
regBankSelected: false
selected: false
failedISel: false
tracksRegLiveness: true
registers:
liveins:
- { reg: '$a0', virtual-reg: '' }
frameInfo:
isFrameAddressTaken: false
isReturnAddressTaken: false
hasStackMap: false
hasPatchPoint: false
stackSize: 0
offsetAdjustment: 0
maxAlignment: 1
adjustsStack: false
hasCalls: false
stackProtector: ''
maxCallFrameSize: 0
hasOpaqueSPAdjustment: false
hasVAStart: false
hasMustTailInVarArgFunc: false
localFrameSize: 0
savePoint: ''
restorePoint: ''
fixedStack:
stack:
constants:
body: |
; MIPS-LABEL: name: expand_BNE
; MIPS: bb.0 (%ir-block.0):
; MIPS: successors: %bb.2(0x40000000), %bb.1(0x40000000)
; MIPS: renamable $at = ANDi killed renamable $a0, 1
; MIPS: BEQ $at, $zero, %bb.2, implicit-def $at {
; MIPS: $zero = SLL $zero, 0
; MIPS: }
; MIPS: bb.1 (%ir-block.0):
; MIPS: successors: %bb.3(0x80000000)
; MIPS: J %bb.3, implicit-def $at {
; MIPS: $zero = SLL $zero, 0
; MIPS: }
; MIPS: bb.2.iftrue:
; MIPS: successors: %bb.3(0x80000000)
; MIPS: INLINEASM &".space 131068", 1
; MIPS: bb.3.tail:
; MIPS: PseudoReturn undef $ra {
; MIPS: $zero = SLL $zero, 0
; MIPS: }
; PIC-LABEL: name: expand_BNE
; PIC: bb.0 (%ir-block.0):
; PIC: successors: %bb.3(0x40000000), %bb.1(0x40000000)
; PIC: renamable $at = ANDi killed renamable $a0, 1
; PIC: BEQ $at, $zero, %bb.3, implicit-def $at {
; PIC: $zero = SLL $zero, 0
; PIC: }
; PIC: bb.1 (%ir-block.0):
; PIC: successors: %bb.2(0x80000000)
; PIC: $sp = ADDiu $sp, -8
; PIC: SW $ra, $sp, 0
; PIC: $at = LONG_BRANCH_LUi target-flags(mips-abs-hi) %bb.4, %bb.2
; PIC: BAL_BR %bb.2, implicit-def $ra {
; PIC: $at = LONG_BRANCH_ADDiu $at, target-flags(mips-abs-lo) %bb.4, %bb.2
; PIC: }
; PIC: bb.2 (%ir-block.0):
; PIC: successors: %bb.4(0x80000000)
; PIC: $at = ADDu $ra, $at
; PIC: $ra = LW $sp, 0
; PIC: JR $at {
; PIC: $sp = ADDiu $sp, 8
; PIC: }
; PIC: bb.3.iftrue:
; PIC: successors: %bb.4(0x80000000)
; PIC: INLINEASM &".space 131068", 1
; PIC: bb.4.tail:
; PIC: PseudoReturn undef $ra {
; PIC: $zero = SLL $zero, 0
; PIC: }
bb.0 (%ir-block.0):
successors: %bb.1(0x40000000), %bb.2(0x40000000)
liveins: $a0
renamable $at = ANDi killed renamable $a0, 1
BNE killed renamable $at, $zero, %bb.2, implicit-def $at
bb.1.iftrue:
successors: %bb.2(0x80000000)
INLINEASM &".space 131068", 1
bb.2.tail:
PseudoReturn undef $ra
...
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