llvm/llvm/test/CodeGen/Mips/GlobalISel/instruction-select/ctlz.mir

# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
# RUN: llc -O0 -mtriple=mipsel-linux-gnu -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s -check-prefixes=MIPS32
---
name:            ctlz_i32
alignment:       4
legalized:       true
regBankSelected: true
tracksRegLiveness: true
body:             |
  bb.1.entry:
    liveins: $a0

    ; MIPS32-LABEL: name: ctlz_i32
    ; MIPS32: liveins: $a0
    ; MIPS32: [[COPY:%[0-9]+]]:gpr32 = COPY $a0
    ; MIPS32: [[CLZ:%[0-9]+]]:gpr32 = CLZ [[COPY]]
    ; MIPS32: $v0 = COPY [[CLZ]]
    ; MIPS32: RetRA implicit $v0
    %0:gprb(s32) = COPY $a0
    %1:gprb(s32) = G_CTLZ %0(s32)
    $v0 = COPY %1(s32)
    RetRA implicit $v0

...