llvm/llvm/test/CodeGen/Mips/GlobalISel/instruction-select/fence.mir

# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
# RUN: llc -O0 -mtriple=mipsel-linux-gnu -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s -check-prefixes=MIPS32
--- |

  define void @atomic_load_i32(ptr %ptr) { ret void }

...
---
name:            atomic_load_i32
alignment:       4
legalized:       true
regBankSelected: true
tracksRegLiveness: true
body:             |
  bb.1 (%ir-block.0):
    liveins: $a0

    ; MIPS32-LABEL: name: atomic_load_i32
    ; MIPS32: liveins: $a0
    ; MIPS32: [[COPY:%[0-9]+]]:gpr32 = COPY $a0
    ; MIPS32: [[LW:%[0-9]+]]:gpr32 = LW [[COPY]], 0 :: (load monotonic (s32) from %ir.ptr)
    ; MIPS32: SYNC 0
    ; MIPS32: $v0 = COPY [[LW]]
    ; MIPS32: RetRA implicit $v0
    %0:gprb(p0) = COPY $a0
    %1:gprb(s32) = G_LOAD %0(p0) :: (load monotonic (s32) from %ir.ptr)
    G_FENCE 4, 1
    $v0 = COPY %1(s32)
    RetRA implicit $v0

...