# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
# RUN: llc -O0 -mtriple=mipsel-linux-gnu -run-pass=regbankselect -verify-machineinstrs %s -o - | FileCheck %s -check-prefixes=MIPS32
--- |
define i32 @mod4_0_to_11(i32 %a) {
entry:
switch i32 %a, label %sw.default [
i32 0, label %sw.bb
i32 4, label %sw.bb
i32 1, label %sw.bb1
i32 5, label %sw.bb1
i32 2, label %sw.bb2
i32 6, label %sw.bb2
i32 3, label %sw.bb3
i32 7, label %sw.bb3
]
sw.bb: ; preds = %entry, %entry
ret i32 0
sw.bb1: ; preds = %entry, %entry
ret i32 1
sw.bb2: ; preds = %entry, %entry
ret i32 2
sw.bb3: ; preds = %entry, %entry
ret i32 3
sw.default: ; preds = %entry
br label %sw.epilog
sw.epilog: ; preds = %sw.default
switch i32 %a, label %sw.default8 [
i32 8, label %sw.bb4
i32 9, label %sw.bb5
i32 10, label %sw.bb6
i32 11, label %sw.bb7
]
sw.bb4: ; preds = %sw.epilog
ret i32 0
sw.bb5: ; preds = %sw.epilog
ret i32 1
sw.bb6: ; preds = %sw.epilog
ret i32 2
sw.bb7: ; preds = %sw.epilog
ret i32 3
sw.default8: ; preds = %sw.epilog
ret i32 -1
}
...
---
name: mod4_0_to_11
alignment: 4
legalized: true
tracksRegLiveness: true
jumpTable:
kind: block-address
entries:
- id: 0
blocks: [ '%bb.2', '%bb.3', '%bb.4', '%bb.5', '%bb.2', '%bb.3',
'%bb.4', '%bb.5' ]
- id: 1
blocks: [ '%bb.8', '%bb.9', '%bb.10', '%bb.11' ]
body: |
; MIPS32-LABEL: name: mod4_0_to_11
; MIPS32: bb.0.entry:
; MIPS32: successors: %bb.6(0x40000000), %bb.1(0x40000000)
; MIPS32: liveins: $a0
; MIPS32: [[COPY:%[0-9]+]]:gprb(s32) = COPY $a0
; MIPS32: [[C:%[0-9]+]]:gprb(s32) = G_CONSTANT i32 7
; MIPS32: [[C1:%[0-9]+]]:gprb(s32) = G_CONSTANT i32 3
; MIPS32: [[C2:%[0-9]+]]:gprb(s32) = G_CONSTANT i32 2
; MIPS32: [[C3:%[0-9]+]]:gprb(s32) = G_CONSTANT i32 1
; MIPS32: [[C4:%[0-9]+]]:gprb(s32) = G_CONSTANT i32 0
; MIPS32: [[C5:%[0-9]+]]:gprb(s32) = G_CONSTANT i32 -1
; MIPS32: [[C6:%[0-9]+]]:gprb(s32) = G_CONSTANT i32 0
; MIPS32: [[SUB:%[0-9]+]]:gprb(s32) = G_SUB [[COPY]], [[C6]]
; MIPS32: [[COPY1:%[0-9]+]]:gprb(s32) = COPY [[SUB]](s32)
; MIPS32: [[COPY2:%[0-9]+]]:gprb(s32) = COPY [[C]](s32)
; MIPS32: [[ICMP:%[0-9]+]]:gprb(s32) = G_ICMP intpred(ugt), [[COPY1]](s32), [[COPY2]]
; MIPS32: [[COPY3:%[0-9]+]]:gprb(s32) = COPY [[ICMP]](s32)
; MIPS32: [[AND:%[0-9]+]]:gprb(s32) = G_AND [[COPY3]], [[C3]]
; MIPS32: G_BRCOND [[AND]](s32), %bb.6
; MIPS32: bb.1.entry:
; MIPS32: successors: %bb.2(0x20000000), %bb.3(0x20000000), %bb.4(0x20000000), %bb.5(0x20000000)
; MIPS32: [[JUMP_TABLE:%[0-9]+]]:gprb(p0) = G_JUMP_TABLE %jump-table.0
; MIPS32: G_BRJT [[JUMP_TABLE]](p0), %jump-table.0, [[COPY1]](s32)
; MIPS32: bb.2.sw.bb:
; MIPS32: $v0 = COPY [[C4]](s32)
; MIPS32: RetRA implicit $v0
; MIPS32: bb.3.sw.bb1:
; MIPS32: $v0 = COPY [[C3]](s32)
; MIPS32: RetRA implicit $v0
; MIPS32: bb.4.sw.bb2:
; MIPS32: $v0 = COPY [[C2]](s32)
; MIPS32: RetRA implicit $v0
; MIPS32: bb.5.sw.bb3:
; MIPS32: $v0 = COPY [[C1]](s32)
; MIPS32: RetRA implicit $v0
; MIPS32: bb.6.sw.default:
; MIPS32: successors: %bb.7(0x80000000)
; MIPS32: bb.7.sw.epilog:
; MIPS32: successors: %bb.13(0x40000000), %bb.8(0x40000000)
; MIPS32: [[C7:%[0-9]+]]:gprb(s32) = G_CONSTANT i32 8
; MIPS32: [[SUB1:%[0-9]+]]:gprb(s32) = G_SUB [[COPY]], [[C7]]
; MIPS32: [[COPY4:%[0-9]+]]:gprb(s32) = COPY [[SUB1]](s32)
; MIPS32: [[COPY5:%[0-9]+]]:gprb(s32) = COPY [[C1]](s32)
; MIPS32: [[ICMP1:%[0-9]+]]:gprb(s32) = G_ICMP intpred(ugt), [[COPY4]](s32), [[COPY5]]
; MIPS32: [[C8:%[0-9]+]]:gprb(s32) = G_CONSTANT i32 1
; MIPS32: [[COPY6:%[0-9]+]]:gprb(s32) = COPY [[ICMP1]](s32)
; MIPS32: [[AND1:%[0-9]+]]:gprb(s32) = G_AND [[COPY6]], [[C8]]
; MIPS32: G_BRCOND [[AND1]](s32), %bb.13
; MIPS32: bb.8.sw.epilog:
; MIPS32: successors: %bb.9(0x20000000), %bb.10(0x20000000), %bb.11(0x20000000), %bb.12(0x20000000)
; MIPS32: [[JUMP_TABLE1:%[0-9]+]]:gprb(p0) = G_JUMP_TABLE %jump-table.1
; MIPS32: G_BRJT [[JUMP_TABLE1]](p0), %jump-table.1, [[COPY4]](s32)
; MIPS32: bb.9.sw.bb4:
; MIPS32: $v0 = COPY [[C4]](s32)
; MIPS32: RetRA implicit $v0
; MIPS32: bb.10.sw.bb5:
; MIPS32: $v0 = COPY [[C3]](s32)
; MIPS32: RetRA implicit $v0
; MIPS32: bb.11.sw.bb6:
; MIPS32: $v0 = COPY [[C2]](s32)
; MIPS32: RetRA implicit $v0
; MIPS32: bb.12.sw.bb7:
; MIPS32: $v0 = COPY [[C1]](s32)
; MIPS32: RetRA implicit $v0
; MIPS32: bb.13.sw.default8:
; MIPS32: $v0 = COPY [[C5]](s32)
; MIPS32: RetRA implicit $v0
bb.1.entry:
liveins: $a0
%0:_(s32) = COPY $a0
%4:_(s32) = G_CONSTANT i32 7
%8:_(s32) = G_CONSTANT i32 3
%9:_(s32) = G_CONSTANT i32 2
%10:_(s32) = G_CONSTANT i32 1
%11:_(s32) = G_CONSTANT i32 0
%18:_(s32) = G_CONSTANT i32 -1
%1:_(s32) = G_CONSTANT i32 0
%2:_(s32) = G_SUB %0, %1
%3:_(s32) = COPY %2(s32)
%5:_(s32) = COPY %4(s32)
%22:_(s32) = G_ICMP intpred(ugt), %3(s32), %5
%23:_(s32) = COPY %22(s32)
%21:_(s32) = G_AND %23, %10
G_BRCOND %21(s32), %bb.6
bb.13.entry:
successors: %bb.2, %bb.3, %bb.4, %bb.5
%7:_(p0) = G_JUMP_TABLE %jump-table.0
G_BRJT %7(p0), %jump-table.0, %3(s32)
bb.2.sw.bb:
$v0 = COPY %11(s32)
RetRA implicit $v0
bb.3.sw.bb1:
$v0 = COPY %10(s32)
RetRA implicit $v0
bb.4.sw.bb2:
$v0 = COPY %9(s32)
RetRA implicit $v0
bb.5.sw.bb3:
$v0 = COPY %8(s32)
RetRA implicit $v0
bb.6.sw.default:
bb.7.sw.epilog:
%12:_(s32) = G_CONSTANT i32 8
%13:_(s32) = G_SUB %0, %12
%14:_(s32) = COPY %13(s32)
%15:_(s32) = COPY %8(s32)
%20:_(s32) = G_ICMP intpred(ugt), %14(s32), %15
%24:_(s32) = G_CONSTANT i32 1
%25:_(s32) = COPY %20(s32)
%19:_(s32) = G_AND %25, %24
G_BRCOND %19(s32), %bb.12
bb.14.sw.epilog:
successors: %bb.8, %bb.9, %bb.10, %bb.11
%17:_(p0) = G_JUMP_TABLE %jump-table.1
G_BRJT %17(p0), %jump-table.1, %14(s32)
bb.8.sw.bb4:
$v0 = COPY %11(s32)
RetRA implicit $v0
bb.9.sw.bb5:
$v0 = COPY %10(s32)
RetRA implicit $v0
bb.10.sw.bb6:
$v0 = COPY %9(s32)
RetRA implicit $v0
bb.11.sw.bb7:
$v0 = COPY %8(s32)
RetRA implicit $v0
bb.12.sw.default8:
$v0 = COPY %18(s32)
RetRA implicit $v0
...
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