llvm/llvm/test/CodeGen/Mips/GlobalISel/regbankselect/TypeInfoforMF_skipCopies.mir

# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
# RUN: llc -O0 -mtriple=mipsel-linux-gnu -run-pass=regbankselect -verify-machineinstrs %s -o - | FileCheck %s -check-prefixes=MIPS32
--- |

  define void @skipCopiesOutgoing(ptr %ptr_a, ptr %ptr_b, ptr %ptr_c) {entry: ret void}
  define void @skipCopiesIncoming(ptr %float_ptr) {entry: ret void}

...
---
name:            skipCopiesOutgoing
alignment:       4
legalized:       true
tracksRegLiveness: true
body:             |
  bb.1.entry:
    liveins: $a0, $a1, $a2

    ; MIPS32-LABEL: name: skipCopiesOutgoing
    ; MIPS32: liveins: $a0, $a1, $a2
    ; MIPS32: [[COPY:%[0-9]+]]:gprb(p0) = COPY $a0
    ; MIPS32: [[COPY1:%[0-9]+]]:gprb(p0) = COPY $a1
    ; MIPS32: [[COPY2:%[0-9]+]]:gprb(p0) = COPY $a2
    ; MIPS32: [[LOAD:%[0-9]+]]:fprb(s32) = G_LOAD [[COPY]](p0) :: (load (s32) from %ir.ptr_a)
    ; MIPS32: [[COPY3:%[0-9]+]]:fprb(s32) = COPY [[LOAD]](s32)
    ; MIPS32: G_STORE [[COPY3]](s32), [[COPY1]](p0) :: (store (s32) into %ir.ptr_b)
    ; MIPS32: [[COPY4:%[0-9]+]]:fprb(s32) = COPY [[COPY3]](s32)
    ; MIPS32: G_STORE [[COPY4]](s32), [[COPY2]](p0) :: (store (s32) into %ir.ptr_c)
    ; MIPS32: $f0 = COPY [[COPY4]](s32)
    ; MIPS32: RetRA implicit $f0
    %0:_(p0) = COPY $a0
    %1:_(p0) = COPY $a1
    %2:_(p0) = COPY $a2
    %3:_(s32) = G_LOAD %0(p0) :: (load (s32) from %ir.ptr_a)
    %4:_(s32) = COPY %3(s32)
    G_STORE %4(s32), %1(p0) :: (store (s32) into %ir.ptr_b)
    %5:_(s32) = COPY %4(s32)
    G_STORE %5(s32), %2(p0) :: (store (s32) into %ir.ptr_c)
    $f0 = COPY %5(s32)
    RetRA implicit $f0

...
---
name:            skipCopiesIncoming
alignment:       4
legalized:       true
tracksRegLiveness: true
body:             |
  bb.1.entry:
    liveins: $a2, $a3, $f12, $f14

    ; MIPS32-LABEL: name: skipCopiesIncoming
    ; MIPS32: liveins: $a2, $a3, $f12, $f14
    ; MIPS32: [[COPY:%[0-9]+]]:fprb(s32) = COPY $f12
    ; MIPS32: [[COPY1:%[0-9]+]]:fprb(s32) = COPY $f14
    ; MIPS32: [[COPY2:%[0-9]+]]:gprb(p0) = COPY $a2
    ; MIPS32: [[COPY3:%[0-9]+]]:gprb(s32) = COPY $a3
    ; MIPS32: [[LOAD:%[0-9]+]]:fprb(s32) = G_LOAD [[COPY2]](p0) :: (load (s32) from %ir.float_ptr)
    ; MIPS32: [[FADD:%[0-9]+]]:fprb(s32) = G_FADD [[COPY1]], [[COPY]]
    ; MIPS32: [[COPY4:%[0-9]+]]:fprb(s32) = COPY [[FADD]](s32)
    ; MIPS32: [[C:%[0-9]+]]:gprb(s32) = G_CONSTANT i32 1
    ; MIPS32: [[COPY5:%[0-9]+]]:gprb(s32) = COPY [[COPY3]](s32)
    ; MIPS32: [[AND:%[0-9]+]]:gprb(s32) = G_AND [[COPY5]], [[C]]
    ; MIPS32: [[COPY6:%[0-9]+]]:fprb(s32) = COPY [[COPY4]](s32)
    ; MIPS32: [[SELECT:%[0-9]+]]:fprb(s32) = G_SELECT [[AND]](s32), [[LOAD]], [[COPY6]]
    ; MIPS32: $f0 = COPY [[SELECT]](s32)
    ; MIPS32: RetRA implicit $f0
    %0:_(s32) = COPY $f12
    %1:_(s32) = COPY $f14
    %2:_(p0) = COPY $a2
    %4:_(s32) = COPY $a3
    %5:_(s32) = G_LOAD %2(p0) :: (load (s32) from %ir.float_ptr)
    %6:_(s32) = G_FADD %1, %0
    %11:_(s32) = COPY %6(s32)
    %9:_(s32) = G_CONSTANT i32 1
    %10:_(s32) = COPY %4(s32)
    %8:_(s32) = G_AND %10, %9
    %12:_(s32) = COPY %11(s32)
    %7:_(s32) = G_SELECT %8(s32), %5, %12
    $f0 = COPY %7(s32)
    RetRA implicit $f0

...