llvm/llvm/test/CodeGen/Mips/GlobalISel/regbankselect/fptosi_and_fptoui.mir

# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
# RUN: llc -O0 -mtriple=mipsel-linux-gnu -run-pass=regbankselect -verify-machineinstrs %s -o - | FileCheck %s -check-prefixes=FP32
# RUN: llc -O0 -mtriple=mipsel-linux-gnu -mattr=+fp64,+mips32r2 -run-pass=regbankselect -verify-machineinstrs %s -o - | FileCheck %s -check-prefixes=FP64
--- |

  define void @f32toi32() {entry: ret void}
  define void @f64toi32() {entry: ret void}

...
---
name:            f32toi32
alignment:       4
legalized:       true
tracksRegLiveness: true
body:             |
  bb.1.entry:
    liveins: $f12

    ; FP32-LABEL: name: f32toi32
    ; FP32: liveins: $f12
    ; FP32: [[COPY:%[0-9]+]]:fprb(s32) = COPY $f12
    ; FP32: [[FPTOSI:%[0-9]+]]:gprb(s32) = G_FPTOSI [[COPY]](s32)
    ; FP32: $v0 = COPY [[FPTOSI]](s32)
    ; FP32: RetRA implicit $v0
    ; FP64-LABEL: name: f32toi32
    ; FP64: liveins: $f12
    ; FP64: [[COPY:%[0-9]+]]:fprb(s32) = COPY $f12
    ; FP64: [[FPTOSI:%[0-9]+]]:gprb(s32) = G_FPTOSI [[COPY]](s32)
    ; FP64: $v0 = COPY [[FPTOSI]](s32)
    ; FP64: RetRA implicit $v0
    %0:_(s32) = COPY $f12
    %1:_(s32) = G_FPTOSI %0(s32)
    $v0 = COPY %1(s32)
    RetRA implicit $v0

...
---
name:            f64toi32
alignment:       4
legalized:       true
tracksRegLiveness: true
body:             |
  bb.1.entry:
    liveins: $d6

    ; FP32-LABEL: name: f64toi32
    ; FP32: liveins: $d6
    ; FP32: [[COPY:%[0-9]+]]:fprb(s64) = COPY $d6
    ; FP32: [[FPTOSI:%[0-9]+]]:gprb(s32) = G_FPTOSI [[COPY]](s64)
    ; FP32: $v0 = COPY [[FPTOSI]](s32)
    ; FP32: RetRA implicit $v0
    ; FP64-LABEL: name: f64toi32
    ; FP64: liveins: $d6
    ; FP64: [[COPY:%[0-9]+]]:fprb(s64) = COPY $d6
    ; FP64: [[FPTOSI:%[0-9]+]]:gprb(s32) = G_FPTOSI [[COPY]](s64)
    ; FP64: $v0 = COPY [[FPTOSI]](s32)
    ; FP64: RetRA implicit $v0
    %0:_(s64) = COPY $d6
    %1:_(s32) = G_FPTOSI %0(s64)
    $v0 = COPY %1(s32)
    RetRA implicit $v0

...