llvm/llvm/test/CodeGen/Mips/coalesce-partial-redundant-reguse-terminator.mir

# RUN: llc -march=mips64 -o - %s -run-pass=register-coalescer -verify-coalescing | FileCheck %s

---
name:            f
tracksRegLiveness: true
body:             |
 bb.0:
    %0:gpr32 = ADDiu $zero, 0
    %1:gpr32 = COPY %0
    %1:gpr32 = ADDiu %1, 1
    BEQ %0, $zero, %bb.3, implicit-def $at
    J %bb.1, implicit-def dead $at

 bb.1:
    J %bb.2, implicit %1, implicit-def dead $at

 bb.2:
    %1:gpr32 = COPY %0
    %0:gpr32 = COPY %1
    BEQ %0:gpr32, $zero, %bb.2, implicit-def $at

 bb.3:
    %4:gpr32 = ADDiu %1, 1
...

# We should not hoist the
#
#  %1:gpr32 = COPY %0
#
# into bb.1 since %1 is used in the terminating instruction J there.

# CHECK-LABEL: bb.1:
# CHECK-NOT:      COPY
# CHECK:          J

# CHECK-LABEL: bb.2: