llvm/llvm/test/CodeGen/Mips/micromips-sizereduction/micromips-movep.ll

; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc -mtriple=mipsel-unknown-linux-gnu -mattr=+micromips -mcpu=mips32r2 \
; RUN: -verify-machineinstrs < %s | FileCheck %s

; Function Attrs: nounwind
define i64 @move() {
; CHECK-LABEL: move:
; CHECK:       # %bb.0: # %entry
; CHECK-NEXT:    addiusp -24
; CHECK-NEXT:    .cfi_def_cfa_offset 24
; CHECK-NEXT:    sw $ra, 20($sp) # 4-byte Folded Spill
; CHECK-NEXT:    .cfi_offset 31, -4
; CHECK-NEXT:    jal g
; CHECK-NEXT:    nop
; CHECK-NEXT:    movep $4, $5, $2, $3
; CHECK-NEXT:    jal f
; CHECK-NEXT:    nop
; CHECK-NEXT:    lw $ra, 20($sp) # 4-byte Folded Reload
; CHECK-NEXT:    addiusp 24
; CHECK-NEXT:    jrc $ra
entry:
  %call = call i64 @g()
  %call1 = call i64 @f(i64 signext %call)
  ret i64 %call1
}

declare i64 @f(i64 signext %a)
declare i64 @g()