llvm/llvm/test/CodeGen/X86/unaligned_extract_from_vector_through_stack.ll

; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu | FileCheck %s

define i32 @foo(i32 %arg1) #0 {
; CHECK-LABEL: foo:
; CHECK:       # %bb.0: # %entry
; CHECK-NEXT:    # kill: def $edi killed $edi def $rdi
; CHECK-NEXT:    vxorps %xmm0, %xmm0, %xmm0
; CHECK-NEXT:    vmovups %ymm0, -{{[0-9]+}}(%rsp)
; CHECK-NEXT:    andl $31, %edi
; CHECK-NEXT:    movzbl -40(%rsp,%rdi), %eax
; CHECK-NEXT:    vzeroupper
; CHECK-NEXT:    retq
entry:
  %a = extractelement <32 x i8> zeroinitializer, i32 %arg1
  %b = zext i8 %a to i32
  ret i32 %b
}

define i32 @foo2(i32 %arg1) #1 {
; CHECK-LABEL: foo2:
; CHECK:       # %bb.0: # %entry
; CHECK-NEXT:    # kill: def $edi killed $edi def $rdi
; CHECK-NEXT:    vxorps %xmm0, %xmm0, %xmm0
; CHECK-NEXT:    vmovups %ymm0, -{{[0-9]+}}(%rsp)
; CHECK-NEXT:    vmovups %ymm0, -{{[0-9]+}}(%rsp)
; CHECK-NEXT:    andl $31, %edi
; CHECK-NEXT:    movzwl -72(%rsp,%rdi,2), %eax
; CHECK-NEXT:    vzeroupper
; CHECK-NEXT:    retq
entry:
  %a = extractelement <32 x i16> zeroinitializer, i32 %arg1
  %b = zext i16 %a to i32
  ret i32 %b
}

attributes #0 = { "no-realign-stack" "target-cpu"="skylake-avx512" }
attributes #1 = { "no-realign-stack" "target-cpu"="skylake" }