llvm/llvm/test/CodeGen/X86/neg-shl-add.ll

; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc -mtriple=x86_64-- < %s | FileCheck %s
; These sequences don't need neg instructions; they can be done with
; a single shift and sub each.

define i64 @foo(i64 %x, i64 %y, i64 %n) nounwind {
; CHECK-LABEL: foo:
; CHECK:       # %bb.0:
; CHECK-NEXT:    movq %rdx, %rcx
; CHECK-NEXT:    movq %rdi, %rax
; CHECK-NEXT:    # kill: def $cl killed $cl killed $rcx
; CHECK-NEXT:    shlq %cl, %rsi
; CHECK-NEXT:    subq %rsi, %rax
; CHECK-NEXT:    retq
  %a = sub i64 0, %y
  %b = shl i64 %a, %n
  %c = add i64 %b, %x
  ret i64 %c
}
define i64 @boo(i64 %x, i64 %y, i64 %n) nounwind {
; CHECK-LABEL: boo:
; CHECK:       # %bb.0:
; CHECK-NEXT:    movq %rdx, %rcx
; CHECK-NEXT:    movq %rdi, %rax
; CHECK-NEXT:    # kill: def $cl killed $cl killed $rcx
; CHECK-NEXT:    shlq %cl, %rsi
; CHECK-NEXT:    subq %rsi, %rax
; CHECK-NEXT:    retq
  %a = sub i64 0, %y
  %b = shl i64 %a, %n
  %c = add i64 %x, %b
  ret i64 %c
}