llvm/llvm/test/CodeGen/X86/statepoint-vreg-folding.mir

# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
# RUN: llc -run-pass=greedy -o - %s | FileCheck %s

--- |
  ; ModuleID = 'folding.ll'
  source_filename = "folding.ll"
  target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-f80:128-n8:16:32:64-S128"
  target triple = "x86_64-pc-linux-gnu"

  declare void @func()

  define i32 @test_spill(ptr addrspace(1) %arg00, ptr addrspace(1) %arg01, ptr addrspace(1) %arg02, ptr addrspace(1) %arg03, ptr addrspace(1) %arg04, ptr addrspace(1) %arg05, ptr addrspace(1) %arg06, ptr addrspace(1) %arg07, ptr addrspace(1) %arg08) gc "statepoint-example" {
    %token = call token (i64, i32, ptr, i32, i32, ...) @llvm.experimental.gc.statepoint.p0(i64 0, i32 0, ptr elementtype(void ()) @func, i32 0, i32 0, i32 0, i32 0) [ "gc-live"(ptr addrspace(1) %arg00, ptr addrspace(1) %arg01, ptr addrspace(1) %arg02, ptr addrspace(1) %arg03, ptr addrspace(1) %arg04, ptr addrspace(1) %arg05, ptr addrspace(1) %arg06, ptr addrspace(1) %arg07, ptr addrspace(1) %arg08) ]
    %rel00 = call ptr addrspace(1) @llvm.experimental.gc.relocate.p1(token %token, i32 0, i32 0) ; (%arg00, %arg00)
    %rel01 = call ptr addrspace(1) @llvm.experimental.gc.relocate.p1(token %token, i32 1, i32 1) ; (%arg01, %arg01)
    %rel02 = call ptr addrspace(1) @llvm.experimental.gc.relocate.p1(token %token, i32 2, i32 2) ; (%arg02, %arg02)
    %rel03 = call ptr addrspace(1) @llvm.experimental.gc.relocate.p1(token %token, i32 3, i32 3) ; (%arg03, %arg03)
    %rel04 = call ptr addrspace(1) @llvm.experimental.gc.relocate.p1(token %token, i32 4, i32 4) ; (%arg04, %arg04)
    %rel05 = call ptr addrspace(1) @llvm.experimental.gc.relocate.p1(token %token, i32 5, i32 5) ; (%arg05, %arg05)
    %rel06 = call ptr addrspace(1) @llvm.experimental.gc.relocate.p1(token %token, i32 6, i32 6) ; (%arg06, %arg06)
    %rel07 = call ptr addrspace(1) @llvm.experimental.gc.relocate.p1(token %token, i32 7, i32 7) ; (%arg07, %arg07)
    %rel08 = call ptr addrspace(1) @llvm.experimental.gc.relocate.p1(token %token, i32 8, i32 8) ; (%arg08, %arg08)
    %gep00 = getelementptr i32, ptr addrspace(1) %rel00, i64 1
    %gep01 = getelementptr i32, ptr addrspace(1) %rel01, i64 2
    %gep02 = getelementptr i32, ptr addrspace(1) %rel02, i64 3
    %gep03 = getelementptr i32, ptr addrspace(1) %rel03, i64 4
    %gep04 = getelementptr i32, ptr addrspace(1) %rel04, i64 5
    %gep05 = getelementptr i32, ptr addrspace(1) %rel05, i64 6
    %gep06 = getelementptr i32, ptr addrspace(1) %rel06, i64 7
    %gep07 = getelementptr i32, ptr addrspace(1) %rel07, i64 8
    %gep08 = getelementptr i32, ptr addrspace(1) %rel08, i64 9
    %val00 = load i32, ptr addrspace(1) %gep00, align 4
    %val01 = load i32, ptr addrspace(1) %gep01, align 4
    %sum01 = add i32 %val00, %val01
    %val02 = load i32, ptr addrspace(1) %gep02, align 4
    %sum02 = add i32 %sum01, %val02
    %val03 = load i32, ptr addrspace(1) %gep03, align 4
    %sum03 = add i32 %sum02, %val03
    %val04 = load i32, ptr addrspace(1) %gep04, align 4
    %sum04 = add i32 %sum03, %val04
    %val05 = load i32, ptr addrspace(1) %gep05, align 4
    %sum05 = add i32 %sum04, %val05
    %val06 = load i32, ptr addrspace(1) %gep06, align 4
    %sum06 = add i32 %sum05, %val06
    %val07 = load i32, ptr addrspace(1) %gep07, align 4
    %sum07 = add i32 %sum06, %val07
    %val08 = load i32, ptr addrspace(1) %gep08, align 4
    %sum08 = add i32 %sum07, %val08
    ret i32 %sum08
  }

  ; Function Attrs: nounwind readonly
  declare ptr addrspace(1) @llvm.experimental.gc.relocate.p1(token, i32 immarg, i32 immarg) #0

  declare token @llvm.experimental.gc.statepoint.p0(i64 immarg, i32 immarg, ptr, i32 immarg, i32 immarg, ...)

  ; Function Attrs: nounwind
  declare void @llvm.stackprotector(ptr, ptr) #1

  attributes #0 = { nounwind readonly }
  attributes #1 = { nounwind }

...
---
name:            test_spill
alignment:       16
exposesReturnsTwice: false
legalized:       false
regBankSelected: false
selected:        false
failedISel:      false
tracksRegLiveness: true
hasWinCFI:       false
registers:
  - { id: 0, class: gr64, preferred-register: '' }
  - { id: 1, class: gr64, preferred-register: '' }
  - { id: 2, class: gr64, preferred-register: '' }
  - { id: 3, class: gr64, preferred-register: '' }
  - { id: 4, class: gr64, preferred-register: '' }
  - { id: 5, class: gr64, preferred-register: '' }
  - { id: 6, class: gr64, preferred-register: '' }
  - { id: 7, class: gr64, preferred-register: '' }
  - { id: 8, class: gr64, preferred-register: '' }
  - { id: 9, class: gr64, preferred-register: '' }
  - { id: 10, class: gr64, preferred-register: '' }
  - { id: 11, class: gr64, preferred-register: '' }
  - { id: 12, class: gr64, preferred-register: '' }
  - { id: 13, class: gr64, preferred-register: '' }
  - { id: 14, class: gr64, preferred-register: '' }
  - { id: 15, class: gr64, preferred-register: '' }
  - { id: 16, class: gr64, preferred-register: '' }
  - { id: 17, class: gr64, preferred-register: '' }
  - { id: 18, class: gr32, preferred-register: '' }
  - { id: 19, class: gr32, preferred-register: '' }
  - { id: 20, class: gr32, preferred-register: '' }
  - { id: 21, class: gr32, preferred-register: '' }
  - { id: 22, class: gr32, preferred-register: '' }
  - { id: 23, class: gr32, preferred-register: '' }
  - { id: 24, class: gr32, preferred-register: '' }
  - { id: 25, class: gr32, preferred-register: '' }
  - { id: 26, class: gr32, preferred-register: '' }
liveins:
  - { reg: '$rdi', virtual-reg: '%0' }
  - { reg: '$rsi', virtual-reg: '%1' }
  - { reg: '$rdx', virtual-reg: '%2' }
  - { reg: '$rcx', virtual-reg: '%3' }
  - { reg: '$r8', virtual-reg: '%4' }
  - { reg: '$r9', virtual-reg: '%5' }
frameInfo:
  isFrameAddressTaken: false
  isReturnAddressTaken: false
  hasStackMap:     false
  hasPatchPoint:   false
  stackSize:       0
  offsetAdjustment: 0
  maxAlignment:    8
  adjustsStack:    true
  hasCalls:        true
  stackProtector:  ''
  maxCallFrameSize: 4294967295
  cvBytesOfCalleeSavedRegisters: 0
  hasOpaqueSPAdjustment: false
  hasVAStart:      false
  hasMustTailInVarArgFunc: false
  localFrameSize:  0
  savePoint:       ''
  restorePoint:    ''
fixedStack:
  - { id: 0, type: default, offset: 16, size: 8, alignment: 16, stack-id: default,
      isImmutable: true, isAliased: false, callee-saved-register: '', callee-saved-restored: true,
      debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
  - { id: 1, type: default, offset: 8, size: 8, alignment: 8, stack-id: default,
      isImmutable: true, isAliased: false, callee-saved-register: '', callee-saved-restored: true,
      debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
  - { id: 2, type: default, offset: 0, size: 8, alignment: 16, stack-id: default,
      isImmutable: true, isAliased: false, callee-saved-register: '', callee-saved-restored: true,
      debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
stack:           []
callSites:       []
constants:       []
machineFunctionInfo: {}
body:             |
  bb.0 (%ir-block.0):
    liveins: $rdi, $rsi, $rdx, $rcx, $r8, $r9

    ; CHECK-LABEL: name: test_spill
    ; CHECK: liveins: $rdi, $rsi, $rdx, $rcx, $r8, $r9
    ; CHECK: MOV64mr %stack.0, 1, $noreg, 0, $noreg, $r9 :: (store (s64) into %stack.0)
    ; CHECK: MOV64mr %stack.1, 1, $noreg, 0, $noreg, $r8 :: (store (s64) into %stack.1)
    ; CHECK: MOV64mr %stack.2, 1, $noreg, 0, $noreg, $rcx :: (store (s64) into %stack.2)
    ; CHECK: [[R1:%[0-9]+]]:gr64 = COPY $rdx
    ; CHECK: [[R2:%[0-9]+]]:gr64 = COPY $rsi
    ; CHECK: [[R3:%[0-9]+]]:gr64 = COPY $rdi
    ; CHECK: [[R4:%[0-9]+]]:gr64 = MOV64rm %fixed-stack.0, 1, $noreg, 0, $noreg :: (load (s64) from %fixed-stack.0, align 16)
    ; CHECK: [[R5:%[0-9]+]]:gr64 = MOV64rm %fixed-stack.1, 1, $noreg, 0, $noreg :: (load (s64) from %fixed-stack.1)
    ; CHECK: [[R6:%[0-9]+]]:gr64 = MOV64rm %fixed-stack.2, 1, $noreg, 0, $noreg :: (load (s64) from %fixed-stack.2, align 16)
    ; CHECK: ADJCALLSTACKDOWN64 0, 0, 0, implicit-def dead $rsp, implicit-def dead $eflags, implicit-def dead $ssp, implicit $rsp, implicit $ssp
    ; CHECK: [[R6]]:gr64, [[R5]]:gr64, [[R4]]:gr64, [[R1]]:gr64, [[R2]]:gr64, [[R3]]:gr64 = STATEPOINT 0, 0, 0, @func, 2, 0, 2, 0, 2, 0, 2, 9, [[R6]](tied-def 0), [[R5]](tied-def 1), [[R4]](tied-def 2), 1, 8, %stack.0, 0, 1, 8, %stack.1, 0, 1, 8, %stack.2, 0, [[R1]](tied-def 3), [[R2]](tied-def 4), [[R3]](tied-def 5), 2, 0, 2, 9, 0, 0, 1, 1, 2, 2, 3, 3, 4, 4, 5, 5, 6, 6, 7, 7, 8, 8, csr_64, implicit-def $rsp, implicit-def $ssp :: (load store (s64) on %stack.0), (load store (s64) on %stack.1), (load store (s64) on %stack.2)
    ; CHECK: ADJCALLSTACKUP64 0, 0, implicit-def dead $rsp, implicit-def dead $eflags, implicit-def dead $ssp, implicit $rsp, implicit $ssp
    ; CHECK: [[RES:%[0-9]+]]:gr32 = MOV32rm [[R3]], 1, $noreg, 4, $noreg :: (load (s32) from %ir.gep00, addrspace 1)
    ; CHECK: [[RES]]:gr32 = ADD32rm [[RES]], [[R2]], 1, $noreg, 8, $noreg, implicit-def dead $eflags :: (load (s32) from %ir.gep01, addrspace 1)
    ; CHECK: [[RES]]:gr32 = ADD32rm [[RES]], [[R1]], 1, $noreg, 12, $noreg, implicit-def dead $eflags :: (load (s32) from %ir.gep02, addrspace 1)
    ; CHECK: [[MOV64rm:%[0-9]+]]:gr64 = MOV64rm %stack.2, 1, $noreg, 0, $noreg :: (load (s64) from %stack.2)
    ; CHECK: [[RES]]:gr32 = ADD32rm [[RES]], [[MOV64rm]], 1, $noreg, 16, $noreg, implicit-def dead $eflags :: (load (s32) from %ir.gep03, addrspace 1)
    ; CHECK: [[MOV64rm1:%[0-9]+]]:gr64 = MOV64rm %stack.1, 1, $noreg, 0, $noreg :: (load (s64) from %stack.1)
    ; CHECK: [[RES]]:gr32 = ADD32rm [[RES]], [[MOV64rm1]], 1, $noreg, 20, $noreg, implicit-def dead $eflags :: (load (s32) from %ir.gep04, addrspace 1)
    ; CHECK: [[MOV64rm2:%[0-9]+]]:gr64 = MOV64rm %stack.0, 1, $noreg, 0, $noreg :: (load (s64) from %stack.0)
    ; CHECK: [[RES]]:gr32 = ADD32rm [[RES]], [[MOV64rm2]], 1, $noreg, 24, $noreg, implicit-def dead $eflags :: (load (s32) from %ir.gep05, addrspace 1)
    ; CHECK: [[RES]]:gr32 = ADD32rm [[RES]], [[R4]], 1, $noreg, 28, $noreg, implicit-def dead $eflags :: (load (s32) from %ir.gep06, addrspace 1)
    ; CHECK: [[RES]]:gr32 = ADD32rm [[RES]], [[R5]], 1, $noreg, 32, $noreg, implicit-def dead $eflags :: (load (s32) from %ir.gep07, addrspace 1)
    ; CHECK: [[RES]]:gr32 = ADD32rm [[RES]], [[R6]], 1, $noreg, 36, $noreg, implicit-def dead $eflags :: (load (s32) from %ir.gep08, addrspace 1)
    ; CHECK: $eax = COPY [[RES]]
    ; CHECK: RET 0, $eax
    %9:gr64 = COPY $r9
    %10:gr64 = COPY $r8
    %11:gr64 = COPY $rcx
    %12:gr64 = COPY $rdx
    %13:gr64 = COPY $rsi
    %14:gr64 = COPY $rdi
    %8:gr64 = MOV64rm %fixed-stack.2, 1, $noreg, 0, $noreg :: (load (s64) from %fixed-stack.2, align 16)
    %7:gr64 = MOV64rm %fixed-stack.1, 1, $noreg, 0, $noreg :: (load (s64) from %fixed-stack.1)
    %6:gr64 = MOV64rm %fixed-stack.0, 1, $noreg, 0, $noreg :: (load (s64) from %fixed-stack.0, align 16)
    ADJCALLSTACKDOWN64 0, 0, 0, implicit-def dead $rsp, implicit-def dead $eflags, implicit-def dead $ssp, implicit $rsp, implicit $ssp
    %6:gr64, %7:gr64, %8:gr64, %9:gr64, %10:gr64, %11:gr64, %12:gr64, %13:gr64, %14:gr64 = STATEPOINT 0, 0, 0, @func, 2, 0, 2, 0, 2, 0, 2, 9, %6(tied-def 0), %7(tied-def 1), %8(tied-def 2), %9(tied-def 3), %10(tied-def 4), %11(tied-def 5), %12(tied-def 6), %13(tied-def 7), %14(tied-def 8), 2, 0, 2, 9, 0, 0, 1, 1, 2, 2, 3, 3, 4, 4, 5, 5, 6, 6, 7, 7, 8, 8, csr_64, implicit-def $rsp, implicit-def $ssp
    ADJCALLSTACKUP64 0, 0, implicit-def dead $rsp, implicit-def dead $eflags, implicit-def dead $ssp, implicit $rsp, implicit $ssp
    %20:gr32 = MOV32rm %14, 1, $noreg, 4, $noreg :: (load (s32) from %ir.gep00, addrspace 1)
    %20:gr32 = ADD32rm %20, %13, 1, $noreg, 8, $noreg, implicit-def dead $eflags :: (load (s32) from %ir.gep01, addrspace 1)
    %20:gr32 = ADD32rm %20, %12, 1, $noreg, 12, $noreg, implicit-def dead $eflags :: (load (s32) from %ir.gep02, addrspace 1)
    %20:gr32 = ADD32rm %20, %11, 1, $noreg, 16, $noreg, implicit-def dead $eflags :: (load (s32) from %ir.gep03, addrspace 1)
    %20:gr32 = ADD32rm %20, %10, 1, $noreg, 20, $noreg, implicit-def dead $eflags :: (load (s32) from %ir.gep04, addrspace 1)
    %20:gr32 = ADD32rm %20, %9, 1, $noreg, 24, $noreg, implicit-def dead $eflags :: (load (s32) from %ir.gep05, addrspace 1)
    %20:gr32 = ADD32rm %20, %8, 1, $noreg, 28, $noreg, implicit-def dead $eflags :: (load (s32) from %ir.gep06, addrspace 1)
    %20:gr32 = ADD32rm %20, %7, 1, $noreg, 32, $noreg, implicit-def dead $eflags :: (load (s32) from %ir.gep07, addrspace 1)
    %20:gr32 = ADD32rm %20, %6, 1, $noreg, 36, $noreg, implicit-def dead $eflags :: (load (s32) from %ir.gep08, addrspace 1)
    $eax = COPY %20
    RET 0, killed $eax

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