llvm/llvm/test/CodeGen/X86/vshli-simplify-demanded-bits.ll

; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc -mtriple=x86_64-unknown-linux-gnu < %s | FileCheck %s

; A combine forming X86ISD::VSHLI was missing a test and not using
; TargetConstant for the RHS operand.
; https://bugs.chromium.org/p/chromium/issues/detail?id=1005750

define <8 x i8> @vshli_target_constant(<8 x i16> %arg, <8 x i32> %arg1) {
; CHECK-LABEL: vshli_target_constant:
; CHECK:       # %bb.0: # %bb
; CHECK-NEXT:    movdqa {{.*#+}} xmm0 = [2863311531,2863311531,2863311531,2863311531]
; CHECK-NEXT:    pshufd {{.*#+}} xmm3 = xmm1[1,1,3,3]
; CHECK-NEXT:    pmuludq %xmm0, %xmm1
; CHECK-NEXT:    pshufd {{.*#+}} xmm1 = xmm1[1,3,2,3]
; CHECK-NEXT:    pmuludq %xmm0, %xmm3
; CHECK-NEXT:    pshufd {{.*#+}} xmm3 = xmm3[1,3,2,3]
; CHECK-NEXT:    punpckldq {{.*#+}} xmm1 = xmm1[0],xmm3[0],xmm1[1],xmm3[1]
; CHECK-NEXT:    psrld $1, %xmm1
; CHECK-NEXT:    pshufd {{.*#+}} xmm3 = xmm2[1,1,3,3]
; CHECK-NEXT:    pmuludq %xmm0, %xmm2
; CHECK-NEXT:    pshufd {{.*#+}} xmm2 = xmm2[1,3,2,3]
; CHECK-NEXT:    pmuludq %xmm0, %xmm3
; CHECK-NEXT:    pshufd {{.*#+}} xmm0 = xmm3[1,3,2,3]
; CHECK-NEXT:    punpckldq {{.*#+}} xmm2 = xmm2[0],xmm0[0],xmm2[1],xmm0[1]
; CHECK-NEXT:    psrld $1, %xmm2
; CHECK-NEXT:    movdqa {{.*#+}} xmm3 = [255,0,0,0,255,0,0,0,255,0,0,0,255,0,0,0]
; CHECK-NEXT:    pand %xmm3, %xmm2
; CHECK-NEXT:    pand %xmm3, %xmm1
; CHECK-NEXT:    movq {{.*#+}} xmm0 = mem[0],zero
; CHECK-NEXT:    pxor %xmm4, %xmm4
; CHECK-NEXT:    punpcklbw {{.*#+}} xmm0 = xmm0[0],xmm4[0],xmm0[1],xmm4[1],xmm0[2],xmm4[2],xmm0[3],xmm4[3],xmm0[4],xmm4[4],xmm0[5],xmm4[5],xmm0[6],xmm4[6],xmm0[7],xmm4[7]
; CHECK-NEXT:    movdqa %xmm0, %xmm5
; CHECK-NEXT:    punpckhwd {{.*#+}} xmm5 = xmm5[4],xmm4[4],xmm5[5],xmm4[5],xmm5[6],xmm4[6],xmm5[7],xmm4[7]
; CHECK-NEXT:    pmaddwd %xmm2, %xmm5
; CHECK-NEXT:    punpcklwd {{.*#+}} xmm0 = xmm0[0],xmm4[0],xmm0[1],xmm4[1],xmm0[2],xmm4[2],xmm0[3],xmm4[3]
; CHECK-NEXT:    pmaddwd %xmm1, %xmm0
; CHECK-NEXT:    movdqa {{.*#+}} xmm1 = [128,128,128,128]
; CHECK-NEXT:    paddd %xmm1, %xmm5
; CHECK-NEXT:    paddd %xmm1, %xmm0
; CHECK-NEXT:    psrld $8, %xmm0
; CHECK-NEXT:    psrld $8, %xmm5
; CHECK-NEXT:    pand %xmm3, %xmm5
; CHECK-NEXT:    pand %xmm3, %xmm0
; CHECK-NEXT:    packuswb %xmm5, %xmm0
; CHECK-NEXT:    packuswb %xmm0, %xmm0
; CHECK-NEXT:    retq
bb:
  %tmp = udiv <8 x i32> %arg1, <i32 3, i32 3, i32 3, i32 3, i32 3, i32 3, i32 3, i32 3>
  %tmp2 = and <8 x i32> %tmp, <i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255>
  %tmp3 = load <8 x i8>, ptr undef, align 1
  %tmp4 = zext <8 x i8> %tmp3 to <8 x i32>
  %tmp5 = mul nuw nsw <8 x i32> %tmp2, %tmp4
  %tmp6 = add nuw nsw <8 x i32> %tmp5, <i32 128, i32 128, i32 128, i32 128, i32 128, i32 128, i32 128, i32 128>
  %tmp7 = lshr <8 x i32> %tmp6, <i32 8, i32 8, i32 8, i32 8, i32 8, i32 8, i32 8, i32 8>
  %tmp8 = trunc <8 x i32> %tmp7 to <8 x i8>
  ret <8 x i8> %tmp8
}