# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
# RUN: llc -mtriple=i386-linux-gnu -run-pass=legalizer %s -o - | FileCheck %s --check-prefix=X32
# RUN: llc -mtriple=x86_64-linux-gnu -run-pass=legalizer %s -o - | FileCheck %s --check-prefix=X64
--- |
define i8 @test_zext_i1toi8(i1 %a) {
%r = zext i1 %a to i8
ret i8 %r
}
define i16 @test_zext_i1toi16(i1 %a) {
%r = zext i1 %a to i16
ret i16 %r
}
define i32 @test_zext_i1(i8 %a) {
%val = trunc i8 %a to i1
%r = zext i1 %val to i32
ret i32 %r
}
define i16 @test_zext_i8toi16(i8 %val) {
%r = zext i8 %val to i16
ret i16 %r
}
define i32 @test_zext_i8(i8 %val) {
%r = zext i8 %val to i32
ret i32 %r
}
define i32 @test_zext_i16(i16 %val) {
%r = zext i16 %val to i32
ret i32 %r
}
define i8 @test_sext_i1toi8(i1 %a) {
%r = sext i1 %a to i8
ret i8 %r
}
define i16 @test_sext_i1toi16(i1 %a) {
%r = sext i1 %a to i16
ret i16 %r
}
define i32 @test_sext_i1(i8 %a) {
%val = trunc i8 %a to i1
%r = sext i1 %val to i32
ret i32 %r
}
define i16 @test_sext_i8toi16(i8 %val) {
%r = sext i8 %val to i16
ret i16 %r
}
define i32 @test_sext_i8(i8 %val) {
%r = sext i8 %val to i32
ret i32 %r
}
define i32 @test_sext_i16(i16 %val) {
%r = sext i16 %val to i32
ret i32 %r
}
define void @test_anyext_i1toi8(i1 %a) {
ret void
}
define void @test_anyext_i1toi16(i1 %a) {
ret void
}
define void @test_anyext_i1(i8 %a) {
ret void
}
define void @test_anyext_i8toi16(i8 %val) {
ret void
}
define void @test_anyext_i8(i8 %val) {
ret void
}
define void @test_anyext_i16(i16 %val) {
ret void
}
...
---
name: test_zext_i1toi8
alignment: 16
legalized: false
regBankSelected: false
registers:
- { id: 0, class: _, preferred-register: '' }
- { id: 1, class: _, preferred-register: '' }
- { id: 2, class: _, preferred-register: '' }
body: |
bb.1 (%ir-block.0):
liveins: $edi
; X32-LABEL: name: test_zext_i1toi8
; X32: liveins: $edi
; X32-NEXT: {{ $}}
; X32-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $edi
; X32-NEXT: [[TRUNC:%[0-9]+]]:_(s8) = G_TRUNC [[COPY]](s32)
; X32-NEXT: [[C:%[0-9]+]]:_(s8) = G_CONSTANT i8 1
; X32-NEXT: [[AND:%[0-9]+]]:_(s8) = G_AND [[TRUNC]], [[C]]
; X32-NEXT: $al = COPY [[AND]](s8)
; X32-NEXT: RET 0, implicit $al
;
; X64-LABEL: name: test_zext_i1toi8
; X64: liveins: $edi
; X64-NEXT: {{ $}}
; X64-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $edi
; X64-NEXT: [[TRUNC:%[0-9]+]]:_(s8) = G_TRUNC [[COPY]](s32)
; X64-NEXT: [[C:%[0-9]+]]:_(s8) = G_CONSTANT i8 1
; X64-NEXT: [[AND:%[0-9]+]]:_(s8) = G_AND [[TRUNC]], [[C]]
; X64-NEXT: $al = COPY [[AND]](s8)
; X64-NEXT: RET 0, implicit $al
%1:_(s32) = COPY $edi
%0:_(s1) = G_TRUNC %1(s32)
%2:_(s8) = G_ZEXT %0(s1)
$al = COPY %2(s8)
RET 0, implicit $al
...
---
name: test_zext_i1toi16
alignment: 16
legalized: false
regBankSelected: false
registers:
- { id: 0, class: _, preferred-register: '' }
- { id: 1, class: _, preferred-register: '' }
body: |
bb.1 (%ir-block.0):
liveins: $edi
; X32-LABEL: name: test_zext_i1toi16
; X32: liveins: $edi
; X32-NEXT: {{ $}}
; X32-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $edi
; X32-NEXT: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[COPY]](s32)
; X32-NEXT: [[C:%[0-9]+]]:_(s16) = G_CONSTANT i16 1
; X32-NEXT: [[AND:%[0-9]+]]:_(s16) = G_AND [[TRUNC]], [[C]]
; X32-NEXT: $ax = COPY [[AND]](s16)
; X32-NEXT: RET 0, implicit $ax
;
; X64-LABEL: name: test_zext_i1toi16
; X64: liveins: $edi
; X64-NEXT: {{ $}}
; X64-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $edi
; X64-NEXT: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[COPY]](s32)
; X64-NEXT: [[C:%[0-9]+]]:_(s16) = G_CONSTANT i16 1
; X64-NEXT: [[AND:%[0-9]+]]:_(s16) = G_AND [[TRUNC]], [[C]]
; X64-NEXT: $ax = COPY [[AND]](s16)
; X64-NEXT: RET 0, implicit $ax
%1:_(s32) = COPY $edi
%0:_(s1) = G_TRUNC %1(s32)
%2:_(s16) = G_ZEXT %0(s1)
$ax = COPY %2(s16)
RET 0, implicit $ax
...
---
name: test_zext_i1
alignment: 16
legalized: false
regBankSelected: false
registers:
- { id: 0, class: _ }
- { id: 1, class: _ }
- { id: 2, class: _ }
body: |
bb.1 (%ir-block.0):
liveins: $edi
; X32-LABEL: name: test_zext_i1
; X32: liveins: $edi
; X32-NEXT: {{ $}}
; X32-NEXT: [[COPY:%[0-9]+]]:_(s8) = COPY $dil
; X32-NEXT: [[ANYEXT:%[0-9]+]]:_(s32) = G_ANYEXT [[COPY]](s8)
; X32-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1
; X32-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND [[ANYEXT]], [[C]]
; X32-NEXT: $eax = COPY [[AND]](s32)
; X32-NEXT: RET 0, implicit $eax
;
; X64-LABEL: name: test_zext_i1
; X64: liveins: $edi
; X64-NEXT: {{ $}}
; X64-NEXT: [[COPY:%[0-9]+]]:_(s8) = COPY $dil
; X64-NEXT: [[ANYEXT:%[0-9]+]]:_(s32) = G_ANYEXT [[COPY]](s8)
; X64-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1
; X64-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND [[ANYEXT]], [[C]]
; X64-NEXT: $eax = COPY [[AND]](s32)
; X64-NEXT: RET 0, implicit $eax
%0(s8) = COPY $dil
%1(s1) = G_TRUNC %0(s8)
%2(s32) = G_ZEXT %1(s1)
$eax = COPY %2(s32)
RET 0, implicit $eax
...
---
name: test_zext_i8toi16
alignment: 16
legalized: false
regBankSelected: false
registers:
- { id: 0, class: _, preferred-register: '' }
- { id: 1, class: _, preferred-register: '' }
body: |
bb.1 (%ir-block.0):
liveins: $edi
; X32-LABEL: name: test_zext_i8toi16
; X32: liveins: $edi
; X32-NEXT: {{ $}}
; X32-NEXT: [[COPY:%[0-9]+]]:_(s8) = COPY $dil
; X32-NEXT: [[ZEXT:%[0-9]+]]:_(s16) = G_ZEXT [[COPY]](s8)
; X32-NEXT: $ax = COPY [[ZEXT]](s16)
; X32-NEXT: RET 0, implicit $ax
;
; X64-LABEL: name: test_zext_i8toi16
; X64: liveins: $edi
; X64-NEXT: {{ $}}
; X64-NEXT: [[COPY:%[0-9]+]]:_(s8) = COPY $dil
; X64-NEXT: [[ZEXT:%[0-9]+]]:_(s16) = G_ZEXT [[COPY]](s8)
; X64-NEXT: $ax = COPY [[ZEXT]](s16)
; X64-NEXT: RET 0, implicit $ax
%0(s8) = COPY $dil
%1(s16) = G_ZEXT %0(s8)
$ax = COPY %1(s16)
RET 0, implicit $ax
...
---
name: test_zext_i8
alignment: 16
legalized: false
regBankSelected: false
registers:
- { id: 0, class: _ }
- { id: 1, class: _ }
body: |
bb.1 (%ir-block.0):
liveins: $edi
; X32-LABEL: name: test_zext_i8
; X32: liveins: $edi
; X32-NEXT: {{ $}}
; X32-NEXT: [[COPY:%[0-9]+]]:_(s8) = COPY $dil
; X32-NEXT: [[ZEXT:%[0-9]+]]:_(s32) = G_ZEXT [[COPY]](s8)
; X32-NEXT: $eax = COPY [[ZEXT]](s32)
; X32-NEXT: RET 0, implicit $eax
;
; X64-LABEL: name: test_zext_i8
; X64: liveins: $edi
; X64-NEXT: {{ $}}
; X64-NEXT: [[COPY:%[0-9]+]]:_(s8) = COPY $dil
; X64-NEXT: [[ZEXT:%[0-9]+]]:_(s32) = G_ZEXT [[COPY]](s8)
; X64-NEXT: $eax = COPY [[ZEXT]](s32)
; X64-NEXT: RET 0, implicit $eax
%0(s8) = COPY $dil
%1(s32) = G_ZEXT %0(s8)
$eax = COPY %1(s32)
RET 0, implicit $eax
...
---
name: test_zext_i16
alignment: 16
legalized: false
regBankSelected: false
registers:
- { id: 0, class: _ }
- { id: 1, class: _ }
body: |
bb.1 (%ir-block.0):
liveins: $edi
; X32-LABEL: name: test_zext_i16
; X32: liveins: $edi
; X32-NEXT: {{ $}}
; X32-NEXT: [[COPY:%[0-9]+]]:_(s16) = COPY $di
; X32-NEXT: [[ZEXT:%[0-9]+]]:_(s32) = G_ZEXT [[COPY]](s16)
; X32-NEXT: $eax = COPY [[ZEXT]](s32)
; X32-NEXT: RET 0, implicit $eax
;
; X64-LABEL: name: test_zext_i16
; X64: liveins: $edi
; X64-NEXT: {{ $}}
; X64-NEXT: [[COPY:%[0-9]+]]:_(s16) = COPY $di
; X64-NEXT: [[ZEXT:%[0-9]+]]:_(s32) = G_ZEXT [[COPY]](s16)
; X64-NEXT: $eax = COPY [[ZEXT]](s32)
; X64-NEXT: RET 0, implicit $eax
%0(s16) = COPY $di
%1(s32) = G_ZEXT %0(s16)
$eax = COPY %1(s32)
RET 0, implicit $eax
...
---
name: test_sext_i1toi8
alignment: 16
legalized: false
regBankSelected: false
registers:
- { id: 0, class: _, preferred-register: '' }
- { id: 1, class: _, preferred-register: '' }
body: |
bb.1 (%ir-block.0):
liveins: $edi
; X32-LABEL: name: test_sext_i1toi8
; X32: liveins: $edi
; X32-NEXT: {{ $}}
; X32-NEXT: [[C:%[0-9]+]]:_(s8) = G_CONSTANT i8 0
; X32-NEXT: $al = COPY [[C]](s8)
; X32-NEXT: RET 0, implicit $al
;
; X64-LABEL: name: test_sext_i1toi8
; X64: liveins: $edi
; X64-NEXT: {{ $}}
; X64-NEXT: [[C:%[0-9]+]]:_(s8) = G_CONSTANT i8 0
; X64-NEXT: $al = COPY [[C]](s8)
; X64-NEXT: RET 0, implicit $al
%0(s1) = G_IMPLICIT_DEF
%1(s8) = G_SEXT %0(s1)
$al = COPY %1(s8)
RET 0, implicit $al
...
---
name: test_sext_i1toi16
alignment: 16
legalized: false
regBankSelected: false
registers:
- { id: 0, class: _, preferred-register: '' }
- { id: 1, class: _, preferred-register: '' }
body: |
bb.1 (%ir-block.0):
liveins: $edi
; X32-LABEL: name: test_sext_i1toi16
; X32: liveins: $edi
; X32-NEXT: {{ $}}
; X32-NEXT: [[C:%[0-9]+]]:_(s16) = G_CONSTANT i16 0
; X32-NEXT: $ax = COPY [[C]](s16)
; X32-NEXT: RET 0, implicit $ax
;
; X64-LABEL: name: test_sext_i1toi16
; X64: liveins: $edi
; X64-NEXT: {{ $}}
; X64-NEXT: [[C:%[0-9]+]]:_(s16) = G_CONSTANT i16 0
; X64-NEXT: $ax = COPY [[C]](s16)
; X64-NEXT: RET 0, implicit $ax
%0(s1) = G_IMPLICIT_DEF
%1(s16) = G_SEXT %0(s1)
$ax = COPY %1(s16)
RET 0, implicit $ax
...
---
name: test_sext_i1
alignment: 16
legalized: false
regBankSelected: false
registers:
- { id: 0, class: _ }
- { id: 1, class: _ }
- { id: 2, class: _ }
body: |
bb.1 (%ir-block.0):
liveins: $edi
; X32-LABEL: name: test_sext_i1
; X32: liveins: $edi
; X32-NEXT: {{ $}}
; X32-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0
; X32-NEXT: $eax = COPY [[C]](s32)
; X32-NEXT: RET 0, implicit $eax
;
; X64-LABEL: name: test_sext_i1
; X64: liveins: $edi
; X64-NEXT: {{ $}}
; X64-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0
; X64-NEXT: $eax = COPY [[C]](s32)
; X64-NEXT: RET 0, implicit $eax
%0(s1) = G_IMPLICIT_DEF
%2(s32) = G_SEXT %0(s1)
$eax = COPY %2(s32)
RET 0, implicit $eax
...
---
name: test_sext_i8toi16
alignment: 16
legalized: false
regBankSelected: false
registers:
- { id: 0, class: _, preferred-register: '' }
- { id: 1, class: _, preferred-register: '' }
body: |
bb.1 (%ir-block.0):
liveins: $edi
; X32-LABEL: name: test_sext_i8toi16
; X32: liveins: $edi
; X32-NEXT: {{ $}}
; X32-NEXT: [[COPY:%[0-9]+]]:_(s8) = COPY $dil
; X32-NEXT: [[SEXT:%[0-9]+]]:_(s16) = G_SEXT [[COPY]](s8)
; X32-NEXT: $ax = COPY [[SEXT]](s16)
; X32-NEXT: RET 0, implicit $ax
;
; X64-LABEL: name: test_sext_i8toi16
; X64: liveins: $edi
; X64-NEXT: {{ $}}
; X64-NEXT: [[COPY:%[0-9]+]]:_(s8) = COPY $dil
; X64-NEXT: [[SEXT:%[0-9]+]]:_(s16) = G_SEXT [[COPY]](s8)
; X64-NEXT: $ax = COPY [[SEXT]](s16)
; X64-NEXT: RET 0, implicit $ax
%0(s8) = COPY $dil
%1(s16) = G_SEXT %0(s8)
$ax = COPY %1(s16)
RET 0, implicit $ax
...
---
name: test_sext_i8
alignment: 16
legalized: false
regBankSelected: false
registers:
- { id: 0, class: _ }
- { id: 1, class: _ }
body: |
bb.1 (%ir-block.0):
liveins: $edi
; X32-LABEL: name: test_sext_i8
; X32: liveins: $edi
; X32-NEXT: {{ $}}
; X32-NEXT: [[COPY:%[0-9]+]]:_(s8) = COPY $dil
; X32-NEXT: [[SEXT:%[0-9]+]]:_(s32) = G_SEXT [[COPY]](s8)
; X32-NEXT: $eax = COPY [[SEXT]](s32)
; X32-NEXT: RET 0, implicit $eax
;
; X64-LABEL: name: test_sext_i8
; X64: liveins: $edi
; X64-NEXT: {{ $}}
; X64-NEXT: [[COPY:%[0-9]+]]:_(s8) = COPY $dil
; X64-NEXT: [[SEXT:%[0-9]+]]:_(s32) = G_SEXT [[COPY]](s8)
; X64-NEXT: $eax = COPY [[SEXT]](s32)
; X64-NEXT: RET 0, implicit $eax
%0(s8) = COPY $dil
%1(s32) = G_SEXT %0(s8)
$eax = COPY %1(s32)
RET 0, implicit $eax
...
---
name: test_sext_i16
alignment: 16
legalized: false
regBankSelected: false
registers:
- { id: 0, class: _ }
- { id: 1, class: _ }
body: |
bb.1 (%ir-block.0):
liveins: $edi
; X32-LABEL: name: test_sext_i16
; X32: liveins: $edi
; X32-NEXT: {{ $}}
; X32-NEXT: [[COPY:%[0-9]+]]:_(s16) = COPY $di
; X32-NEXT: [[SEXT:%[0-9]+]]:_(s32) = G_SEXT [[COPY]](s16)
; X32-NEXT: $eax = COPY [[SEXT]](s32)
; X32-NEXT: RET 0, implicit $eax
;
; X64-LABEL: name: test_sext_i16
; X64: liveins: $edi
; X64-NEXT: {{ $}}
; X64-NEXT: [[COPY:%[0-9]+]]:_(s16) = COPY $di
; X64-NEXT: [[SEXT:%[0-9]+]]:_(s32) = G_SEXT [[COPY]](s16)
; X64-NEXT: $eax = COPY [[SEXT]](s32)
; X64-NEXT: RET 0, implicit $eax
%0(s16) = COPY $di
%1(s32) = G_SEXT %0(s16)
$eax = COPY %1(s32)
RET 0, implicit $eax
...
---
name: test_anyext_i1toi8
alignment: 16
legalized: false
regBankSelected: false
registers:
- { id: 0, class: _, preferred-register: '' }
- { id: 1, class: _, preferred-register: '' }
- { id: 2, class: _, preferred-register: '' }
body: |
bb.1 (%ir-block.0):
liveins: $edi
; X32-LABEL: name: test_anyext_i1toi8
; X32: liveins: $edi
; X32-NEXT: {{ $}}
; X32-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $edi
; X32-NEXT: [[TRUNC:%[0-9]+]]:_(s8) = G_TRUNC [[COPY]](s32)
; X32-NEXT: $al = COPY [[TRUNC]](s8)
; X32-NEXT: RET 0, implicit $al
;
; X64-LABEL: name: test_anyext_i1toi8
; X64: liveins: $edi
; X64-NEXT: {{ $}}
; X64-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $edi
; X64-NEXT: [[TRUNC:%[0-9]+]]:_(s8) = G_TRUNC [[COPY]](s32)
; X64-NEXT: $al = COPY [[TRUNC]](s8)
; X64-NEXT: RET 0, implicit $al
%0(s32) = COPY $edi
%1(s1) = G_TRUNC %0(s32)
%2(s8) = G_ANYEXT %1(s1)
$al = COPY %2(s8)
RET 0, implicit $al
...
---
name: test_anyext_i1toi16
alignment: 16
legalized: false
regBankSelected: false
registers:
- { id: 0, class: _, preferred-register: '' }
- { id: 1, class: _, preferred-register: '' }
- { id: 2, class: _, preferred-register: '' }
body: |
bb.1 (%ir-block.0):
liveins: $edi
; X32-LABEL: name: test_anyext_i1toi16
; X32: liveins: $edi
; X32-NEXT: {{ $}}
; X32-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $edi
; X32-NEXT: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[COPY]](s32)
; X32-NEXT: $ax = COPY [[TRUNC]](s16)
; X32-NEXT: RET 0, implicit $ax
;
; X64-LABEL: name: test_anyext_i1toi16
; X64: liveins: $edi
; X64-NEXT: {{ $}}
; X64-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $edi
; X64-NEXT: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[COPY]](s32)
; X64-NEXT: $ax = COPY [[TRUNC]](s16)
; X64-NEXT: RET 0, implicit $ax
%0(s32) = COPY $edi
%1(s1) = G_TRUNC %0(s32)
%2(s16) = G_ANYEXT %1(s1)
$ax = COPY %2(s16)
RET 0, implicit $ax
...
---
name: test_anyext_i1
alignment: 16
legalized: false
regBankSelected: false
registers:
- { id: 0, class: _ }
- { id: 1, class: _ }
- { id: 2, class: _ }
body: |
bb.1 (%ir-block.0):
liveins: $edi
; X32-LABEL: name: test_anyext_i1
; X32: liveins: $edi
; X32-NEXT: {{ $}}
; X32-NEXT: [[COPY:%[0-9]+]]:_(s8) = COPY $dil
; X32-NEXT: [[ANYEXT:%[0-9]+]]:_(s32) = G_ANYEXT [[COPY]](s8)
; X32-NEXT: $eax = COPY [[ANYEXT]](s32)
; X32-NEXT: RET 0, implicit $eax
;
; X64-LABEL: name: test_anyext_i1
; X64: liveins: $edi
; X64-NEXT: {{ $}}
; X64-NEXT: [[COPY:%[0-9]+]]:_(s8) = COPY $dil
; X64-NEXT: [[ANYEXT:%[0-9]+]]:_(s32) = G_ANYEXT [[COPY]](s8)
; X64-NEXT: $eax = COPY [[ANYEXT]](s32)
; X64-NEXT: RET 0, implicit $eax
%0(s8) = COPY $dil
%1(s1) = G_TRUNC %0(s8)
%2(s32) = G_ANYEXT %1(s1)
$eax = COPY %2(s32)
RET 0, implicit $eax
...
---
name: test_anyext_i8toi16
alignment: 16
legalized: false
regBankSelected: false
registers:
- { id: 0, class: _, preferred-register: '' }
- { id: 1, class: _, preferred-register: '' }
body: |
bb.1 (%ir-block.0):
liveins: $edi
; X32-LABEL: name: test_anyext_i8toi16
; X32: liveins: $edi
; X32-NEXT: {{ $}}
; X32-NEXT: [[COPY:%[0-9]+]]:_(s8) = COPY $dil
; X32-NEXT: [[ANYEXT:%[0-9]+]]:_(s16) = G_ANYEXT [[COPY]](s8)
; X32-NEXT: $ax = COPY [[ANYEXT]](s16)
; X32-NEXT: RET 0, implicit $ax
;
; X64-LABEL: name: test_anyext_i8toi16
; X64: liveins: $edi
; X64-NEXT: {{ $}}
; X64-NEXT: [[COPY:%[0-9]+]]:_(s8) = COPY $dil
; X64-NEXT: [[ANYEXT:%[0-9]+]]:_(s16) = G_ANYEXT [[COPY]](s8)
; X64-NEXT: $ax = COPY [[ANYEXT]](s16)
; X64-NEXT: RET 0, implicit $ax
%0(s8) = COPY $dil
%1(s16) = G_ANYEXT %0(s8)
$ax = COPY %1(s16)
RET 0, implicit $ax
...
---
name: test_anyext_i8
alignment: 16
legalized: false
regBankSelected: false
registers:
- { id: 0, class: _ }
- { id: 1, class: _ }
body: |
bb.1 (%ir-block.0):
liveins: $edi
; X32-LABEL: name: test_anyext_i8
; X32: liveins: $edi
; X32-NEXT: {{ $}}
; X32-NEXT: [[COPY:%[0-9]+]]:_(s8) = COPY $dil
; X32-NEXT: [[ANYEXT:%[0-9]+]]:_(s32) = G_ANYEXT [[COPY]](s8)
; X32-NEXT: $eax = COPY [[ANYEXT]](s32)
; X32-NEXT: RET 0, implicit $eax
;
; X64-LABEL: name: test_anyext_i8
; X64: liveins: $edi
; X64-NEXT: {{ $}}
; X64-NEXT: [[COPY:%[0-9]+]]:_(s8) = COPY $dil
; X64-NEXT: [[ANYEXT:%[0-9]+]]:_(s32) = G_ANYEXT [[COPY]](s8)
; X64-NEXT: $eax = COPY [[ANYEXT]](s32)
; X64-NEXT: RET 0, implicit $eax
%0(s8) = COPY $dil
%1(s32) = G_ANYEXT %0(s8)
$eax = COPY %1(s32)
RET 0, implicit $eax
...
---
name: test_anyext_i16
alignment: 16
legalized: false
regBankSelected: false
registers:
- { id: 0, class: _ }
- { id: 1, class: _ }
body: |
bb.1 (%ir-block.0):
liveins: $edi
; X32-LABEL: name: test_anyext_i16
; X32: liveins: $edi
; X32-NEXT: {{ $}}
; X32-NEXT: [[COPY:%[0-9]+]]:_(s16) = COPY $di
; X32-NEXT: [[ANYEXT:%[0-9]+]]:_(s32) = G_ANYEXT [[COPY]](s16)
; X32-NEXT: $eax = COPY [[ANYEXT]](s32)
; X32-NEXT: RET 0, implicit $eax
;
; X64-LABEL: name: test_anyext_i16
; X64: liveins: $edi
; X64-NEXT: {{ $}}
; X64-NEXT: [[COPY:%[0-9]+]]:_(s16) = COPY $di
; X64-NEXT: [[ANYEXT:%[0-9]+]]:_(s32) = G_ANYEXT [[COPY]](s16)
; X64-NEXT: $eax = COPY [[ANYEXT]](s32)
; X64-NEXT: RET 0, implicit $eax
%0(s16) = COPY $di
%1(s32) = G_ANYEXT %0(s16)
$eax = COPY %1(s32)
RET 0, implicit $eax
...
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