llvm/llvm/test/CodeGen/X86/GlobalISel/legalize-memop-scalar-32.mir

# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
# RUN: llc -O0 -mtriple=i386-linux-gnu   -run-pass=legalizer %s -o - | FileCheck --check-prefix=X32 %s

---
name:            test_memop_s8tos32
alignment:       16
legalized:       false
regBankSelected: false
body:             |
  bb.0:
    ; X32-LABEL: name: test_memop_s8tos32
    ; X32: [[DEF:%[0-9]+]]:_(p0) = IMPLICIT_DEF
    ; X32: [[LOAD:%[0-9]+]]:_(s8) = G_LOAD [[DEF]](p0) :: (load (s1))
    ; X32: [[LOAD1:%[0-9]+]]:_(s8) = G_LOAD [[DEF]](p0) :: (load (s8))
    ; X32: [[LOAD2:%[0-9]+]]:_(s16) = G_LOAD [[DEF]](p0) :: (load (s16))
    ; X32: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[DEF]](p0) :: (load (s32))
    ; X32: [[LOAD4:%[0-9]+]]:_(p0) = G_LOAD [[DEF]](p0) :: (load (p0))
    ; X32: [[C:%[0-9]+]]:_(s8) = G_CONSTANT i8 1
    ; X32: [[AND:%[0-9]+]]:_(s8) = G_AND [[LOAD]], [[C]]
    ; X32: G_STORE [[AND]](s8), [[DEF]](p0) :: (store (s1))
    ; X32: G_STORE [[LOAD1]](s8), [[DEF]](p0) :: (store (s8))
    ; X32: G_STORE [[LOAD2]](s16), [[DEF]](p0) :: (store (s16))
    ; X32: G_STORE [[LOAD3]](s32), [[DEF]](p0) :: (store (s32))
    ; X32: G_STORE [[LOAD4]](p0), [[DEF]](p0) :: (store (p0))
    %0:_(p0) = IMPLICIT_DEF
    %9:_(s1) = G_LOAD %0 :: (load (s1))
    %1:_(s8) = G_LOAD %0 :: (load (s8))
    %2:_(s16) = G_LOAD %0 :: (load (s16))
    %3:_(s32) = G_LOAD %0 :: (load (s32))
    %4:_(p0) = G_LOAD %0 :: (load (p0))

    G_STORE %9, %0 :: (store (s1))
    G_STORE %1, %0 :: (store (s8))
    G_STORE %2, %0 :: (store (s16))
    G_STORE %3, %0 :: (store (s32))
    G_STORE %4, %0 :: (store (p0))
...
---
name:            test_memop_s64
alignment:       16
legalized:       false
regBankSelected: false
liveins:
body:             |
  bb.0:

    ; X32-LABEL: name: test_memop_s64
    ; X32: [[DEF:%[0-9]+]]:_(p0) = IMPLICIT_DEF
    ; X32: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[DEF]](p0) :: (load (s32), align 8)
    ; X32: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 4
    ; X32: [[PTR_ADD:%[0-9]+]]:_(p0) = G_PTR_ADD [[DEF]], [[C]](s32)
    ; X32: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD]](p0) :: (load (s32) from unknown-address + 4)
    ; X32: G_STORE [[LOAD]](s32), [[DEF]](p0) :: (store (s32), align 8)
    ; X32: [[PTR_ADD1:%[0-9]+]]:_(p0) = G_PTR_ADD [[DEF]], [[C]](s32)
    ; X32: G_STORE [[LOAD1]](s32), [[PTR_ADD1]](p0) :: (store (s32) into unknown-address + 4)
    %0:_(p0) = IMPLICIT_DEF
    %1:_(s64) = G_LOAD %0 :: (load (s64))

    G_STORE %1, %0 :: (store (s64))

...