llvm/llvm/test/CodeGen/X86/GlobalISel/select-insert-vec256.mir

# RUN: llc -mtriple=x86_64-linux-gnu -mattr=+avx                -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s --check-prefix=ALL --check-prefix=AVX
# RUN: llc -mtriple=x86_64-linux-gnu -mattr=+avx512f,+avx512vl  -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s --check-prefix=ALL --check-prefix=AVX512VL
--- |
  define void @test_insert_128_idx0() {
    ret void
  }

  define void @test_insert_128_idx0_undef() {
    ret void
  }

  define void @test_insert_128_idx1() {
    ret void
  }

  define void @test_insert_128_idx1_undef() {
    ret void
  }

...
---
name:            test_insert_128_idx0
# ALL-LABEL: name:  test_insert_128_idx0
alignment:       16
legalized:       true
regBankSelected: true
registers:
  - { id: 0, class: vecr }
  - { id: 1, class: vecr }
  - { id: 2, class: vecr }
# AVX:               %0:vr256 = COPY $ymm0
# AVX-NEXT:          %1:vr128 = COPY $xmm1
# AVX-NEXT:          %2:vr256 = VINSERTF128rri %0, %1, 0
# AVX-NEXT:          $ymm0 = COPY %2
# AVX-NEXT:          RET 0, implicit $ymm0
#
# AVX512VL:          %0:vr256x = COPY $ymm0
# AVX512VL-NEXT:     %1:vr128x = COPY $xmm1
# AVX512VL-NEXT:     %2:vr256x = VINSERTF32x4Z256rri %0, %1, 0
# AVX512VL-NEXT:     $ymm0 = COPY %2
# AVX512VL-NEXT:     RET 0, implicit $ymm0
body:             |
  bb.1 (%ir-block.0):
    liveins: $ymm0, $ymm1

    %0(<8 x s32>) = COPY $ymm0
    %1(<4 x s32>) = COPY $xmm1
    %2(<8 x s32>) = G_INSERT %0(<8 x s32>), %1(<4 x s32>), 0
    $ymm0 = COPY %2(<8 x s32>)
    RET 0, implicit $ymm0

...
---
name:            test_insert_128_idx0_undef
# ALL-LABEL: name:  test_insert_128_idx0_undef
alignment:       16
legalized:       true
regBankSelected: true
registers:
  - { id: 0, class: vecr }
  - { id: 1, class: vecr }
  - { id: 2, class: vecr }
# AVX:               %1:vr128 = COPY $xmm1
# AVX-NEXT:          undef %2.sub_xmm:vr256 = COPY %1
# AVX-NEXT:          $ymm0 = COPY %2
# AVX-NEXT:          RET 0, implicit $ymm0
#
# AVX512VL:          %1:vr128x = COPY $xmm1
# AVX512VL-NEXT:     undef %2.sub_xmm:vr256x = COPY %1
# AVX512VL-NEXT:     $ymm0 = COPY %2
# AVX512VL-NEXT:     RET 0, implicit $ymm0
body:             |
  bb.1 (%ir-block.0):
    liveins: $ymm0, $ymm1

    %0(<8 x s32>) = IMPLICIT_DEF
    %1(<4 x s32>) = COPY $xmm1
    %2(<8 x s32>) = G_INSERT %0(<8 x s32>), %1(<4 x s32>), 0
    $ymm0 = COPY %2(<8 x s32>)
    RET 0, implicit $ymm0

...
---
name:            test_insert_128_idx1
# ALL-LABEL: name:  test_insert_128_idx1
alignment:       16
legalized:       true
regBankSelected: true
registers:
  - { id: 0, class: vecr }
  - { id: 1, class: vecr }
  - { id: 2, class: vecr }
# AVX:               %0:vr256 = COPY $ymm0
# AVX-NEXT:          %1:vr128 = COPY $xmm1
# AVX-NEXT:          %2:vr256 = VINSERTF128rri %0, %1, 1
# AVX-NEXT:          $ymm0 = COPY %2
# AVX-NEXT:          RET 0, implicit $ymm0
#
# AVX512VL:          %0:vr256x = COPY $ymm0
# AVX512VL-NEXT:     %1:vr128x = COPY $xmm1
# AVX512VL-NEXT:     %2:vr256x = VINSERTF32x4Z256rri %0, %1, 1
# AVX512VL-NEXT:     $ymm0 = COPY %2
# AVX512VL-NEXT:     RET 0, implicit $ymm0
body:             |
  bb.1 (%ir-block.0):
    liveins: $ymm0, $ymm1

    %0(<8 x s32>) = COPY $ymm0
    %1(<4 x s32>) = COPY $xmm1
    %2(<8 x s32>) = G_INSERT %0(<8 x s32>), %1(<4 x s32>), 128
    $ymm0 = COPY %2(<8 x s32>)
    RET 0, implicit $ymm0
...
---
name:            test_insert_128_idx1_undef
# ALL-LABEL: name:  test_insert_128_idx1_undef
alignment:       16
legalized:       true
regBankSelected: true
registers:
  - { id: 0, class: vecr }
  - { id: 1, class: vecr }
  - { id: 2, class: vecr }
# AVX:               %0:vr256 = IMPLICIT_DEF
# AVX-NEXT:          %1:vr128 = COPY $xmm1
# AVX-NEXT:          %2:vr256 = VINSERTF128rri %0, %1, 1
# AVX-NEXT:          $ymm0 = COPY %2
# AVX-NEXT:          RET 0, implicit $ymm0
#
# AVX512VL:          %0:vr256x = IMPLICIT_DEF
# AVX512VL-NEXT:     %1:vr128x = COPY $xmm1
# AVX512VL-NEXT:     %2:vr256x = VINSERTF32x4Z256rri %0, %1, 1
# AVX512VL-NEXT:     $ymm0 = COPY %2
# AVX512VL-NEXT:     RET 0, implicit $ymm0
body:             |
  bb.1 (%ir-block.0):
    liveins: $ymm0, $ymm1

    %0(<8 x s32>) = IMPLICIT_DEF
    %1(<4 x s32>) = COPY $xmm1
    %2(<8 x s32>) = G_INSERT %0(<8 x s32>), %1(<4 x s32>), 128
    $ymm0 = COPY %2(<8 x s32>)
    RET 0, implicit $ymm0
...