llvm/llvm/test/CodeGen/X86/x86-64-extend-shift.ll

; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 4
; RUN: llc < %s -mtriple=x86_64-apple-darwin | FileCheck %s
; Formerly there were two shifts.

define i64 @baz(i32 %A) nounwind {
; CHECK-LABEL: baz:
; CHECK:       ## %bb.0:
; CHECK-NEXT:    movl %edi, %eax
; CHECK-NEXT:    shlq $49, %rax
; CHECK-NEXT:    retq
  %tmp1 = shl i32 %A, 17
  %tmp2 = zext i32 %tmp1 to i64
  %tmp3 = shl i64 %tmp2, 32
  ret i64 %tmp3
}