llvm/llvm/test/CodeGen/X86/pr3366.ll

; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc < %s -mtriple=i686-- -disable-cgp-branch-opts | FileCheck %s
; PR3366

define void @_ada_c34002a() nounwind {
; CHECK-LABEL: _ada_c34002a:
; CHECK:       # %bb.0: # %entry
; CHECK-NEXT:    movb $90, %al
; CHECK-NEXT:    movzbl %al, %eax
; CHECK-NEXT:    idivb 0
; CHECK-NEXT:    cmpb $3, %al
; CHECK-NEXT:  # %bb.1: # %bb457
entry:
  %0 = load i8, ptr null, align 1
  %1 = sdiv i8 90, %0
  %2 = icmp ne i8 %1, 3
  %3 = zext i1 %2 to i8
  %toBool449 = icmp ne i8 %3, 0
  %4 = or i1 false, %toBool449
  %5 = zext i1 %4 to i8
  %toBool450 = icmp ne i8 %5, 0
  br i1 %toBool450, label %bb451, label %bb457

bb451:
  br label %bb457

bb457:
  unreachable
}