; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc < %s | FileCheck %s
target triple = "i386-apple-darwin9.6"
%struct.III_psy_xmin = type { [22 x double], [13 x [3 x double]] }
%struct.III_scalefac_t = type { [22 x i32], [13 x [3 x i32]] }
%struct.gr_info = type { i32, i32, i32, i32, i32, i32, i32, i32, [3 x i32], [3 x i32], i32, i32, i32, i32, i32, i32, i32, i32, i32, ptr, [4 x i32] }
%struct.lame_global_flags = type { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, ptr, ptr, i32, i32, float, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, float, i32, i32, i32, float, float, float, float, i32, i32, i32, i32, i32, i32, i32, i32 }
define fastcc void @outer_loop(ptr nocapture %gfp, ptr nocapture %xr, i32 %targ_bits, ptr nocapture %best_noise, ptr nocapture %l3_xmin, ptr nocapture %l3_enc, ptr nocapture %scalefac, ptr nocapture %cod_info, i32 %ch) nounwind {
; CHECK-LABEL: outer_loop:
; CHECK: ## %bb.0: ## %entry
; CHECK-NEXT: pushl %esi
; CHECK-NEXT: movl $88, %eax
; CHECK-NEXT: movl $168, %ecx
; CHECK-NEXT: .p2align 4
; CHECK-NEXT: LBB0_2: ## %bb28.i37
; CHECK-NEXT: ## =>This Loop Header: Depth=1
; CHECK-NEXT: ## Child Loop BB0_3 Depth 2
; CHECK-NEXT: xorl %edx, %edx
; CHECK-NEXT: movl %eax, %esi
; CHECK-NEXT: .p2align 4
; CHECK-NEXT: LBB0_3: ## %bb29.i38
; CHECK-NEXT: ## Parent Loop BB0_2 Depth=1
; CHECK-NEXT: ## => This Inner Loop Header: Depth=2
; CHECK-NEXT: incl %edx
; CHECK-NEXT: addl $12, %esi
; CHECK-NEXT: cmpl $11, %edx
; CHECK-NEXT: jbe LBB0_3
; CHECK-NEXT: ## %bb.1: ## %bb28.i37.loopexit
; CHECK-NEXT: ## in Loop: Header=BB0_2 Depth=1
; CHECK-NEXT: addl $4, %eax
; CHECK-NEXT: addl $168, %ecx
; CHECK-NEXT: jmp LBB0_2
entry:
br label %bb4
bb4: ; preds = %bb4, %entry
br i1 true, label %bb5, label %bb4
bb5: ; preds = %bb4
br i1 true, label %bb28.i37, label %bb.i4
bb.i4: ; preds = %bb.i4, %bb5
br label %bb.i4
bb28.i37: ; preds = %bb33.i47, %bb5
%i.1.reg2mem.0.i = phi i32 [ %0, %bb33.i47 ], [ 0, %bb5 ] ; <i32> [#uses=2]
%0 = add i32 %i.1.reg2mem.0.i, 1 ; <i32> [#uses=2]
br label %bb29.i38
bb29.i38: ; preds = %bb33.i47, %bb28.i37
%indvar32.i = phi i32 [ %indvar.next33.i, %bb33.i47 ], [ 0, %bb28.i37 ] ; <i32> [#uses=2]
%sfb.314.i = add i32 %indvar32.i, 0 ; <i32> [#uses=3]
%1 = getelementptr [4 x [21 x double]], ptr null, i32 0, i32 %0, i32 %sfb.314.i ; <ptr> [#uses=1]
%2 = load double, ptr %1, align 8 ; <double> [#uses=0]
br i1 false, label %bb30.i41, label %bb33.i47
bb30.i41: ; preds = %bb29.i38
%3 = getelementptr %struct.III_scalefac_t, ptr null, i32 0, i32 1, i32 %sfb.314.i, i32 %i.1.reg2mem.0.i ; <ptr> [#uses=1]
store i32 0, ptr %3, align 4
br label %bb33.i47
bb33.i47: ; preds = %bb30.i41, %bb29.i38
%4 = add i32 %sfb.314.i, 1 ; <i32> [#uses=1]
%phitmp.i46 = icmp ugt i32 %4, 11 ; <i1> [#uses=1]
%indvar.next33.i = add i32 %indvar32.i, 1 ; <i32> [#uses=1]
br i1 %phitmp.i46, label %bb28.i37, label %bb29.i38
}