llvm/llvm/test/CodeGen/X86/pr95274.ll

; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
; RUN: llc < %s -mtriple=x86_64-- -mcpu=skylake-avx512 | FileCheck %s

define void @PR95274(ptr %p0) nounwind {
; CHECK-LABEL: PR95274:
; CHECK:       # %bb.0:
; CHECK-NEXT:    vcvtps2ph $4, %zmm0, %ymm0
; CHECK-NEXT:    vinsertf64x4 $1, %ymm0, %zmm0, %zmm0
; CHECK-NEXT:    vmovups %zmm0, 1984(%rdi)
; CHECK-NEXT:    vmovups %zmm0, 1920(%rdi)
; CHECK-NEXT:    vmovups %zmm0, 1856(%rdi)
; CHECK-NEXT:    vmovups %zmm0, 1792(%rdi)
; CHECK-NEXT:    vmovups %zmm0, 1728(%rdi)
; CHECK-NEXT:    vmovups %zmm0, 1664(%rdi)
; CHECK-NEXT:    vmovups %zmm0, 1600(%rdi)
; CHECK-NEXT:    vmovups %zmm0, 1536(%rdi)
; CHECK-NEXT:    vmovups %zmm0, 1472(%rdi)
; CHECK-NEXT:    vmovups %zmm0, 1408(%rdi)
; CHECK-NEXT:    vmovups %zmm0, 1344(%rdi)
; CHECK-NEXT:    vmovups %zmm0, 1280(%rdi)
; CHECK-NEXT:    vmovups %zmm0, 1216(%rdi)
; CHECK-NEXT:    vmovups %zmm0, 1152(%rdi)
; CHECK-NEXT:    vmovups %zmm0, 1088(%rdi)
; CHECK-NEXT:    vmovups %zmm0, 1024(%rdi)
; CHECK-NEXT:    vmovups %zmm0, 960(%rdi)
; CHECK-NEXT:    vmovups %zmm0, 896(%rdi)
; CHECK-NEXT:    vmovups %zmm0, 832(%rdi)
; CHECK-NEXT:    vmovups %zmm0, 768(%rdi)
; CHECK-NEXT:    vmovups %zmm0, 704(%rdi)
; CHECK-NEXT:    vmovups %zmm0, 640(%rdi)
; CHECK-NEXT:    vmovups %zmm0, 576(%rdi)
; CHECK-NEXT:    vmovups %zmm0, 512(%rdi)
; CHECK-NEXT:    vmovups %zmm0, 448(%rdi)
; CHECK-NEXT:    vmovups %zmm0, 384(%rdi)
; CHECK-NEXT:    vmovups %zmm0, 320(%rdi)
; CHECK-NEXT:    vmovups %zmm0, 256(%rdi)
; CHECK-NEXT:    vmovups %zmm0, 192(%rdi)
; CHECK-NEXT:    vmovups %zmm0, 128(%rdi)
; CHECK-NEXT:    vmovups %zmm0, 64(%rdi)
; CHECK-NEXT:    vmovups %zmm0, (%rdi)
; CHECK-NEXT:    vzeroupper
; CHECK-NEXT:    retq
  %load = load <1024 x float>, ptr %p0, align 2
  %trunc = fptrunc <1024 x float> poison to <1024 x half>
  store <1024 x half> %trunc, ptr %p0, align 2
  ret void
}