; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc < %s -mtriple=x86_64-- -mattr=+sse2 | FileCheck %s --check-prefixes=SSE
; RUN: llc < %s -mtriple=x86_64-- -mattr=+avx | FileCheck %s --check-prefixes=AVX
; RUN: llc < %s -mtriple=x86_64-- -mattr=+avx2 | FileCheck %s --check-prefixes=AVX2
; RUN: llc < %s -mtriple=x86_64-- -mattr=+avx2,+fast-variable-perlane-shuffle | FileCheck %s --check-prefixes=AVX2-FP
; RUN: llc < %s -mtriple=x86_64-- -mattr=+avx2,+fast-variable-crosslane-shuffle,+fast-variable-perlane-shuffle | FileCheck %s --check-prefixes=AVX2-FCP
; RUN: llc < %s -mtriple=x86_64-- -mattr=+avx512vl | FileCheck %s --check-prefixes=AVX512
; RUN: llc < %s -mtriple=x86_64-- -mattr=+avx512vl,+fast-variable-crosslane-shuffle,+fast-variable-perlane-shuffle | FileCheck %s --check-prefixes=AVX512-FCP
; RUN: llc < %s -mtriple=x86_64-- -mattr=+avx512vl,+avx512dq | FileCheck %s --check-prefixes=AVX512DQ
; RUN: llc < %s -mtriple=x86_64-- -mattr=+avx512vl,+avx512dq,+fast-variable-crosslane-shuffle,+fast-variable-perlane-shuffle | FileCheck %s --check-prefixes=AVX512DQ-FCP
; RUN: llc < %s -mtriple=x86_64-- -mattr=+avx512vl,+avx512bw | FileCheck %s --check-prefixes=AVX512BW
; RUN: llc < %s -mtriple=x86_64-- -mattr=+avx512vl,+avx512bw,+fast-variable-crosslane-shuffle,+fast-variable-perlane-shuffle | FileCheck %s --check-prefixes=AVX512BW-FCP
; RUN: llc < %s -mtriple=x86_64-- -mattr=+avx512vl,+avx512dq,+avx512bw | FileCheck %s --check-prefixes=AVX512DQ-BW
; RUN: llc < %s -mtriple=x86_64-- -mattr=+avx512vl,+avx512dq,+avx512bw,+fast-variable-crosslane-shuffle,+fast-variable-perlane-shuffle | FileCheck %s --check-prefixes=AVX512DQ-BW-FCP
; These patterns are produced by LoopVectorizer for interleaved stores.
define void @store_i16_stride8_vf2(ptr %in.vecptr0, ptr %in.vecptr1, ptr %in.vecptr2, ptr %in.vecptr3, ptr %in.vecptr4, ptr %in.vecptr5, ptr %in.vecptr6, ptr %in.vecptr7, ptr %out.vec) nounwind {
; SSE-LABEL: store_i16_stride8_vf2:
; SSE: # %bb.0:
; SSE-NEXT: movq {{[0-9]+}}(%rsp), %rax
; SSE-NEXT: movq {{[0-9]+}}(%rsp), %r10
; SSE-NEXT: movq {{[0-9]+}}(%rsp), %r11
; SSE-NEXT: movdqa (%rdi), %xmm0
; SSE-NEXT: movdqa (%rdx), %xmm1
; SSE-NEXT: movdqa (%r8), %xmm2
; SSE-NEXT: movdqa (%r11), %xmm3
; SSE-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],mem[0],xmm0[1],mem[1]
; SSE-NEXT: punpckldq {{.*#+}} xmm1 = xmm1[0],mem[0],xmm1[1],mem[1]
; SSE-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1],xmm0[2],xmm1[2],xmm0[3],xmm1[3]
; SSE-NEXT: punpckldq {{.*#+}} xmm2 = xmm2[0],mem[0],xmm2[1],mem[1]
; SSE-NEXT: punpckldq {{.*#+}} xmm3 = xmm3[0],mem[0],xmm3[1],mem[1]
; SSE-NEXT: punpcklwd {{.*#+}} xmm2 = xmm2[0],xmm3[0],xmm2[1],xmm3[1],xmm2[2],xmm3[2],xmm2[3],xmm3[3]
; SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm0[0,2,2,3]
; SSE-NEXT: pshuflw {{.*#+}} xmm1 = xmm1[0,2,1,3,4,5,6,7]
; SSE-NEXT: pshufd {{.*#+}} xmm3 = xmm2[0,1,2,0]
; SSE-NEXT: pshufhw {{.*#+}} xmm3 = xmm3[0,1,2,3,6,4,7,5]
; SSE-NEXT: movsd {{.*#+}} xmm3 = xmm1[0],xmm3[1]
; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm0[3,1,2,3]
; SSE-NEXT: pshuflw {{.*#+}} xmm0 = xmm0[2,0,3,1,4,5,6,7]
; SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm2[0,1,1,3]
; SSE-NEXT: pshufhw {{.*#+}} xmm1 = xmm1[0,1,2,3,4,6,5,7]
; SSE-NEXT: movsd {{.*#+}} xmm1 = xmm0[0],xmm1[1]
; SSE-NEXT: movapd %xmm1, 16(%rax)
; SSE-NEXT: movapd %xmm3, (%rax)
; SSE-NEXT: retq
;
; AVX-LABEL: store_i16_stride8_vf2:
; AVX: # %bb.0:
; AVX-NEXT: movq {{[0-9]+}}(%rsp), %rax
; AVX-NEXT: movq {{[0-9]+}}(%rsp), %r10
; AVX-NEXT: movq {{[0-9]+}}(%rsp), %r11
; AVX-NEXT: vmovdqa (%rdi), %xmm0
; AVX-NEXT: vmovdqa (%rdx), %xmm1
; AVX-NEXT: vmovdqa (%r8), %xmm2
; AVX-NEXT: vmovdqa (%r11), %xmm3
; AVX-NEXT: vpunpckldq {{.*#+}} xmm0 = xmm0[0],mem[0],xmm0[1],mem[1]
; AVX-NEXT: vpunpckldq {{.*#+}} xmm1 = xmm1[0],mem[0],xmm1[1],mem[1]
; AVX-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
; AVX-NEXT: vpunpckldq {{.*#+}} xmm1 = xmm2[0],mem[0],xmm2[1],mem[1]
; AVX-NEXT: vpunpckldq {{.*#+}} xmm2 = xmm3[0],mem[0],xmm3[1],mem[1]
; AVX-NEXT: vpunpcklqdq {{.*#+}} xmm1 = xmm1[0],xmm2[0]
; AVX-NEXT: vpxor %xmm2, %xmm2, %xmm2
; AVX-NEXT: vpblendw {{.*#+}} xmm3 = xmm1[0],xmm2[1],xmm1[2],xmm2[3],xmm1[4],xmm2[5],xmm1[6],xmm2[7]
; AVX-NEXT: vpblendw {{.*#+}} xmm2 = xmm0[0],xmm2[1],xmm0[2],xmm2[3],xmm0[4],xmm2[5],xmm0[6],xmm2[7]
; AVX-NEXT: vpackusdw %xmm3, %xmm2, %xmm2
; AVX-NEXT: vpsrld $16, %xmm1, %xmm1
; AVX-NEXT: vpsrld $16, %xmm0, %xmm0
; AVX-NEXT: vpackusdw %xmm1, %xmm0, %xmm0
; AVX-NEXT: vmovdqa %xmm0, 16(%rax)
; AVX-NEXT: vmovdqa %xmm2, (%rax)
; AVX-NEXT: retq
;
; AVX2-LABEL: store_i16_stride8_vf2:
; AVX2: # %bb.0:
; AVX2-NEXT: movq {{[0-9]+}}(%rsp), %rax
; AVX2-NEXT: movq {{[0-9]+}}(%rsp), %r10
; AVX2-NEXT: movq {{[0-9]+}}(%rsp), %r11
; AVX2-NEXT: vmovdqa (%rdi), %xmm0
; AVX2-NEXT: vmovdqa (%rsi), %xmm1
; AVX2-NEXT: vmovdqa (%rdx), %xmm2
; AVX2-NEXT: vmovdqa (%rcx), %xmm3
; AVX2-NEXT: vinserti128 $1, (%r11), %ymm3, %ymm3
; AVX2-NEXT: vinserti128 $1, (%r10), %ymm2, %ymm2
; AVX2-NEXT: vpunpckldq {{.*#+}} ymm2 = ymm2[0],ymm3[0],ymm2[1],ymm3[1],ymm2[4],ymm3[4],ymm2[5],ymm3[5]
; AVX2-NEXT: vinserti128 $1, (%r9), %ymm1, %ymm1
; AVX2-NEXT: vinserti128 $1, (%r8), %ymm0, %ymm0
; AVX2-NEXT: vpunpckldq {{.*#+}} ymm0 = ymm0[0],ymm1[0],ymm0[1],ymm1[1],ymm0[4],ymm1[4],ymm0[5],ymm1[5]
; AVX2-NEXT: vpunpcklqdq {{.*#+}} ymm0 = ymm0[0],ymm2[0],ymm0[2],ymm2[2]
; AVX2-NEXT: vpshufb {{.*#+}} ymm0 = ymm0[0,1,4,5,8,9,12,13,2,3,6,7,10,11,14,15,16,17,20,21,24,25,28,29,18,19,22,23,26,27,30,31]
; AVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,2,1,3]
; AVX2-NEXT: vmovdqa %ymm0, (%rax)
; AVX2-NEXT: vzeroupper
; AVX2-NEXT: retq
;
; AVX2-FP-LABEL: store_i16_stride8_vf2:
; AVX2-FP: # %bb.0:
; AVX2-FP-NEXT: movq {{[0-9]+}}(%rsp), %rax
; AVX2-FP-NEXT: movq {{[0-9]+}}(%rsp), %r10
; AVX2-FP-NEXT: movq {{[0-9]+}}(%rsp), %r11
; AVX2-FP-NEXT: vmovdqa (%rdi), %xmm0
; AVX2-FP-NEXT: vmovdqa (%rsi), %xmm1
; AVX2-FP-NEXT: vmovdqa (%rdx), %xmm2
; AVX2-FP-NEXT: vmovdqa (%rcx), %xmm3
; AVX2-FP-NEXT: vinserti128 $1, (%r11), %ymm3, %ymm3
; AVX2-FP-NEXT: vinserti128 $1, (%r10), %ymm2, %ymm2
; AVX2-FP-NEXT: vpunpckldq {{.*#+}} ymm2 = ymm2[0],ymm3[0],ymm2[1],ymm3[1],ymm2[4],ymm3[4],ymm2[5],ymm3[5]
; AVX2-FP-NEXT: vinserti128 $1, (%r9), %ymm1, %ymm1
; AVX2-FP-NEXT: vinserti128 $1, (%r8), %ymm0, %ymm0
; AVX2-FP-NEXT: vpunpckldq {{.*#+}} ymm0 = ymm0[0],ymm1[0],ymm0[1],ymm1[1],ymm0[4],ymm1[4],ymm0[5],ymm1[5]
; AVX2-FP-NEXT: vpunpcklqdq {{.*#+}} ymm0 = ymm0[0],ymm2[0],ymm0[2],ymm2[2]
; AVX2-FP-NEXT: vpshufb {{.*#+}} ymm0 = ymm0[0,1,4,5,8,9,12,13,2,3,6,7,10,11,14,15,16,17,20,21,24,25,28,29,18,19,22,23,26,27,30,31]
; AVX2-FP-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,2,1,3]
; AVX2-FP-NEXT: vmovdqa %ymm0, (%rax)
; AVX2-FP-NEXT: vzeroupper
; AVX2-FP-NEXT: retq
;
; AVX2-FCP-LABEL: store_i16_stride8_vf2:
; AVX2-FCP: # %bb.0:
; AVX2-FCP-NEXT: movq {{[0-9]+}}(%rsp), %rax
; AVX2-FCP-NEXT: movq {{[0-9]+}}(%rsp), %r10
; AVX2-FCP-NEXT: movq {{[0-9]+}}(%rsp), %r11
; AVX2-FCP-NEXT: vmovdqa (%rdi), %xmm0
; AVX2-FCP-NEXT: vmovdqa (%rsi), %xmm1
; AVX2-FCP-NEXT: vmovdqa (%rdx), %xmm2
; AVX2-FCP-NEXT: vmovdqa (%rcx), %xmm3
; AVX2-FCP-NEXT: vinserti128 $1, (%r11), %ymm3, %ymm3
; AVX2-FCP-NEXT: vinserti128 $1, (%r10), %ymm2, %ymm2
; AVX2-FCP-NEXT: vpunpckldq {{.*#+}} ymm2 = ymm2[0],ymm3[0],ymm2[1],ymm3[1],ymm2[4],ymm3[4],ymm2[5],ymm3[5]
; AVX2-FCP-NEXT: vinserti128 $1, (%r9), %ymm1, %ymm1
; AVX2-FCP-NEXT: vinserti128 $1, (%r8), %ymm0, %ymm0
; AVX2-FCP-NEXT: vpunpckldq {{.*#+}} ymm0 = ymm0[0],ymm1[0],ymm0[1],ymm1[1],ymm0[4],ymm1[4],ymm0[5],ymm1[5]
; AVX2-FCP-NEXT: vpunpcklqdq {{.*#+}} ymm0 = ymm0[0],ymm2[0],ymm0[2],ymm2[2]
; AVX2-FCP-NEXT: vpshufb {{.*#+}} ymm0 = ymm0[0,1,4,5,8,9,12,13,2,3,6,7,10,11,14,15,16,17,20,21,24,25,28,29,18,19,22,23,26,27,30,31]
; AVX2-FCP-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,2,1,3]
; AVX2-FCP-NEXT: vmovdqa %ymm0, (%rax)
; AVX2-FCP-NEXT: vzeroupper
; AVX2-FCP-NEXT: retq
;
; AVX512-LABEL: store_i16_stride8_vf2:
; AVX512: # %bb.0:
; AVX512-NEXT: movq {{[0-9]+}}(%rsp), %rax
; AVX512-NEXT: movq {{[0-9]+}}(%rsp), %r10
; AVX512-NEXT: movq {{[0-9]+}}(%rsp), %r11
; AVX512-NEXT: vmovdqa (%rdi), %xmm0
; AVX512-NEXT: vmovdqa (%rsi), %xmm1
; AVX512-NEXT: vmovdqa (%rdx), %xmm2
; AVX512-NEXT: vmovdqa (%rcx), %xmm3
; AVX512-NEXT: vinserti128 $1, (%r11), %ymm3, %ymm3
; AVX512-NEXT: vinserti128 $1, (%r10), %ymm2, %ymm2
; AVX512-NEXT: vpunpckldq {{.*#+}} ymm2 = ymm2[0],ymm3[0],ymm2[1],ymm3[1],ymm2[4],ymm3[4],ymm2[5],ymm3[5]
; AVX512-NEXT: vinserti128 $1, (%r9), %ymm1, %ymm1
; AVX512-NEXT: vinserti128 $1, (%r8), %ymm0, %ymm0
; AVX512-NEXT: vpunpckldq {{.*#+}} ymm0 = ymm0[0],ymm1[0],ymm0[1],ymm1[1],ymm0[4],ymm1[4],ymm0[5],ymm1[5]
; AVX512-NEXT: vpunpcklqdq {{.*#+}} ymm0 = ymm0[0],ymm2[0],ymm0[2],ymm2[2]
; AVX512-NEXT: vpshufb {{.*#+}} ymm0 = ymm0[0,1,4,5,8,9,12,13,2,3,6,7,10,11,14,15,16,17,20,21,24,25,28,29,18,19,22,23,26,27,30,31]
; AVX512-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,2,1,3]
; AVX512-NEXT: vmovdqa %ymm0, (%rax)
; AVX512-NEXT: vzeroupper
; AVX512-NEXT: retq
;
; AVX512-FCP-LABEL: store_i16_stride8_vf2:
; AVX512-FCP: # %bb.0:
; AVX512-FCP-NEXT: movq {{[0-9]+}}(%rsp), %rax
; AVX512-FCP-NEXT: movq {{[0-9]+}}(%rsp), %r10
; AVX512-FCP-NEXT: movq {{[0-9]+}}(%rsp), %r11
; AVX512-FCP-NEXT: vmovdqa (%rdi), %xmm0
; AVX512-FCP-NEXT: vmovdqa (%rsi), %xmm1
; AVX512-FCP-NEXT: vmovdqa (%rdx), %xmm2
; AVX512-FCP-NEXT: vmovdqa (%rcx), %xmm3
; AVX512-FCP-NEXT: vinserti128 $1, (%r11), %ymm3, %ymm3
; AVX512-FCP-NEXT: vinserti128 $1, (%r10), %ymm2, %ymm2
; AVX512-FCP-NEXT: vpunpckldq {{.*#+}} ymm2 = ymm2[0],ymm3[0],ymm2[1],ymm3[1],ymm2[4],ymm3[4],ymm2[5],ymm3[5]
; AVX512-FCP-NEXT: vinserti128 $1, (%r9), %ymm1, %ymm1
; AVX512-FCP-NEXT: vinserti128 $1, (%r8), %ymm0, %ymm0
; AVX512-FCP-NEXT: vpunpckldq {{.*#+}} ymm0 = ymm0[0],ymm1[0],ymm0[1],ymm1[1],ymm0[4],ymm1[4],ymm0[5],ymm1[5]
; AVX512-FCP-NEXT: vpunpcklqdq {{.*#+}} ymm0 = ymm0[0],ymm2[0],ymm0[2],ymm2[2]
; AVX512-FCP-NEXT: vpshufb {{.*#+}} ymm0 = ymm0[0,1,4,5,8,9,12,13,2,3,6,7,10,11,14,15,16,17,20,21,24,25,28,29,18,19,22,23,26,27,30,31]
; AVX512-FCP-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,2,1,3]
; AVX512-FCP-NEXT: vmovdqa %ymm0, (%rax)
; AVX512-FCP-NEXT: vzeroupper
; AVX512-FCP-NEXT: retq
;
; AVX512DQ-LABEL: store_i16_stride8_vf2:
; AVX512DQ: # %bb.0:
; AVX512DQ-NEXT: movq {{[0-9]+}}(%rsp), %rax
; AVX512DQ-NEXT: movq {{[0-9]+}}(%rsp), %r10
; AVX512DQ-NEXT: movq {{[0-9]+}}(%rsp), %r11
; AVX512DQ-NEXT: vmovdqa (%rdi), %xmm0
; AVX512DQ-NEXT: vmovdqa (%rsi), %xmm1
; AVX512DQ-NEXT: vmovdqa (%rdx), %xmm2
; AVX512DQ-NEXT: vmovdqa (%rcx), %xmm3
; AVX512DQ-NEXT: vinserti128 $1, (%r11), %ymm3, %ymm3
; AVX512DQ-NEXT: vinserti128 $1, (%r10), %ymm2, %ymm2
; AVX512DQ-NEXT: vpunpckldq {{.*#+}} ymm2 = ymm2[0],ymm3[0],ymm2[1],ymm3[1],ymm2[4],ymm3[4],ymm2[5],ymm3[5]
; AVX512DQ-NEXT: vinserti128 $1, (%r9), %ymm1, %ymm1
; AVX512DQ-NEXT: vinserti128 $1, (%r8), %ymm0, %ymm0
; AVX512DQ-NEXT: vpunpckldq {{.*#+}} ymm0 = ymm0[0],ymm1[0],ymm0[1],ymm1[1],ymm0[4],ymm1[4],ymm0[5],ymm1[5]
; AVX512DQ-NEXT: vpunpcklqdq {{.*#+}} ymm0 = ymm0[0],ymm2[0],ymm0[2],ymm2[2]
; AVX512DQ-NEXT: vpshufb {{.*#+}} ymm0 = ymm0[0,1,4,5,8,9,12,13,2,3,6,7,10,11,14,15,16,17,20,21,24,25,28,29,18,19,22,23,26,27,30,31]
; AVX512DQ-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,2,1,3]
; AVX512DQ-NEXT: vmovdqa %ymm0, (%rax)
; AVX512DQ-NEXT: vzeroupper
; AVX512DQ-NEXT: retq
;
; AVX512DQ-FCP-LABEL: store_i16_stride8_vf2:
; AVX512DQ-FCP: # %bb.0:
; AVX512DQ-FCP-NEXT: movq {{[0-9]+}}(%rsp), %rax
; AVX512DQ-FCP-NEXT: movq {{[0-9]+}}(%rsp), %r10
; AVX512DQ-FCP-NEXT: movq {{[0-9]+}}(%rsp), %r11
; AVX512DQ-FCP-NEXT: vmovdqa (%rdi), %xmm0
; AVX512DQ-FCP-NEXT: vmovdqa (%rsi), %xmm1
; AVX512DQ-FCP-NEXT: vmovdqa (%rdx), %xmm2
; AVX512DQ-FCP-NEXT: vmovdqa (%rcx), %xmm3
; AVX512DQ-FCP-NEXT: vinserti128 $1, (%r11), %ymm3, %ymm3
; AVX512DQ-FCP-NEXT: vinserti128 $1, (%r10), %ymm2, %ymm2
; AVX512DQ-FCP-NEXT: vpunpckldq {{.*#+}} ymm2 = ymm2[0],ymm3[0],ymm2[1],ymm3[1],ymm2[4],ymm3[4],ymm2[5],ymm3[5]
; AVX512DQ-FCP-NEXT: vinserti128 $1, (%r9), %ymm1, %ymm1
; AVX512DQ-FCP-NEXT: vinserti128 $1, (%r8), %ymm0, %ymm0
; AVX512DQ-FCP-NEXT: vpunpckldq {{.*#+}} ymm0 = ymm0[0],ymm1[0],ymm0[1],ymm1[1],ymm0[4],ymm1[4],ymm0[5],ymm1[5]
; AVX512DQ-FCP-NEXT: vpunpcklqdq {{.*#+}} ymm0 = ymm0[0],ymm2[0],ymm0[2],ymm2[2]
; AVX512DQ-FCP-NEXT: vpshufb {{.*#+}} ymm0 = ymm0[0,1,4,5,8,9,12,13,2,3,6,7,10,11,14,15,16,17,20,21,24,25,28,29,18,19,22,23,26,27,30,31]
; AVX512DQ-FCP-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,2,1,3]
; AVX512DQ-FCP-NEXT: vmovdqa %ymm0, (%rax)
; AVX512DQ-FCP-NEXT: vzeroupper
; AVX512DQ-FCP-NEXT: retq
;
; AVX512BW-LABEL: store_i16_stride8_vf2:
; AVX512BW: # %bb.0:
; AVX512BW-NEXT: movq {{[0-9]+}}(%rsp), %rax
; AVX512BW-NEXT: movq {{[0-9]+}}(%rsp), %r10
; AVX512BW-NEXT: movq {{[0-9]+}}(%rsp), %r11
; AVX512BW-NEXT: vmovdqa (%rdi), %xmm0
; AVX512BW-NEXT: vmovdqa (%rsi), %xmm1
; AVX512BW-NEXT: vmovdqa (%rdx), %xmm2
; AVX512BW-NEXT: vmovdqa (%rcx), %xmm3
; AVX512BW-NEXT: vinserti128 $1, (%r11), %ymm3, %ymm3
; AVX512BW-NEXT: vinserti128 $1, (%r10), %ymm2, %ymm2
; AVX512BW-NEXT: vpunpckldq {{.*#+}} ymm2 = ymm2[0],ymm3[0],ymm2[1],ymm3[1],ymm2[4],ymm3[4],ymm2[5],ymm3[5]
; AVX512BW-NEXT: vinserti128 $1, (%r9), %ymm1, %ymm1
; AVX512BW-NEXT: vinserti128 $1, (%r8), %ymm0, %ymm0
; AVX512BW-NEXT: vpunpckldq {{.*#+}} ymm0 = ymm0[0],ymm1[0],ymm0[1],ymm1[1],ymm0[4],ymm1[4],ymm0[5],ymm1[5]
; AVX512BW-NEXT: vpmovsxbw {{.*#+}} ymm1 = [0,2,16,18,8,10,24,26,1,3,17,19,9,11,25,27]
; AVX512BW-NEXT: vpermi2w %ymm2, %ymm0, %ymm1
; AVX512BW-NEXT: vmovdqa %ymm1, (%rax)
; AVX512BW-NEXT: vzeroupper
; AVX512BW-NEXT: retq
;
; AVX512BW-FCP-LABEL: store_i16_stride8_vf2:
; AVX512BW-FCP: # %bb.0:
; AVX512BW-FCP-NEXT: movq {{[0-9]+}}(%rsp), %rax
; AVX512BW-FCP-NEXT: movq {{[0-9]+}}(%rsp), %r10
; AVX512BW-FCP-NEXT: movq {{[0-9]+}}(%rsp), %r11
; AVX512BW-FCP-NEXT: vmovdqa (%rdi), %xmm0
; AVX512BW-FCP-NEXT: vmovdqa (%rsi), %xmm1
; AVX512BW-FCP-NEXT: vmovdqa (%rdx), %xmm2
; AVX512BW-FCP-NEXT: vmovdqa (%rcx), %xmm3
; AVX512BW-FCP-NEXT: vinserti128 $1, (%r11), %ymm3, %ymm3
; AVX512BW-FCP-NEXT: vinserti128 $1, (%r10), %ymm2, %ymm2
; AVX512BW-FCP-NEXT: vpunpckldq {{.*#+}} ymm2 = ymm2[0],ymm3[0],ymm2[1],ymm3[1],ymm2[4],ymm3[4],ymm2[5],ymm3[5]
; AVX512BW-FCP-NEXT: vinserti128 $1, (%r9), %ymm1, %ymm1
; AVX512BW-FCP-NEXT: vinserti128 $1, (%r8), %ymm0, %ymm0
; AVX512BW-FCP-NEXT: vpunpckldq {{.*#+}} ymm0 = ymm0[0],ymm1[0],ymm0[1],ymm1[1],ymm0[4],ymm1[4],ymm0[5],ymm1[5]
; AVX512BW-FCP-NEXT: vpmovsxbw {{.*#+}} ymm1 = [0,2,16,18,8,10,24,26,1,3,17,19,9,11,25,27]
; AVX512BW-FCP-NEXT: vpermi2w %ymm2, %ymm0, %ymm1
; AVX512BW-FCP-NEXT: vmovdqa %ymm1, (%rax)
; AVX512BW-FCP-NEXT: vzeroupper
; AVX512BW-FCP-NEXT: retq
;
; AVX512DQ-BW-LABEL: store_i16_stride8_vf2:
; AVX512DQ-BW: # %bb.0:
; AVX512DQ-BW-NEXT: movq {{[0-9]+}}(%rsp), %rax
; AVX512DQ-BW-NEXT: movq {{[0-9]+}}(%rsp), %r10
; AVX512DQ-BW-NEXT: movq {{[0-9]+}}(%rsp), %r11
; AVX512DQ-BW-NEXT: vmovdqa (%rdi), %xmm0
; AVX512DQ-BW-NEXT: vmovdqa (%rsi), %xmm1
; AVX512DQ-BW-NEXT: vmovdqa (%rdx), %xmm2
; AVX512DQ-BW-NEXT: vmovdqa (%rcx), %xmm3
; AVX512DQ-BW-NEXT: vinserti128 $1, (%r11), %ymm3, %ymm3
; AVX512DQ-BW-NEXT: vinserti128 $1, (%r10), %ymm2, %ymm2
; AVX512DQ-BW-NEXT: vpunpckldq {{.*#+}} ymm2 = ymm2[0],ymm3[0],ymm2[1],ymm3[1],ymm2[4],ymm3[4],ymm2[5],ymm3[5]
; AVX512DQ-BW-NEXT: vinserti128 $1, (%r9), %ymm1, %ymm1
; AVX512DQ-BW-NEXT: vinserti128 $1, (%r8), %ymm0, %ymm0
; AVX512DQ-BW-NEXT: vpunpckldq {{.*#+}} ymm0 = ymm0[0],ymm1[0],ymm0[1],ymm1[1],ymm0[4],ymm1[4],ymm0[5],ymm1[5]
; AVX512DQ-BW-NEXT: vpmovsxbw {{.*#+}} ymm1 = [0,2,16,18,8,10,24,26,1,3,17,19,9,11,25,27]
; AVX512DQ-BW-NEXT: vpermi2w %ymm2, %ymm0, %ymm1
; AVX512DQ-BW-NEXT: vmovdqa %ymm1, (%rax)
; AVX512DQ-BW-NEXT: vzeroupper
; AVX512DQ-BW-NEXT: retq
;
; AVX512DQ-BW-FCP-LABEL: store_i16_stride8_vf2:
; AVX512DQ-BW-FCP: # %bb.0:
; AVX512DQ-BW-FCP-NEXT: movq {{[0-9]+}}(%rsp), %rax
; AVX512DQ-BW-FCP-NEXT: movq {{[0-9]+}}(%rsp), %r10
; AVX512DQ-BW-FCP-NEXT: movq {{[0-9]+}}(%rsp), %r11
; AVX512DQ-BW-FCP-NEXT: vmovdqa (%rdi), %xmm0
; AVX512DQ-BW-FCP-NEXT: vmovdqa (%rsi), %xmm1
; AVX512DQ-BW-FCP-NEXT: vmovdqa (%rdx), %xmm2
; AVX512DQ-BW-FCP-NEXT: vmovdqa (%rcx), %xmm3
; AVX512DQ-BW-FCP-NEXT: vinserti128 $1, (%r11), %ymm3, %ymm3
; AVX512DQ-BW-FCP-NEXT: vinserti128 $1, (%r10), %ymm2, %ymm2
; AVX512DQ-BW-FCP-NEXT: vpunpckldq {{.*#+}} ymm2 = ymm2[0],ymm3[0],ymm2[1],ymm3[1],ymm2[4],ymm3[4],ymm2[5],ymm3[5]
; AVX512DQ-BW-FCP-NEXT: vinserti128 $1, (%r9), %ymm1, %ymm1
; AVX512DQ-BW-FCP-NEXT: vinserti128 $1, (%r8), %ymm0, %ymm0
; AVX512DQ-BW-FCP-NEXT: vpunpckldq {{.*#+}} ymm0 = ymm0[0],ymm1[0],ymm0[1],ymm1[1],ymm0[4],ymm1[4],ymm0[5],ymm1[5]
; AVX512DQ-BW-FCP-NEXT: vpmovsxbw {{.*#+}} ymm1 = [0,2,16,18,8,10,24,26,1,3,17,19,9,11,25,27]
; AVX512DQ-BW-FCP-NEXT: vpermi2w %ymm2, %ymm0, %ymm1
; AVX512DQ-BW-FCP-NEXT: vmovdqa %ymm1, (%rax)
; AVX512DQ-BW-FCP-NEXT: vzeroupper
; AVX512DQ-BW-FCP-NEXT: retq
%in.vec0 = load <2 x i16>, ptr %in.vecptr0, align 64
%in.vec1 = load <2 x i16>, ptr %in.vecptr1, align 64
%in.vec2 = load <2 x i16>, ptr %in.vecptr2, align 64
%in.vec3 = load <2 x i16>, ptr %in.vecptr3, align 64
%in.vec4 = load <2 x i16>, ptr %in.vecptr4, align 64
%in.vec5 = load <2 x i16>, ptr %in.vecptr5, align 64
%in.vec6 = load <2 x i16>, ptr %in.vecptr6, align 64
%in.vec7 = load <2 x i16>, ptr %in.vecptr7, align 64
%1 = shufflevector <2 x i16> %in.vec0, <2 x i16> %in.vec1, <4 x i32> <i32 0, i32 1, i32 2, i32 3>
%2 = shufflevector <2 x i16> %in.vec2, <2 x i16> %in.vec3, <4 x i32> <i32 0, i32 1, i32 2, i32 3>
%3 = shufflevector <2 x i16> %in.vec4, <2 x i16> %in.vec5, <4 x i32> <i32 0, i32 1, i32 2, i32 3>
%4 = shufflevector <2 x i16> %in.vec6, <2 x i16> %in.vec7, <4 x i32> <i32 0, i32 1, i32 2, i32 3>
%5 = shufflevector <4 x i16> %1, <4 x i16> %2, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>
%6 = shufflevector <4 x i16> %3, <4 x i16> %4, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>
%7 = shufflevector <8 x i16> %5, <8 x i16> %6, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>
%interleaved.vec = shufflevector <16 x i16> %7, <16 x i16> poison, <16 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14, i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15>
store <16 x i16> %interleaved.vec, ptr %out.vec, align 64
ret void
}
define void @store_i16_stride8_vf4(ptr %in.vecptr0, ptr %in.vecptr1, ptr %in.vecptr2, ptr %in.vecptr3, ptr %in.vecptr4, ptr %in.vecptr5, ptr %in.vecptr6, ptr %in.vecptr7, ptr %out.vec) nounwind {
; SSE-LABEL: store_i16_stride8_vf4:
; SSE: # %bb.0:
; SSE-NEXT: movq {{[0-9]+}}(%rsp), %rax
; SSE-NEXT: movq {{[0-9]+}}(%rsp), %r10
; SSE-NEXT: movq {{[0-9]+}}(%rsp), %r11
; SSE-NEXT: movq {{.*#+}} xmm0 = mem[0],zero
; SSE-NEXT: movq {{.*#+}} xmm1 = mem[0],zero
; SSE-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1],xmm0[2],xmm1[2],xmm0[3],xmm1[3]
; SSE-NEXT: movq {{.*#+}} xmm1 = mem[0],zero
; SSE-NEXT: movq {{.*#+}} xmm2 = mem[0],zero
; SSE-NEXT: punpcklwd {{.*#+}} xmm1 = xmm1[0],xmm2[0],xmm1[1],xmm2[1],xmm1[2],xmm2[2],xmm1[3],xmm2[3]
; SSE-NEXT: movq {{.*#+}} xmm2 = mem[0],zero
; SSE-NEXT: movq {{.*#+}} xmm3 = mem[0],zero
; SSE-NEXT: punpcklwd {{.*#+}} xmm2 = xmm2[0],xmm3[0],xmm2[1],xmm3[1],xmm2[2],xmm3[2],xmm2[3],xmm3[3]
; SSE-NEXT: movq {{.*#+}} xmm3 = mem[0],zero
; SSE-NEXT: movq {{.*#+}} xmm4 = mem[0],zero
; SSE-NEXT: punpcklwd {{.*#+}} xmm3 = xmm3[0],xmm4[0],xmm3[1],xmm4[1],xmm3[2],xmm4[2],xmm3[3],xmm4[3]
; SSE-NEXT: movdqa %xmm0, %xmm4
; SSE-NEXT: punpckldq {{.*#+}} xmm4 = xmm4[0],xmm1[0],xmm4[1],xmm1[1]
; SSE-NEXT: pshufd {{.*#+}} xmm5 = xmm3[0,0,0,0]
; SSE-NEXT: pshufd {{.*#+}} xmm6 = xmm2[0,0,0,0]
; SSE-NEXT: punpckhdq {{.*#+}} xmm6 = xmm6[2],xmm5[2],xmm6[3],xmm5[3]
; SSE-NEXT: movsd {{.*#+}} xmm6 = xmm4[0],xmm6[1]
; SSE-NEXT: movdqa %xmm2, %xmm4
; SSE-NEXT: punpckldq {{.*#+}} xmm4 = xmm4[0],xmm3[0],xmm4[1],xmm3[1]
; SSE-NEXT: pshufd {{.*#+}} xmm5 = xmm1[1,1,1,1]
; SSE-NEXT: pshufd {{.*#+}} xmm7 = xmm0[1,1,1,1]
; SSE-NEXT: punpckldq {{.*#+}} xmm7 = xmm7[0],xmm5[0],xmm7[1],xmm5[1]
; SSE-NEXT: shufps {{.*#+}} xmm7 = xmm7[0,1],xmm4[2,3]
; SSE-NEXT: pshufd {{.*#+}} xmm4 = xmm0[3,3,3,3]
; SSE-NEXT: punpckhdq {{.*#+}} xmm0 = xmm0[2],xmm1[2],xmm0[3],xmm1[3]
; SSE-NEXT: pshufd {{.*#+}} xmm5 = xmm3[2,2,2,2]
; SSE-NEXT: pshufd {{.*#+}} xmm8 = xmm2[2,2,2,2]
; SSE-NEXT: punpckhdq {{.*#+}} xmm8 = xmm8[2],xmm5[2],xmm8[3],xmm5[3]
; SSE-NEXT: movsd {{.*#+}} xmm8 = xmm0[0],xmm8[1]
; SSE-NEXT: punpckhdq {{.*#+}} xmm2 = xmm2[2],xmm3[2],xmm2[3],xmm3[3]
; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm1[3,3,3,3]
; SSE-NEXT: punpckldq {{.*#+}} xmm4 = xmm4[0],xmm0[0],xmm4[1],xmm0[1]
; SSE-NEXT: shufps {{.*#+}} xmm4 = xmm4[0,1],xmm2[2,3]
; SSE-NEXT: movaps %xmm4, 48(%rax)
; SSE-NEXT: movapd %xmm8, 32(%rax)
; SSE-NEXT: movaps %xmm7, 16(%rax)
; SSE-NEXT: movapd %xmm6, (%rax)
; SSE-NEXT: retq
;
; AVX-LABEL: store_i16_stride8_vf4:
; AVX: # %bb.0:
; AVX-NEXT: movq {{[0-9]+}}(%rsp), %rax
; AVX-NEXT: movq {{[0-9]+}}(%rsp), %r10
; AVX-NEXT: vmovq {{.*#+}} xmm0 = mem[0],zero
; AVX-NEXT: vmovdqa %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
; AVX-NEXT: vmovq {{.*#+}} xmm1 = mem[0],zero
; AVX-NEXT: vmovdqa %xmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
; AVX-NEXT: vpunpcklqdq {{.*#+}} xmm4 = xmm1[0],xmm0[0]
; AVX-NEXT: vmovq {{.*#+}} xmm0 = mem[0],zero
; AVX-NEXT: vmovdqa %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
; AVX-NEXT: vmovq {{.*#+}} xmm3 = mem[0],zero
; AVX-NEXT: vpunpcklqdq {{.*#+}} xmm7 = xmm3[0],xmm0[0]
; AVX-NEXT: vmovq {{.*#+}} xmm5 = mem[0],zero
; AVX-NEXT: vmovq {{.*#+}} xmm6 = mem[0],zero
; AVX-NEXT: vpunpcklqdq {{.*#+}} xmm8 = xmm6[0],xmm5[0]
; AVX-NEXT: vmovq {{.*#+}} xmm9 = mem[0],zero
; AVX-NEXT: vmovq {{.*#+}} xmm10 = mem[0],zero
; AVX-NEXT: vpunpcklqdq {{.*#+}} xmm11 = xmm10[0],xmm9[0]
; AVX-NEXT: vpshufd {{.*#+}} xmm12 = xmm11[3,1,2,3]
; AVX-NEXT: vpshuflw {{.*#+}} xmm13 = xmm12[0,1,3,1,4,5,6,7]
; AVX-NEXT: vpshufd {{.*#+}} xmm14 = xmm8[3,1,2,3]
; AVX-NEXT: vpshuflw {{.*#+}} xmm15 = xmm14[0,1,3,1,4,5,6,7]
; AVX-NEXT: vpunpckldq {{.*#+}} xmm13 = xmm15[0],xmm13[0],xmm15[1],xmm13[1]
; AVX-NEXT: vpshufd {{.*#+}} xmm15 = xmm7[3,1,2,3]
; AVX-NEXT: vpshuflw {{.*#+}} xmm1 = xmm15[3,1,2,3,4,5,6,7]
; AVX-NEXT: vpshufd {{.*#+}} xmm0 = xmm4[3,1,2,3]
; AVX-NEXT: vpshuflw {{.*#+}} xmm2 = xmm0[3,1,2,3,4,5,6,7]
; AVX-NEXT: vpunpckldq {{.*#+}} xmm1 = xmm2[0],xmm1[0],xmm2[1],xmm1[1]
; AVX-NEXT: vpblendw {{.*#+}} xmm1 = xmm1[0,1,2,3],xmm13[4,5,6,7]
; AVX-NEXT: vpshuflw {{.*#+}} xmm2 = xmm12[0,1,2,0,4,5,6,7]
; AVX-NEXT: vpshuflw {{.*#+}} xmm12 = xmm14[0,1,2,0,4,5,6,7]
; AVX-NEXT: vpunpckldq {{.*#+}} xmm2 = xmm12[0],xmm2[0],xmm12[1],xmm2[1]
; AVX-NEXT: vpshuflw {{.*#+}} xmm12 = xmm15[2,0,2,3,4,5,6,7]
; AVX-NEXT: vpshuflw {{.*#+}} xmm0 = xmm0[2,0,2,3,4,5,6,7]
; AVX-NEXT: vpunpckldq {{.*#+}} xmm0 = xmm0[0],xmm12[0],xmm0[1],xmm12[1]
; AVX-NEXT: vpblendw {{.*#+}} xmm0 = xmm0[0,1,2,3],xmm2[4,5,6,7]
; AVX-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm0
; AVX-NEXT: vpxor %xmm1, %xmm1, %xmm1
; AVX-NEXT: vpblendw {{.*#+}} xmm2 = xmm11[0],xmm1[1,2,3],xmm11[4],xmm1[5,6,7]
; AVX-NEXT: vpblendw {{.*#+}} xmm8 = xmm8[0],xmm1[1,2,3],xmm8[4],xmm1[5,6,7]
; AVX-NEXT: vpackusdw %xmm2, %xmm8, %xmm2
; AVX-NEXT: vpblendw {{.*#+}} xmm7 = xmm7[0],xmm1[1,2,3],xmm7[4],xmm1[5,6,7]
; AVX-NEXT: vpblendw {{.*#+}} xmm1 = xmm4[0],xmm1[1,2,3],xmm4[4],xmm1[5,6,7]
; AVX-NEXT: vpackusdw %xmm7, %xmm1, %xmm1
; AVX-NEXT: vpackusdw %xmm2, %xmm1, %xmm1
; AVX-NEXT: vpunpcklwd {{.*#+}} xmm2 = xmm10[0],xmm9[0],xmm10[1],xmm9[1],xmm10[2],xmm9[2],xmm10[3],xmm9[3]
; AVX-NEXT: vpunpcklwd {{.*#+}} xmm4 = xmm6[0],xmm5[0],xmm6[1],xmm5[1],xmm6[2],xmm5[2],xmm6[3],xmm5[3]
; AVX-NEXT: vpunpckldq {{.*#+}} xmm2 = xmm4[0],xmm2[0],xmm4[1],xmm2[1]
; AVX-NEXT: vpunpckldq {{[-0-9]+}}(%r{{[sb]}}p), %xmm3, %xmm3 # 16-byte Folded Reload
; AVX-NEXT: # xmm3 = xmm3[0],mem[0],xmm3[1],mem[1]
; AVX-NEXT: vmovdqa {{[-0-9]+}}(%r{{[sb]}}p), %xmm4 # 16-byte Reload
; AVX-NEXT: vpunpckldq {{[-0-9]+}}(%r{{[sb]}}p), %xmm4, %xmm4 # 16-byte Folded Reload
; AVX-NEXT: # xmm4 = xmm4[0],mem[0],xmm4[1],mem[1]
; AVX-NEXT: vpshuflw {{.*#+}} xmm3 = xmm3[1,3,2,3,4,5,6,7]
; AVX-NEXT: vpshuflw {{.*#+}} xmm4 = xmm4[1,3,2,3,4,5,6,7]
; AVX-NEXT: vpunpckldq {{.*#+}} xmm3 = xmm4[0],xmm3[0],xmm4[1],xmm3[1]
; AVX-NEXT: vpblendw {{.*#+}} xmm2 = xmm3[0,1,2,3],xmm2[4,5,6,7]
; AVX-NEXT: movq {{[0-9]+}}(%rsp), %rax
; AVX-NEXT: vmovdqa %xmm2, 16(%rax)
; AVX-NEXT: vmovdqa %xmm1, (%rax)
; AVX-NEXT: vmovaps %ymm0, 32(%rax)
; AVX-NEXT: vzeroupper
; AVX-NEXT: retq
;
; AVX2-LABEL: store_i16_stride8_vf4:
; AVX2: # %bb.0:
; AVX2-NEXT: movq {{[0-9]+}}(%rsp), %rax
; AVX2-NEXT: movq {{[0-9]+}}(%rsp), %r10
; AVX2-NEXT: movq {{[0-9]+}}(%rsp), %r11
; AVX2-NEXT: vmovq {{.*#+}} xmm0 = mem[0],zero
; AVX2-NEXT: vmovq {{.*#+}} xmm1 = mem[0],zero
; AVX2-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm1[0],xmm0[0]
; AVX2-NEXT: vmovq {{.*#+}} xmm1 = mem[0],zero
; AVX2-NEXT: vmovq {{.*#+}} xmm2 = mem[0],zero
; AVX2-NEXT: vpunpcklqdq {{.*#+}} xmm1 = xmm2[0],xmm1[0]
; AVX2-NEXT: vmovq {{.*#+}} xmm2 = mem[0],zero
; AVX2-NEXT: vmovq {{.*#+}} xmm3 = mem[0],zero
; AVX2-NEXT: vpunpcklqdq {{.*#+}} xmm2 = xmm3[0],xmm2[0]
; AVX2-NEXT: vmovq {{.*#+}} xmm3 = mem[0],zero
; AVX2-NEXT: vmovq {{.*#+}} xmm4 = mem[0],zero
; AVX2-NEXT: vpunpcklqdq {{.*#+}} xmm3 = xmm4[0],xmm3[0]
; AVX2-NEXT: vinserti128 $1, %xmm1, %ymm0, %ymm0
; AVX2-NEXT: vinserti128 $1, %xmm3, %ymm2, %ymm1
; AVX2-NEXT: vpshufd {{.*#+}} ymm2 = ymm1[0,1,2,0,4,5,6,4]
; AVX2-NEXT: vpshufhw {{.*#+}} ymm2 = ymm2[0,1,2,3,6,4,7,5,8,9,10,11,14,12,15,13]
; AVX2-NEXT: vpermq {{.*#+}} ymm3 = ymm1[2,3,0,1]
; AVX2-NEXT: vpshufd {{.*#+}} ymm4 = ymm3[0,1,2,0,4,5,6,4]
; AVX2-NEXT: vpshufhw {{.*#+}} ymm4 = ymm4[0,1,2,3,7,5,6,4,8,9,10,11,15,13,14,12]
; AVX2-NEXT: vpblendd {{.*#+}} ymm2 = ymm2[0,1,2],ymm4[3],ymm2[4,5],ymm4[6],ymm2[7]
; AVX2-NEXT: vpshufd {{.*#+}} ymm4 = ymm0[0,2,2,3,4,6,6,7]
; AVX2-NEXT: vpshuflw {{.*#+}} ymm4 = ymm4[0,2,1,3,4,5,6,7,8,10,9,11,12,13,14,15]
; AVX2-NEXT: vpermq {{.*#+}} ymm5 = ymm0[2,3,0,1]
; AVX2-NEXT: vpshufd {{.*#+}} ymm6 = ymm5[0,2,2,3,4,6,6,7]
; AVX2-NEXT: vpshuflw {{.*#+}} ymm6 = ymm6[1,3,0,2,4,5,6,7,9,11,8,10,12,13,14,15]
; AVX2-NEXT: vpblendd {{.*#+}} ymm4 = ymm4[0],ymm6[1],ymm4[2,3],ymm6[4],ymm4[5,6,7]
; AVX2-NEXT: vpblendd {{.*#+}} ymm2 = ymm4[0,1],ymm2[2,3],ymm4[4,5],ymm2[6,7]
; AVX2-NEXT: vpshufd {{.*#+}} ymm1 = ymm1[0,1,1,3,4,5,5,7]
; AVX2-NEXT: vpshufhw {{.*#+}} ymm1 = ymm1[0,1,2,3,4,6,5,7,8,9,10,11,12,14,13,15]
; AVX2-NEXT: vpshufd {{.*#+}} ymm3 = ymm3[0,1,1,3,4,5,5,7]
; AVX2-NEXT: vpshufhw {{.*#+}} ymm3 = ymm3[0,1,2,3,5,7,4,6,8,9,10,11,13,15,12,14]
; AVX2-NEXT: vpblendd {{.*#+}} ymm1 = ymm1[0,1,2],ymm3[3],ymm1[4,5],ymm3[6],ymm1[7]
; AVX2-NEXT: vpshufd {{.*#+}} ymm0 = ymm0[3,1,2,3,7,5,6,7]
; AVX2-NEXT: vpshuflw {{.*#+}} ymm0 = ymm0[2,0,3,1,4,5,6,7,10,8,11,9,12,13,14,15]
; AVX2-NEXT: vpshufd {{.*#+}} ymm3 = ymm5[3,1,2,3,7,5,6,7]
; AVX2-NEXT: vpshuflw {{.*#+}} ymm3 = ymm3[3,1,2,0,4,5,6,7,11,9,10,8,12,13,14,15]
; AVX2-NEXT: vpblendd {{.*#+}} ymm0 = ymm0[0],ymm3[1],ymm0[2,3],ymm3[4],ymm0[5,6,7]
; AVX2-NEXT: vpblendd {{.*#+}} ymm0 = ymm0[0,1],ymm1[2,3],ymm0[4,5],ymm1[6,7]
; AVX2-NEXT: vmovdqa %ymm0, 32(%rax)
; AVX2-NEXT: vmovdqa %ymm2, (%rax)
; AVX2-NEXT: vzeroupper
; AVX2-NEXT: retq
;
; AVX2-FP-LABEL: store_i16_stride8_vf4:
; AVX2-FP: # %bb.0:
; AVX2-FP-NEXT: movq {{[0-9]+}}(%rsp), %rax
; AVX2-FP-NEXT: movq {{[0-9]+}}(%rsp), %r10
; AVX2-FP-NEXT: movq {{[0-9]+}}(%rsp), %r11
; AVX2-FP-NEXT: vmovq {{.*#+}} xmm0 = mem[0],zero
; AVX2-FP-NEXT: vmovq {{.*#+}} xmm1 = mem[0],zero
; AVX2-FP-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm1[0],xmm0[0]
; AVX2-FP-NEXT: vmovq {{.*#+}} xmm1 = mem[0],zero
; AVX2-FP-NEXT: vmovq {{.*#+}} xmm2 = mem[0],zero
; AVX2-FP-NEXT: vpunpcklqdq {{.*#+}} xmm1 = xmm2[0],xmm1[0]
; AVX2-FP-NEXT: vmovq {{.*#+}} xmm2 = mem[0],zero
; AVX2-FP-NEXT: vmovq {{.*#+}} xmm3 = mem[0],zero
; AVX2-FP-NEXT: vpunpcklqdq {{.*#+}} xmm2 = xmm3[0],xmm2[0]
; AVX2-FP-NEXT: vmovq {{.*#+}} xmm3 = mem[0],zero
; AVX2-FP-NEXT: vmovq {{.*#+}} xmm4 = mem[0],zero
; AVX2-FP-NEXT: vpunpcklqdq {{.*#+}} xmm3 = xmm4[0],xmm3[0]
; AVX2-FP-NEXT: vinserti128 $1, %xmm1, %ymm0, %ymm0
; AVX2-FP-NEXT: vinserti128 $1, %xmm3, %ymm2, %ymm1
; AVX2-FP-NEXT: vmovdqa {{.*#+}} ymm2 = [0,1,2,3,4,5,6,7,0,1,8,9,0,1,8,9,16,17,18,19,20,21,22,23,18,19,26,27,18,19,26,27]
; AVX2-FP-NEXT: vpshufb %ymm2, %ymm1, %ymm3
; AVX2-FP-NEXT: vpermq {{.*#+}} ymm4 = ymm1[2,3,0,1]
; AVX2-FP-NEXT: vpshufb %ymm2, %ymm4, %ymm2
; AVX2-FP-NEXT: vpblendd {{.*#+}} ymm2 = ymm3[0,1,2],ymm2[3],ymm3[4,5],ymm2[6],ymm3[7]
; AVX2-FP-NEXT: vmovdqa {{.*#+}} ymm3 = [0,1,8,9,0,1,8,9,8,9,10,11,12,13,14,15,18,19,26,27,18,19,26,27,24,25,26,27,28,29,30,31]
; AVX2-FP-NEXT: vpshufb %ymm3, %ymm0, %ymm5
; AVX2-FP-NEXT: vpermq {{.*#+}} ymm6 = ymm0[2,3,0,1]
; AVX2-FP-NEXT: vpshufb %ymm3, %ymm6, %ymm3
; AVX2-FP-NEXT: vpblendd {{.*#+}} ymm3 = ymm5[0],ymm3[1],ymm5[2,3],ymm3[4],ymm5[5,6,7]
; AVX2-FP-NEXT: vpblendd {{.*#+}} ymm2 = ymm3[0,1],ymm2[2,3],ymm3[4,5],ymm2[6,7]
; AVX2-FP-NEXT: vmovdqa {{.*#+}} ymm3 = [0,1,2,3,4,5,6,7,4,5,12,13,4,5,12,13,16,17,18,19,20,21,22,23,22,23,30,31,22,23,30,31]
; AVX2-FP-NEXT: vpshufb %ymm3, %ymm1, %ymm1
; AVX2-FP-NEXT: vpshufb %ymm3, %ymm4, %ymm3
; AVX2-FP-NEXT: vpblendd {{.*#+}} ymm1 = ymm1[0,1,2],ymm3[3],ymm1[4,5],ymm3[6],ymm1[7]
; AVX2-FP-NEXT: vmovdqa {{.*#+}} ymm3 = [4,5,12,13,4,5,12,13,8,9,10,11,12,13,14,15,22,23,30,31,22,23,30,31,24,25,26,27,28,29,30,31]
; AVX2-FP-NEXT: vpshufb %ymm3, %ymm0, %ymm0
; AVX2-FP-NEXT: vpshufb %ymm3, %ymm6, %ymm3
; AVX2-FP-NEXT: vpblendd {{.*#+}} ymm0 = ymm0[0],ymm3[1],ymm0[2,3],ymm3[4],ymm0[5,6,7]
; AVX2-FP-NEXT: vpblendd {{.*#+}} ymm0 = ymm0[0,1],ymm1[2,3],ymm0[4,5],ymm1[6,7]
; AVX2-FP-NEXT: vmovdqa %ymm0, 32(%rax)
; AVX2-FP-NEXT: vmovdqa %ymm2, (%rax)
; AVX2-FP-NEXT: vzeroupper
; AVX2-FP-NEXT: retq
;
; AVX2-FCP-LABEL: store_i16_stride8_vf4:
; AVX2-FCP: # %bb.0:
; AVX2-FCP-NEXT: movq {{[0-9]+}}(%rsp), %rax
; AVX2-FCP-NEXT: movq {{[0-9]+}}(%rsp), %r10
; AVX2-FCP-NEXT: movq {{[0-9]+}}(%rsp), %r11
; AVX2-FCP-NEXT: vmovq {{.*#+}} xmm0 = mem[0],zero
; AVX2-FCP-NEXT: vmovq {{.*#+}} xmm1 = mem[0],zero
; AVX2-FCP-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm1[0],xmm0[0]
; AVX2-FCP-NEXT: vmovq {{.*#+}} xmm1 = mem[0],zero
; AVX2-FCP-NEXT: vmovq {{.*#+}} xmm2 = mem[0],zero
; AVX2-FCP-NEXT: vpunpcklqdq {{.*#+}} xmm1 = xmm2[0],xmm1[0]
; AVX2-FCP-NEXT: vmovq {{.*#+}} xmm2 = mem[0],zero
; AVX2-FCP-NEXT: vmovq {{.*#+}} xmm3 = mem[0],zero
; AVX2-FCP-NEXT: vpunpcklqdq {{.*#+}} xmm2 = xmm3[0],xmm2[0]
; AVX2-FCP-NEXT: vmovq {{.*#+}} xmm3 = mem[0],zero
; AVX2-FCP-NEXT: vmovq {{.*#+}} xmm4 = mem[0],zero
; AVX2-FCP-NEXT: vpunpcklqdq {{.*#+}} xmm3 = xmm4[0],xmm3[0]
; AVX2-FCP-NEXT: vinserti128 $1, %xmm1, %ymm0, %ymm0
; AVX2-FCP-NEXT: vinserti128 $1, %xmm3, %ymm2, %ymm1
; AVX2-FCP-NEXT: vbroadcasti128 {{.*#+}} ymm2 = [0,2,4,6,0,2,4,6]
; AVX2-FCP-NEXT: # ymm2 = mem[0,1,0,1]
; AVX2-FCP-NEXT: vpermd %ymm1, %ymm2, %ymm3
; AVX2-FCP-NEXT: vmovdqa {{.*#+}} ymm4 = [u,u,u,u,u,u,u,u,0,1,4,5,8,9,12,13,u,u,u,u,u,u,u,u,2,3,6,7,10,11,14,15]
; AVX2-FCP-NEXT: vpshufb %ymm4, %ymm3, %ymm3
; AVX2-FCP-NEXT: vpermd %ymm0, %ymm2, %ymm2
; AVX2-FCP-NEXT: vmovdqa {{.*#+}} ymm5 = [0,1,4,5,8,9,12,13,u,u,u,u,u,u,u,u,2,3,6,7,10,11,14,15,u,u,u,u,u,u,u,u]
; AVX2-FCP-NEXT: vpshufb %ymm5, %ymm2, %ymm2
; AVX2-FCP-NEXT: vpblendd {{.*#+}} ymm2 = ymm2[0,1],ymm3[2,3],ymm2[4,5],ymm3[6,7]
; AVX2-FCP-NEXT: vbroadcasti128 {{.*#+}} ymm3 = [1,3,5,7,1,3,5,7]
; AVX2-FCP-NEXT: # ymm3 = mem[0,1,0,1]
; AVX2-FCP-NEXT: vpermd %ymm1, %ymm3, %ymm1
; AVX2-FCP-NEXT: vpshufb %ymm4, %ymm1, %ymm1
; AVX2-FCP-NEXT: vpermd %ymm0, %ymm3, %ymm0
; AVX2-FCP-NEXT: vpshufb %ymm5, %ymm0, %ymm0
; AVX2-FCP-NEXT: vpblendd {{.*#+}} ymm0 = ymm0[0,1],ymm1[2,3],ymm0[4,5],ymm1[6,7]
; AVX2-FCP-NEXT: vmovdqa %ymm0, 32(%rax)
; AVX2-FCP-NEXT: vmovdqa %ymm2, (%rax)
; AVX2-FCP-NEXT: vzeroupper
; AVX2-FCP-NEXT: retq
;
; AVX512-LABEL: store_i16_stride8_vf4:
; AVX512: # %bb.0:
; AVX512-NEXT: movq {{[0-9]+}}(%rsp), %rax
; AVX512-NEXT: movq {{[0-9]+}}(%rsp), %r10
; AVX512-NEXT: movq {{[0-9]+}}(%rsp), %r11
; AVX512-NEXT: vmovq {{.*#+}} xmm0 = mem[0],zero
; AVX512-NEXT: vmovq {{.*#+}} xmm1 = mem[0],zero
; AVX512-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm1[0],xmm0[0]
; AVX512-NEXT: vmovq {{.*#+}} xmm1 = mem[0],zero
; AVX512-NEXT: vmovq {{.*#+}} xmm2 = mem[0],zero
; AVX512-NEXT: vpunpcklqdq {{.*#+}} xmm1 = xmm2[0],xmm1[0]
; AVX512-NEXT: vmovq {{.*#+}} xmm2 = mem[0],zero
; AVX512-NEXT: vmovq {{.*#+}} xmm3 = mem[0],zero
; AVX512-NEXT: vpunpcklqdq {{.*#+}} xmm2 = xmm3[0],xmm2[0]
; AVX512-NEXT: vmovq {{.*#+}} xmm3 = mem[0],zero
; AVX512-NEXT: vmovq {{.*#+}} xmm4 = mem[0],zero
; AVX512-NEXT: vpunpcklqdq {{.*#+}} xmm3 = xmm4[0],xmm3[0]
; AVX512-NEXT: vinserti128 $1, %xmm1, %ymm0, %ymm0
; AVX512-NEXT: vinserti128 $1, %xmm3, %ymm2, %ymm1
; AVX512-NEXT: vpshufd {{.*#+}} ymm2 = ymm1[0,1,1,3,4,5,5,7]
; AVX512-NEXT: vpshufhw {{.*#+}} ymm2 = ymm2[0,1,2,3,4,6,5,7,8,9,10,11,12,14,13,15]
; AVX512-NEXT: vpermq {{.*#+}} ymm3 = ymm1[2,3,0,1]
; AVX512-NEXT: vpshufd {{.*#+}} ymm4 = ymm3[0,1,1,3,4,5,5,7]
; AVX512-NEXT: vpshufhw {{.*#+}} ymm4 = ymm4[0,1,2,3,5,7,4,6,8,9,10,11,13,15,12,14]
; AVX512-NEXT: vpblendd {{.*#+}} ymm2 = ymm2[0,1,2],ymm4[3],ymm2[4,5],ymm4[6],ymm2[7]
; AVX512-NEXT: vpshufd {{.*#+}} ymm4 = ymm0[3,1,2,3,7,5,6,7]
; AVX512-NEXT: vpshuflw {{.*#+}} ymm4 = ymm4[2,0,3,1,4,5,6,7,10,8,11,9,12,13,14,15]
; AVX512-NEXT: vpermq {{.*#+}} ymm5 = ymm0[2,3,0,1]
; AVX512-NEXT: vpshufd {{.*#+}} ymm6 = ymm5[3,1,2,3,7,5,6,7]
; AVX512-NEXT: vpshuflw {{.*#+}} ymm6 = ymm6[3,1,2,0,4,5,6,7,11,9,10,8,12,13,14,15]
; AVX512-NEXT: vpblendd {{.*#+}} ymm4 = ymm4[0],ymm6[1],ymm4[2,3],ymm6[4],ymm4[5,6,7]
; AVX512-NEXT: vpblendd {{.*#+}} ymm2 = ymm4[0,1],ymm2[2,3],ymm4[4,5],ymm2[6,7]
; AVX512-NEXT: vpshufd {{.*#+}} ymm1 = ymm1[0,1,2,0,4,5,6,4]
; AVX512-NEXT: vpshufhw {{.*#+}} ymm1 = ymm1[0,1,2,3,6,4,7,5,8,9,10,11,14,12,15,13]
; AVX512-NEXT: vpshufd {{.*#+}} ymm3 = ymm3[0,1,2,0,4,5,6,4]
; AVX512-NEXT: vpshufhw {{.*#+}} ymm3 = ymm3[0,1,2,3,7,5,6,4,8,9,10,11,15,13,14,12]
; AVX512-NEXT: vpblendd {{.*#+}} ymm1 = ymm1[0,1,2],ymm3[3],ymm1[4,5],ymm3[6],ymm1[7]
; AVX512-NEXT: vpshufd {{.*#+}} ymm0 = ymm0[0,2,2,3,4,6,6,7]
; AVX512-NEXT: vpshuflw {{.*#+}} ymm0 = ymm0[0,2,1,3,4,5,6,7,8,10,9,11,12,13,14,15]
; AVX512-NEXT: vpshufd {{.*#+}} ymm3 = ymm5[0,2,2,3,4,6,6,7]
; AVX512-NEXT: vpshuflw {{.*#+}} ymm3 = ymm3[1,3,0,2,4,5,6,7,9,11,8,10,12,13,14,15]
; AVX512-NEXT: vpblendd {{.*#+}} ymm0 = ymm0[0],ymm3[1],ymm0[2,3],ymm3[4],ymm0[5,6,7]
; AVX512-NEXT: vpblendd {{.*#+}} ymm0 = ymm0[0,1],ymm1[2,3],ymm0[4,5],ymm1[6,7]
; AVX512-NEXT: vinserti64x4 $1, %ymm2, %zmm0, %zmm0
; AVX512-NEXT: vmovdqa64 %zmm0, (%rax)
; AVX512-NEXT: vzeroupper
; AVX512-NEXT: retq
;
; AVX512-FCP-LABEL: store_i16_stride8_vf4:
; AVX512-FCP: # %bb.0:
; AVX512-FCP-NEXT: movq {{[0-9]+}}(%rsp), %rax
; AVX512-FCP-NEXT: movq {{[0-9]+}}(%rsp), %r10
; AVX512-FCP-NEXT: movq {{[0-9]+}}(%rsp), %r11
; AVX512-FCP-NEXT: vmovq {{.*#+}} xmm0 = mem[0],zero
; AVX512-FCP-NEXT: vmovq {{.*#+}} xmm1 = mem[0],zero
; AVX512-FCP-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm1[0],xmm0[0]
; AVX512-FCP-NEXT: vmovq {{.*#+}} xmm1 = mem[0],zero
; AVX512-FCP-NEXT: vmovq {{.*#+}} xmm2 = mem[0],zero
; AVX512-FCP-NEXT: vpunpcklqdq {{.*#+}} xmm1 = xmm2[0],xmm1[0]
; AVX512-FCP-NEXT: vmovq {{.*#+}} xmm2 = mem[0],zero
; AVX512-FCP-NEXT: vmovq {{.*#+}} xmm3 = mem[0],zero
; AVX512-FCP-NEXT: vpunpcklqdq {{.*#+}} xmm2 = xmm3[0],xmm2[0]
; AVX512-FCP-NEXT: vmovq {{.*#+}} xmm3 = mem[0],zero
; AVX512-FCP-NEXT: vmovq {{.*#+}} xmm4 = mem[0],zero
; AVX512-FCP-NEXT: vpunpcklqdq {{.*#+}} xmm3 = xmm4[0],xmm3[0]
; AVX512-FCP-NEXT: vinserti128 $1, %xmm1, %ymm0, %ymm0
; AVX512-FCP-NEXT: vinserti128 $1, %xmm3, %ymm2, %ymm1
; AVX512-FCP-NEXT: vbroadcasti128 {{.*#+}} ymm2 = [1,3,5,7,1,3,5,7]
; AVX512-FCP-NEXT: # ymm2 = mem[0,1,0,1]
; AVX512-FCP-NEXT: vpermd %ymm1, %ymm2, %ymm3
; AVX512-FCP-NEXT: vmovdqa {{.*#+}} ymm4 = [u,u,u,u,u,u,u,u,0,1,4,5,8,9,12,13,u,u,u,u,u,u,u,u,2,3,6,7,10,11,14,15]
; AVX512-FCP-NEXT: vpshufb %ymm4, %ymm3, %ymm3
; AVX512-FCP-NEXT: vpermd %ymm0, %ymm2, %ymm2
; AVX512-FCP-NEXT: vmovdqa {{.*#+}} ymm5 = [0,1,4,5,8,9,12,13,u,u,u,u,u,u,u,u,2,3,6,7,10,11,14,15,u,u,u,u,u,u,u,u]
; AVX512-FCP-NEXT: vpshufb %ymm5, %ymm2, %ymm2
; AVX512-FCP-NEXT: vpblendd {{.*#+}} ymm2 = ymm2[0,1],ymm3[2,3],ymm2[4,5],ymm3[6,7]
; AVX512-FCP-NEXT: vbroadcasti128 {{.*#+}} ymm3 = [0,2,4,6,0,2,4,6]
; AVX512-FCP-NEXT: # ymm3 = mem[0,1,0,1]
; AVX512-FCP-NEXT: vpermd %ymm1, %ymm3, %ymm1
; AVX512-FCP-NEXT: vpshufb %ymm4, %ymm1, %ymm1
; AVX512-FCP-NEXT: vpermd %ymm0, %ymm3, %ymm0
; AVX512-FCP-NEXT: vpshufb %ymm5, %ymm0, %ymm0
; AVX512-FCP-NEXT: vpblendd {{.*#+}} ymm0 = ymm0[0,1],ymm1[2,3],ymm0[4,5],ymm1[6,7]
; AVX512-FCP-NEXT: vinserti64x4 $1, %ymm2, %zmm0, %zmm0
; AVX512-FCP-NEXT: vmovdqa64 %zmm0, (%rax)
; AVX512-FCP-NEXT: vzeroupper
; AVX512-FCP-NEXT: retq
;
; AVX512DQ-LABEL: store_i16_stride8_vf4:
; AVX512DQ: # %bb.0:
; AVX512DQ-NEXT: movq {{[0-9]+}}(%rsp), %rax
; AVX512DQ-NEXT: movq {{[0-9]+}}(%rsp), %r10
; AVX512DQ-NEXT: movq {{[0-9]+}}(%rsp), %r11
; AVX512DQ-NEXT: vmovq {{.*#+}} xmm0 = mem[0],zero
; AVX512DQ-NEXT: vmovq {{.*#+}} xmm1 = mem[0],zero
; AVX512DQ-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm1[0],xmm0[0]
; AVX512DQ-NEXT: vmovq {{.*#+}} xmm1 = mem[0],zero
; AVX512DQ-NEXT: vmovq {{.*#+}} xmm2 = mem[0],zero
; AVX512DQ-NEXT: vpunpcklqdq {{.*#+}} xmm1 = xmm2[0],xmm1[0]
; AVX512DQ-NEXT: vmovq {{.*#+}} xmm2 = mem[0],zero
; AVX512DQ-NEXT: vmovq {{.*#+}} xmm3 = mem[0],zero
; AVX512DQ-NEXT: vpunpcklqdq {{.*#+}} xmm2 = xmm3[0],xmm2[0]
; AVX512DQ-NEXT: vmovq {{.*#+}} xmm3 = mem[0],zero
; AVX512DQ-NEXT: vmovq {{.*#+}} xmm4 = mem[0],zero
; AVX512DQ-NEXT: vpunpcklqdq {{.*#+}} xmm3 = xmm4[0],xmm3[0]
; AVX512DQ-NEXT: vinserti128 $1, %xmm1, %ymm0, %ymm0
; AVX512DQ-NEXT: vinserti128 $1, %xmm3, %ymm2, %ymm1
; AVX512DQ-NEXT: vpshufd {{.*#+}} ymm2 = ymm1[0,1,1,3,4,5,5,7]
; AVX512DQ-NEXT: vpshufhw {{.*#+}} ymm2 = ymm2[0,1,2,3,4,6,5,7,8,9,10,11,12,14,13,15]
; AVX512DQ-NEXT: vpermq {{.*#+}} ymm3 = ymm1[2,3,0,1]
; AVX512DQ-NEXT: vpshufd {{.*#+}} ymm4 = ymm3[0,1,1,3,4,5,5,7]
; AVX512DQ-NEXT: vpshufhw {{.*#+}} ymm4 = ymm4[0,1,2,3,5,7,4,6,8,9,10,11,13,15,12,14]
; AVX512DQ-NEXT: vpblendd {{.*#+}} ymm2 = ymm2[0,1,2],ymm4[3],ymm2[4,5],ymm4[6],ymm2[7]
; AVX512DQ-NEXT: vpshufd {{.*#+}} ymm4 = ymm0[3,1,2,3,7,5,6,7]
; AVX512DQ-NEXT: vpshuflw {{.*#+}} ymm4 = ymm4[2,0,3,1,4,5,6,7,10,8,11,9,12,13,14,15]
; AVX512DQ-NEXT: vpermq {{.*#+}} ymm5 = ymm0[2,3,0,1]
; AVX512DQ-NEXT: vpshufd {{.*#+}} ymm6 = ymm5[3,1,2,3,7,5,6,7]
; AVX512DQ-NEXT: vpshuflw {{.*#+}} ymm6 = ymm6[3,1,2,0,4,5,6,7,11,9,10,8,12,13,14,15]
; AVX512DQ-NEXT: vpblendd {{.*#+}} ymm4 = ymm4[0],ymm6[1],ymm4[2,3],ymm6[4],ymm4[5,6,7]
; AVX512DQ-NEXT: vpblendd {{.*#+}} ymm2 = ymm4[0,1],ymm2[2,3],ymm4[4,5],ymm2[6,7]
; AVX512DQ-NEXT: vpshufd {{.*#+}} ymm1 = ymm1[0,1,2,0,4,5,6,4]
; AVX512DQ-NEXT: vpshufhw {{.*#+}} ymm1 = ymm1[0,1,2,3,6,4,7,5,8,9,10,11,14,12,15,13]
; AVX512DQ-NEXT: vpshufd {{.*#+}} ymm3 = ymm3[0,1,2,0,4,5,6,4]
; AVX512DQ-NEXT: vpshufhw {{.*#+}} ymm3 = ymm3[0,1,2,3,7,5,6,4,8,9,10,11,15,13,14,12]
; AVX512DQ-NEXT: vpblendd {{.*#+}} ymm1 = ymm1[0,1,2],ymm3[3],ymm1[4,5],ymm3[6],ymm1[7]
; AVX512DQ-NEXT: vpshufd {{.*#+}} ymm0 = ymm0[0,2,2,3,4,6,6,7]
; AVX512DQ-NEXT: vpshuflw {{.*#+}} ymm0 = ymm0[0,2,1,3,4,5,6,7,8,10,9,11,12,13,14,15]
; AVX512DQ-NEXT: vpshufd {{.*#+}} ymm3 = ymm5[0,2,2,3,4,6,6,7]
; AVX512DQ-NEXT: vpshuflw {{.*#+}} ymm3 = ymm3[1,3,0,2,4,5,6,7,9,11,8,10,12,13,14,15]
; AVX512DQ-NEXT: vpblendd {{.*#+}} ymm0 = ymm0[0],ymm3[1],ymm0[2,3],ymm3[4],ymm0[5,6,7]
; AVX512DQ-NEXT: vpblendd {{.*#+}} ymm0 = ymm0[0,1],ymm1[2,3],ymm0[4,5],ymm1[6,7]
; AVX512DQ-NEXT: vinserti64x4 $1, %ymm2, %zmm0, %zmm0
; AVX512DQ-NEXT: vmovdqa64 %zmm0, (%rax)
; AVX512DQ-NEXT: vzeroupper
; AVX512DQ-NEXT: retq
;
; AVX512DQ-FCP-LABEL: store_i16_stride8_vf4:
; AVX512DQ-FCP: # %bb.0:
; AVX512DQ-FCP-NEXT: movq {{[0-9]+}}(%rsp), %rax
; AVX512DQ-FCP-NEXT: movq {{[0-9]+}}(%rsp), %r10
; AVX512DQ-FCP-NEXT: movq {{[0-9]+}}(%rsp), %r11
; AVX512DQ-FCP-NEXT: vmovq {{.*#+}} xmm0 = mem[0],zero
; AVX512DQ-FCP-NEXT: vmovq {{.*#+}} xmm1 = mem[0],zero
; AVX512DQ-FCP-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm1[0],xmm0[0]
; AVX512DQ-FCP-NEXT: vmovq {{.*#+}} xmm1 = mem[0],zero
; AVX512DQ-FCP-NEXT: vmovq {{.*#+}} xmm2 = mem[0],zero
; AVX512DQ-FCP-NEXT: vpunpcklqdq {{.*#+}} xmm1 = xmm2[0],xmm1[0]
; AVX512DQ-FCP-NEXT: vmovq {{.*#+}} xmm2 = mem[0],zero
; AVX512DQ-FCP-NEXT: vmovq {{.*#+}} xmm3 = mem[0],zero
; AVX512DQ-FCP-NEXT: vpunpcklqdq {{.*#+}} xmm2 = xmm3[0],xmm2[0]
; AVX512DQ-FCP-NEXT: vmovq {{.*#+}} xmm3 = mem[0],zero
; AVX512DQ-FCP-NEXT: vmovq {{.*#+}} xmm4 = mem[0],zero
; AVX512DQ-FCP-NEXT: vpunpcklqdq {{.*#+}} xmm3 = xmm4[0],xmm3[0]
; AVX512DQ-FCP-NEXT: vinserti128 $1, %xmm1, %ymm0, %ymm0
; AVX512DQ-FCP-NEXT: vinserti128 $1, %xmm3, %ymm2, %ymm1
; AVX512DQ-FCP-NEXT: vbroadcasti128 {{.*#+}} ymm2 = [1,3,5,7,1,3,5,7]
; AVX512DQ-FCP-NEXT: # ymm2 = mem[0,1,0,1]
; AVX512DQ-FCP-NEXT: vpermd %ymm1, %ymm2, %ymm3
; AVX512DQ-FCP-NEXT: vmovdqa {{.*#+}} ymm4 = [u,u,u,u,u,u,u,u,0,1,4,5,8,9,12,13,u,u,u,u,u,u,u,u,2,3,6,7,10,11,14,15]
; AVX512DQ-FCP-NEXT: vpshufb %ymm4, %ymm3, %ymm3
; AVX512DQ-FCP-NEXT: vpermd %ymm0, %ymm2, %ymm2
; AVX512DQ-FCP-NEXT: vmovdqa {{.*#+}} ymm5 = [0,1,4,5,8,9,12,13,u,u,u,u,u,u,u,u,2,3,6,7,10,11,14,15,u,u,u,u,u,u,u,u]
; AVX512DQ-FCP-NEXT: vpshufb %ymm5, %ymm2, %ymm2
; AVX512DQ-FCP-NEXT: vpblendd {{.*#+}} ymm2 = ymm2[0,1],ymm3[2,3],ymm2[4,5],ymm3[6,7]
; AVX512DQ-FCP-NEXT: vbroadcasti128 {{.*#+}} ymm3 = [0,2,4,6,0,2,4,6]
; AVX512DQ-FCP-NEXT: # ymm3 = mem[0,1,0,1]
; AVX512DQ-FCP-NEXT: vpermd %ymm1, %ymm3, %ymm1
; AVX512DQ-FCP-NEXT: vpshufb %ymm4, %ymm1, %ymm1
; AVX512DQ-FCP-NEXT: vpermd %ymm0, %ymm3, %ymm0
; AVX512DQ-FCP-NEXT: vpshufb %ymm5, %ymm0, %ymm0
; AVX512DQ-FCP-NEXT: vpblendd {{.*#+}} ymm0 = ymm0[0,1],ymm1[2,3],ymm0[4,5],ymm1[6,7]
; AVX512DQ-FCP-NEXT: vinserti64x4 $1, %ymm2, %zmm0, %zmm0
; AVX512DQ-FCP-NEXT: vmovdqa64 %zmm0, (%rax)
; AVX512DQ-FCP-NEXT: vzeroupper
; AVX512DQ-FCP-NEXT: retq
;
; AVX512BW-LABEL: store_i16_stride8_vf4:
; AVX512BW: # %bb.0:
; AVX512BW-NEXT: movq {{[0-9]+}}(%rsp), %rax
; AVX512BW-NEXT: movq {{[0-9]+}}(%rsp), %r10
; AVX512BW-NEXT: movq {{[0-9]+}}(%rsp), %r11
; AVX512BW-NEXT: vmovq {{.*#+}} xmm0 = mem[0],zero
; AVX512BW-NEXT: vmovq {{.*#+}} xmm1 = mem[0],zero
; AVX512BW-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm1[0],xmm0[0]
; AVX512BW-NEXT: vmovq {{.*#+}} xmm1 = mem[0],zero
; AVX512BW-NEXT: vmovq {{.*#+}} xmm2 = mem[0],zero
; AVX512BW-NEXT: vpunpcklqdq {{.*#+}} xmm1 = xmm2[0],xmm1[0]
; AVX512BW-NEXT: vmovq {{.*#+}} xmm2 = mem[0],zero
; AVX512BW-NEXT: vmovq {{.*#+}} xmm3 = mem[0],zero
; AVX512BW-NEXT: vpunpcklqdq {{.*#+}} xmm2 = xmm3[0],xmm2[0]
; AVX512BW-NEXT: vmovq {{.*#+}} xmm3 = mem[0],zero
; AVX512BW-NEXT: vmovq {{.*#+}} xmm4 = mem[0],zero
; AVX512BW-NEXT: vpunpcklqdq {{.*#+}} xmm3 = xmm4[0],xmm3[0]
; AVX512BW-NEXT: vinserti128 $1, %xmm3, %ymm2, %ymm2
; AVX512BW-NEXT: vinserti128 $1, %xmm1, %ymm0, %ymm0
; AVX512BW-NEXT: vpmovsxbw {{.*#+}} zmm1 = [0,4,8,12,32,36,40,44,1,5,9,13,33,37,41,45,2,6,10,14,34,38,42,46,3,7,11,15,35,39,43,47]
; AVX512BW-NEXT: vpermi2w %zmm2, %zmm0, %zmm1
; AVX512BW-NEXT: vmovdqa64 %zmm1, (%rax)
; AVX512BW-NEXT: vzeroupper
; AVX512BW-NEXT: retq
;
; AVX512BW-FCP-LABEL: store_i16_stride8_vf4:
; AVX512BW-FCP: # %bb.0:
; AVX512BW-FCP-NEXT: movq {{[0-9]+}}(%rsp), %rax
; AVX512BW-FCP-NEXT: movq {{[0-9]+}}(%rsp), %r10
; AVX512BW-FCP-NEXT: movq {{[0-9]+}}(%rsp), %r11
; AVX512BW-FCP-NEXT: vmovq {{.*#+}} xmm0 = mem[0],zero
; AVX512BW-FCP-NEXT: vmovq {{.*#+}} xmm1 = mem[0],zero
; AVX512BW-FCP-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm1[0],xmm0[0]
; AVX512BW-FCP-NEXT: vmovq {{.*#+}} xmm1 = mem[0],zero
; AVX512BW-FCP-NEXT: vmovq {{.*#+}} xmm2 = mem[0],zero
; AVX512BW-FCP-NEXT: vpunpcklqdq {{.*#+}} xmm1 = xmm2[0],xmm1[0]
; AVX512BW-FCP-NEXT: vmovq {{.*#+}} xmm2 = mem[0],zero
; AVX512BW-FCP-NEXT: vmovq {{.*#+}} xmm3 = mem[0],zero
; AVX512BW-FCP-NEXT: vpunpcklqdq {{.*#+}} xmm2 = xmm3[0],xmm2[0]
; AVX512BW-FCP-NEXT: vmovq {{.*#+}} xmm3 = mem[0],zero
; AVX512BW-FCP-NEXT: vmovq {{.*#+}} xmm4 = mem[0],zero
; AVX512BW-FCP-NEXT: vpunpcklqdq {{.*#+}} xmm3 = xmm4[0],xmm3[0]
; AVX512BW-FCP-NEXT: vinserti128 $1, %xmm3, %ymm2, %ymm2
; AVX512BW-FCP-NEXT: vinserti128 $1, %xmm1, %ymm0, %ymm0
; AVX512BW-FCP-NEXT: vpmovsxbw {{.*#+}} zmm1 = [0,4,8,12,32,36,40,44,1,5,9,13,33,37,41,45,2,6,10,14,34,38,42,46,3,7,11,15,35,39,43,47]
; AVX512BW-FCP-NEXT: vpermi2w %zmm2, %zmm0, %zmm1
; AVX512BW-FCP-NEXT: vmovdqa64 %zmm1, (%rax)
; AVX512BW-FCP-NEXT: vzeroupper
; AVX512BW-FCP-NEXT: retq
;
; AVX512DQ-BW-LABEL: store_i16_stride8_vf4:
; AVX512DQ-BW: # %bb.0:
; AVX512DQ-BW-NEXT: movq {{[0-9]+}}(%rsp), %rax
; AVX512DQ-BW-NEXT: movq {{[0-9]+}}(%rsp), %r10
; AVX512DQ-BW-NEXT: movq {{[0-9]+}}(%rsp), %r11
; AVX512DQ-BW-NEXT: vmovq {{.*#+}} xmm0 = mem[0],zero
; AVX512DQ-BW-NEXT: vmovq {{.*#+}} xmm1 = mem[0],zero
; AVX512DQ-BW-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm1[0],xmm0[0]
; AVX512DQ-BW-NEXT: vmovq {{.*#+}} xmm1 = mem[0],zero
; AVX512DQ-BW-NEXT: vmovq {{.*#+}} xmm2 = mem[0],zero
; AVX512DQ-BW-NEXT: vpunpcklqdq {{.*#+}} xmm1 = xmm2[0],xmm1[0]
; AVX512DQ-BW-NEXT: vmovq {{.*#+}} xmm2 = mem[0],zero
; AVX512DQ-BW-NEXT: vmovq {{.*#+}} xmm3 = mem[0],zero
; AVX512DQ-BW-NEXT: vpunpcklqdq {{.*#+}} xmm2 = xmm3[0],xmm2[0]
; AVX512DQ-BW-NEXT: vmovq {{.*#+}} xmm3 = mem[0],zero
; AVX512DQ-BW-NEXT: vmovq {{.*#+}} xmm4 = mem[0],zero
; AVX512DQ-BW-NEXT: vpunpcklqdq {{.*#+}} xmm3 = xmm4[0],xmm3[0]
; AVX512DQ-BW-NEXT: vinserti128 $1, %xmm3, %ymm2, %ymm2
; AVX512DQ-BW-NEXT: vinserti128 $1, %xmm1, %ymm0, %ymm0
; AVX512DQ-BW-NEXT: vpmovsxbw {{.*#+}} zmm1 = [0,4,8,12,32,36,40,44,1,5,9,13,33,37,41,45,2,6,10,14,34,38,42,46,3,7,11,15,35,39,43,47]
; AVX512DQ-BW-NEXT: vpermi2w %zmm2, %zmm0, %zmm1
; AVX512DQ-BW-NEXT: vmovdqa64 %zmm1, (%rax)
; AVX512DQ-BW-NEXT: vzeroupper
; AVX512DQ-BW-NEXT: retq
;
; AVX512DQ-BW-FCP-LABEL: store_i16_stride8_vf4:
; AVX512DQ-BW-FCP: # %bb.0:
; AVX512DQ-BW-FCP-NEXT: movq {{[0-9]+}}(%rsp), %rax
; AVX512DQ-BW-FCP-NEXT: movq {{[0-9]+}}(%rsp), %r10
; AVX512DQ-BW-FCP-NEXT: movq {{[0-9]+}}(%rsp), %r11
; AVX512DQ-BW-FCP-NEXT: vmovq {{.*#+}} xmm0 = mem[0],zero
; AVX512DQ-BW-FCP-NEXT: vmovq {{.*#+}} xmm1 = mem[0],zero
; AVX512DQ-BW-FCP-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm1[0],xmm0[0]
; AVX512DQ-BW-FCP-NEXT: vmovq {{.*#+}} xmm1 = mem[0],zero
; AVX512DQ-BW-FCP-NEXT: vmovq {{.*#+}} xmm2 = mem[0],zero
; AVX512DQ-BW-FCP-NEXT: vpunpcklqdq {{.*#+}} xmm1 = xmm2[0],xmm1[0]
; AVX512DQ-BW-FCP-NEXT: vmovq {{.*#+}} xmm2 = mem[0],zero
; AVX512DQ-BW-FCP-NEXT: vmovq {{.*#+}} xmm3 = mem[0],zero
; AVX512DQ-BW-FCP-NEXT: vpunpcklqdq {{.*#+}} xmm2 = xmm3[0],xmm2[0]
; AVX512DQ-BW-FCP-NEXT: vmovq {{.*#+}} xmm3 = mem[0],zero
; AVX512DQ-BW-FCP-NEXT: vmovq {{.*#+}} xmm4 = mem[0],zero
; AVX512DQ-BW-FCP-NEXT: vpunpcklqdq {{.*#+}} xmm3 = xmm4[0],xmm3[0]
; AVX512DQ-BW-FCP-NEXT: vinserti128 $1, %xmm3, %ymm2, %ymm2
; AVX512DQ-BW-FCP-NEXT: vinserti128 $1, %xmm1, %ymm0, %ymm0
; AVX512DQ-BW-FCP-NEXT: vpmovsxbw {{.*#+}} zmm1 = [0,4,8,12,32,36,40,44,1,5,9,13,33,37,41,45,2,6,10,14,34,38,42,46,3,7,11,15,35,39,43,47]
; AVX512DQ-BW-FCP-NEXT: vpermi2w %zmm2, %zmm0, %zmm1
; AVX512DQ-BW-FCP-NEXT: vmovdqa64 %zmm1, (%rax)
; AVX512DQ-BW-FCP-NEXT: vzeroupper
; AVX512DQ-BW-FCP-NEXT: retq
%in.vec0 = load <4 x i16>, ptr %in.vecptr0, align 64
%in.vec1 = load <4 x i16>, ptr %in.vecptr1, align 64
%in.vec2 = load <4 x i16>, ptr %in.vecptr2, align 64
%in.vec3 = load <4 x i16>, ptr %in.vecptr3, align 64
%in.vec4 = load <4 x i16>, ptr %in.vecptr4, align 64
%in.vec5 = load <4 x i16>, ptr %in.vecptr5, align 64
%in.vec6 = load <4 x i16>, ptr %in.vecptr6, align 64
%in.vec7 = load <4 x i16>, ptr %in.vecptr7, align 64
%1 = shufflevector <4 x i16> %in.vec0, <4 x i16> %in.vec1, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>
%2 = shufflevector <4 x i16> %in.vec2, <4 x i16> %in.vec3, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>
%3 = shufflevector <4 x i16> %in.vec4, <4 x i16> %in.vec5, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>
%4 = shufflevector <4 x i16> %in.vec6, <4 x i16> %in.vec7, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>
%5 = shufflevector <8 x i16> %1, <8 x i16> %2, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>
%6 = shufflevector <8 x i16> %3, <8 x i16> %4, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>
%7 = shufflevector <16 x i16> %5, <16 x i16> %6, <32 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27, i32 28, i32 29, i32 30, i32 31>
%interleaved.vec = shufflevector <32 x i16> %7, <32 x i16> poison, <32 x i32> <i32 0, i32 4, i32 8, i32 12, i32 16, i32 20, i32 24, i32 28, i32 1, i32 5, i32 9, i32 13, i32 17, i32 21, i32 25, i32 29, i32 2, i32 6, i32 10, i32 14, i32 18, i32 22, i32 26, i32 30, i32 3, i32 7, i32 11, i32 15, i32 19, i32 23, i32 27, i32 31>
store <32 x i16> %interleaved.vec, ptr %out.vec, align 64
ret void
}
define void @store_i16_stride8_vf8(ptr %in.vecptr0, ptr %in.vecptr1, ptr %in.vecptr2, ptr %in.vecptr3, ptr %in.vecptr4, ptr %in.vecptr5, ptr %in.vecptr6, ptr %in.vecptr7, ptr %out.vec) nounwind {
; SSE-LABEL: store_i16_stride8_vf8:
; SSE: # %bb.0:
; SSE-NEXT: movq {{[0-9]+}}(%rsp), %rax
; SSE-NEXT: movq {{[0-9]+}}(%rsp), %r10
; SSE-NEXT: movdqa (%rdi), %xmm0
; SSE-NEXT: movdqa (%rsi), %xmm9
; SSE-NEXT: movdqa (%rdx), %xmm1
; SSE-NEXT: movdqa (%rcx), %xmm11
; SSE-NEXT: movdqa (%r8), %xmm4
; SSE-NEXT: movdqa (%r9), %xmm8
; SSE-NEXT: movdqa (%r10), %xmm3
; SSE-NEXT: movdqa (%rax), %xmm10
; SSE-NEXT: movdqa %xmm1, %xmm13
; SSE-NEXT: punpcklwd {{.*#+}} xmm13 = xmm13[0],xmm11[0],xmm13[1],xmm11[1],xmm13[2],xmm11[2],xmm13[3],xmm11[3]
; SSE-NEXT: movdqa %xmm0, %xmm12
; SSE-NEXT: punpcklwd {{.*#+}} xmm12 = xmm12[0],xmm9[0],xmm12[1],xmm9[1],xmm12[2],xmm9[2],xmm12[3],xmm9[3]
; SSE-NEXT: movdqa %xmm12, %xmm5
; SSE-NEXT: punpckldq {{.*#+}} xmm5 = xmm5[0],xmm13[0],xmm5[1],xmm13[1]
; SSE-NEXT: movdqa %xmm3, %xmm14
; SSE-NEXT: punpcklwd {{.*#+}} xmm14 = xmm14[0],xmm10[0],xmm14[1],xmm10[1],xmm14[2],xmm10[2],xmm14[3],xmm10[3]
; SSE-NEXT: pshufd {{.*#+}} xmm6 = xmm14[0,0,0,0]
; SSE-NEXT: movdqa %xmm4, %xmm15
; SSE-NEXT: punpcklwd {{.*#+}} xmm15 = xmm15[0],xmm8[0],xmm15[1],xmm8[1],xmm15[2],xmm8[2],xmm15[3],xmm8[3]
; SSE-NEXT: pshufd {{.*#+}} xmm2 = xmm15[0,0,0,0]
; SSE-NEXT: punpckhdq {{.*#+}} xmm2 = xmm2[2],xmm6[2],xmm2[3],xmm6[3]
; SSE-NEXT: movsd {{.*#+}} xmm2 = xmm5[0],xmm2[1]
; SSE-NEXT: movdqa %xmm15, %xmm6
; SSE-NEXT: punpckldq {{.*#+}} xmm6 = xmm6[0],xmm14[0],xmm6[1],xmm14[1]
; SSE-NEXT: pshufd {{.*#+}} xmm7 = xmm13[1,1,1,1]
; SSE-NEXT: pshufd {{.*#+}} xmm5 = xmm12[1,1,1,1]
; SSE-NEXT: punpckldq {{.*#+}} xmm5 = xmm5[0],xmm7[0],xmm5[1],xmm7[1]
; SSE-NEXT: shufps {{.*#+}} xmm5 = xmm5[0,1],xmm6[2,3]
; SSE-NEXT: pshufd {{.*#+}} xmm7 = xmm13[3,3,3,3]
; SSE-NEXT: pshufd {{.*#+}} xmm6 = xmm12[3,3,3,3]
; SSE-NEXT: punpckldq {{.*#+}} xmm6 = xmm6[0],xmm7[0],xmm6[1],xmm7[1]
; SSE-NEXT: pshufd {{.*#+}} xmm7 = xmm15[2,2,2,2]
; SSE-NEXT: punpckhdq {{.*#+}} xmm15 = xmm15[2],xmm14[2],xmm15[3],xmm14[3]
; SSE-NEXT: shufps {{.*#+}} xmm6 = xmm6[0,1],xmm15[2,3]
; SSE-NEXT: punpckhdq {{.*#+}} xmm12 = xmm12[2],xmm13[2],xmm12[3],xmm13[3]
; SSE-NEXT: pshufd {{.*#+}} xmm13 = xmm14[2,2,2,2]
; SSE-NEXT: punpckhdq {{.*#+}} xmm7 = xmm7[2],xmm13[2],xmm7[3],xmm13[3]
; SSE-NEXT: movsd {{.*#+}} xmm7 = xmm12[0],xmm7[1]
; SSE-NEXT: punpckhwd {{.*#+}} xmm1 = xmm1[4],xmm11[4],xmm1[5],xmm11[5],xmm1[6],xmm11[6],xmm1[7],xmm11[7]
; SSE-NEXT: punpckhwd {{.*#+}} xmm0 = xmm0[4],xmm9[4],xmm0[5],xmm9[5],xmm0[6],xmm9[6],xmm0[7],xmm9[7]
; SSE-NEXT: movdqa %xmm0, %xmm9
; SSE-NEXT: punpckldq {{.*#+}} xmm9 = xmm9[0],xmm1[0],xmm9[1],xmm1[1]
; SSE-NEXT: punpckhwd {{.*#+}} xmm3 = xmm3[4],xmm10[4],xmm3[5],xmm10[5],xmm3[6],xmm10[6],xmm3[7],xmm10[7]
; SSE-NEXT: pshufd {{.*#+}} xmm10 = xmm3[0,0,0,0]
; SSE-NEXT: punpckhwd {{.*#+}} xmm4 = xmm4[4],xmm8[4],xmm4[5],xmm8[5],xmm4[6],xmm8[6],xmm4[7],xmm8[7]
; SSE-NEXT: pshufd {{.*#+}} xmm8 = xmm4[0,0,0,0]
; SSE-NEXT: punpckhdq {{.*#+}} xmm8 = xmm8[2],xmm10[2],xmm8[3],xmm10[3]
; SSE-NEXT: movsd {{.*#+}} xmm8 = xmm9[0],xmm8[1]
; SSE-NEXT: movdqa %xmm4, %xmm9
; SSE-NEXT: punpckldq {{.*#+}} xmm9 = xmm9[0],xmm3[0],xmm9[1],xmm3[1]
; SSE-NEXT: pshufd {{.*#+}} xmm10 = xmm1[1,1,1,1]
; SSE-NEXT: pshufd {{.*#+}} xmm11 = xmm0[1,1,1,1]
; SSE-NEXT: punpckldq {{.*#+}} xmm11 = xmm11[0],xmm10[0],xmm11[1],xmm10[1]
; SSE-NEXT: shufps {{.*#+}} xmm11 = xmm11[0,1],xmm9[2,3]
; SSE-NEXT: pshufd {{.*#+}} xmm9 = xmm1[3,3,3,3]
; SSE-NEXT: pshufd {{.*#+}} xmm10 = xmm0[3,3,3,3]
; SSE-NEXT: punpckldq {{.*#+}} xmm10 = xmm10[0],xmm9[0],xmm10[1],xmm9[1]
; SSE-NEXT: pshufd {{.*#+}} xmm9 = xmm4[2,2,2,2]
; SSE-NEXT: punpckhdq {{.*#+}} xmm4 = xmm4[2],xmm3[2],xmm4[3],xmm3[3]
; SSE-NEXT: shufps {{.*#+}} xmm10 = xmm10[0,1],xmm4[2,3]
; SSE-NEXT: punpckhdq {{.*#+}} xmm0 = xmm0[2],xmm1[2],xmm0[3],xmm1[3]
; SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm3[2,2,2,2]
; SSE-NEXT: punpckhdq {{.*#+}} xmm9 = xmm9[2],xmm1[2],xmm9[3],xmm1[3]
; SSE-NEXT: movsd {{.*#+}} xmm9 = xmm0[0],xmm9[1]
; SSE-NEXT: movq {{[0-9]+}}(%rsp), %rax
; SSE-NEXT: movapd %xmm9, 96(%rax)
; SSE-NEXT: movaps %xmm10, 112(%rax)
; SSE-NEXT: movaps %xmm11, 80(%rax)
; SSE-NEXT: movapd %xmm8, 64(%rax)
; SSE-NEXT: movapd %xmm7, 32(%rax)
; SSE-NEXT: movaps %xmm6, 48(%rax)
; SSE-NEXT: movaps %xmm5, 16(%rax)
; SSE-NEXT: movapd %xmm2, (%rax)
; SSE-NEXT: retq
;
; AVX-LABEL: store_i16_stride8_vf8:
; AVX: # %bb.0:
; AVX-NEXT: movq {{[0-9]+}}(%rsp), %rax
; AVX-NEXT: movq {{[0-9]+}}(%rsp), %r10
; AVX-NEXT: movq {{[0-9]+}}(%rsp), %r11
; AVX-NEXT: vmovdqa (%rdi), %xmm3
; AVX-NEXT: vmovdqa (%rsi), %xmm5
; AVX-NEXT: vmovdqa (%rdx), %xmm7
; AVX-NEXT: vmovdqa (%rcx), %xmm8
; AVX-NEXT: vmovdqa (%r8), %xmm1
; AVX-NEXT: vmovdqa (%r9), %xmm2
; AVX-NEXT: vmovdqa (%r11), %xmm4
; AVX-NEXT: vmovdqa (%r10), %xmm6
; AVX-NEXT: vpunpcklwd {{.*#+}} xmm9 = xmm7[0],xmm8[0],xmm7[1],xmm8[1],xmm7[2],xmm8[2],xmm7[3],xmm8[3]
; AVX-NEXT: vpunpcklwd {{.*#+}} xmm10 = xmm3[0],xmm5[0],xmm3[1],xmm5[1],xmm3[2],xmm5[2],xmm3[3],xmm5[3]
; AVX-NEXT: vpshufd {{.*#+}} xmm0 = xmm10[1,1,1,1]
; AVX-NEXT: vpblendw {{.*#+}} xmm0 = xmm0[0,1],xmm9[2,3],xmm0[4,5,6,7]
; AVX-NEXT: vpunpckldq {{.*#+}} xmm11 = xmm10[0],xmm9[0],xmm10[1],xmm9[1]
; AVX-NEXT: vinsertf128 $1, %xmm0, %ymm11, %ymm0
; AVX-NEXT: vpunpcklwd {{.*#+}} xmm11 = xmm4[0],xmm6[0],xmm4[1],xmm6[1],xmm4[2],xmm6[2],xmm4[3],xmm6[3]
; AVX-NEXT: vpunpcklwd {{.*#+}} xmm12 = xmm1[0],xmm2[0],xmm1[1],xmm2[1],xmm1[2],xmm2[2],xmm1[3],xmm2[3]
; AVX-NEXT: vpunpckldq {{.*#+}} xmm13 = xmm12[0],xmm11[0],xmm12[1],xmm11[1]
; AVX-NEXT: vpshufd {{.*#+}} xmm14 = xmm11[0,0,0,0]
; AVX-NEXT: vpshufd {{.*#+}} xmm15 = xmm12[0,1,0,1]
; AVX-NEXT: vpblendw {{.*#+}} xmm14 = xmm15[0,1,2,3,4,5],xmm14[6,7]
; AVX-NEXT: vinsertf128 $1, %xmm13, %ymm14, %ymm13
; AVX-NEXT: vblendps {{.*#+}} ymm0 = ymm0[0,1],ymm13[2,3],ymm0[4,5],ymm13[6,7]
; AVX-NEXT: vpshufd {{.*#+}} xmm13 = xmm9[2,3,2,3]
; AVX-NEXT: vpshufd {{.*#+}} xmm14 = xmm10[3,3,3,3]
; AVX-NEXT: vpblendw {{.*#+}} xmm13 = xmm14[0,1],xmm13[2,3],xmm14[4,5,6,7]
; AVX-NEXT: vpunpckhdq {{.*#+}} xmm9 = xmm10[2],xmm9[2],xmm10[3],xmm9[3]
; AVX-NEXT: vinsertf128 $1, %xmm13, %ymm9, %ymm9
; AVX-NEXT: vpunpckhdq {{.*#+}} xmm10 = xmm12[2],xmm11[2],xmm12[3],xmm11[3]
; AVX-NEXT: vpshufd {{.*#+}} xmm11 = xmm11[2,2,2,2]
; AVX-NEXT: vpblendw {{.*#+}} xmm11 = xmm12[0,1,2,3,4,5],xmm11[6,7]
; AVX-NEXT: vinsertf128 $1, %xmm10, %ymm11, %ymm10
; AVX-NEXT: vblendps {{.*#+}} ymm9 = ymm9[0,1],ymm10[2,3],ymm9[4,5],ymm10[6,7]
; AVX-NEXT: vpunpckhwd {{.*#+}} xmm7 = xmm7[4],xmm8[4],xmm7[5],xmm8[5],xmm7[6],xmm8[6],xmm7[7],xmm8[7]
; AVX-NEXT: vpunpckhwd {{.*#+}} xmm3 = xmm3[4],xmm5[4],xmm3[5],xmm5[5],xmm3[6],xmm5[6],xmm3[7],xmm5[7]
; AVX-NEXT: vpshufd {{.*#+}} xmm5 = xmm3[1,1,1,1]
; AVX-NEXT: vpblendw {{.*#+}} xmm5 = xmm5[0,1],xmm7[2,3],xmm5[4,5,6,7]
; AVX-NEXT: vpunpckldq {{.*#+}} xmm8 = xmm3[0],xmm7[0],xmm3[1],xmm7[1]
; AVX-NEXT: vinsertf128 $1, %xmm5, %ymm8, %ymm5
; AVX-NEXT: vpunpckhwd {{.*#+}} xmm4 = xmm4[4],xmm6[4],xmm4[5],xmm6[5],xmm4[6],xmm6[6],xmm4[7],xmm6[7]
; AVX-NEXT: vpunpckhwd {{.*#+}} xmm1 = xmm1[4],xmm2[4],xmm1[5],xmm2[5],xmm1[6],xmm2[6],xmm1[7],xmm2[7]
; AVX-NEXT: vpunpckldq {{.*#+}} xmm2 = xmm1[0],xmm4[0],xmm1[1],xmm4[1]
; AVX-NEXT: vpshufd {{.*#+}} xmm6 = xmm4[0,0,0,0]
; AVX-NEXT: vpshufd {{.*#+}} xmm8 = xmm1[0,1,0,1]
; AVX-NEXT: vpblendw {{.*#+}} xmm6 = xmm8[0,1,2,3,4,5],xmm6[6,7]
; AVX-NEXT: vinsertf128 $1, %xmm2, %ymm6, %ymm2
; AVX-NEXT: vblendps {{.*#+}} ymm2 = ymm5[0,1],ymm2[2,3],ymm5[4,5],ymm2[6,7]
; AVX-NEXT: vpshufd {{.*#+}} xmm5 = xmm7[2,3,2,3]
; AVX-NEXT: vpshufd {{.*#+}} xmm6 = xmm3[3,3,3,3]
; AVX-NEXT: vpblendw {{.*#+}} xmm5 = xmm6[0,1],xmm5[2,3],xmm6[4,5,6,7]
; AVX-NEXT: vpunpckhdq {{.*#+}} xmm3 = xmm3[2],xmm7[2],xmm3[3],xmm7[3]
; AVX-NEXT: vinsertf128 $1, %xmm5, %ymm3, %ymm3
; AVX-NEXT: vpunpckhdq {{.*#+}} xmm5 = xmm1[2],xmm4[2],xmm1[3],xmm4[3]
; AVX-NEXT: vpshufd {{.*#+}} xmm4 = xmm4[2,2,2,2]
; AVX-NEXT: vpblendw {{.*#+}} xmm1 = xmm1[0,1,2,3,4,5],xmm4[6,7]
; AVX-NEXT: vinsertf128 $1, %xmm5, %ymm1, %ymm1
; AVX-NEXT: vblendps {{.*#+}} ymm1 = ymm3[0,1],ymm1[2,3],ymm3[4,5],ymm1[6,7]
; AVX-NEXT: vmovaps %ymm1, 96(%rax)
; AVX-NEXT: vmovaps %ymm2, 64(%rax)
; AVX-NEXT: vmovaps %ymm9, 32(%rax)
; AVX-NEXT: vmovaps %ymm0, (%rax)
; AVX-NEXT: vzeroupper
; AVX-NEXT: retq
;
; AVX2-LABEL: store_i16_stride8_vf8:
; AVX2: # %bb.0:
; AVX2-NEXT: movq {{[0-9]+}}(%rsp), %rax
; AVX2-NEXT: movq {{[0-9]+}}(%rsp), %r10
; AVX2-NEXT: movq {{[0-9]+}}(%rsp), %r11
; AVX2-NEXT: vmovdqa (%rdi), %xmm0
; AVX2-NEXT: vmovdqa (%rdx), %xmm1
; AVX2-NEXT: vmovdqa (%r8), %xmm2
; AVX2-NEXT: vmovdqa (%r11), %xmm3
; AVX2-NEXT: vinserti128 $1, (%rsi), %ymm0, %ymm0
; AVX2-NEXT: vinserti128 $1, (%rcx), %ymm1, %ymm1
; AVX2-NEXT: vinserti128 $1, (%r9), %ymm2, %ymm4
; AVX2-NEXT: vinserti128 $1, (%r10), %ymm3, %ymm3
; AVX2-NEXT: vpermq {{.*#+}} ymm5 = ymm3[0,2,0,2]
; AVX2-NEXT: vmovdqa {{.*#+}} ymm6 = [u,u,u,u,u,u,u,u,u,u,u,u,0,1,8,9,u,u,u,u,u,u,u,u,u,u,u,u,2,3,10,11]
; AVX2-NEXT: vpshufb %ymm6, %ymm5, %ymm2
; AVX2-NEXT: vpermq {{.*#+}} ymm7 = ymm4[0,2,0,2]
; AVX2-NEXT: vpmovsxdq {{.*#+}} ymm8 = [0,151519488,0,185205506]
; AVX2-NEXT: vpshufb %ymm8, %ymm7, %ymm9
; AVX2-NEXT: vpblendd {{.*#+}} ymm2 = ymm9[0,1,2],ymm2[3],ymm9[4,5,6],ymm2[7]
; AVX2-NEXT: vpermq {{.*#+}} ymm9 = ymm1[0,2,0,2]
; AVX2-NEXT: vmovdqa {{.*#+}} ymm10 = [u,u,u,u,0,1,8,9,u,u,u,u,u,u,u,u,u,u,u,u,2,3,10,11,u,u,u,u,u,u,u,u]
; AVX2-NEXT: vpshufb %ymm10, %ymm9, %ymm11
; AVX2-NEXT: vpermq {{.*#+}} ymm12 = ymm0[0,2,0,2]
; AVX2-NEXT: vpmovsxdq {{.*#+}} ymm13 = [151519488,0,185205506,0]
; AVX2-NEXT: vpshufb %ymm13, %ymm12, %ymm14
; AVX2-NEXT: vpblendd {{.*#+}} ymm11 = ymm14[0],ymm11[1],ymm14[2,3,4],ymm11[5],ymm14[6,7]
; AVX2-NEXT: vpblendd {{.*#+}} ymm2 = ymm11[0,1],ymm2[2,3],ymm11[4,5],ymm2[6,7]
; AVX2-NEXT: vmovdqa {{.*#+}} ymm11 = [u,u,u,u,u,u,u,u,u,u,u,u,4,5,12,13,u,u,u,u,u,u,u,u,u,u,u,u,6,7,14,15]
; AVX2-NEXT: vpshufb %ymm11, %ymm5, %ymm5
; AVX2-NEXT: vpmovsxdq {{.*#+}} ymm14 = [0,218891524,0,252577542]
; AVX2-NEXT: vpshufb %ymm14, %ymm7, %ymm7
; AVX2-NEXT: vpblendd {{.*#+}} ymm5 = ymm7[0,1,2],ymm5[3],ymm7[4,5,6],ymm5[7]
; AVX2-NEXT: vmovdqa {{.*#+}} ymm7 = [u,u,u,u,4,5,12,13,u,u,u,u,u,u,u,u,u,u,u,u,6,7,14,15,u,u,u,u,u,u,u,u]
; AVX2-NEXT: vpshufb %ymm7, %ymm9, %ymm9
; AVX2-NEXT: vpmovsxdq {{.*#+}} ymm15 = [218891524,0,252577542,0]
; AVX2-NEXT: vpshufb %ymm15, %ymm12, %ymm12
; AVX2-NEXT: vpblendd {{.*#+}} ymm9 = ymm12[0],ymm9[1],ymm12[2,3,4],ymm9[5],ymm12[6,7]
; AVX2-NEXT: vpblendd {{.*#+}} ymm5 = ymm9[0,1],ymm5[2,3],ymm9[4,5],ymm5[6,7]
; AVX2-NEXT: vpermq {{.*#+}} ymm3 = ymm3[1,3,1,3]
; AVX2-NEXT: vpshufb %ymm6, %ymm3, %ymm6
; AVX2-NEXT: vpermq {{.*#+}} ymm4 = ymm4[1,3,1,3]
; AVX2-NEXT: vpshufb %ymm8, %ymm4, %ymm8
; AVX2-NEXT: vpblendd {{.*#+}} ymm6 = ymm8[0,1,2],ymm6[3],ymm8[4,5,6],ymm6[7]
; AVX2-NEXT: vpermq {{.*#+}} ymm1 = ymm1[1,3,1,3]
; AVX2-NEXT: vpshufb %ymm10, %ymm1, %ymm8
; AVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm0[1,3,1,3]
; AVX2-NEXT: vpshufb %ymm13, %ymm0, %ymm9
; AVX2-NEXT: vpblendd {{.*#+}} ymm8 = ymm9[0],ymm8[1],ymm9[2,3,4],ymm8[5],ymm9[6,7]
; AVX2-NEXT: vpblendd {{.*#+}} ymm6 = ymm8[0,1],ymm6[2,3],ymm8[4,5],ymm6[6,7]
; AVX2-NEXT: vpshufb %ymm11, %ymm3, %ymm3
; AVX2-NEXT: vpshufb %ymm14, %ymm4, %ymm4
; AVX2-NEXT: vpblendd {{.*#+}} ymm3 = ymm4[0,1,2],ymm3[3],ymm4[4,5,6],ymm3[7]
; AVX2-NEXT: vpshufb %ymm7, %ymm1, %ymm1
; AVX2-NEXT: vpshufb %ymm15, %ymm0, %ymm0
; AVX2-NEXT: vpblendd {{.*#+}} ymm0 = ymm0[0],ymm1[1],ymm0[2,3,4],ymm1[5],ymm0[6,7]
; AVX2-NEXT: vpblendd {{.*#+}} ymm0 = ymm0[0,1],ymm3[2,3],ymm0[4,5],ymm3[6,7]
; AVX2-NEXT: vmovdqa %ymm0, 96(%rax)
; AVX2-NEXT: vmovdqa %ymm6, 64(%rax)
; AVX2-NEXT: vmovdqa %ymm5, 32(%rax)
; AVX2-NEXT: vmovdqa %ymm2, (%rax)
; AVX2-NEXT: vzeroupper
; AVX2-NEXT: retq
;
; AVX2-FP-LABEL: store_i16_stride8_vf8:
; AVX2-FP: # %bb.0:
; AVX2-FP-NEXT: movq {{[0-9]+}}(%rsp), %rax
; AVX2-FP-NEXT: movq {{[0-9]+}}(%rsp), %r10
; AVX2-FP-NEXT: movq {{[0-9]+}}(%rsp), %r11
; AVX2-FP-NEXT: vmovdqa (%rdi), %xmm0
; AVX2-FP-NEXT: vmovdqa (%rdx), %xmm1
; AVX2-FP-NEXT: vmovdqa (%r8), %xmm2
; AVX2-FP-NEXT: vmovdqa (%r11), %xmm3
; AVX2-FP-NEXT: vinserti128 $1, (%rsi), %ymm0, %ymm0
; AVX2-FP-NEXT: vinserti128 $1, (%rcx), %ymm1, %ymm1
; AVX2-FP-NEXT: vinserti128 $1, (%r9), %ymm2, %ymm4
; AVX2-FP-NEXT: vinserti128 $1, (%r10), %ymm3, %ymm3
; AVX2-FP-NEXT: vpermq {{.*#+}} ymm5 = ymm3[0,2,0,2]
; AVX2-FP-NEXT: vmovdqa {{.*#+}} ymm6 = [u,u,u,u,u,u,u,u,u,u,u,u,0,1,8,9,u,u,u,u,u,u,u,u,u,u,u,u,2,3,10,11]
; AVX2-FP-NEXT: vpshufb %ymm6, %ymm5, %ymm2
; AVX2-FP-NEXT: vpermq {{.*#+}} ymm7 = ymm4[0,2,0,2]
; AVX2-FP-NEXT: vpmovsxdq {{.*#+}} ymm8 = [0,151519488,0,185205506]
; AVX2-FP-NEXT: vpshufb %ymm8, %ymm7, %ymm9
; AVX2-FP-NEXT: vpblendd {{.*#+}} ymm2 = ymm9[0,1,2],ymm2[3],ymm9[4,5,6],ymm2[7]
; AVX2-FP-NEXT: vpermq {{.*#+}} ymm9 = ymm1[0,2,0,2]
; AVX2-FP-NEXT: vmovdqa {{.*#+}} ymm10 = [u,u,u,u,0,1,8,9,u,u,u,u,u,u,u,u,u,u,u,u,2,3,10,11,u,u,u,u,u,u,u,u]
; AVX2-FP-NEXT: vpshufb %ymm10, %ymm9, %ymm11
; AVX2-FP-NEXT: vpermq {{.*#+}} ymm12 = ymm0[0,2,0,2]
; AVX2-FP-NEXT: vpmovsxdq {{.*#+}} ymm13 = [151519488,0,185205506,0]
; AVX2-FP-NEXT: vpshufb %ymm13, %ymm12, %ymm14
; AVX2-FP-NEXT: vpblendd {{.*#+}} ymm11 = ymm14[0],ymm11[1],ymm14[2,3,4],ymm11[5],ymm14[6,7]
; AVX2-FP-NEXT: vpblendd {{.*#+}} ymm2 = ymm11[0,1],ymm2[2,3],ymm11[4,5],ymm2[6,7]
; AVX2-FP-NEXT: vmovdqa {{.*#+}} ymm11 = [u,u,u,u,u,u,u,u,u,u,u,u,4,5,12,13,u,u,u,u,u,u,u,u,u,u,u,u,6,7,14,15]
; AVX2-FP-NEXT: vpshufb %ymm11, %ymm5, %ymm5
; AVX2-FP-NEXT: vpmovsxdq {{.*#+}} ymm14 = [0,218891524,0,252577542]
; AVX2-FP-NEXT: vpshufb %ymm14, %ymm7, %ymm7
; AVX2-FP-NEXT: vpblendd {{.*#+}} ymm5 = ymm7[0,1,2],ymm5[3],ymm7[4,5,6],ymm5[7]
; AVX2-FP-NEXT: vmovdqa {{.*#+}} ymm7 = [u,u,u,u,4,5,12,13,u,u,u,u,u,u,u,u,u,u,u,u,6,7,14,15,u,u,u,u,u,u,u,u]
; AVX2-FP-NEXT: vpshufb %ymm7, %ymm9, %ymm9
; AVX2-FP-NEXT: vpmovsxdq {{.*#+}} ymm15 = [218891524,0,252577542,0]
; AVX2-FP-NEXT: vpshufb %ymm15, %ymm12, %ymm12
; AVX2-FP-NEXT: vpblendd {{.*#+}} ymm9 = ymm12[0],ymm9[1],ymm12[2,3,4],ymm9[5],ymm12[6,7]
; AVX2-FP-NEXT: vpblendd {{.*#+}} ymm5 = ymm9[0,1],ymm5[2,3],ymm9[4,5],ymm5[6,7]
; AVX2-FP-NEXT: vpermq {{.*#+}} ymm3 = ymm3[1,3,1,3]
; AVX2-FP-NEXT: vpshufb %ymm6, %ymm3, %ymm6
; AVX2-FP-NEXT: vpermq {{.*#+}} ymm4 = ymm4[1,3,1,3]
; AVX2-FP-NEXT: vpshufb %ymm8, %ymm4, %ymm8
; AVX2-FP-NEXT: vpblendd {{.*#+}} ymm6 = ymm8[0,1,2],ymm6[3],ymm8[4,5,6],ymm6[7]
; AVX2-FP-NEXT: vpermq {{.*#+}} ymm1 = ymm1[1,3,1,3]
; AVX2-FP-NEXT: vpshufb %ymm10, %ymm1, %ymm8
; AVX2-FP-NEXT: vpermq {{.*#+}} ymm0 = ymm0[1,3,1,3]
; AVX2-FP-NEXT: vpshufb %ymm13, %ymm0, %ymm9
; AVX2-FP-NEXT: vpblendd {{.*#+}} ymm8 = ymm9[0],ymm8[1],ymm9[2,3,4],ymm8[5],ymm9[6,7]
; AVX2-FP-NEXT: vpblendd {{.*#+}} ymm6 = ymm8[0,1],ymm6[2,3],ymm8[4,5],ymm6[6,7]
; AVX2-FP-NEXT: vpshufb %ymm11, %ymm3, %ymm3
; AVX2-FP-NEXT: vpshufb %ymm14, %ymm4, %ymm4
; AVX2-FP-NEXT: vpblendd {{.*#+}} ymm3 = ymm4[0,1,2],ymm3[3],ymm4[4,5,6],ymm3[7]
; AVX2-FP-NEXT: vpshufb %ymm7, %ymm1, %ymm1
; AVX2-FP-NEXT: vpshufb %ymm15, %ymm0, %ymm0
; AVX2-FP-NEXT: vpblendd {{.*#+}} ymm0 = ymm0[0],ymm1[1],ymm0[2,3,4],ymm1[5],ymm0[6,7]
; AVX2-FP-NEXT: vpblendd {{.*#+}} ymm0 = ymm0[0,1],ymm3[2,3],ymm0[4,5],ymm3[6,7]
; AVX2-FP-NEXT: vmovdqa %ymm0, 96(%rax)
; AVX2-FP-NEXT: vmovdqa %ymm6, 64(%rax)
; AVX2-FP-NEXT: vmovdqa %ymm5, 32(%rax)
; AVX2-FP-NEXT: vmovdqa %ymm2, (%rax)
; AVX2-FP-NEXT: vzeroupper
; AVX2-FP-NEXT: retq
;
; AVX2-FCP-LABEL: store_i16_stride8_vf8:
; AVX2-FCP: # %bb.0:
; AVX2-FCP-NEXT: movq {{[0-9]+}}(%rsp), %rax
; AVX2-FCP-NEXT: movq {{[0-9]+}}(%rsp), %r10
; AVX2-FCP-NEXT: movq {{[0-9]+}}(%rsp), %r11
; AVX2-FCP-NEXT: vmovdqa (%rdi), %xmm0
; AVX2-FCP-NEXT: vmovdqa (%rdx), %xmm1
; AVX2-FCP-NEXT: vmovdqa (%r8), %xmm2
; AVX2-FCP-NEXT: vmovdqa (%r11), %xmm3
; AVX2-FCP-NEXT: vinserti128 $1, (%rsi), %ymm0, %ymm0
; AVX2-FCP-NEXT: vinserti128 $1, (%rcx), %ymm1, %ymm1
; AVX2-FCP-NEXT: vinserti128 $1, (%r9), %ymm2, %ymm4
; AVX2-FCP-NEXT: vinserti128 $1, (%r10), %ymm3, %ymm3
; AVX2-FCP-NEXT: vpermq {{.*#+}} ymm5 = ymm3[0,2,0,2]
; AVX2-FCP-NEXT: vmovdqa {{.*#+}} ymm6 = [u,u,u,u,u,u,u,u,u,u,u,u,0,1,8,9,u,u,u,u,u,u,u,u,u,u,u,u,2,3,10,11]
; AVX2-FCP-NEXT: vpshufb %ymm6, %ymm5, %ymm2
; AVX2-FCP-NEXT: vpermq {{.*#+}} ymm7 = ymm4[0,2,0,2]
; AVX2-FCP-NEXT: vpmovsxdq {{.*#+}} ymm8 = [0,151519488,0,185205506]
; AVX2-FCP-NEXT: vpshufb %ymm8, %ymm7, %ymm9
; AVX2-FCP-NEXT: vpblendd {{.*#+}} ymm2 = ymm9[0,1,2],ymm2[3],ymm9[4,5,6],ymm2[7]
; AVX2-FCP-NEXT: vpermq {{.*#+}} ymm9 = ymm1[0,2,0,2]
; AVX2-FCP-NEXT: vmovdqa {{.*#+}} ymm10 = [u,u,u,u,0,1,8,9,u,u,u,u,u,u,u,u,u,u,u,u,2,3,10,11,u,u,u,u,u,u,u,u]
; AVX2-FCP-NEXT: vpshufb %ymm10, %ymm9, %ymm11
; AVX2-FCP-NEXT: vpermq {{.*#+}} ymm12 = ymm0[0,2,0,2]
; AVX2-FCP-NEXT: vpmovsxdq {{.*#+}} ymm13 = [151519488,0,185205506,0]
; AVX2-FCP-NEXT: vpshufb %ymm13, %ymm12, %ymm14
; AVX2-FCP-NEXT: vpblendd {{.*#+}} ymm11 = ymm14[0],ymm11[1],ymm14[2,3,4],ymm11[5],ymm14[6,7]
; AVX2-FCP-NEXT: vpblendd {{.*#+}} ymm2 = ymm11[0,1],ymm2[2,3],ymm11[4,5],ymm2[6,7]
; AVX2-FCP-NEXT: vmovdqa {{.*#+}} ymm11 = [u,u,u,u,u,u,u,u,u,u,u,u,4,5,12,13,u,u,u,u,u,u,u,u,u,u,u,u,6,7,14,15]
; AVX2-FCP-NEXT: vpshufb %ymm11, %ymm5, %ymm5
; AVX2-FCP-NEXT: vpmovsxdq {{.*#+}} ymm14 = [0,218891524,0,252577542]
; AVX2-FCP-NEXT: vpshufb %ymm14, %ymm7, %ymm7
; AVX2-FCP-NEXT: vpblendd {{.*#+}} ymm5 = ymm7[0,1,2],ymm5[3],ymm7[4,5,6],ymm5[7]
; AVX2-FCP-NEXT: vmovdqa {{.*#+}} ymm7 = [u,u,u,u,4,5,12,13,u,u,u,u,u,u,u,u,u,u,u,u,6,7,14,15,u,u,u,u,u,u,u,u]
; AVX2-FCP-NEXT: vpshufb %ymm7, %ymm9, %ymm9
; AVX2-FCP-NEXT: vpmovsxdq {{.*#+}} ymm15 = [218891524,0,252577542,0]
; AVX2-FCP-NEXT: vpshufb %ymm15, %ymm12, %ymm12
; AVX2-FCP-NEXT: vpblendd {{.*#+}} ymm9 = ymm12[0],ymm9[1],ymm12[2,3,4],ymm9[5],ymm12[6,7]
; AVX2-FCP-NEXT: vpblendd {{.*#+}} ymm5 = ymm9[0,1],ymm5[2,3],ymm9[4,5],ymm5[6,7]
; AVX2-FCP-NEXT: vpermq {{.*#+}} ymm3 = ymm3[1,3,1,3]
; AVX2-FCP-NEXT: vpshufb %ymm6, %ymm3, %ymm6
; AVX2-FCP-NEXT: vpermq {{.*#+}} ymm4 = ymm4[1,3,1,3]
; AVX2-FCP-NEXT: vpshufb %ymm8, %ymm4, %ymm8
; AVX2-FCP-NEXT: vpblendd {{.*#+}} ymm6 = ymm8[0,1,2],ymm6[3],ymm8[4,5,6],ymm6[7]
; AVX2-FCP-NEXT: vpermq {{.*#+}} ymm1 = ymm1[1,3,1,3]
; AVX2-FCP-NEXT: vpshufb %ymm10, %ymm1, %ymm8
; AVX2-FCP-NEXT: vpermq {{.*#+}} ymm0 = ymm0[1,3,1,3]
; AVX2-FCP-NEXT: vpshufb %ymm13, %ymm0, %ymm9
; AVX2-FCP-NEXT: vpblendd {{.*#+}} ymm8 = ymm9[0],ymm8[1],ymm9[2,3,4],ymm8[5],ymm9[6,7]
; AVX2-FCP-NEXT: vpblendd {{.*#+}} ymm6 = ymm8[0,1],ymm6[2,3],ymm8[4,5],ymm6[6,7]
; AVX2-FCP-NEXT: vpshufb %ymm11, %ymm3, %ymm3
; AVX2-FCP-NEXT: vpshufb %ymm14, %ymm4, %ymm4
; AVX2-FCP-NEXT: vpblendd {{.*#+}} ymm3 = ymm4[0,1,2],ymm3[3],ymm4[4,5,6],ymm3[7]
; AVX2-FCP-NEXT: vpshufb %ymm7, %ymm1, %ymm1
; AVX2-FCP-NEXT: vpshufb %ymm15, %ymm0, %ymm0
; AVX2-FCP-NEXT: vpblendd {{.*#+}} ymm0 = ymm0[0],ymm1[1],ymm0[2,3,4],ymm1[5],ymm0[6,7]
; AVX2-FCP-NEXT: vpblendd {{.*#+}} ymm0 = ymm0[0,1],ymm3[2,3],ymm0[4,5],ymm3[6,7]
; AVX2-FCP-NEXT: vmovdqa %ymm0, 96(%rax)
; AVX2-FCP-NEXT: vmovdqa %ymm6, 64(%rax)
; AVX2-FCP-NEXT: vmovdqa %ymm5, 32(%rax)
; AVX2-FCP-NEXT: vmovdqa %ymm2, (%rax)
; AVX2-FCP-NEXT: vzeroupper
; AVX2-FCP-NEXT: retq
;
; AVX512-LABEL: store_i16_stride8_vf8:
; AVX512: # %bb.0:
; AVX512-NEXT: movq {{[0-9]+}}(%rsp), %rax
; AVX512-NEXT: movq {{[0-9]+}}(%rsp), %r10
; AVX512-NEXT: movq {{[0-9]+}}(%rsp), %r11
; AVX512-NEXT: vmovdqa (%rdi), %xmm0
; AVX512-NEXT: vmovdqa (%rdx), %xmm1
; AVX512-NEXT: vmovdqa (%r8), %xmm2
; AVX512-NEXT: vmovdqa (%r11), %xmm3
; AVX512-NEXT: vinserti128 $1, (%rsi), %ymm0, %ymm0
; AVX512-NEXT: vinserti128 $1, (%rcx), %ymm1, %ymm1
; AVX512-NEXT: vinserti128 $1, (%r9), %ymm2, %ymm2
; AVX512-NEXT: vinserti128 $1, (%r10), %ymm3, %ymm3
; AVX512-NEXT: vpermq {{.*#+}} ymm4 = ymm3[0,2,0,2]
; AVX512-NEXT: vmovdqa {{.*#+}} ymm5 = [u,u,u,u,u,u,u,u,u,u,u,u,4,5,12,13,u,u,u,u,u,u,u,u,u,u,u,u,6,7,14,15]
; AVX512-NEXT: vpshufb %ymm5, %ymm4, %ymm6
; AVX512-NEXT: vpermq {{.*#+}} ymm7 = ymm2[0,2,0,2]
; AVX512-NEXT: vpmovsxdq {{.*#+}} ymm8 = [0,218891524,0,252577542]
; AVX512-NEXT: vpshufb %ymm8, %ymm7, %ymm9
; AVX512-NEXT: vpblendd {{.*#+}} ymm6 = ymm9[0,1,2],ymm6[3],ymm9[4,5,6],ymm6[7]
; AVX512-NEXT: vpermq {{.*#+}} ymm9 = ymm1[0,2,0,2]
; AVX512-NEXT: vmovdqa {{.*#+}} ymm10 = [u,u,u,u,4,5,12,13,u,u,u,u,u,u,u,u,u,u,u,u,6,7,14,15,u,u,u,u,u,u,u,u]
; AVX512-NEXT: vpshufb %ymm10, %ymm9, %ymm11
; AVX512-NEXT: vpermq {{.*#+}} ymm12 = ymm0[0,2,0,2]
; AVX512-NEXT: vpmovsxdq {{.*#+}} ymm13 = [218891524,0,252577542,0]
; AVX512-NEXT: vpshufb %ymm13, %ymm12, %ymm14
; AVX512-NEXT: vpblendd {{.*#+}} ymm11 = ymm14[0],ymm11[1],ymm14[2,3,4],ymm11[5],ymm14[6,7]
; AVX512-NEXT: vpblendd {{.*#+}} ymm6 = ymm11[0,1],ymm6[2,3],ymm11[4,5],ymm6[6,7]
; AVX512-NEXT: vmovdqa {{.*#+}} ymm11 = [u,u,u,u,u,u,u,u,u,u,u,u,0,1,8,9,u,u,u,u,u,u,u,u,u,u,u,u,2,3,10,11]
; AVX512-NEXT: vpshufb %ymm11, %ymm4, %ymm4
; AVX512-NEXT: vpmovsxdq {{.*#+}} ymm14 = [0,151519488,0,185205506]
; AVX512-NEXT: vpshufb %ymm14, %ymm7, %ymm7
; AVX512-NEXT: vpblendd {{.*#+}} ymm4 = ymm7[0,1,2],ymm4[3],ymm7[4,5,6],ymm4[7]
; AVX512-NEXT: vmovdqa {{.*#+}} ymm7 = [u,u,u,u,0,1,8,9,u,u,u,u,u,u,u,u,u,u,u,u,2,3,10,11,u,u,u,u,u,u,u,u]
; AVX512-NEXT: vpshufb %ymm7, %ymm9, %ymm9
; AVX512-NEXT: vpmovsxdq {{.*#+}} ymm15 = [151519488,0,185205506,0]
; AVX512-NEXT: vpshufb %ymm15, %ymm12, %ymm12
; AVX512-NEXT: vpblendd {{.*#+}} ymm9 = ymm12[0],ymm9[1],ymm12[2,3,4],ymm9[5],ymm12[6,7]
; AVX512-NEXT: vpblendd {{.*#+}} ymm4 = ymm9[0,1],ymm4[2,3],ymm9[4,5],ymm4[6,7]
; AVX512-NEXT: vinserti64x4 $1, %ymm6, %zmm4, %zmm4
; AVX512-NEXT: vpermq {{.*#+}} ymm3 = ymm3[1,3,1,3]
; AVX512-NEXT: vpshufb %ymm5, %ymm3, %ymm5
; AVX512-NEXT: vpermq {{.*#+}} ymm2 = ymm2[1,3,1,3]
; AVX512-NEXT: vpshufb %ymm8, %ymm2, %ymm6
; AVX512-NEXT: vpblendd {{.*#+}} ymm5 = ymm6[0,1,2],ymm5[3],ymm6[4,5,6],ymm5[7]
; AVX512-NEXT: vpermq {{.*#+}} ymm1 = ymm1[1,3,1,3]
; AVX512-NEXT: vpshufb %ymm10, %ymm1, %ymm6
; AVX512-NEXT: vpermq {{.*#+}} ymm0 = ymm0[1,3,1,3]
; AVX512-NEXT: vpshufb %ymm13, %ymm0, %ymm8
; AVX512-NEXT: vpblendd {{.*#+}} ymm6 = ymm8[0],ymm6[1],ymm8[2,3,4],ymm6[5],ymm8[6,7]
; AVX512-NEXT: vpblendd {{.*#+}} ymm5 = ymm6[0,1],ymm5[2,3],ymm6[4,5],ymm5[6,7]
; AVX512-NEXT: vpshufb %ymm11, %ymm3, %ymm3
; AVX512-NEXT: vpshufb %ymm14, %ymm2, %ymm2
; AVX512-NEXT: vpblendd {{.*#+}} ymm2 = ymm2[0,1,2],ymm3[3],ymm2[4,5,6],ymm3[7]
; AVX512-NEXT: vpshufb %ymm7, %ymm1, %ymm1
; AVX512-NEXT: vpshufb %ymm15, %ymm0, %ymm0
; AVX512-NEXT: vpblendd {{.*#+}} ymm0 = ymm0[0],ymm1[1],ymm0[2,3,4],ymm1[5],ymm0[6,7]
; AVX512-NEXT: vpblendd {{.*#+}} ymm0 = ymm0[0,1],ymm2[2,3],ymm0[4,5],ymm2[6,7]
; AVX512-NEXT: vinserti64x4 $1, %ymm5, %zmm0, %zmm0
; AVX512-NEXT: vmovdqa64 %zmm0, 64(%rax)
; AVX512-NEXT: vmovdqa64 %zmm4, (%rax)
; AVX512-NEXT: vzeroupper
; AVX512-NEXT: retq
;
; AVX512-FCP-LABEL: store_i16_stride8_vf8:
; AVX512-FCP: # %bb.0:
; AVX512-FCP-NEXT: movq {{[0-9]+}}(%rsp), %rax
; AVX512-FCP-NEXT: movq {{[0-9]+}}(%rsp), %r10
; AVX512-FCP-NEXT: movq {{[0-9]+}}(%rsp), %r11
; AVX512-FCP-NEXT: vmovdqa (%rdi), %xmm0
; AVX512-FCP-NEXT: vmovdqa (%rdx), %xmm1
; AVX512-FCP-NEXT: vmovdqa (%r8), %xmm2
; AVX512-FCP-NEXT: vmovdqa (%r11), %xmm3
; AVX512-FCP-NEXT: vinserti128 $1, (%rsi), %ymm0, %ymm0
; AVX512-FCP-NEXT: vinserti128 $1, (%rcx), %ymm1, %ymm1
; AVX512-FCP-NEXT: vinserti128 $1, (%r9), %ymm2, %ymm2
; AVX512-FCP-NEXT: vinserti128 $1, (%r10), %ymm3, %ymm3
; AVX512-FCP-NEXT: vpermq {{.*#+}} ymm4 = ymm3[0,2,0,2]
; AVX512-FCP-NEXT: vmovdqa {{.*#+}} ymm5 = [u,u,u,u,u,u,u,u,u,u,u,u,4,5,12,13,u,u,u,u,u,u,u,u,u,u,u,u,6,7,14,15]
; AVX512-FCP-NEXT: vpshufb %ymm5, %ymm4, %ymm6
; AVX512-FCP-NEXT: vpermq {{.*#+}} ymm7 = ymm2[0,2,0,2]
; AVX512-FCP-NEXT: vpmovsxdq {{.*#+}} ymm8 = [0,218891524,0,252577542]
; AVX512-FCP-NEXT: vpshufb %ymm8, %ymm7, %ymm9
; AVX512-FCP-NEXT: vpblendd {{.*#+}} ymm6 = ymm9[0,1,2],ymm6[3],ymm9[4,5,6],ymm6[7]
; AVX512-FCP-NEXT: vpermq {{.*#+}} ymm9 = ymm1[0,2,0,2]
; AVX512-FCP-NEXT: vmovdqa {{.*#+}} ymm10 = [u,u,u,u,4,5,12,13,u,u,u,u,u,u,u,u,u,u,u,u,6,7,14,15,u,u,u,u,u,u,u,u]
; AVX512-FCP-NEXT: vpshufb %ymm10, %ymm9, %ymm11
; AVX512-FCP-NEXT: vpermq {{.*#+}} ymm12 = ymm0[0,2,0,2]
; AVX512-FCP-NEXT: vpmovsxdq {{.*#+}} ymm13 = [218891524,0,252577542,0]
; AVX512-FCP-NEXT: vpshufb %ymm13, %ymm12, %ymm14
; AVX512-FCP-NEXT: vpblendd {{.*#+}} ymm11 = ymm14[0],ymm11[1],ymm14[2,3,4],ymm11[5],ymm14[6,7]
; AVX512-FCP-NEXT: vpblendd {{.*#+}} ymm6 = ymm11[0,1],ymm6[2,3],ymm11[4,5],ymm6[6,7]
; AVX512-FCP-NEXT: vmovdqa {{.*#+}} ymm11 = [u,u,u,u,u,u,u,u,u,u,u,u,0,1,8,9,u,u,u,u,u,u,u,u,u,u,u,u,2,3,10,11]
; AVX512-FCP-NEXT: vpshufb %ymm11, %ymm4, %ymm4
; AVX512-FCP-NEXT: vpmovsxdq {{.*#+}} ymm14 = [0,151519488,0,185205506]
; AVX512-FCP-NEXT: vpshufb %ymm14, %ymm7, %ymm7
; AVX512-FCP-NEXT: vpblendd {{.*#+}} ymm4 = ymm7[0,1,2],ymm4[3],ymm7[4,5,6],ymm4[7]
; AVX512-FCP-NEXT: vmovdqa {{.*#+}} ymm7 = [u,u,u,u,0,1,8,9,u,u,u,u,u,u,u,u,u,u,u,u,2,3,10,11,u,u,u,u,u,u,u,u]
; AVX512-FCP-NEXT: vpshufb %ymm7, %ymm9, %ymm9
; AVX512-FCP-NEXT: vpmovsxdq {{.*#+}} ymm15 = [151519488,0,185205506,0]
; AVX512-FCP-NEXT: vpshufb %ymm15, %ymm12, %ymm12
; AVX512-FCP-NEXT: vpblendd {{.*#+}} ymm9 = ymm12[0],ymm9[1],ymm12[2,3,4],ymm9[5],ymm12[6,7]
; AVX512-FCP-NEXT: vpblendd {{.*#+}} ymm4 = ymm9[0,1],ymm4[2,3],ymm9[4,5],ymm4[6,7]
; AVX512-FCP-NEXT: vinserti64x4 $1, %ymm6, %zmm4, %zmm4
; AVX512-FCP-NEXT: vpermq {{.*#+}} ymm3 = ymm3[1,3,1,3]
; AVX512-FCP-NEXT: vpshufb %ymm5, %ymm3, %ymm5
; AVX512-FCP-NEXT: vpermq {{.*#+}} ymm2 = ymm2[1,3,1,3]
; AVX512-FCP-NEXT: vpshufb %ymm8, %ymm2, %ymm6
; AVX512-FCP-NEXT: vpblendd {{.*#+}} ymm5 = ymm6[0,1,2],ymm5[3],ymm6[4,5,6],ymm5[7]
; AVX512-FCP-NEXT: vpermq {{.*#+}} ymm1 = ymm1[1,3,1,3]
; AVX512-FCP-NEXT: vpshufb %ymm10, %ymm1, %ymm6
; AVX512-FCP-NEXT: vpermq {{.*#+}} ymm0 = ymm0[1,3,1,3]
; AVX512-FCP-NEXT: vpshufb %ymm13, %ymm0, %ymm8
; AVX512-FCP-NEXT: vpblendd {{.*#+}} ymm6 = ymm8[0],ymm6[1],ymm8[2,3,4],ymm6[5],ymm8[6,7]
; AVX512-FCP-NEXT: vpblendd {{.*#+}} ymm5 = ymm6[0,1],ymm5[2,3],ymm6[4,5],ymm5[6,7]
; AVX512-FCP-NEXT: vpshufb %ymm11, %ymm3, %ymm3
; AVX512-FCP-NEXT: vpshufb %ymm14, %ymm2, %ymm2
; AVX512-FCP-NEXT: vpblendd {{.*#+}} ymm2 = ymm2[0,1,2],ymm3[3],ymm2[4,5,6],ymm3[7]
; AVX512-FCP-NEXT: vpshufb %ymm7, %ymm1, %ymm1
; AVX512-FCP-NEXT: vpshufb %ymm15, %ymm0, %ymm0
; AVX512-FCP-NEXT: vpblendd {{.*#+}} ymm0 = ymm0[0],ymm1[1],ymm0[2,3,4],ymm1[5],ymm0[6,7]
; AVX512-FCP-NEXT: vpblendd {{.*#+}} ymm0 = ymm0[0,1],ymm2[2,3],ymm0[4,5],ymm2[6,7]
; AVX512-FCP-NEXT: vinserti64x4 $1, %ymm5, %zmm0, %zmm0
; AVX512-FCP-NEXT: vmovdqa64 %zmm0, 64(%rax)
; AVX512-FCP-NEXT: vmovdqa64 %zmm4, (%rax)
; AVX512-FCP-NEXT: vzeroupper
; AVX512-FCP-NEXT: retq
;
; AVX512DQ-LABEL: store_i16_stride8_vf8:
; AVX512DQ: # %bb.0:
; AVX512DQ-NEXT: movq {{[0-9]+}}(%rsp), %rax
; AVX512DQ-NEXT: movq {{[0-9]+}}(%rsp), %r10
; AVX512DQ-NEXT: movq {{[0-9]+}}(%rsp), %r11
; AVX512DQ-NEXT: vmovdqa (%rdi), %xmm0
; AVX512DQ-NEXT: vmovdqa (%rdx), %xmm1
; AVX512DQ-NEXT: vmovdqa (%r8), %xmm2
; AVX512DQ-NEXT: vmovdqa (%r11), %xmm3
; AVX512DQ-NEXT: vinserti128 $1, (%rsi), %ymm0, %ymm0
; AVX512DQ-NEXT: vinserti128 $1, (%rcx), %ymm1, %ymm1
; AVX512DQ-NEXT: vinserti128 $1, (%r9), %ymm2, %ymm2
; AVX512DQ-NEXT: vinserti128 $1, (%r10), %ymm3, %ymm3
; AVX512DQ-NEXT: vpermq {{.*#+}} ymm4 = ymm3[0,2,0,2]
; AVX512DQ-NEXT: vmovdqa {{.*#+}} ymm5 = [u,u,u,u,u,u,u,u,u,u,u,u,4,5,12,13,u,u,u,u,u,u,u,u,u,u,u,u,6,7,14,15]
; AVX512DQ-NEXT: vpshufb %ymm5, %ymm4, %ymm6
; AVX512DQ-NEXT: vpermq {{.*#+}} ymm7 = ymm2[0,2,0,2]
; AVX512DQ-NEXT: vpmovsxdq {{.*#+}} ymm8 = [0,218891524,0,252577542]
; AVX512DQ-NEXT: vpshufb %ymm8, %ymm7, %ymm9
; AVX512DQ-NEXT: vpblendd {{.*#+}} ymm6 = ymm9[0,1,2],ymm6[3],ymm9[4,5,6],ymm6[7]
; AVX512DQ-NEXT: vpermq {{.*#+}} ymm9 = ymm1[0,2,0,2]
; AVX512DQ-NEXT: vmovdqa {{.*#+}} ymm10 = [u,u,u,u,4,5,12,13,u,u,u,u,u,u,u,u,u,u,u,u,6,7,14,15,u,u,u,u,u,u,u,u]
; AVX512DQ-NEXT: vpshufb %ymm10, %ymm9, %ymm11
; AVX512DQ-NEXT: vpermq {{.*#+}} ymm12 = ymm0[0,2,0,2]
; AVX512DQ-NEXT: vpmovsxdq {{.*#+}} ymm13 = [218891524,0,252577542,0]
; AVX512DQ-NEXT: vpshufb %ymm13, %ymm12, %ymm14
; AVX512DQ-NEXT: vpblendd {{.*#+}} ymm11 = ymm14[0],ymm11[1],ymm14[2,3,4],ymm11[5],ymm14[6,7]
; AVX512DQ-NEXT: vpblendd {{.*#+}} ymm6 = ymm11[0,1],ymm6[2,3],ymm11[4,5],ymm6[6,7]
; AVX512DQ-NEXT: vmovdqa {{.*#+}} ymm11 = [u,u,u,u,u,u,u,u,u,u,u,u,0,1,8,9,u,u,u,u,u,u,u,u,u,u,u,u,2,3,10,11]
; AVX512DQ-NEXT: vpshufb %ymm11, %ymm4, %ymm4
; AVX512DQ-NEXT: vpmovsxdq {{.*#+}} ymm14 = [0,151519488,0,185205506]
; AVX512DQ-NEXT: vpshufb %ymm14, %ymm7, %ymm7
; AVX512DQ-NEXT: vpblendd {{.*#+}} ymm4 = ymm7[0,1,2],ymm4[3],ymm7[4,5,6],ymm4[7]
; AVX512DQ-NEXT: vmovdqa {{.*#+}} ymm7 = [u,u,u,u,0,1,8,9,u,u,u,u,u,u,u,u,u,u,u,u,2,3,10,11,u,u,u,u,u,u,u,u]
; AVX512DQ-NEXT: vpshufb %ymm7, %ymm9, %ymm9
; AVX512DQ-NEXT: vpmovsxdq {{.*#+}} ymm15 = [151519488,0,185205506,0]
; AVX512DQ-NEXT: vpshufb %ymm15, %ymm12, %ymm12
; AVX512DQ-NEXT: vpblendd {{.*#+}} ymm9 = ymm12[0],ymm9[1],ymm12[2,3,4],ymm9[5],ymm12[6,7]
; AVX512DQ-NEXT: vpblendd {{.*#+}} ymm4 = ymm9[0,1],ymm4[2,3],ymm9[4,5],ymm4[6,7]
; AVX512DQ-NEXT: vinserti64x4 $1, %ymm6, %zmm4, %zmm4
; AVX512DQ-NEXT: vpermq {{.*#+}} ymm3 = ymm3[1,3,1,3]
; AVX512DQ-NEXT: vpshufb %ymm5, %ymm3, %ymm5
; AVX512DQ-NEXT: vpermq {{.*#+}} ymm2 = ymm2[1,3,1,3]
; AVX512DQ-NEXT: vpshufb %ymm8, %ymm2, %ymm6
; AVX512DQ-NEXT: vpblendd {{.*#+}} ymm5 = ymm6[0,1,2],ymm5[3],ymm6[4,5,6],ymm5[7]
; AVX512DQ-NEXT: vpermq {{.*#+}} ymm1 = ymm1[1,3,1,3]
; AVX512DQ-NEXT: vpshufb %ymm10, %ymm1, %ymm6
; AVX512DQ-NEXT: vpermq {{.*#+}} ymm0 = ymm0[1,3,1,3]
; AVX512DQ-NEXT: vpshufb %ymm13, %ymm0, %ymm8
; AVX512DQ-NEXT: vpblendd {{.*#+}} ymm6 = ymm8[0],ymm6[1],ymm8[2,3,4],ymm6[5],ymm8[6,7]
; AVX512DQ-NEXT: vpblendd {{.*#+}} ymm5 = ymm6[0,1],ymm5[2,3],ymm6[4,5],ymm5[6,7]
; AVX512DQ-NEXT: vpshufb %ymm11, %ymm3, %ymm3
; AVX512DQ-NEXT: vpshufb %ymm14, %ymm2, %ymm2
; AVX512DQ-NEXT: vpblendd {{.*#+}} ymm2 = ymm2[0,1,2],ymm3[3],ymm2[4,5,6],ymm3[7]
; AVX512DQ-NEXT: vpshufb %ymm7, %ymm1, %ymm1
; AVX512DQ-NEXT: vpshufb %ymm15, %ymm0, %ymm0
; AVX512DQ-NEXT: vpblendd {{.*#+}} ymm0 = ymm0[0],ymm1[1],ymm0[2,3,4],ymm1[5],ymm0[6,7]
; AVX512DQ-NEXT: vpblendd {{.*#+}} ymm0 = ymm0[0,1],ymm2[2,3],ymm0[4,5],ymm2[6,7]
; AVX512DQ-NEXT: vinserti64x4 $1, %ymm5, %zmm0, %zmm0
; AVX512DQ-NEXT: vmovdqa64 %zmm0, 64(%rax)
; AVX512DQ-NEXT: vmovdqa64 %zmm4, (%rax)
; AVX512DQ-NEXT: vzeroupper
; AVX512DQ-NEXT: retq
;
; AVX512DQ-FCP-LABEL: store_i16_stride8_vf8:
; AVX512DQ-FCP: # %bb.0:
; AVX512DQ-FCP-NEXT: movq {{[0-9]+}}(%rsp), %rax
; AVX512DQ-FCP-NEXT: movq {{[0-9]+}}(%rsp), %r10
; AVX512DQ-FCP-NEXT: movq {{[0-9]+}}(%rsp), %r11
; AVX512DQ-FCP-NEXT: vmovdqa (%rdi), %xmm0
; AVX512DQ-FCP-NEXT: vmovdqa (%rdx), %xmm1
; AVX512DQ-FCP-NEXT: vmovdqa (%r8), %xmm2
; AVX512DQ-FCP-NEXT: vmovdqa (%r11), %xmm3
; AVX512DQ-FCP-NEXT: vinserti128 $1, (%rsi), %ymm0, %ymm0
; AVX512DQ-FCP-NEXT: vinserti128 $1, (%rcx), %ymm1, %ymm1
; AVX512DQ-FCP-NEXT: vinserti128 $1, (%r9), %ymm2, %ymm2
; AVX512DQ-FCP-NEXT: vinserti128 $1, (%r10), %ymm3, %ymm3
; AVX512DQ-FCP-NEXT: vpermq {{.*#+}} ymm4 = ymm3[0,2,0,2]
; AVX512DQ-FCP-NEXT: vmovdqa {{.*#+}} ymm5 = [u,u,u,u,u,u,u,u,u,u,u,u,4,5,12,13,u,u,u,u,u,u,u,u,u,u,u,u,6,7,14,15]
; AVX512DQ-FCP-NEXT: vpshufb %ymm5, %ymm4, %ymm6
; AVX512DQ-FCP-NEXT: vpermq {{.*#+}} ymm7 = ymm2[0,2,0,2]
; AVX512DQ-FCP-NEXT: vpmovsxdq {{.*#+}} ymm8 = [0,218891524,0,252577542]
; AVX512DQ-FCP-NEXT: vpshufb %ymm8, %ymm7, %ymm9
; AVX512DQ-FCP-NEXT: vpblendd {{.*#+}} ymm6 = ymm9[0,1,2],ymm6[3],ymm9[4,5,6],ymm6[7]
; AVX512DQ-FCP-NEXT: vpermq {{.*#+}} ymm9 = ymm1[0,2,0,2]
; AVX512DQ-FCP-NEXT: vmovdqa {{.*#+}} ymm10 = [u,u,u,u,4,5,12,13,u,u,u,u,u,u,u,u,u,u,u,u,6,7,14,15,u,u,u,u,u,u,u,u]
; AVX512DQ-FCP-NEXT: vpshufb %ymm10, %ymm9, %ymm11
; AVX512DQ-FCP-NEXT: vpermq {{.*#+}} ymm12 = ymm0[0,2,0,2]
; AVX512DQ-FCP-NEXT: vpmovsxdq {{.*#+}} ymm13 = [218891524,0,252577542,0]
; AVX512DQ-FCP-NEXT: vpshufb %ymm13, %ymm12, %ymm14
; AVX512DQ-FCP-NEXT: vpblendd {{.*#+}} ymm11 = ymm14[0],ymm11[1],ymm14[2,3,4],ymm11[5],ymm14[6,7]
; AVX512DQ-FCP-NEXT: vpblendd {{.*#+}} ymm6 = ymm11[0,1],ymm6[2,3],ymm11[4,5],ymm6[6,7]
; AVX512DQ-FCP-NEXT: vmovdqa {{.*#+}} ymm11 = [u,u,u,u,u,u,u,u,u,u,u,u,0,1,8,9,u,u,u,u,u,u,u,u,u,u,u,u,2,3,10,11]
; AVX512DQ-FCP-NEXT: vpshufb %ymm11, %ymm4, %ymm4
; AVX512DQ-FCP-NEXT: vpmovsxdq {{.*#+}} ymm14 = [0,151519488,0,185205506]
; AVX512DQ-FCP-NEXT: vpshufb %ymm14, %ymm7, %ymm7
; AVX512DQ-FCP-NEXT: vpblendd {{.*#+}} ymm4 = ymm7[0,1,2],ymm4[3],ymm7[4,5,6],ymm4[7]
; AVX512DQ-FCP-NEXT: vmovdqa {{.*#+}} ymm7 = [u,u,u,u,0,1,8,9,u,u,u,u,u,u,u,u,u,u,u,u,2,3,10,11,u,u,u,u,u,u,u,u]
; AVX512DQ-FCP-NEXT: vpshufb %ymm7, %ymm9, %ymm9
; AVX512DQ-FCP-NEXT: vpmovsxdq {{.*#+}} ymm15 = [151519488,0,185205506,0]
; AVX512DQ-FCP-NEXT: vpshufb %ymm15, %ymm12, %ymm12
; AVX512DQ-FCP-NEXT: vpblendd {{.*#+}} ymm9 = ymm12[0],ymm9[1],ymm12[2,3,4],ymm9[5],ymm12[6,7]
; AVX512DQ-FCP-NEXT: vpblendd {{.*#+}} ymm4 = ymm9[0,1],ymm4[2,3],ymm9[4,5],ymm4[6,7]
; AVX512DQ-FCP-NEXT: vinserti64x4 $1, %ymm6, %zmm4, %zmm4
; AVX512DQ-FCP-NEXT: vpermq {{.*#+}} ymm3 = ymm3[1,3,1,3]
; AVX512DQ-FCP-NEXT: vpshufb %ymm5, %ymm3, %ymm5
; AVX512DQ-FCP-NEXT: vpermq {{.*#+}} ymm2 = ymm2[1,3,1,3]
; AVX512DQ-FCP-NEXT: vpshufb %ymm8, %ymm2, %ymm6
; AVX512DQ-FCP-NEXT: vpblendd {{.*#+}} ymm5 = ymm6[0,1,2],ymm5[3],ymm6[4,5,6],ymm5[7]
; AVX512DQ-FCP-NEXT: vpermq {{.*#+}} ymm1 = ymm1[1,3,1,3]
; AVX512DQ-FCP-NEXT: vpshufb %ymm10, %ymm1, %ymm6
; AVX512DQ-FCP-NEXT: vpermq {{.*#+}} ymm0 = ymm0[1,3,1,3]
; AVX512DQ-FCP-NEXT: vpshufb %ymm13, %ymm0, %ymm8
; AVX512DQ-FCP-NEXT: vpblendd {{.*#+}} ymm6 = ymm8[0],ymm6[1],ymm8[2,3,4],ymm6[5],ymm8[6,7]
; AVX512DQ-FCP-NEXT: vpblendd {{.*#+}} ymm5 = ymm6[0,1],ymm5[2,3],ymm6[4,5],ymm5[6,7]
; AVX512DQ-FCP-NEXT: vpshufb %ymm11, %ymm3, %ymm3
; AVX512DQ-FCP-NEXT: vpshufb %ymm14, %ymm2, %ymm2
; AVX512DQ-FCP-NEXT: vpblendd {{.*#+}} ymm2 = ymm2[0,1,2],ymm3[3],ymm2[4,5,6],ymm3[7]
; AVX512DQ-FCP-NEXT: vpshufb %ymm7, %ymm1, %ymm1
; AVX512DQ-FCP-NEXT: vpshufb %ymm15, %ymm0, %ymm0
; AVX512DQ-FCP-NEXT: vpblendd {{.*#+}} ymm0 = ymm0[0],ymm1[1],ymm0[2,3,4],ymm1[5],ymm0[6,7]
; AVX512DQ-FCP-NEXT: vpblendd {{.*#+}} ymm0 = ymm0[0,1],ymm2[2,3],ymm0[4,5],ymm2[6,7]
; AVX512DQ-FCP-NEXT: vinserti64x4 $1, %ymm5, %zmm0, %zmm0
; AVX512DQ-FCP-NEXT: vmovdqa64 %zmm0, 64(%rax)
; AVX512DQ-FCP-NEXT: vmovdqa64 %zmm4, (%rax)
; AVX512DQ-FCP-NEXT: vzeroupper
; AVX512DQ-FCP-NEXT: retq
;
; AVX512BW-LABEL: store_i16_stride8_vf8:
; AVX512BW: # %bb.0:
; AVX512BW-NEXT: movq {{[0-9]+}}(%rsp), %rax
; AVX512BW-NEXT: movq {{[0-9]+}}(%rsp), %r10
; AVX512BW-NEXT: movq {{[0-9]+}}(%rsp), %r11
; AVX512BW-NEXT: vmovdqa (%rdi), %xmm0
; AVX512BW-NEXT: vmovdqa (%rdx), %xmm1
; AVX512BW-NEXT: vmovdqa (%r8), %xmm2
; AVX512BW-NEXT: vmovdqa (%r11), %xmm3
; AVX512BW-NEXT: vinserti128 $1, (%rcx), %ymm1, %ymm1
; AVX512BW-NEXT: vinserti128 $1, (%rsi), %ymm0, %ymm0
; AVX512BW-NEXT: vinserti64x4 $1, %ymm1, %zmm0, %zmm0
; AVX512BW-NEXT: vinserti128 $1, (%r10), %ymm3, %ymm1
; AVX512BW-NEXT: vinserti128 $1, (%r9), %ymm2, %ymm2
; AVX512BW-NEXT: vinserti64x4 $1, %ymm1, %zmm2, %zmm1
; AVX512BW-NEXT: vpmovsxbw {{.*#+}} zmm2 = [0,8,16,24,32,40,48,56,1,9,17,25,33,41,49,57,2,10,18,26,34,42,50,58,3,11,19,27,35,43,51,59]
; AVX512BW-NEXT: vpermi2w %zmm1, %zmm0, %zmm2
; AVX512BW-NEXT: vpmovsxbw {{.*#+}} zmm3 = [4,12,20,28,36,44,52,60,5,13,21,29,37,45,53,61,6,14,22,30,38,46,54,62,7,15,23,31,39,47,55,63]
; AVX512BW-NEXT: vpermi2w %zmm1, %zmm0, %zmm3
; AVX512BW-NEXT: vmovdqa64 %zmm3, 64(%rax)
; AVX512BW-NEXT: vmovdqa64 %zmm2, (%rax)
; AVX512BW-NEXT: vzeroupper
; AVX512BW-NEXT: retq
;
; AVX512BW-FCP-LABEL: store_i16_stride8_vf8:
; AVX512BW-FCP: # %bb.0:
; AVX512BW-FCP-NEXT: movq {{[0-9]+}}(%rsp), %rax
; AVX512BW-FCP-NEXT: movq {{[0-9]+}}(%rsp), %r10
; AVX512BW-FCP-NEXT: movq {{[0-9]+}}(%rsp), %r11
; AVX512BW-FCP-NEXT: vmovdqa (%rdi), %xmm0
; AVX512BW-FCP-NEXT: vmovdqa (%rdx), %xmm1
; AVX512BW-FCP-NEXT: vmovdqa (%r8), %xmm2
; AVX512BW-FCP-NEXT: vmovdqa (%r11), %xmm3
; AVX512BW-FCP-NEXT: vinserti128 $1, (%rcx), %ymm1, %ymm1
; AVX512BW-FCP-NEXT: vinserti128 $1, (%rsi), %ymm0, %ymm0
; AVX512BW-FCP-NEXT: vinserti64x4 $1, %ymm1, %zmm0, %zmm0
; AVX512BW-FCP-NEXT: vinserti128 $1, (%r10), %ymm3, %ymm1
; AVX512BW-FCP-NEXT: vinserti128 $1, (%r9), %ymm2, %ymm2
; AVX512BW-FCP-NEXT: vinserti64x4 $1, %ymm1, %zmm2, %zmm1
; AVX512BW-FCP-NEXT: vpmovsxbw {{.*#+}} zmm2 = [0,8,16,24,32,40,48,56,1,9,17,25,33,41,49,57,2,10,18,26,34,42,50,58,3,11,19,27,35,43,51,59]
; AVX512BW-FCP-NEXT: vpermi2w %zmm1, %zmm0, %zmm2
; AVX512BW-FCP-NEXT: vpmovsxbw {{.*#+}} zmm3 = [4,12,20,28,36,44,52,60,5,13,21,29,37,45,53,61,6,14,22,30,38,46,54,62,7,15,23,31,39,47,55,63]
; AVX512BW-FCP-NEXT: vpermi2w %zmm1, %zmm0, %zmm3
; AVX512BW-FCP-NEXT: vmovdqa64 %zmm3, 64(%rax)
; AVX512BW-FCP-NEXT: vmovdqa64 %zmm2, (%rax)
; AVX512BW-FCP-NEXT: vzeroupper
; AVX512BW-FCP-NEXT: retq
;
; AVX512DQ-BW-LABEL: store_i16_stride8_vf8:
; AVX512DQ-BW: # %bb.0:
; AVX512DQ-BW-NEXT: movq {{[0-9]+}}(%rsp), %rax
; AVX512DQ-BW-NEXT: movq {{[0-9]+}}(%rsp), %r10
; AVX512DQ-BW-NEXT: movq {{[0-9]+}}(%rsp), %r11
; AVX512DQ-BW-NEXT: vmovdqa (%rdi), %xmm0
; AVX512DQ-BW-NEXT: vmovdqa (%rdx), %xmm1
; AVX512DQ-BW-NEXT: vmovdqa (%r8), %xmm2
; AVX512DQ-BW-NEXT: vmovdqa (%r11), %xmm3
; AVX512DQ-BW-NEXT: vinserti128 $1, (%rcx), %ymm1, %ymm1
; AVX512DQ-BW-NEXT: vinserti128 $1, (%rsi), %ymm0, %ymm0
; AVX512DQ-BW-NEXT: vinserti64x4 $1, %ymm1, %zmm0, %zmm0
; AVX512DQ-BW-NEXT: vinserti128 $1, (%r10), %ymm3, %ymm1
; AVX512DQ-BW-NEXT: vinserti128 $1, (%r9), %ymm2, %ymm2
; AVX512DQ-BW-NEXT: vinserti64x4 $1, %ymm1, %zmm2, %zmm1
; AVX512DQ-BW-NEXT: vpmovsxbw {{.*#+}} zmm2 = [0,8,16,24,32,40,48,56,1,9,17,25,33,41,49,57,2,10,18,26,34,42,50,58,3,11,19,27,35,43,51,59]
; AVX512DQ-BW-NEXT: vpermi2w %zmm1, %zmm0, %zmm2
; AVX512DQ-BW-NEXT: vpmovsxbw {{.*#+}} zmm3 = [4,12,20,28,36,44,52,60,5,13,21,29,37,45,53,61,6,14,22,30,38,46,54,62,7,15,23,31,39,47,55,63]
; AVX512DQ-BW-NEXT: vpermi2w %zmm1, %zmm0, %zmm3
; AVX512DQ-BW-NEXT: vmovdqa64 %zmm3, 64(%rax)
; AVX512DQ-BW-NEXT: vmovdqa64 %zmm2, (%rax)
; AVX512DQ-BW-NEXT: vzeroupper
; AVX512DQ-BW-NEXT: retq
;
; AVX512DQ-BW-FCP-LABEL: store_i16_stride8_vf8:
; AVX512DQ-BW-FCP: # %bb.0:
; AVX512DQ-BW-FCP-NEXT: movq {{[0-9]+}}(%rsp), %rax
; AVX512DQ-BW-FCP-NEXT: movq {{[0-9]+}}(%rsp), %r10
; AVX512DQ-BW-FCP-NEXT: movq {{[0-9]+}}(%rsp), %r11
; AVX512DQ-BW-FCP-NEXT: vmovdqa (%rdi), %xmm0
; AVX512DQ-BW-FCP-NEXT: vmovdqa (%rdx), %xmm1
; AVX512DQ-BW-FCP-NEXT: vmovdqa (%r8), %xmm2
; AVX512DQ-BW-FCP-NEXT: vmovdqa (%r11), %xmm3
; AVX512DQ-BW-FCP-NEXT: vinserti128 $1, (%rcx), %ymm1, %ymm1
; AVX512DQ-BW-FCP-NEXT: vinserti128 $1, (%rsi), %ymm0, %ymm0
; AVX512DQ-BW-FCP-NEXT: vinserti64x4 $1, %ymm1, %zmm0, %zmm0
; AVX512DQ-BW-FCP-NEXT: vinserti128 $1, (%r10), %ymm3, %ymm1
; AVX512DQ-BW-FCP-NEXT: vinserti128 $1, (%r9), %ymm2, %ymm2
; AVX512DQ-BW-FCP-NEXT: vinserti64x4 $1, %ymm1, %zmm2, %zmm1
; AVX512DQ-BW-FCP-NEXT: vpmovsxbw {{.*#+}} zmm2 = [0,8,16,24,32,40,48,56,1,9,17,25,33,41,49,57,2,10,18,26,34,42,50,58,3,11,19,27,35,43,51,59]
; AVX512DQ-BW-FCP-NEXT: vpermi2w %zmm1, %zmm0, %zmm2
; AVX512DQ-BW-FCP-NEXT: vpmovsxbw {{.*#+}} zmm3 = [4,12,20,28,36,44,52,60,5,13,21,29,37,45,53,61,6,14,22,30,38,46,54,62,7,15,23,31,39,47,55,63]
; AVX512DQ-BW-FCP-NEXT: vpermi2w %zmm1, %zmm0, %zmm3
; AVX512DQ-BW-FCP-NEXT: vmovdqa64 %zmm3, 64(%rax)
; AVX512DQ-BW-FCP-NEXT: vmovdqa64 %zmm2, (%rax)
; AVX512DQ-BW-FCP-NEXT: vzeroupper
; AVX512DQ-BW-FCP-NEXT: retq
%in.vec0 = load <8 x i16>, ptr %in.vecptr0, align 64
%in.vec1 = load <8 x i16>, ptr %in.vecptr1, align 64
%in.vec2 = load <8 x i16>, ptr %in.vecptr2, align 64
%in.vec3 = load <8 x i16>, ptr %in.vecptr3, align 64
%in.vec4 = load <8 x i16>, ptr %in.vecptr4, align 64
%in.vec5 = load <8 x i16>, ptr %in.vecptr5, align 64
%in.vec6 = load <8 x i16>, ptr %in.vecptr6, align 64
%in.vec7 = load <8 x i16>, ptr %in.vecptr7, align 64
%1 = shufflevector <8 x i16> %in.vec0, <8 x i16> %in.vec1, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>
%2 = shufflevector <8 x i16> %in.vec2, <8 x i16> %in.vec3, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>
%3 = shufflevector <8 x i16> %in.vec4, <8 x i16> %in.vec5, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>
%4 = shufflevector <8 x i16> %in.vec6, <8 x i16> %in.vec7, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>
%5 = shufflevector <16 x i16> %1, <16 x i16> %2, <32 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27, i32 28, i32 29, i32 30, i32 31>
%6 = shufflevector <16 x i16> %3, <16 x i16> %4, <32 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27, i32 28, i32 29, i32 30, i32 31>
%7 = shufflevector <32 x i16> %5, <32 x i16> %6, <64 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27, i32 28, i32 29, i32 30, i32 31, i32 32, i32 33, i32 34, i32 35, i32 36, i32 37, i32 38, i32 39, i32 40, i32 41, i32 42, i32 43, i32 44, i32 45, i32 46, i32 47, i32 48, i32 49, i32 50, i32 51, i32 52, i32 53, i32 54, i32 55, i32 56, i32 57, i32 58, i32 59, i32 60, i32 61, i32 62, i32 63>
%interleaved.vec = shufflevector <64 x i16> %7, <64 x i16> poison, <64 x i32> <i32 0, i32 8, i32 16, i32 24, i32 32, i32 40, i32 48, i32 56, i32 1, i32 9, i32 17, i32 25, i32 33, i32 41, i32 49, i32 57, i32 2, i32 10, i32 18, i32 26, i32 34, i32 42, i32 50, i32 58, i32 3, i32 11, i32 19, i32 27, i32 35, i32 43, i32 51, i32 59, i32 4, i32 12, i32 20, i32 28, i32 36, i32 44, i32 52, i32 60, i32 5, i32 13, i32 21, i32 29, i32 37, i32 45, i32 53, i32 61, i32 6, i32 14, i32 22, i32 30, i32 38, i32 46, i32 54, i32 62, i32 7, i32 15, i32 23, i32 31, i32 39, i32 47, i32 55, i32 63>
store <64 x i16> %interleaved.vec, ptr %out.vec, align 64
ret void
}
define void @store_i16_stride8_vf16(ptr %in.vecptr0, ptr %in.vecptr1, ptr %in.vecptr2, ptr %in.vecptr3, ptr %in.vecptr4, ptr %in.vecptr5, ptr %in.vecptr6, ptr %in.vecptr7, ptr %out.vec) nounwind {
; SSE-LABEL: store_i16_stride8_vf16:
; SSE: # %bb.0:
; SSE-NEXT: subq $88, %rsp
; SSE-NEXT: movq {{[0-9]+}}(%rsp), %rax
; SSE-NEXT: movq {{[0-9]+}}(%rsp), %r10
; SSE-NEXT: movdqa (%rdi), %xmm10
; SSE-NEXT: movdqa 16(%rdi), %xmm15
; SSE-NEXT: movdqa (%rsi), %xmm0
; SSE-NEXT: movdqa (%rdx), %xmm7
; SSE-NEXT: movdqa (%rcx), %xmm1
; SSE-NEXT: movdqa (%r8), %xmm8
; SSE-NEXT: movdqa (%r9), %xmm2
; SSE-NEXT: movdqa (%r10), %xmm11
; SSE-NEXT: movdqa (%rax), %xmm3
; SSE-NEXT: movdqa %xmm11, %xmm5
; SSE-NEXT: punpcklwd {{.*#+}} xmm5 = xmm5[0],xmm3[0],xmm5[1],xmm3[1],xmm5[2],xmm3[2],xmm5[3],xmm3[3]
; SSE-NEXT: movdqa %xmm8, %xmm12
; SSE-NEXT: punpcklwd {{.*#+}} xmm12 = xmm12[0],xmm2[0],xmm12[1],xmm2[1],xmm12[2],xmm2[2],xmm12[3],xmm2[3]
; SSE-NEXT: movdqa %xmm12, %xmm4
; SSE-NEXT: punpckldq {{.*#+}} xmm4 = xmm4[0],xmm5[0],xmm4[1],xmm5[1]
; SSE-NEXT: movdqa %xmm5, %xmm14
; SSE-NEXT: movdqa %xmm5, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
; SSE-NEXT: movdqa %xmm7, %xmm6
; SSE-NEXT: punpcklwd {{.*#+}} xmm6 = xmm6[0],xmm1[0],xmm6[1],xmm1[1],xmm6[2],xmm1[2],xmm6[3],xmm1[3]
; SSE-NEXT: pshufd {{.*#+}} xmm5 = xmm6[1,1,1,1]
; SSE-NEXT: movdqa %xmm6, %xmm9
; SSE-NEXT: movdqa %xmm6, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
; SSE-NEXT: movdqa %xmm10, %xmm13
; SSE-NEXT: punpcklwd {{.*#+}} xmm13 = xmm13[0],xmm0[0],xmm13[1],xmm0[1],xmm13[2],xmm0[2],xmm13[3],xmm0[3]
; SSE-NEXT: pshufd {{.*#+}} xmm6 = xmm13[1,1,1,1]
; SSE-NEXT: punpckldq {{.*#+}} xmm6 = xmm6[0],xmm5[0],xmm6[1],xmm5[1]
; SSE-NEXT: shufps {{.*#+}} xmm6 = xmm6[0,1],xmm4[2,3]
; SSE-NEXT: movaps %xmm6, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
; SSE-NEXT: pshufd {{.*#+}} xmm4 = xmm14[0,0,0,0]
; SSE-NEXT: pshufd {{.*#+}} xmm5 = xmm12[0,0,0,0]
; SSE-NEXT: punpckhdq {{.*#+}} xmm5 = xmm5[2],xmm4[2],xmm5[3],xmm4[3]
; SSE-NEXT: movdqa %xmm13, %xmm4
; SSE-NEXT: punpckldq {{.*#+}} xmm4 = xmm4[0],xmm9[0],xmm4[1],xmm9[1]
; SSE-NEXT: movsd {{.*#+}} xmm5 = xmm4[0],xmm5[1]
; SSE-NEXT: movapd %xmm5, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
; SSE-NEXT: movdqa 16(%rdx), %xmm9
; SSE-NEXT: punpckhwd {{.*#+}} xmm11 = xmm11[4],xmm3[4],xmm11[5],xmm3[5],xmm11[6],xmm3[6],xmm11[7],xmm3[7]
; SSE-NEXT: movdqa 16(%rcx), %xmm3
; SSE-NEXT: movdqa %xmm3, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
; SSE-NEXT: punpckhwd {{.*#+}} xmm8 = xmm8[4],xmm2[4],xmm8[5],xmm2[5],xmm8[6],xmm2[6],xmm8[7],xmm2[7]
; SSE-NEXT: movdqa %xmm8, %xmm2
; SSE-NEXT: punpckldq {{.*#+}} xmm2 = xmm2[0],xmm11[0],xmm2[1],xmm11[1]
; SSE-NEXT: movdqa %xmm11, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
; SSE-NEXT: punpckhwd {{.*#+}} xmm7 = xmm7[4],xmm1[4],xmm7[5],xmm1[5],xmm7[6],xmm1[6],xmm7[7],xmm1[7]
; SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm7[1,1,1,1]
; SSE-NEXT: movdqa %xmm7, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
; SSE-NEXT: punpckhwd {{.*#+}} xmm10 = xmm10[4],xmm0[4],xmm10[5],xmm0[5],xmm10[6],xmm0[6],xmm10[7],xmm0[7]
; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm10[1,1,1,1]
; SSE-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
; SSE-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,1],xmm2[2,3]
; SSE-NEXT: movaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm11[0,0,0,0]
; SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm8[0,0,0,0]
; SSE-NEXT: punpckhdq {{.*#+}} xmm1 = xmm1[2],xmm0[2],xmm1[3],xmm0[3]
; SSE-NEXT: movdqa %xmm10, %xmm0
; SSE-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm7[0],xmm0[1],xmm7[1]
; SSE-NEXT: movsd {{.*#+}} xmm1 = xmm0[0],xmm1[1]
; SSE-NEXT: movapd %xmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
; SSE-NEXT: movdqa %xmm9, %xmm5
; SSE-NEXT: punpcklwd {{.*#+}} xmm5 = xmm5[0],xmm3[0],xmm5[1],xmm3[1],xmm5[2],xmm3[2],xmm5[3],xmm3[3]
; SSE-NEXT: movdqa 16(%rsi), %xmm0
; SSE-NEXT: movdqa %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
; SSE-NEXT: movdqa %xmm15, %xmm6
; SSE-NEXT: movdqa %xmm15, %xmm3
; SSE-NEXT: punpcklwd {{.*#+}} xmm3 = xmm3[0],xmm0[0],xmm3[1],xmm0[1],xmm3[2],xmm0[2],xmm3[3],xmm0[3]
; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm5[1,1,1,1]
; SSE-NEXT: movdqa %xmm5, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
; SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm3[1,1,1,1]
; SSE-NEXT: punpckldq {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1]
; SSE-NEXT: movdqa 16(%r10), %xmm15
; SSE-NEXT: movdqa 16(%rax), %xmm7
; SSE-NEXT: movdqa %xmm15, %xmm14
; SSE-NEXT: punpcklwd {{.*#+}} xmm14 = xmm14[0],xmm7[0],xmm14[1],xmm7[1],xmm14[2],xmm7[2],xmm14[3],xmm7[3]
; SSE-NEXT: movdqa 16(%r8), %xmm4
; SSE-NEXT: movdqa 16(%r9), %xmm11
; SSE-NEXT: movdqa %xmm4, %xmm2
; SSE-NEXT: punpcklwd {{.*#+}} xmm2 = xmm2[0],xmm11[0],xmm2[1],xmm11[1],xmm2[2],xmm11[2],xmm2[3],xmm11[3]
; SSE-NEXT: movdqa %xmm2, %xmm0
; SSE-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm14[0],xmm0[1],xmm14[1]
; SSE-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,1],xmm0[2,3]
; SSE-NEXT: movaps %xmm1, (%rsp) # 16-byte Spill
; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm14[0,0,0,0]
; SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm2[0,0,0,0]
; SSE-NEXT: punpckhdq {{.*#+}} xmm1 = xmm1[2],xmm0[2],xmm1[3],xmm0[3]
; SSE-NEXT: movdqa %xmm3, %xmm0
; SSE-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm5[0],xmm0[1],xmm5[1]
; SSE-NEXT: movsd {{.*#+}} xmm1 = xmm0[0],xmm1[1]
; SSE-NEXT: movapd %xmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
; SSE-NEXT: punpckhwd {{.*#+}} xmm15 = xmm15[4],xmm7[4],xmm15[5],xmm7[5],xmm15[6],xmm7[6],xmm15[7],xmm7[7]
; SSE-NEXT: punpckhwd {{.*#+}} xmm4 = xmm4[4],xmm11[4],xmm4[5],xmm11[5],xmm4[6],xmm11[6],xmm4[7],xmm11[7]
; SSE-NEXT: punpckhwd {{[-0-9]+}}(%r{{[sb]}}p), %xmm9 # 16-byte Folded Reload
; SSE-NEXT: # xmm9 = xmm9[4],mem[4],xmm9[5],mem[5],xmm9[6],mem[6],xmm9[7],mem[7]
; SSE-NEXT: punpckhwd {{[-0-9]+}}(%r{{[sb]}}p), %xmm6 # 16-byte Folded Reload
; SSE-NEXT: # xmm6 = xmm6[4],mem[4],xmm6[5],mem[5],xmm6[6],mem[6],xmm6[7],mem[7]
; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm9[1,1,1,1]
; SSE-NEXT: movdqa %xmm9, %xmm1
; SSE-NEXT: movdqa %xmm9, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
; SSE-NEXT: pshufd {{.*#+}} xmm11 = xmm6[1,1,1,1]
; SSE-NEXT: movdqa %xmm6, %xmm7
; SSE-NEXT: punpckldq {{.*#+}} xmm11 = xmm11[0],xmm0[0],xmm11[1],xmm0[1]
; SSE-NEXT: movdqa %xmm4, %xmm0
; SSE-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm15[0],xmm0[1],xmm15[1]
; SSE-NEXT: shufps {{.*#+}} xmm11 = xmm11[0,1],xmm0[2,3]
; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm15[0,0,0,0]
; SSE-NEXT: pshufd {{.*#+}} xmm9 = xmm4[0,0,0,0]
; SSE-NEXT: punpckhdq {{.*#+}} xmm9 = xmm9[2],xmm0[2],xmm9[3],xmm0[3]
; SSE-NEXT: movdqa %xmm6, %xmm0
; SSE-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
; SSE-NEXT: movsd {{.*#+}} xmm9 = xmm0[0],xmm9[1]
; SSE-NEXT: movdqa {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Reload
; SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm0[3,3,3,3]
; SSE-NEXT: pshufd {{.*#+}} xmm6 = xmm13[3,3,3,3]
; SSE-NEXT: punpckldq {{.*#+}} xmm6 = xmm6[0],xmm1[0],xmm6[1],xmm1[1]
; SSE-NEXT: pshufd {{.*#+}} xmm5 = xmm12[2,2,2,2]
; SSE-NEXT: movdqa {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 # 16-byte Reload
; SSE-NEXT: punpckhdq {{.*#+}} xmm12 = xmm12[2],xmm1[2],xmm12[3],xmm1[3]
; SSE-NEXT: shufps {{.*#+}} xmm6 = xmm6[0,1],xmm12[2,3]
; SSE-NEXT: punpckhdq {{.*#+}} xmm13 = xmm13[2],xmm0[2],xmm13[3],xmm0[3]
; SSE-NEXT: pshufd {{.*#+}} xmm12 = xmm1[2,2,2,2]
; SSE-NEXT: punpckhdq {{.*#+}} xmm5 = xmm5[2],xmm12[2],xmm5[3],xmm12[3]
; SSE-NEXT: movsd {{.*#+}} xmm5 = xmm13[0],xmm5[1]
; SSE-NEXT: movdqa {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Reload
; SSE-NEXT: pshufd {{.*#+}} xmm13 = xmm0[3,3,3,3]
; SSE-NEXT: pshufd {{.*#+}} xmm12 = xmm10[3,3,3,3]
; SSE-NEXT: punpckldq {{.*#+}} xmm12 = xmm12[0],xmm13[0],xmm12[1],xmm13[1]
; SSE-NEXT: pshufd {{.*#+}} xmm13 = xmm8[2,2,2,2]
; SSE-NEXT: movdqa {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 # 16-byte Reload
; SSE-NEXT: punpckhdq {{.*#+}} xmm8 = xmm8[2],xmm1[2],xmm8[3],xmm1[3]
; SSE-NEXT: shufps {{.*#+}} xmm12 = xmm12[0,1],xmm8[2,3]
; SSE-NEXT: punpckhdq {{.*#+}} xmm10 = xmm10[2],xmm0[2],xmm10[3],xmm0[3]
; SSE-NEXT: pshufd {{.*#+}} xmm8 = xmm1[2,2,2,2]
; SSE-NEXT: punpckhdq {{.*#+}} xmm13 = xmm13[2],xmm8[2],xmm13[3],xmm8[3]
; SSE-NEXT: movsd {{.*#+}} xmm13 = xmm10[0],xmm13[1]
; SSE-NEXT: movdqa {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Reload
; SSE-NEXT: pshufd {{.*#+}} xmm10 = xmm0[3,3,3,3]
; SSE-NEXT: pshufd {{.*#+}} xmm8 = xmm3[3,3,3,3]
; SSE-NEXT: punpckldq {{.*#+}} xmm8 = xmm8[0],xmm10[0],xmm8[1],xmm10[1]
; SSE-NEXT: pshufd {{.*#+}} xmm10 = xmm2[2,2,2,2]
; SSE-NEXT: punpckhdq {{.*#+}} xmm2 = xmm2[2],xmm14[2],xmm2[3],xmm14[3]
; SSE-NEXT: shufps {{.*#+}} xmm8 = xmm8[0,1],xmm2[2,3]
; SSE-NEXT: punpckhdq {{.*#+}} xmm3 = xmm3[2],xmm0[2],xmm3[3],xmm0[3]
; SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm14[2,2,2,2]
; SSE-NEXT: punpckhdq {{.*#+}} xmm10 = xmm10[2],xmm1[2],xmm10[3],xmm1[3]
; SSE-NEXT: movsd {{.*#+}} xmm10 = xmm3[0],xmm10[1]
; SSE-NEXT: movdqa {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Reload
; SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm0[3,3,3,3]
; SSE-NEXT: pshufd {{.*#+}} xmm3 = xmm7[3,3,3,3]
; SSE-NEXT: punpckldq {{.*#+}} xmm3 = xmm3[0],xmm1[0],xmm3[1],xmm1[1]
; SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm4[2,2,2,2]
; SSE-NEXT: punpckhdq {{.*#+}} xmm4 = xmm4[2],xmm15[2],xmm4[3],xmm15[3]
; SSE-NEXT: shufps {{.*#+}} xmm3 = xmm3[0,1],xmm4[2,3]
; SSE-NEXT: punpckhdq {{.*#+}} xmm7 = xmm7[2],xmm0[2],xmm7[3],xmm0[3]
; SSE-NEXT: pshufd {{.*#+}} xmm2 = xmm15[2,2,2,2]
; SSE-NEXT: punpckhdq {{.*#+}} xmm1 = xmm1[2],xmm2[2],xmm1[3],xmm2[3]
; SSE-NEXT: movsd {{.*#+}} xmm1 = xmm7[0],xmm1[1]
; SSE-NEXT: movq {{[0-9]+}}(%rsp), %rax
; SSE-NEXT: movapd %xmm1, 224(%rax)
; SSE-NEXT: movaps %xmm3, 240(%rax)
; SSE-NEXT: movapd %xmm10, 160(%rax)
; SSE-NEXT: movaps %xmm8, 176(%rax)
; SSE-NEXT: movapd %xmm13, 96(%rax)
; SSE-NEXT: movaps %xmm12, 112(%rax)
; SSE-NEXT: movapd %xmm5, 32(%rax)
; SSE-NEXT: movaps %xmm6, 48(%rax)
; SSE-NEXT: movapd %xmm9, 192(%rax)
; SSE-NEXT: movaps %xmm11, 208(%rax)
; SSE-NEXT: movaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Reload
; SSE-NEXT: movaps %xmm0, 128(%rax)
; SSE-NEXT: movaps (%rsp), %xmm0 # 16-byte Reload
; SSE-NEXT: movaps %xmm0, 144(%rax)
; SSE-NEXT: movaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Reload
; SSE-NEXT: movaps %xmm0, 64(%rax)
; SSE-NEXT: movaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Reload
; SSE-NEXT: movaps %xmm0, 80(%rax)
; SSE-NEXT: movaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Reload
; SSE-NEXT: movaps %xmm0, (%rax)
; SSE-NEXT: movaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Reload
; SSE-NEXT: movaps %xmm0, 16(%rax)
; SSE-NEXT: addq $88, %rsp
; SSE-NEXT: retq
;
; AVX-LABEL: store_i16_stride8_vf16:
; AVX: # %bb.0:
; AVX-NEXT: subq $136, %rsp
; AVX-NEXT: movq {{[0-9]+}}(%rsp), %rax
; AVX-NEXT: movq {{[0-9]+}}(%rsp), %r10
; AVX-NEXT: vmovdqa (%r10), %xmm3
; AVX-NEXT: vmovaps 16(%r10), %xmm0
; AVX-NEXT: vmovaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
; AVX-NEXT: vmovdqa (%rax), %xmm5
; AVX-NEXT: vpunpcklwd {{.*#+}} xmm0 = xmm5[0],xmm3[0],xmm5[1],xmm3[1],xmm5[2],xmm3[2],xmm5[3],xmm3[3]
; AVX-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[0,0,0,0]
; AVX-NEXT: vpshufd {{.*#+}} xmm2 = xmm0[0,1,0,1]
; AVX-NEXT: vinsertf128 $1, %xmm2, %ymm1, %ymm1
; AVX-NEXT: vmovdqa (%r9), %xmm2
; AVX-NEXT: vmovdqa (%r8), %xmm6
; AVX-NEXT: vpunpcklwd {{.*#+}} xmm12 = xmm6[0],xmm2[0],xmm6[1],xmm2[1],xmm6[2],xmm2[2],xmm6[3],xmm2[3]
; AVX-NEXT: vpshufd {{.*#+}} xmm7 = xmm12[0,1,0,1]
; AVX-NEXT: vpmovzxdq {{.*#+}} xmm8 = xmm12[0],zero,xmm12[1],zero
; AVX-NEXT: vinsertf128 $1, %xmm8, %ymm7, %ymm7
; AVX-NEXT: vblendps {{.*#+}} ymm1 = ymm7[0,1,2],ymm1[3],ymm7[4,5,6],ymm1[7]
; AVX-NEXT: vmovdqa (%rsi), %xmm4
; AVX-NEXT: vmovdqa (%rdi), %xmm8
; AVX-NEXT: vpunpcklwd {{.*#+}} xmm14 = xmm8[0],xmm4[0],xmm8[1],xmm4[1],xmm8[2],xmm4[2],xmm8[3],xmm4[3]
; AVX-NEXT: vpshufd {{.*#+}} xmm9 = xmm14[1,1,1,1]
; AVX-NEXT: vinsertf128 $1, %xmm9, %ymm14, %ymm9
; AVX-NEXT: vmovdqa (%rcx), %xmm10
; AVX-NEXT: vmovdqa (%rdx), %xmm11
; AVX-NEXT: vpunpcklwd {{.*#+}} xmm15 = xmm11[0],xmm10[0],xmm11[1],xmm10[1],xmm11[2],xmm10[2],xmm11[3],xmm10[3]
; AVX-NEXT: vpshufd {{.*#+}} xmm13 = xmm15[0,0,1,1]
; AVX-NEXT: vinsertf128 $1, %xmm15, %ymm13, %ymm13
; AVX-NEXT: vblendps {{.*#+}} ymm13 = ymm9[0],ymm13[1],ymm9[2,3,4],ymm13[5],ymm9[6,7]
; AVX-NEXT: vmovaps 16(%rax), %xmm7
; AVX-NEXT: vmovaps %xmm7, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
; AVX-NEXT: vblendps {{.*#+}} ymm1 = ymm13[0,1],ymm1[2,3],ymm13[4,5],ymm1[6,7]
; AVX-NEXT: vmovups %ymm1, {{[-0-9]+}}(%r{{[sb]}}p) # 32-byte Spill
; AVX-NEXT: vpshufd {{.*#+}} xmm1 = xmm12[2,2,3,3]
; AVX-NEXT: vinsertf128 $1, %xmm1, %ymm12, %ymm1
; AVX-NEXT: vpshufd {{.*#+}} xmm12 = xmm0[2,2,2,2]
; AVX-NEXT: vinsertf128 $1, %xmm0, %ymm12, %ymm0
; AVX-NEXT: vmovdqa 16(%r9), %xmm7
; AVX-NEXT: vblendps {{.*#+}} ymm1 = ymm1[0,1,2],ymm0[3],ymm1[4,5,6],ymm0[7]
; AVX-NEXT: vpshufd {{.*#+}} xmm0 = xmm15[2,2,3,3]
; AVX-NEXT: vpshufd {{.*#+}} xmm12 = xmm15[2,3,2,3]
; AVX-NEXT: vinsertf128 $1, %xmm12, %ymm0, %ymm12
; AVX-NEXT: vpshufd {{.*#+}} xmm0 = xmm14[2,3,2,3]
; AVX-NEXT: vpshufd {{.*#+}} xmm14 = xmm14[3,3,3,3]
; AVX-NEXT: vinsertf128 $1, %xmm14, %ymm0, %ymm14
; AVX-NEXT: vmovdqa 16(%r8), %xmm13
; AVX-NEXT: vblendps {{.*#+}} ymm12 = ymm14[0],ymm12[1],ymm14[2,3,4],ymm12[5],ymm14[6,7]
; AVX-NEXT: vmovdqa 16(%rcx), %xmm14
; AVX-NEXT: vblendps {{.*#+}} ymm0 = ymm12[0,1],ymm1[2,3],ymm12[4,5],ymm1[6,7]
; AVX-NEXT: vmovups %ymm0, {{[-0-9]+}}(%r{{[sb]}}p) # 32-byte Spill
; AVX-NEXT: vpunpckhwd {{.*#+}} xmm0 = xmm6[4],xmm2[4],xmm6[5],xmm2[5],xmm6[6],xmm2[6],xmm6[7],xmm2[7]
; AVX-NEXT: vmovdqu %ymm0, (%rsp) # 32-byte Spill
; AVX-NEXT: vpshufd {{.*#+}} xmm6 = xmm0[2,2,3,3]
; AVX-NEXT: vinsertf128 $1, %xmm6, %ymm0, %ymm12
; AVX-NEXT: vpunpckhwd {{.*#+}} xmm0 = xmm5[4],xmm3[4],xmm5[5],xmm3[5],xmm5[6],xmm3[6],xmm5[7],xmm3[7]
; AVX-NEXT: vmovdqa %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
; AVX-NEXT: vpshufd {{.*#+}} xmm3 = xmm0[2,2,2,2]
; AVX-NEXT: vinsertf128 $1, %xmm0, %ymm3, %ymm3
; AVX-NEXT: vblendps {{.*#+}} ymm5 = ymm12[0,1,2],ymm3[3],ymm12[4,5,6],ymm3[7]
; AVX-NEXT: vpunpckhwd {{.*#+}} xmm0 = xmm11[4],xmm10[4],xmm11[5],xmm10[5],xmm11[6],xmm10[6],xmm11[7],xmm10[7]
; AVX-NEXT: vmovdqa %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
; AVX-NEXT: vpshufd {{.*#+}} xmm10 = xmm0[2,2,3,3]
; AVX-NEXT: vpshufd {{.*#+}} xmm11 = xmm0[2,3,2,3]
; AVX-NEXT: vinsertf128 $1, %xmm11, %ymm10, %ymm10
; AVX-NEXT: vpunpckhwd {{.*#+}} xmm0 = xmm8[4],xmm4[4],xmm8[5],xmm4[5],xmm8[6],xmm4[6],xmm8[7],xmm4[7]
; AVX-NEXT: vmovdqu %ymm0, {{[-0-9]+}}(%r{{[sb]}}p) # 32-byte Spill
; AVX-NEXT: vpshufd {{.*#+}} xmm8 = xmm0[2,3,2,3]
; AVX-NEXT: vpshufd {{.*#+}} xmm11 = xmm0[3,3,3,3]
; AVX-NEXT: vinsertf128 $1, %xmm11, %ymm8, %ymm8
; AVX-NEXT: vblendps {{.*#+}} ymm8 = ymm8[0],ymm10[1],ymm8[2,3,4],ymm10[5],ymm8[6,7]
; AVX-NEXT: vblendps {{.*#+}} ymm0 = ymm8[0,1],ymm5[2,3],ymm8[4,5],ymm5[6,7]
; AVX-NEXT: vmovups %ymm0, {{[-0-9]+}}(%r{{[sb]}}p) # 32-byte Spill
; AVX-NEXT: vpunpcklwd {{.*#+}} xmm10 = xmm13[0],xmm7[0],xmm13[1],xmm7[1],xmm13[2],xmm7[2],xmm13[3],xmm7[3]
; AVX-NEXT: vmovdqa %xmm7, %xmm9
; AVX-NEXT: vpshufd {{.*#+}} xmm8 = xmm10[2,2,3,3]
; AVX-NEXT: vinsertf128 $1, %xmm8, %ymm10, %ymm8
; AVX-NEXT: vmovdqa {{[-0-9]+}}(%r{{[sb]}}p), %xmm3 # 16-byte Reload
; AVX-NEXT: vmovdqa {{[-0-9]+}}(%r{{[sb]}}p), %xmm2 # 16-byte Reload
; AVX-NEXT: vpunpcklwd {{.*#+}} xmm12 = xmm2[0],xmm3[0],xmm2[1],xmm3[1],xmm2[2],xmm3[2],xmm2[3],xmm3[3]
; AVX-NEXT: vpshufd {{.*#+}} xmm11 = xmm12[2,2,2,2]
; AVX-NEXT: vinsertf128 $1, %xmm12, %ymm11, %ymm11
; AVX-NEXT: vblendps {{.*#+}} ymm7 = ymm8[0,1,2],ymm11[3],ymm8[4,5,6],ymm11[7]
; AVX-NEXT: vmovdqa 16(%rdx), %xmm8
; AVX-NEXT: vpunpcklwd {{.*#+}} xmm11 = xmm8[0],xmm14[0],xmm8[1],xmm14[1],xmm8[2],xmm14[2],xmm8[3],xmm14[3]
; AVX-NEXT: vpshufd {{.*#+}} xmm15 = xmm11[2,2,3,3]
; AVX-NEXT: vpshufd {{.*#+}} xmm1 = xmm11[2,3,2,3]
; AVX-NEXT: vinsertf128 $1, %xmm1, %ymm15, %ymm4
; AVX-NEXT: vmovdqa 16(%rsi), %xmm6
; AVX-NEXT: vmovdqa 16(%rdi), %xmm1
; AVX-NEXT: vpunpcklwd {{.*#+}} xmm15 = xmm1[0],xmm6[0],xmm1[1],xmm6[1],xmm1[2],xmm6[2],xmm1[3],xmm6[3]
; AVX-NEXT: vpshufd {{.*#+}} xmm0 = xmm15[2,3,2,3]
; AVX-NEXT: vpshufd {{.*#+}} xmm5 = xmm15[3,3,3,3]
; AVX-NEXT: vinsertf128 $1, %xmm5, %ymm0, %ymm0
; AVX-NEXT: vblendps {{.*#+}} ymm0 = ymm0[0],ymm4[1],ymm0[2,3,4],ymm4[5],ymm0[6,7]
; AVX-NEXT: vblendps {{.*#+}} ymm0 = ymm0[0,1],ymm7[2,3],ymm0[4,5],ymm7[6,7]
; AVX-NEXT: vmovups %ymm0, {{[-0-9]+}}(%r{{[sb]}}p) # 32-byte Spill
; AVX-NEXT: vpunpckhwd {{.*#+}} xmm0 = xmm13[4],xmm9[4],xmm13[5],xmm9[5],xmm13[6],xmm9[6],xmm13[7],xmm9[7]
; AVX-NEXT: vpunpckhwd {{.*#+}} xmm2 = xmm2[4],xmm3[4],xmm2[5],xmm3[5],xmm2[6],xmm3[6],xmm2[7],xmm3[7]
; AVX-NEXT: vpshufd {{.*#+}} xmm5 = xmm0[2,2,3,3]
; AVX-NEXT: vinsertf128 $1, %xmm5, %ymm0, %ymm5
; AVX-NEXT: vpshufd {{.*#+}} xmm7 = xmm2[2,2,2,2]
; AVX-NEXT: vinsertf128 $1, %xmm2, %ymm7, %ymm7
; AVX-NEXT: vblendps {{.*#+}} ymm5 = ymm5[0,1,2],ymm7[3],ymm5[4,5,6],ymm7[7]
; AVX-NEXT: vpunpckhwd {{.*#+}} xmm7 = xmm8[4],xmm14[4],xmm8[5],xmm14[5],xmm8[6],xmm14[6],xmm8[7],xmm14[7]
; AVX-NEXT: vpshufd {{.*#+}} xmm4 = xmm7[2,2,3,3]
; AVX-NEXT: vpshufd {{.*#+}} xmm8 = xmm7[2,3,2,3]
; AVX-NEXT: vinsertf128 $1, %xmm8, %ymm4, %ymm4
; AVX-NEXT: vpunpckhwd {{.*#+}} xmm1 = xmm1[4],xmm6[4],xmm1[5],xmm6[5],xmm1[6],xmm6[6],xmm1[7],xmm6[7]
; AVX-NEXT: vpshufd {{.*#+}} xmm3 = xmm1[2,3,2,3]
; AVX-NEXT: vpshufd {{.*#+}} xmm8 = xmm1[3,3,3,3]
; AVX-NEXT: vinsertf128 $1, %xmm8, %ymm3, %ymm3
; AVX-NEXT: vblendps {{.*#+}} ymm3 = ymm3[0],ymm4[1],ymm3[2,3,4],ymm4[5],ymm3[6,7]
; AVX-NEXT: vblendps {{.*#+}} ymm4 = ymm3[0,1],ymm5[2,3],ymm3[4,5],ymm5[6,7]
; AVX-NEXT: vpshufd {{.*#+}} xmm3 = xmm2[0,0,0,0]
; AVX-NEXT: vpshufd {{.*#+}} xmm2 = xmm2[0,1,0,1]
; AVX-NEXT: vinsertf128 $1, %xmm2, %ymm3, %ymm2
; AVX-NEXT: vpshufd {{.*#+}} xmm3 = xmm0[0,1,0,1]
; AVX-NEXT: vpmovzxdq {{.*#+}} xmm0 = xmm0[0],zero,xmm0[1],zero
; AVX-NEXT: vinsertf128 $1, %xmm0, %ymm3, %ymm0
; AVX-NEXT: vblendps {{.*#+}} ymm0 = ymm0[0,1,2],ymm2[3],ymm0[4,5,6],ymm2[7]
; AVX-NEXT: vpshufd {{.*#+}} xmm2 = xmm1[1,1,1,1]
; AVX-NEXT: vinsertf128 $1, %xmm2, %ymm1, %ymm1
; AVX-NEXT: vpshufd {{.*#+}} xmm2 = xmm7[0,0,1,1]
; AVX-NEXT: vinsertf128 $1, %xmm7, %ymm2, %ymm2
; AVX-NEXT: vblendps {{.*#+}} ymm1 = ymm1[0],ymm2[1],ymm1[2,3,4],ymm2[5],ymm1[6,7]
; AVX-NEXT: vblendps {{.*#+}} ymm0 = ymm1[0,1],ymm0[2,3],ymm1[4,5],ymm0[6,7]
; AVX-NEXT: vpshufd {{.*#+}} xmm1 = xmm12[0,0,0,0]
; AVX-NEXT: vpshufd {{.*#+}} xmm2 = xmm12[0,1,0,1]
; AVX-NEXT: vinsertf128 $1, %xmm2, %ymm1, %ymm1
; AVX-NEXT: vpshufd {{.*#+}} xmm2 = xmm10[0,1,0,1]
; AVX-NEXT: vpmovzxdq {{.*#+}} xmm3 = xmm10[0],zero,xmm10[1],zero
; AVX-NEXT: vinsertf128 $1, %xmm3, %ymm2, %ymm2
; AVX-NEXT: vblendps {{.*#+}} ymm1 = ymm2[0,1,2],ymm1[3],ymm2[4,5,6],ymm1[7]
; AVX-NEXT: vpshufd {{.*#+}} xmm2 = xmm15[1,1,1,1]
; AVX-NEXT: vinsertf128 $1, %xmm2, %ymm15, %ymm2
; AVX-NEXT: vpshufd {{.*#+}} xmm3 = xmm11[0,0,1,1]
; AVX-NEXT: vinsertf128 $1, %xmm11, %ymm3, %ymm3
; AVX-NEXT: vblendps {{.*#+}} ymm2 = ymm2[0],ymm3[1],ymm2[2,3,4],ymm3[5],ymm2[6,7]
; AVX-NEXT: vblendps {{.*#+}} ymm1 = ymm2[0,1],ymm1[2,3],ymm2[4,5],ymm1[6,7]
; AVX-NEXT: vmovaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm3 # 16-byte Reload
; AVX-NEXT: vshufps {{.*#+}} xmm2 = xmm3[0,0,0,0]
; AVX-NEXT: vshufps {{.*#+}} xmm3 = xmm3[0,1,0,1]
; AVX-NEXT: vinsertf128 $1, %xmm3, %ymm2, %ymm2
; AVX-NEXT: vmovdqu (%rsp), %ymm5 # 32-byte Reload
; AVX-NEXT: vpshufd {{.*#+}} xmm3 = xmm5[0,1,0,1]
; AVX-NEXT: vpmovzxdq {{.*#+}} xmm5 = xmm5[0],zero,xmm5[1],zero
; AVX-NEXT: vinsertf128 $1, %xmm5, %ymm3, %ymm3
; AVX-NEXT: vblendps {{.*#+}} ymm2 = ymm3[0,1,2],ymm2[3],ymm3[4,5,6],ymm2[7]
; AVX-NEXT: vmovups {{[-0-9]+}}(%r{{[sb]}}p), %ymm5 # 32-byte Reload
; AVX-NEXT: vshufps {{.*#+}} xmm3 = xmm5[1,1,1,1]
; AVX-NEXT: vinsertf128 $1, %xmm3, %ymm5, %ymm3
; AVX-NEXT: vmovaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm6 # 16-byte Reload
; AVX-NEXT: vshufps {{.*#+}} xmm5 = xmm6[0,0,1,1]
; AVX-NEXT: vinsertf128 $1, %xmm6, %ymm5, %ymm5
; AVX-NEXT: vblendps {{.*#+}} ymm3 = ymm3[0],ymm5[1],ymm3[2,3,4],ymm5[5],ymm3[6,7]
; AVX-NEXT: vblendps {{.*#+}} ymm2 = ymm3[0,1],ymm2[2,3],ymm3[4,5],ymm2[6,7]
; AVX-NEXT: movq {{[0-9]+}}(%rsp), %rax
; AVX-NEXT: vmovaps %ymm2, 64(%rax)
; AVX-NEXT: vmovaps %ymm1, 128(%rax)
; AVX-NEXT: vmovaps %ymm0, 192(%rax)
; AVX-NEXT: vmovaps %ymm4, 224(%rax)
; AVX-NEXT: vmovups {{[-0-9]+}}(%r{{[sb]}}p), %ymm0 # 32-byte Reload
; AVX-NEXT: vmovaps %ymm0, 160(%rax)
; AVX-NEXT: vmovups {{[-0-9]+}}(%r{{[sb]}}p), %ymm0 # 32-byte Reload
; AVX-NEXT: vmovaps %ymm0, 96(%rax)
; AVX-NEXT: vmovups {{[-0-9]+}}(%r{{[sb]}}p), %ymm0 # 32-byte Reload
; AVX-NEXT: vmovaps %ymm0, 32(%rax)
; AVX-NEXT: vmovups {{[-0-9]+}}(%r{{[sb]}}p), %ymm0 # 32-byte Reload
; AVX-NEXT: vmovaps %ymm0, (%rax)
; AVX-NEXT: addq $136, %rsp
; AVX-NEXT: vzeroupper
; AVX-NEXT: retq
;
; AVX2-LABEL: store_i16_stride8_vf16:
; AVX2: # %bb.0:
; AVX2-NEXT: movq {{[0-9]+}}(%rsp), %rax
; AVX2-NEXT: movq {{[0-9]+}}(%rsp), %r10
; AVX2-NEXT: vmovdqa (%rdi), %ymm0
; AVX2-NEXT: vmovdqa (%rsi), %ymm1
; AVX2-NEXT: vmovdqa (%rax), %xmm5
; AVX2-NEXT: vmovdqa (%r10), %xmm8
; AVX2-NEXT: vpunpcklwd {{.*#+}} xmm3 = xmm8[0],xmm5[0],xmm8[1],xmm5[1],xmm8[2],xmm5[2],xmm8[3],xmm5[3]
; AVX2-NEXT: vmovdqa (%r9), %xmm10
; AVX2-NEXT: vmovdqa (%r8), %xmm11
; AVX2-NEXT: vpunpcklwd {{.*#+}} xmm6 = xmm11[0],xmm10[0],xmm11[1],xmm10[1],xmm11[2],xmm10[2],xmm11[3],xmm10[3]
; AVX2-NEXT: vpunpckldq {{.*#+}} xmm2 = xmm6[0],xmm3[0],xmm6[1],xmm3[1]
; AVX2-NEXT: vpermq {{.*#+}} ymm2 = ymm2[0,0,2,1]
; AVX2-NEXT: vmovdqa (%rcx), %xmm12
; AVX2-NEXT: vmovdqa (%rdx), %xmm13
; AVX2-NEXT: vpunpcklwd {{.*#+}} xmm7 = xmm13[0],xmm12[0],xmm13[1],xmm12[1],xmm13[2],xmm12[2],xmm13[3],xmm12[3]
; AVX2-NEXT: vmovdqa (%rsi), %xmm14
; AVX2-NEXT: vmovdqa (%rdi), %xmm15
; AVX2-NEXT: vpunpcklwd {{.*#+}} xmm9 = xmm15[0],xmm14[0],xmm15[1],xmm14[1],xmm15[2],xmm14[2],xmm15[3],xmm14[3]
; AVX2-NEXT: vpunpckldq {{.*#+}} xmm4 = xmm9[0],xmm7[0],xmm9[1],xmm7[1]
; AVX2-NEXT: vpermq {{.*#+}} ymm4 = ymm4[0,1,1,3]
; AVX2-NEXT: vpblendd {{.*#+}} ymm2 = ymm4[0,1],ymm2[2,3],ymm4[4,5],ymm2[6,7]
; AVX2-NEXT: vmovdqu %ymm2, {{[-0-9]+}}(%r{{[sb]}}p) # 32-byte Spill
; AVX2-NEXT: vmovdqa (%rdx), %ymm4
; AVX2-NEXT: vpunpckhdq {{.*#+}} xmm3 = xmm6[2],xmm3[2],xmm6[3],xmm3[3]
; AVX2-NEXT: vmovdqa (%rcx), %ymm6
; AVX2-NEXT: vpunpckhdq {{.*#+}} xmm9 = xmm9[2],xmm7[2],xmm9[3],xmm7[3]
; AVX2-NEXT: vmovdqa (%r8), %ymm7
; AVX2-NEXT: vpermq {{.*#+}} ymm3 = ymm3[0,0,2,1]
; AVX2-NEXT: vpermq {{.*#+}} ymm9 = ymm9[0,1,1,3]
; AVX2-NEXT: vpblendd {{.*#+}} ymm2 = ymm9[0,1],ymm3[2,3],ymm9[4,5],ymm3[6,7]
; AVX2-NEXT: vmovdqu %ymm2, {{[-0-9]+}}(%r{{[sb]}}p) # 32-byte Spill
; AVX2-NEXT: vmovdqa (%r9), %ymm9
; AVX2-NEXT: vpunpckhwd {{.*#+}} xmm8 = xmm8[4],xmm5[4],xmm8[5],xmm5[5],xmm8[6],xmm5[6],xmm8[7],xmm5[7]
; AVX2-NEXT: vmovdqa (%r10), %ymm5
; AVX2-NEXT: vpunpckhwd {{.*#+}} xmm11 = xmm11[4],xmm10[4],xmm11[5],xmm10[5],xmm11[6],xmm10[6],xmm11[7],xmm10[7]
; AVX2-NEXT: vmovdqa (%rax), %ymm10
; AVX2-NEXT: vpunpckhwd {{.*#+}} xmm13 = xmm13[4],xmm12[4],xmm13[5],xmm12[5],xmm13[6],xmm12[6],xmm13[7],xmm12[7]
; AVX2-NEXT: vpunpckhdq {{.*#+}} xmm12 = xmm11[2],xmm8[2],xmm11[3],xmm8[3]
; AVX2-NEXT: vpermq {{.*#+}} ymm12 = ymm12[0,0,2,1]
; AVX2-NEXT: vpunpckhwd {{.*#+}} xmm14 = xmm15[4],xmm14[4],xmm15[5],xmm14[5],xmm15[6],xmm14[6],xmm15[7],xmm14[7]
; AVX2-NEXT: vpunpckhdq {{.*#+}} xmm15 = xmm14[2],xmm13[2],xmm14[3],xmm13[3]
; AVX2-NEXT: vpermq {{.*#+}} ymm15 = ymm15[0,1,1,3]
; AVX2-NEXT: vpblendd {{.*#+}} ymm12 = ymm15[0,1],ymm12[2,3],ymm15[4,5],ymm12[6,7]
; AVX2-NEXT: vpunpckldq {{.*#+}} xmm8 = xmm11[0],xmm8[0],xmm11[1],xmm8[1]
; AVX2-NEXT: vpermq {{.*#+}} ymm8 = ymm8[0,0,2,1]
; AVX2-NEXT: vpunpckldq {{.*#+}} xmm11 = xmm14[0],xmm13[0],xmm14[1],xmm13[1]
; AVX2-NEXT: vpermq {{.*#+}} ymm11 = ymm11[0,1,1,3]
; AVX2-NEXT: vpblendd {{.*#+}} ymm8 = ymm11[0,1],ymm8[2,3],ymm11[4,5],ymm8[6,7]
; AVX2-NEXT: vpunpcklwd {{.*#+}} ymm11 = ymm5[0],ymm10[0],ymm5[1],ymm10[1],ymm5[2],ymm10[2],ymm5[3],ymm10[3],ymm5[8],ymm10[8],ymm5[9],ymm10[9],ymm5[10],ymm10[10],ymm5[11],ymm10[11]
; AVX2-NEXT: vpunpcklwd {{.*#+}} ymm13 = ymm7[0],ymm9[0],ymm7[1],ymm9[1],ymm7[2],ymm9[2],ymm7[3],ymm9[3],ymm7[8],ymm9[8],ymm7[9],ymm9[9],ymm7[10],ymm9[10],ymm7[11],ymm9[11]
; AVX2-NEXT: vpunpckhdq {{.*#+}} ymm14 = ymm13[2],ymm11[2],ymm13[3],ymm11[3],ymm13[6],ymm11[6],ymm13[7],ymm11[7]
; AVX2-NEXT: vpermq {{.*#+}} ymm14 = ymm14[0,2,2,3]
; AVX2-NEXT: vpunpcklwd {{.*#+}} ymm15 = ymm4[0],ymm6[0],ymm4[1],ymm6[1],ymm4[2],ymm6[2],ymm4[3],ymm6[3],ymm4[8],ymm6[8],ymm4[9],ymm6[9],ymm4[10],ymm6[10],ymm4[11],ymm6[11]
; AVX2-NEXT: vpunpcklwd {{.*#+}} ymm3 = ymm0[0],ymm1[0],ymm0[1],ymm1[1],ymm0[2],ymm1[2],ymm0[3],ymm1[3],ymm0[8],ymm1[8],ymm0[9],ymm1[9],ymm0[10],ymm1[10],ymm0[11],ymm1[11]
; AVX2-NEXT: vpunpckhdq {{.*#+}} ymm2 = ymm3[2],ymm15[2],ymm3[3],ymm15[3],ymm3[6],ymm15[6],ymm3[7],ymm15[7]
; AVX2-NEXT: vpermq {{.*#+}} ymm2 = ymm2[2,1,3,3]
; AVX2-NEXT: vpblendd {{.*#+}} ymm2 = ymm2[0,1],ymm14[2,3],ymm2[4,5],ymm14[6,7]
; AVX2-NEXT: vpunpckhwd {{.*#+}} ymm5 = ymm5[4],ymm10[4],ymm5[5],ymm10[5],ymm5[6],ymm10[6],ymm5[7],ymm10[7],ymm5[12],ymm10[12],ymm5[13],ymm10[13],ymm5[14],ymm10[14],ymm5[15],ymm10[15]
; AVX2-NEXT: vpunpckhwd {{.*#+}} ymm7 = ymm7[4],ymm9[4],ymm7[5],ymm9[5],ymm7[6],ymm9[6],ymm7[7],ymm9[7],ymm7[12],ymm9[12],ymm7[13],ymm9[13],ymm7[14],ymm9[14],ymm7[15],ymm9[15]
; AVX2-NEXT: vpunpckhwd {{.*#+}} ymm4 = ymm4[4],ymm6[4],ymm4[5],ymm6[5],ymm4[6],ymm6[6],ymm4[7],ymm6[7],ymm4[12],ymm6[12],ymm4[13],ymm6[13],ymm4[14],ymm6[14],ymm4[15],ymm6[15]
; AVX2-NEXT: vpunpckhdq {{.*#+}} ymm6 = ymm7[2],ymm5[2],ymm7[3],ymm5[3],ymm7[6],ymm5[6],ymm7[7],ymm5[7]
; AVX2-NEXT: vpermq {{.*#+}} ymm6 = ymm6[0,2,2,3]
; AVX2-NEXT: vpunpckhwd {{.*#+}} ymm1 = ymm0[4],ymm1[4],ymm0[5],ymm1[5],ymm0[6],ymm1[6],ymm0[7],ymm1[7],ymm0[12],ymm1[12],ymm0[13],ymm1[13],ymm0[14],ymm1[14],ymm0[15],ymm1[15]
; AVX2-NEXT: vpunpckhdq {{.*#+}} ymm9 = ymm1[2],ymm4[2],ymm1[3],ymm4[3],ymm1[6],ymm4[6],ymm1[7],ymm4[7]
; AVX2-NEXT: vpermq {{.*#+}} ymm9 = ymm9[2,1,3,3]
; AVX2-NEXT: vpblendd {{.*#+}} ymm6 = ymm9[0,1],ymm6[2,3],ymm9[4,5],ymm6[6,7]
; AVX2-NEXT: vpunpckldq {{.*#+}} ymm5 = ymm7[0],ymm5[0],ymm7[1],ymm5[1],ymm7[4],ymm5[4],ymm7[5],ymm5[5]
; AVX2-NEXT: vpunpckldq {{.*#+}} ymm1 = ymm1[0],ymm4[0],ymm1[1],ymm4[1],ymm1[4],ymm4[4],ymm1[5],ymm4[5]
; AVX2-NEXT: vpermq {{.*#+}} ymm4 = ymm5[0,2,2,3]
; AVX2-NEXT: vpermq {{.*#+}} ymm1 = ymm1[2,1,3,3]
; AVX2-NEXT: vpblendd {{.*#+}} ymm1 = ymm1[0,1],ymm4[2,3],ymm1[4,5],ymm4[6,7]
; AVX2-NEXT: vpunpckldq {{.*#+}} ymm4 = ymm13[0],ymm11[0],ymm13[1],ymm11[1],ymm13[4],ymm11[4],ymm13[5],ymm11[5]
; AVX2-NEXT: vpunpckldq {{.*#+}} ymm0 = ymm3[0],ymm15[0],ymm3[1],ymm15[1],ymm3[4],ymm15[4],ymm3[5],ymm15[5]
; AVX2-NEXT: vpermq {{.*#+}} ymm4 = ymm4[0,2,2,3]
; AVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm0[2,1,3,3]
; AVX2-NEXT: vpblendd {{.*#+}} ymm0 = ymm0[0,1],ymm4[2,3],ymm0[4,5],ymm4[6,7]
; AVX2-NEXT: movq {{[0-9]+}}(%rsp), %rax
; AVX2-NEXT: vmovdqa %ymm0, 128(%rax)
; AVX2-NEXT: vmovdqa %ymm1, 192(%rax)
; AVX2-NEXT: vmovdqa %ymm6, 224(%rax)
; AVX2-NEXT: vmovdqa %ymm2, 160(%rax)
; AVX2-NEXT: vmovdqa %ymm8, 64(%rax)
; AVX2-NEXT: vmovdqa %ymm12, 96(%rax)
; AVX2-NEXT: vmovups {{[-0-9]+}}(%r{{[sb]}}p), %ymm0 # 32-byte Reload
; AVX2-NEXT: vmovaps %ymm0, 32(%rax)
; AVX2-NEXT: vmovups {{[-0-9]+}}(%r{{[sb]}}p), %ymm0 # 32-byte Reload
; AVX2-NEXT: vmovaps %ymm0, (%rax)
; AVX2-NEXT: vzeroupper
; AVX2-NEXT: retq
;
; AVX2-FP-LABEL: store_i16_stride8_vf16:
; AVX2-FP: # %bb.0:
; AVX2-FP-NEXT: movq {{[0-9]+}}(%rsp), %rax
; AVX2-FP-NEXT: movq {{[0-9]+}}(%rsp), %r10
; AVX2-FP-NEXT: vmovdqa (%rdi), %ymm0
; AVX2-FP-NEXT: vmovdqa (%rsi), %ymm1
; AVX2-FP-NEXT: vmovdqa (%rax), %xmm5
; AVX2-FP-NEXT: vmovdqa (%r10), %xmm8
; AVX2-FP-NEXT: vpunpcklwd {{.*#+}} xmm3 = xmm8[0],xmm5[0],xmm8[1],xmm5[1],xmm8[2],xmm5[2],xmm8[3],xmm5[3]
; AVX2-FP-NEXT: vmovdqa (%r9), %xmm10
; AVX2-FP-NEXT: vmovdqa (%r8), %xmm11
; AVX2-FP-NEXT: vpunpcklwd {{.*#+}} xmm6 = xmm11[0],xmm10[0],xmm11[1],xmm10[1],xmm11[2],xmm10[2],xmm11[3],xmm10[3]
; AVX2-FP-NEXT: vpunpckldq {{.*#+}} xmm2 = xmm6[0],xmm3[0],xmm6[1],xmm3[1]
; AVX2-FP-NEXT: vpermq {{.*#+}} ymm2 = ymm2[0,0,2,1]
; AVX2-FP-NEXT: vmovdqa (%rcx), %xmm12
; AVX2-FP-NEXT: vmovdqa (%rdx), %xmm13
; AVX2-FP-NEXT: vpunpcklwd {{.*#+}} xmm7 = xmm13[0],xmm12[0],xmm13[1],xmm12[1],xmm13[2],xmm12[2],xmm13[3],xmm12[3]
; AVX2-FP-NEXT: vmovdqa (%rsi), %xmm14
; AVX2-FP-NEXT: vmovdqa (%rdi), %xmm15
; AVX2-FP-NEXT: vpunpcklwd {{.*#+}} xmm9 = xmm15[0],xmm14[0],xmm15[1],xmm14[1],xmm15[2],xmm14[2],xmm15[3],xmm14[3]
; AVX2-FP-NEXT: vpunpckldq {{.*#+}} xmm4 = xmm9[0],xmm7[0],xmm9[1],xmm7[1]
; AVX2-FP-NEXT: vpermq {{.*#+}} ymm4 = ymm4[0,1,1,3]
; AVX2-FP-NEXT: vpblendd {{.*#+}} ymm2 = ymm4[0,1],ymm2[2,3],ymm4[4,5],ymm2[6,7]
; AVX2-FP-NEXT: vmovdqu %ymm2, {{[-0-9]+}}(%r{{[sb]}}p) # 32-byte Spill
; AVX2-FP-NEXT: vmovdqa (%rdx), %ymm4
; AVX2-FP-NEXT: vpunpckhdq {{.*#+}} xmm3 = xmm6[2],xmm3[2],xmm6[3],xmm3[3]
; AVX2-FP-NEXT: vmovdqa (%rcx), %ymm6
; AVX2-FP-NEXT: vpunpckhdq {{.*#+}} xmm9 = xmm9[2],xmm7[2],xmm9[3],xmm7[3]
; AVX2-FP-NEXT: vmovdqa (%r8), %ymm7
; AVX2-FP-NEXT: vpermq {{.*#+}} ymm3 = ymm3[0,0,2,1]
; AVX2-FP-NEXT: vpermq {{.*#+}} ymm9 = ymm9[0,1,1,3]
; AVX2-FP-NEXT: vpblendd {{.*#+}} ymm2 = ymm9[0,1],ymm3[2,3],ymm9[4,5],ymm3[6,7]
; AVX2-FP-NEXT: vmovdqu %ymm2, {{[-0-9]+}}(%r{{[sb]}}p) # 32-byte Spill
; AVX2-FP-NEXT: vmovdqa (%r9), %ymm9
; AVX2-FP-NEXT: vpunpckhwd {{.*#+}} xmm8 = xmm8[4],xmm5[4],xmm8[5],xmm5[5],xmm8[6],xmm5[6],xmm8[7],xmm5[7]
; AVX2-FP-NEXT: vmovdqa (%r10), %ymm5
; AVX2-FP-NEXT: vpunpckhwd {{.*#+}} xmm11 = xmm11[4],xmm10[4],xmm11[5],xmm10[5],xmm11[6],xmm10[6],xmm11[7],xmm10[7]
; AVX2-FP-NEXT: vmovdqa (%rax), %ymm10
; AVX2-FP-NEXT: vpunpckhwd {{.*#+}} xmm13 = xmm13[4],xmm12[4],xmm13[5],xmm12[5],xmm13[6],xmm12[6],xmm13[7],xmm12[7]
; AVX2-FP-NEXT: vpunpckhdq {{.*#+}} xmm12 = xmm11[2],xmm8[2],xmm11[3],xmm8[3]
; AVX2-FP-NEXT: vpermq {{.*#+}} ymm12 = ymm12[0,0,2,1]
; AVX2-FP-NEXT: vpunpckhwd {{.*#+}} xmm14 = xmm15[4],xmm14[4],xmm15[5],xmm14[5],xmm15[6],xmm14[6],xmm15[7],xmm14[7]
; AVX2-FP-NEXT: vpunpckhdq {{.*#+}} xmm15 = xmm14[2],xmm13[2],xmm14[3],xmm13[3]
; AVX2-FP-NEXT: vpermq {{.*#+}} ymm15 = ymm15[0,1,1,3]
; AVX2-FP-NEXT: vpblendd {{.*#+}} ymm12 = ymm15[0,1],ymm12[2,3],ymm15[4,5],ymm12[6,7]
; AVX2-FP-NEXT: vpunpckldq {{.*#+}} xmm8 = xmm11[0],xmm8[0],xmm11[1],xmm8[1]
; AVX2-FP-NEXT: vpermq {{.*#+}} ymm8 = ymm8[0,0,2,1]
; AVX2-FP-NEXT: vpunpckldq {{.*#+}} xmm11 = xmm14[0],xmm13[0],xmm14[1],xmm13[1]
; AVX2-FP-NEXT: vpermq {{.*#+}} ymm11 = ymm11[0,1,1,3]
; AVX2-FP-NEXT: vpblendd {{.*#+}} ymm8 = ymm11[0,1],ymm8[2,3],ymm11[4,5],ymm8[6,7]
; AVX2-FP-NEXT: vpunpcklwd {{.*#+}} ymm11 = ymm5[0],ymm10[0],ymm5[1],ymm10[1],ymm5[2],ymm10[2],ymm5[3],ymm10[3],ymm5[8],ymm10[8],ymm5[9],ymm10[9],ymm5[10],ymm10[10],ymm5[11],ymm10[11]
; AVX2-FP-NEXT: vpunpcklwd {{.*#+}} ymm13 = ymm7[0],ymm9[0],ymm7[1],ymm9[1],ymm7[2],ymm9[2],ymm7[3],ymm9[3],ymm7[8],ymm9[8],ymm7[9],ymm9[9],ymm7[10],ymm9[10],ymm7[11],ymm9[11]
; AVX2-FP-NEXT: vpunpckhdq {{.*#+}} ymm14 = ymm13[2],ymm11[2],ymm13[3],ymm11[3],ymm13[6],ymm11[6],ymm13[7],ymm11[7]
; AVX2-FP-NEXT: vpermq {{.*#+}} ymm14 = ymm14[0,2,2,3]
; AVX2-FP-NEXT: vpunpcklwd {{.*#+}} ymm15 = ymm4[0],ymm6[0],ymm4[1],ymm6[1],ymm4[2],ymm6[2],ymm4[3],ymm6[3],ymm4[8],ymm6[8],ymm4[9],ymm6[9],ymm4[10],ymm6[10],ymm4[11],ymm6[11]
; AVX2-FP-NEXT: vpunpcklwd {{.*#+}} ymm3 = ymm0[0],ymm1[0],ymm0[1],ymm1[1],ymm0[2],ymm1[2],ymm0[3],ymm1[3],ymm0[8],ymm1[8],ymm0[9],ymm1[9],ymm0[10],ymm1[10],ymm0[11],ymm1[11]
; AVX2-FP-NEXT: vpunpckhdq {{.*#+}} ymm2 = ymm3[2],ymm15[2],ymm3[3],ymm15[3],ymm3[6],ymm15[6],ymm3[7],ymm15[7]
; AVX2-FP-NEXT: vpermq {{.*#+}} ymm2 = ymm2[2,1,3,3]
; AVX2-FP-NEXT: vpblendd {{.*#+}} ymm2 = ymm2[0,1],ymm14[2,3],ymm2[4,5],ymm14[6,7]
; AVX2-FP-NEXT: vpunpckhwd {{.*#+}} ymm5 = ymm5[4],ymm10[4],ymm5[5],ymm10[5],ymm5[6],ymm10[6],ymm5[7],ymm10[7],ymm5[12],ymm10[12],ymm5[13],ymm10[13],ymm5[14],ymm10[14],ymm5[15],ymm10[15]
; AVX2-FP-NEXT: vpunpckhwd {{.*#+}} ymm7 = ymm7[4],ymm9[4],ymm7[5],ymm9[5],ymm7[6],ymm9[6],ymm7[7],ymm9[7],ymm7[12],ymm9[12],ymm7[13],ymm9[13],ymm7[14],ymm9[14],ymm7[15],ymm9[15]
; AVX2-FP-NEXT: vpunpckhwd {{.*#+}} ymm4 = ymm4[4],ymm6[4],ymm4[5],ymm6[5],ymm4[6],ymm6[6],ymm4[7],ymm6[7],ymm4[12],ymm6[12],ymm4[13],ymm6[13],ymm4[14],ymm6[14],ymm4[15],ymm6[15]
; AVX2-FP-NEXT: vpunpckhdq {{.*#+}} ymm6 = ymm7[2],ymm5[2],ymm7[3],ymm5[3],ymm7[6],ymm5[6],ymm7[7],ymm5[7]
; AVX2-FP-NEXT: vpermq {{.*#+}} ymm6 = ymm6[0,2,2,3]
; AVX2-FP-NEXT: vpunpckhwd {{.*#+}} ymm1 = ymm0[4],ymm1[4],ymm0[5],ymm1[5],ymm0[6],ymm1[6],ymm0[7],ymm1[7],ymm0[12],ymm1[12],ymm0[13],ymm1[13],ymm0[14],ymm1[14],ymm0[15],ymm1[15]
; AVX2-FP-NEXT: vpunpckhdq {{.*#+}} ymm9 = ymm1[2],ymm4[2],ymm1[3],ymm4[3],ymm1[6],ymm4[6],ymm1[7],ymm4[7]
; AVX2-FP-NEXT: vpermq {{.*#+}} ymm9 = ymm9[2,1,3,3]
; AVX2-FP-NEXT: vpblendd {{.*#+}} ymm6 = ymm9[0,1],ymm6[2,3],ymm9[4,5],ymm6[6,7]
; AVX2-FP-NEXT: vpunpckldq {{.*#+}} ymm5 = ymm7[0],ymm5[0],ymm7[1],ymm5[1],ymm7[4],ymm5[4],ymm7[5],ymm5[5]
; AVX2-FP-NEXT: vpunpckldq {{.*#+}} ymm1 = ymm1[0],ymm4[0],ymm1[1],ymm4[1],ymm1[4],ymm4[4],ymm1[5],ymm4[5]
; AVX2-FP-NEXT: vpermq {{.*#+}} ymm4 = ymm5[0,2,2,3]
; AVX2-FP-NEXT: vpermq {{.*#+}} ymm1 = ymm1[2,1,3,3]
; AVX2-FP-NEXT: vpblendd {{.*#+}} ymm1 = ymm1[0,1],ymm4[2,3],ymm1[4,5],ymm4[6,7]
; AVX2-FP-NEXT: vpunpckldq {{.*#+}} ymm4 = ymm13[0],ymm11[0],ymm13[1],ymm11[1],ymm13[4],ymm11[4],ymm13[5],ymm11[5]
; AVX2-FP-NEXT: vpunpckldq {{.*#+}} ymm0 = ymm3[0],ymm15[0],ymm3[1],ymm15[1],ymm3[4],ymm15[4],ymm3[5],ymm15[5]
; AVX2-FP-NEXT: vpermq {{.*#+}} ymm4 = ymm4[0,2,2,3]
; AVX2-FP-NEXT: vpermq {{.*#+}} ymm0 = ymm0[2,1,3,3]
; AVX2-FP-NEXT: vpblendd {{.*#+}} ymm0 = ymm0[0,1],ymm4[2,3],ymm0[4,5],ymm4[6,7]
; AVX2-FP-NEXT: movq {{[0-9]+}}(%rsp), %rax
; AVX2-FP-NEXT: vmovdqa %ymm0, 128(%rax)
; AVX2-FP-NEXT: vmovdqa %ymm1, 192(%rax)
; AVX2-FP-NEXT: vmovdqa %ymm6, 224(%rax)
; AVX2-FP-NEXT: vmovdqa %ymm2, 160(%rax)
; AVX2-FP-NEXT: vmovdqa %ymm8, 64(%rax)
; AVX2-FP-NEXT: vmovdqa %ymm12, 96(%rax)
; AVX2-FP-NEXT: vmovups {{[-0-9]+}}(%r{{[sb]}}p), %ymm0 # 32-byte Reload
; AVX2-FP-NEXT: vmovaps %ymm0, 32(%rax)
; AVX2-FP-NEXT: vmovups {{[-0-9]+}}(%r{{[sb]}}p), %ymm0 # 32-byte Reload
; AVX2-FP-NEXT: vmovaps %ymm0, (%rax)
; AVX2-FP-NEXT: vzeroupper
; AVX2-FP-NEXT: retq
;
; AVX2-FCP-LABEL: store_i16_stride8_vf16:
; AVX2-FCP: # %bb.0:
; AVX2-FCP-NEXT: pushq %rax
; AVX2-FCP-NEXT: movq {{[0-9]+}}(%rsp), %rax
; AVX2-FCP-NEXT: movq {{[0-9]+}}(%rsp), %r10
; AVX2-FCP-NEXT: vmovdqa (%rax), %xmm5
; AVX2-FCP-NEXT: vmovdqa (%r10), %xmm4
; AVX2-FCP-NEXT: vpunpcklwd {{.*#+}} xmm1 = xmm4[0],xmm5[0],xmm4[1],xmm5[1],xmm4[2],xmm5[2],xmm4[3],xmm5[3]
; AVX2-FCP-NEXT: vpmovsxbd {{.*#+}} ymm0 = [0,0,0,0,0,0,1,1]
; AVX2-FCP-NEXT: vpermd %ymm1, %ymm0, %ymm0
; AVX2-FCP-NEXT: vmovdqa (%r9), %xmm6
; AVX2-FCP-NEXT: vmovdqa (%r8), %xmm9
; AVX2-FCP-NEXT: vpunpcklwd {{.*#+}} xmm11 = xmm9[0],xmm6[0],xmm9[1],xmm6[1],xmm9[2],xmm6[2],xmm9[3],xmm6[3]
; AVX2-FCP-NEXT: vpmovsxbq {{.*#+}} ymm2 = [0,0,0,1]
; AVX2-FCP-NEXT: vpermd %ymm11, %ymm2, %ymm7
; AVX2-FCP-NEXT: vpblendd {{.*#+}} ymm3 = ymm7[0,1,2],ymm0[3],ymm7[4,5,6],ymm0[7]
; AVX2-FCP-NEXT: vmovdqa (%rcx), %xmm10
; AVX2-FCP-NEXT: vmovdqa (%rdx), %xmm12
; AVX2-FCP-NEXT: vpunpcklwd {{.*#+}} xmm13 = xmm12[0],xmm10[0],xmm12[1],xmm10[1],xmm12[2],xmm10[2],xmm12[3],xmm10[3]
; AVX2-FCP-NEXT: vpmovsxbd {{.*#+}} ymm0 = [0,0,1,1,1,1,0,0]
; AVX2-FCP-NEXT: vpermd %ymm13, %ymm0, %ymm14
; AVX2-FCP-NEXT: vmovdqa (%rsi), %xmm15
; AVX2-FCP-NEXT: vmovdqa (%rdi), %xmm2
; AVX2-FCP-NEXT: vpunpcklwd {{.*#+}} xmm0 = xmm2[0],xmm15[0],xmm2[1],xmm15[1],xmm2[2],xmm15[2],xmm2[3],xmm15[3]
; AVX2-FCP-NEXT: vpmovsxbq {{.*#+}} ymm8 = [0,1,1,0]
; AVX2-FCP-NEXT: vpermd %ymm0, %ymm8, %ymm7
; AVX2-FCP-NEXT: vpblendd {{.*#+}} ymm7 = ymm7[0],ymm14[1],ymm7[2,3,4],ymm14[5],ymm7[6,7]
; AVX2-FCP-NEXT: vpblendd {{.*#+}} ymm3 = ymm7[0,1],ymm3[2,3],ymm7[4,5],ymm3[6,7]
; AVX2-FCP-NEXT: vmovdqu %ymm3, {{[-0-9]+}}(%r{{[sb]}}p) # 32-byte Spill
; AVX2-FCP-NEXT: vpmovsxbd {{.*#+}} ymm7 = [2,2,2,2,0,0,3,3]
; AVX2-FCP-NEXT: vpermd %ymm1, %ymm7, %ymm1
; AVX2-FCP-NEXT: vpermd %ymm11, %ymm7, %ymm3
; AVX2-FCP-NEXT: vpblendd {{.*#+}} ymm1 = ymm3[0,1,2],ymm1[3],ymm3[4,5,6],ymm1[7]
; AVX2-FCP-NEXT: vpmovsxbd {{.*#+}} ymm11 = [2,2,3,3,3,3,0,0]
; AVX2-FCP-NEXT: vpermd %ymm13, %ymm11, %ymm3
; AVX2-FCP-NEXT: vpermd %ymm0, %ymm11, %ymm0
; AVX2-FCP-NEXT: vpblendd {{.*#+}} ymm0 = ymm0[0],ymm3[1],ymm0[2,3,4],ymm3[5],ymm0[6,7]
; AVX2-FCP-NEXT: vpblendd {{.*#+}} ymm0 = ymm0[0,1],ymm1[2,3],ymm0[4,5],ymm1[6,7]
; AVX2-FCP-NEXT: vmovdqu %ymm0, {{[-0-9]+}}(%r{{[sb]}}p) # 32-byte Spill
; AVX2-FCP-NEXT: vpunpckhwd {{.*#+}} xmm0 = xmm4[4],xmm5[4],xmm4[5],xmm5[5],xmm4[6],xmm5[6],xmm4[7],xmm5[7]
; AVX2-FCP-NEXT: vmovdqa (%rdi), %ymm14
; AVX2-FCP-NEXT: vpunpckhwd {{.*#+}} xmm4 = xmm9[4],xmm6[4],xmm9[5],xmm6[5],xmm9[6],xmm6[6],xmm9[7],xmm6[7]
; AVX2-FCP-NEXT: vpermd %ymm0, %ymm7, %ymm5
; AVX2-FCP-NEXT: vpermd %ymm4, %ymm7, %ymm6
; AVX2-FCP-NEXT: vpblendd {{.*#+}} ymm5 = ymm6[0,1,2],ymm5[3],ymm6[4,5,6],ymm5[7]
; AVX2-FCP-NEXT: vmovdqa (%rsi), %ymm6
; AVX2-FCP-NEXT: vpunpckhwd {{.*#+}} xmm7 = xmm12[4],xmm10[4],xmm12[5],xmm10[5],xmm12[6],xmm10[6],xmm12[7],xmm10[7]
; AVX2-FCP-NEXT: vmovdqa (%r8), %ymm9
; AVX2-FCP-NEXT: vpunpckhwd {{.*#+}} xmm10 = xmm2[4],xmm15[4],xmm2[5],xmm15[5],xmm2[6],xmm15[6],xmm2[7],xmm15[7]
; AVX2-FCP-NEXT: vpermd %ymm7, %ymm11, %ymm2
; AVX2-FCP-NEXT: vpermd %ymm10, %ymm11, %ymm11
; AVX2-FCP-NEXT: vpblendd {{.*#+}} ymm2 = ymm11[0],ymm2[1],ymm11[2,3,4],ymm2[5],ymm11[6,7]
; AVX2-FCP-NEXT: vmovdqa (%r9), %ymm12
; AVX2-FCP-NEXT: vpblendd {{.*#+}} ymm1 = ymm2[0,1],ymm5[2,3],ymm2[4,5],ymm5[6,7]
; AVX2-FCP-NEXT: vmovdqu %ymm1, {{[-0-9]+}}(%r{{[sb]}}p) # 32-byte Spill
; AVX2-FCP-NEXT: vmovdqa (%r10), %ymm13
; AVX2-FCP-NEXT: vpmovsxbd {{.*#+}} ymm1 = [0,0,0,0,0,0,1,1]
; AVX2-FCP-NEXT: vpermd %ymm0, %ymm1, %ymm0
; AVX2-FCP-NEXT: vmovdqa (%rax), %ymm15
; AVX2-FCP-NEXT: vpmovsxbq {{.*#+}} ymm1 = [0,0,0,1]
; AVX2-FCP-NEXT: vpermd %ymm4, %ymm1, %ymm4
; AVX2-FCP-NEXT: vpblendd {{.*#+}} ymm0 = ymm4[0,1,2],ymm0[3],ymm4[4,5,6],ymm0[7]
; AVX2-FCP-NEXT: vpmovsxbd {{.*#+}} ymm1 = [0,0,1,1,1,1,0,0]
; AVX2-FCP-NEXT: vpermd %ymm7, %ymm1, %ymm4
; AVX2-FCP-NEXT: vpermd %ymm10, %ymm8, %ymm5
; AVX2-FCP-NEXT: vpblendd {{.*#+}} ymm4 = ymm5[0],ymm4[1],ymm5[2,3,4],ymm4[5],ymm5[6,7]
; AVX2-FCP-NEXT: vpblendd {{.*#+}} ymm0 = ymm4[0,1],ymm0[2,3],ymm4[4,5],ymm0[6,7]
; AVX2-FCP-NEXT: vmovdqu %ymm0, {{[-0-9]+}}(%r{{[sb]}}p) # 32-byte Spill
; AVX2-FCP-NEXT: vpunpcklwd {{.*#+}} ymm5 = ymm13[0],ymm15[0],ymm13[1],ymm15[1],ymm13[2],ymm15[2],ymm13[3],ymm15[3],ymm13[8],ymm15[8],ymm13[9],ymm15[9],ymm13[10],ymm15[10],ymm13[11],ymm15[11]
; AVX2-FCP-NEXT: vpmovsxbd {{.*#+}} ymm0 = [0,2,4,6,4,6,6,7]
; AVX2-FCP-NEXT: vpermd %ymm5, %ymm0, %ymm8
; AVX2-FCP-NEXT: vpunpcklwd {{.*#+}} ymm7 = ymm9[0],ymm12[0],ymm9[1],ymm12[1],ymm9[2],ymm12[2],ymm9[3],ymm12[3],ymm9[8],ymm12[8],ymm9[9],ymm12[9],ymm9[10],ymm12[10],ymm9[11],ymm12[11]
; AVX2-FCP-NEXT: vpmovsxbd {{.*#+}} ymm0 = [2,1,6,5,6,5,7,7]
; AVX2-FCP-NEXT: vpermd %ymm7, %ymm0, %ymm10
; AVX2-FCP-NEXT: vpblendd {{.*#+}} ymm8 = ymm10[0,1,2],ymm8[3],ymm10[4,5,6],ymm8[7]
; AVX2-FCP-NEXT: vmovdqa (%rdx), %ymm1
; AVX2-FCP-NEXT: vmovdqa (%rcx), %ymm0
; AVX2-FCP-NEXT: vpunpcklwd {{.*#+}} ymm10 = ymm1[0],ymm0[0],ymm1[1],ymm0[1],ymm1[2],ymm0[2],ymm1[3],ymm0[3],ymm1[8],ymm0[8],ymm1[9],ymm0[9],ymm1[10],ymm0[10],ymm1[11],ymm0[11]
; AVX2-FCP-NEXT: vpmovsxbd {{.*#+}} ymm2 = [4,6,2,3,6,7,6,7]
; AVX2-FCP-NEXT: vpermd %ymm10, %ymm2, %ymm2
; AVX2-FCP-NEXT: vpunpcklwd {{.*#+}} ymm11 = ymm14[0],ymm6[0],ymm14[1],ymm6[1],ymm14[2],ymm6[2],ymm14[3],ymm6[3],ymm14[8],ymm6[8],ymm14[9],ymm6[9],ymm14[10],ymm6[10],ymm14[11],ymm6[11]
; AVX2-FCP-NEXT: vpmovsxbd {{.*#+}} ymm3 = [6,5,3,3,7,7,7,7]
; AVX2-FCP-NEXT: vpermd %ymm11, %ymm3, %ymm4
; AVX2-FCP-NEXT: vpblendd {{.*#+}} ymm2 = ymm4[0],ymm2[1],ymm4[2,3,4],ymm2[5],ymm4[6,7]
; AVX2-FCP-NEXT: vpblendd {{.*#+}} ymm8 = ymm2[0,1],ymm8[2,3],ymm2[4,5],ymm8[6,7]
; AVX2-FCP-NEXT: vpunpckhwd {{.*#+}} ymm2 = ymm13[4],ymm15[4],ymm13[5],ymm15[5],ymm13[6],ymm15[6],ymm13[7],ymm15[7],ymm13[12],ymm15[12],ymm13[13],ymm15[13],ymm13[14],ymm15[14],ymm13[15],ymm15[15]
; AVX2-FCP-NEXT: vpunpckhwd {{.*#+}} ymm4 = ymm9[4],ymm12[4],ymm9[5],ymm12[5],ymm9[6],ymm12[6],ymm9[7],ymm12[7],ymm9[12],ymm12[12],ymm9[13],ymm12[13],ymm9[14],ymm12[14],ymm9[15],ymm12[15]
; AVX2-FCP-NEXT: vpmovsxbd {{.*#+}} ymm9 = [0,2,4,6,4,6,6,7]
; AVX2-FCP-NEXT: vpermd %ymm2, %ymm9, %ymm9
; AVX2-FCP-NEXT: vpmovsxbd {{.*#+}} ymm12 = [2,1,6,5,6,5,7,7]
; AVX2-FCP-NEXT: vpermd %ymm4, %ymm12, %ymm12
; AVX2-FCP-NEXT: vpblendd {{.*#+}} ymm9 = ymm12[0,1,2],ymm9[3],ymm12[4,5,6],ymm9[7]
; AVX2-FCP-NEXT: vpunpckhwd {{.*#+}} ymm0 = ymm1[4],ymm0[4],ymm1[5],ymm0[5],ymm1[6],ymm0[6],ymm1[7],ymm0[7],ymm1[12],ymm0[12],ymm1[13],ymm0[13],ymm1[14],ymm0[14],ymm1[15],ymm0[15]
; AVX2-FCP-NEXT: vpunpckhwd {{.*#+}} ymm1 = ymm14[4],ymm6[4],ymm14[5],ymm6[5],ymm14[6],ymm6[6],ymm14[7],ymm6[7],ymm14[12],ymm6[12],ymm14[13],ymm6[13],ymm14[14],ymm6[14],ymm14[15],ymm6[15]
; AVX2-FCP-NEXT: vpmovsxbd {{.*#+}} ymm6 = [4,6,2,3,6,7,6,7]
; AVX2-FCP-NEXT: vpermd %ymm0, %ymm6, %ymm6
; AVX2-FCP-NEXT: vpermd %ymm1, %ymm3, %ymm3
; AVX2-FCP-NEXT: vpblendd {{.*#+}} ymm3 = ymm3[0],ymm6[1],ymm3[2,3,4],ymm6[5],ymm3[6,7]
; AVX2-FCP-NEXT: vpblendd {{.*#+}} ymm3 = ymm3[0,1],ymm9[2,3],ymm3[4,5],ymm9[6,7]
; AVX2-FCP-NEXT: vpmovsxbd {{.*#+}} ymm6 = [0,0,4,4,4,4,6,5]
; AVX2-FCP-NEXT: vpermd %ymm2, %ymm6, %ymm2
; AVX2-FCP-NEXT: vpmovsxbd {{.*#+}} ymm9 = [0,1,4,5,4,5,5,7]
; AVX2-FCP-NEXT: vpermd %ymm4, %ymm9, %ymm4
; AVX2-FCP-NEXT: vpblendd {{.*#+}} ymm2 = ymm4[0,1,2],ymm2[3],ymm4[4,5,6],ymm2[7]
; AVX2-FCP-NEXT: vpmovsxbd {{.*#+}} ymm4 = [4,4,2,1,6,5,6,5]
; AVX2-FCP-NEXT: vpermd %ymm0, %ymm4, %ymm0
; AVX2-FCP-NEXT: vpmovsxbd {{.*#+}} ymm12 = [4,5,1,3,5,7,5,7]
; AVX2-FCP-NEXT: vpermd %ymm1, %ymm12, %ymm1
; AVX2-FCP-NEXT: vpblendd {{.*#+}} ymm0 = ymm1[0],ymm0[1],ymm1[2,3,4],ymm0[5],ymm1[6,7]
; AVX2-FCP-NEXT: vpblendd {{.*#+}} ymm0 = ymm0[0,1],ymm2[2,3],ymm0[4,5],ymm2[6,7]
; AVX2-FCP-NEXT: vpermd %ymm5, %ymm6, %ymm1
; AVX2-FCP-NEXT: vpermd %ymm7, %ymm9, %ymm2
; AVX2-FCP-NEXT: vpblendd {{.*#+}} ymm1 = ymm2[0,1,2],ymm1[3],ymm2[4,5,6],ymm1[7]
; AVX2-FCP-NEXT: vpermd %ymm10, %ymm4, %ymm2
; AVX2-FCP-NEXT: vpermd %ymm11, %ymm12, %ymm4
; AVX2-FCP-NEXT: vpblendd {{.*#+}} ymm2 = ymm4[0],ymm2[1],ymm4[2,3,4],ymm2[5],ymm4[6,7]
; AVX2-FCP-NEXT: vpblendd {{.*#+}} ymm1 = ymm2[0,1],ymm1[2,3],ymm2[4,5],ymm1[6,7]
; AVX2-FCP-NEXT: movq {{[0-9]+}}(%rsp), %rax
; AVX2-FCP-NEXT: vmovdqa %ymm1, 128(%rax)
; AVX2-FCP-NEXT: vmovdqa %ymm0, 192(%rax)
; AVX2-FCP-NEXT: vmovdqa %ymm3, 224(%rax)
; AVX2-FCP-NEXT: vmovdqa %ymm8, 160(%rax)
; AVX2-FCP-NEXT: vmovups {{[-0-9]+}}(%r{{[sb]}}p), %ymm0 # 32-byte Reload
; AVX2-FCP-NEXT: vmovaps %ymm0, 64(%rax)
; AVX2-FCP-NEXT: vmovups {{[-0-9]+}}(%r{{[sb]}}p), %ymm0 # 32-byte Reload
; AVX2-FCP-NEXT: vmovaps %ymm0, 96(%rax)
; AVX2-FCP-NEXT: vmovups {{[-0-9]+}}(%r{{[sb]}}p), %ymm0 # 32-byte Reload
; AVX2-FCP-NEXT: vmovaps %ymm0, 32(%rax)
; AVX2-FCP-NEXT: vmovups {{[-0-9]+}}(%r{{[sb]}}p), %ymm0 # 32-byte Reload
; AVX2-FCP-NEXT: vmovaps %ymm0, (%rax)
; AVX2-FCP-NEXT: popq %rax
; AVX2-FCP-NEXT: vzeroupper
; AVX2-FCP-NEXT: retq
;
; AVX512-LABEL: store_i16_stride8_vf16:
; AVX512: # %bb.0:
; AVX512-NEXT: movq {{[0-9]+}}(%rsp), %rax
; AVX512-NEXT: movq {{[0-9]+}}(%rsp), %r10
; AVX512-NEXT: vmovdqa64 (%rdi), %ymm20
; AVX512-NEXT: vmovdqa (%r8), %ymm9
; AVX512-NEXT: vmovdqa (%r9), %ymm11
; AVX512-NEXT: vmovdqa (%r10), %ymm12
; AVX512-NEXT: vmovdqa (%rax), %ymm13
; AVX512-NEXT: vmovdqa (%rax), %xmm0
; AVX512-NEXT: vmovdqa (%r10), %xmm2
; AVX512-NEXT: vpunpckhwd {{.*#+}} xmm1 = xmm2[4],xmm0[4],xmm2[5],xmm0[5],xmm2[6],xmm0[6],xmm2[7],xmm0[7]
; AVX512-NEXT: vmovdqa64 %xmm2, %xmm21
; AVX512-NEXT: vmovdqa64 %xmm0, %xmm22
; AVX512-NEXT: vmovdqa (%r9), %xmm0
; AVX512-NEXT: vmovdqa (%r8), %xmm2
; AVX512-NEXT: vpunpckhwd {{.*#+}} xmm14 = xmm2[4],xmm0[4],xmm2[5],xmm0[5],xmm2[6],xmm0[6],xmm2[7],xmm0[7]
; AVX512-NEXT: vmovdqa64 %xmm2, %xmm23
; AVX512-NEXT: vmovdqa64 %xmm0, %xmm24
; AVX512-NEXT: vpmovsxbd {{.*#+}} zmm16 = [0,0,0,16,0,0,1,17,2,2,2,18,0,0,3,19]
; AVX512-NEXT: vpermt2d %zmm1, %zmm16, %zmm14
; AVX512-NEXT: vmovdqa (%rcx), %xmm6
; AVX512-NEXT: vmovdqa (%rdx), %xmm7
; AVX512-NEXT: vpunpckhwd {{.*#+}} xmm15 = xmm7[4],xmm6[4],xmm7[5],xmm6[5],xmm7[6],xmm6[6],xmm7[7],xmm6[7]
; AVX512-NEXT: vmovdqa (%rsi), %xmm8
; AVX512-NEXT: vmovdqa (%rdi), %xmm10
; AVX512-NEXT: vpunpckhwd {{.*#+}} xmm5 = xmm10[4],xmm8[4],xmm10[5],xmm8[5],xmm10[6],xmm8[6],xmm10[7],xmm8[7]
; AVX512-NEXT: vpmovsxbd {{.*#+}} zmm17 = [0,16,1,0,1,17,0,0,2,18,3,3,3,19,0,0]
; AVX512-NEXT: vpermt2d %zmm15, %zmm17, %zmm5
; AVX512-NEXT: movb $-86, %al
; AVX512-NEXT: kmovw %eax, %k1
; AVX512-NEXT: vmovdqa64 %zmm14, %zmm5 {%k1}
; AVX512-NEXT: vpunpcklwd {{.*#+}} ymm14 = ymm12[0],ymm13[0],ymm12[1],ymm13[1],ymm12[2],ymm13[2],ymm12[3],ymm13[3],ymm12[8],ymm13[8],ymm12[9],ymm13[9],ymm12[10],ymm13[10],ymm12[11],ymm13[11]
; AVX512-NEXT: vpunpcklwd {{.*#+}} ymm15 = ymm9[0],ymm11[0],ymm9[1],ymm11[1],ymm9[2],ymm11[2],ymm9[3],ymm11[3],ymm9[8],ymm11[8],ymm9[9],ymm11[9],ymm9[10],ymm11[10],ymm9[11],ymm11[11]
; AVX512-NEXT: vpmovsxbd {{.*#+}} zmm18 = [0,1,4,20,4,5,5,21,2,1,6,22,6,5,7,23]
; AVX512-NEXT: vpermt2d %zmm14, %zmm18, %zmm15
; AVX512-NEXT: vmovdqa (%rsi), %ymm4
; AVX512-NEXT: vpmovsxbd {{.*#+}} zmm19 = [4,20,1,3,5,21,5,7,6,22,3,3,7,23,7,7]
; AVX512-NEXT: vmovdqa (%rdx), %ymm2
; AVX512-NEXT: vmovdqa (%rcx), %ymm0
; AVX512-NEXT: vpunpcklwd {{.*#+}} ymm3 = ymm2[0],ymm0[0],ymm2[1],ymm0[1],ymm2[2],ymm0[2],ymm2[3],ymm0[3],ymm2[8],ymm0[8],ymm2[9],ymm0[9],ymm2[10],ymm0[10],ymm2[11],ymm0[11]
; AVX512-NEXT: vmovdqa64 %ymm20, %ymm1
; AVX512-NEXT: vpunpcklwd {{.*#+}} ymm14 = ymm1[0],ymm4[0],ymm1[1],ymm4[1],ymm1[2],ymm4[2],ymm1[3],ymm4[3],ymm1[8],ymm4[8],ymm1[9],ymm4[9],ymm1[10],ymm4[10],ymm1[11],ymm4[11]
; AVX512-NEXT: vpermt2d %zmm3, %zmm19, %zmm14
; AVX512-NEXT: vmovdqa64 %zmm15, %zmm14 {%k1}
; AVX512-NEXT: vpunpckhwd {{.*#+}} ymm3 = ymm12[4],ymm13[4],ymm12[5],ymm13[5],ymm12[6],ymm13[6],ymm12[7],ymm13[7],ymm12[12],ymm13[12],ymm12[13],ymm13[13],ymm12[14],ymm13[14],ymm12[15],ymm13[15]
; AVX512-NEXT: vpunpckhwd {{.*#+}} ymm9 = ymm9[4],ymm11[4],ymm9[5],ymm11[5],ymm9[6],ymm11[6],ymm9[7],ymm11[7],ymm9[12],ymm11[12],ymm9[13],ymm11[13],ymm9[14],ymm11[14],ymm9[15],ymm11[15]
; AVX512-NEXT: vpermt2d %zmm3, %zmm18, %zmm9
; AVX512-NEXT: vpunpckhwd {{.*#+}} ymm0 = ymm2[4],ymm0[4],ymm2[5],ymm0[5],ymm2[6],ymm0[6],ymm2[7],ymm0[7],ymm2[12],ymm0[12],ymm2[13],ymm0[13],ymm2[14],ymm0[14],ymm2[15],ymm0[15]
; AVX512-NEXT: vpunpckhwd {{.*#+}} ymm1 = ymm1[4],ymm4[4],ymm1[5],ymm4[5],ymm1[6],ymm4[6],ymm1[7],ymm4[7],ymm1[12],ymm4[12],ymm1[13],ymm4[13],ymm1[14],ymm4[14],ymm1[15],ymm4[15]
; AVX512-NEXT: vpermt2d %zmm0, %zmm19, %zmm1
; AVX512-NEXT: vmovdqa64 %zmm9, %zmm1 {%k1}
; AVX512-NEXT: vmovdqa64 %xmm21, %xmm0
; AVX512-NEXT: vmovdqa64 %xmm22, %xmm2
; AVX512-NEXT: vpunpcklwd {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1],xmm0[2],xmm2[2],xmm0[3],xmm2[3]
; AVX512-NEXT: vmovdqa64 %xmm23, %xmm2
; AVX512-NEXT: vmovdqa64 %xmm24, %xmm3
; AVX512-NEXT: vpunpcklwd {{.*#+}} xmm2 = xmm2[0],xmm3[0],xmm2[1],xmm3[1],xmm2[2],xmm3[2],xmm2[3],xmm3[3]
; AVX512-NEXT: vpermt2d %zmm0, %zmm16, %zmm2
; AVX512-NEXT: vpunpcklwd {{.*#+}} xmm0 = xmm7[0],xmm6[0],xmm7[1],xmm6[1],xmm7[2],xmm6[2],xmm7[3],xmm6[3]
; AVX512-NEXT: vpunpcklwd {{.*#+}} xmm4 = xmm10[0],xmm8[0],xmm10[1],xmm8[1],xmm10[2],xmm8[2],xmm10[3],xmm8[3]
; AVX512-NEXT: vpermt2d %zmm0, %zmm17, %zmm4
; AVX512-NEXT: vmovdqa64 %zmm2, %zmm4 {%k1}
; AVX512-NEXT: movq {{[0-9]+}}(%rsp), %rax
; AVX512-NEXT: vmovdqa64 %zmm4, (%rax)
; AVX512-NEXT: vmovdqa64 %zmm1, 192(%rax)
; AVX512-NEXT: vmovdqa64 %zmm14, 128(%rax)
; AVX512-NEXT: vmovdqa64 %zmm5, 64(%rax)
; AVX512-NEXT: vzeroupper
; AVX512-NEXT: retq
;
; AVX512-FCP-LABEL: store_i16_stride8_vf16:
; AVX512-FCP: # %bb.0:
; AVX512-FCP-NEXT: movq {{[0-9]+}}(%rsp), %rax
; AVX512-FCP-NEXT: movq {{[0-9]+}}(%rsp), %r10
; AVX512-FCP-NEXT: vmovdqa64 (%rdi), %ymm20
; AVX512-FCP-NEXT: vmovdqa (%r8), %ymm9
; AVX512-FCP-NEXT: vmovdqa (%r9), %ymm11
; AVX512-FCP-NEXT: vmovdqa (%r10), %ymm12
; AVX512-FCP-NEXT: vmovdqa (%rax), %ymm13
; AVX512-FCP-NEXT: vmovdqa (%rax), %xmm0
; AVX512-FCP-NEXT: vmovdqa (%r10), %xmm2
; AVX512-FCP-NEXT: vpunpckhwd {{.*#+}} xmm1 = xmm2[4],xmm0[4],xmm2[5],xmm0[5],xmm2[6],xmm0[6],xmm2[7],xmm0[7]
; AVX512-FCP-NEXT: vmovdqa64 %xmm2, %xmm21
; AVX512-FCP-NEXT: vmovdqa64 %xmm0, %xmm22
; AVX512-FCP-NEXT: vmovdqa (%r9), %xmm0
; AVX512-FCP-NEXT: vmovdqa (%r8), %xmm2
; AVX512-FCP-NEXT: vpunpckhwd {{.*#+}} xmm14 = xmm2[4],xmm0[4],xmm2[5],xmm0[5],xmm2[6],xmm0[6],xmm2[7],xmm0[7]
; AVX512-FCP-NEXT: vmovdqa64 %xmm2, %xmm23
; AVX512-FCP-NEXT: vmovdqa64 %xmm0, %xmm24
; AVX512-FCP-NEXT: vpmovsxbd {{.*#+}} zmm16 = [0,0,0,16,0,0,1,17,2,2,2,18,0,0,3,19]
; AVX512-FCP-NEXT: vpermt2d %zmm1, %zmm16, %zmm14
; AVX512-FCP-NEXT: vmovdqa (%rcx), %xmm6
; AVX512-FCP-NEXT: vmovdqa (%rdx), %xmm7
; AVX512-FCP-NEXT: vpunpckhwd {{.*#+}} xmm15 = xmm7[4],xmm6[4],xmm7[5],xmm6[5],xmm7[6],xmm6[6],xmm7[7],xmm6[7]
; AVX512-FCP-NEXT: vmovdqa (%rsi), %xmm8
; AVX512-FCP-NEXT: vmovdqa (%rdi), %xmm10
; AVX512-FCP-NEXT: vpunpckhwd {{.*#+}} xmm5 = xmm10[4],xmm8[4],xmm10[5],xmm8[5],xmm10[6],xmm8[6],xmm10[7],xmm8[7]
; AVX512-FCP-NEXT: vpmovsxbd {{.*#+}} zmm17 = [0,16,1,0,1,17,0,0,2,18,3,3,3,19,0,0]
; AVX512-FCP-NEXT: vpermt2d %zmm15, %zmm17, %zmm5
; AVX512-FCP-NEXT: movb $-86, %al
; AVX512-FCP-NEXT: kmovw %eax, %k1
; AVX512-FCP-NEXT: vmovdqa64 %zmm14, %zmm5 {%k1}
; AVX512-FCP-NEXT: vpunpcklwd {{.*#+}} ymm14 = ymm12[0],ymm13[0],ymm12[1],ymm13[1],ymm12[2],ymm13[2],ymm12[3],ymm13[3],ymm12[8],ymm13[8],ymm12[9],ymm13[9],ymm12[10],ymm13[10],ymm12[11],ymm13[11]
; AVX512-FCP-NEXT: vpunpcklwd {{.*#+}} ymm15 = ymm9[0],ymm11[0],ymm9[1],ymm11[1],ymm9[2],ymm11[2],ymm9[3],ymm11[3],ymm9[8],ymm11[8],ymm9[9],ymm11[9],ymm9[10],ymm11[10],ymm9[11],ymm11[11]
; AVX512-FCP-NEXT: vpmovsxbd {{.*#+}} zmm18 = [0,1,4,20,4,5,5,21,2,1,6,22,6,5,7,23]
; AVX512-FCP-NEXT: vpermt2d %zmm14, %zmm18, %zmm15
; AVX512-FCP-NEXT: vmovdqa (%rsi), %ymm4
; AVX512-FCP-NEXT: vpmovsxbd {{.*#+}} zmm19 = [4,20,1,3,5,21,5,7,6,22,3,3,7,23,7,7]
; AVX512-FCP-NEXT: vmovdqa (%rdx), %ymm2
; AVX512-FCP-NEXT: vmovdqa (%rcx), %ymm0
; AVX512-FCP-NEXT: vpunpcklwd {{.*#+}} ymm3 = ymm2[0],ymm0[0],ymm2[1],ymm0[1],ymm2[2],ymm0[2],ymm2[3],ymm0[3],ymm2[8],ymm0[8],ymm2[9],ymm0[9],ymm2[10],ymm0[10],ymm2[11],ymm0[11]
; AVX512-FCP-NEXT: vmovdqa64 %ymm20, %ymm1
; AVX512-FCP-NEXT: vpunpcklwd {{.*#+}} ymm14 = ymm1[0],ymm4[0],ymm1[1],ymm4[1],ymm1[2],ymm4[2],ymm1[3],ymm4[3],ymm1[8],ymm4[8],ymm1[9],ymm4[9],ymm1[10],ymm4[10],ymm1[11],ymm4[11]
; AVX512-FCP-NEXT: vpermt2d %zmm3, %zmm19, %zmm14
; AVX512-FCP-NEXT: vmovdqa64 %zmm15, %zmm14 {%k1}
; AVX512-FCP-NEXT: vpunpckhwd {{.*#+}} ymm3 = ymm12[4],ymm13[4],ymm12[5],ymm13[5],ymm12[6],ymm13[6],ymm12[7],ymm13[7],ymm12[12],ymm13[12],ymm12[13],ymm13[13],ymm12[14],ymm13[14],ymm12[15],ymm13[15]
; AVX512-FCP-NEXT: vpunpckhwd {{.*#+}} ymm9 = ymm9[4],ymm11[4],ymm9[5],ymm11[5],ymm9[6],ymm11[6],ymm9[7],ymm11[7],ymm9[12],ymm11[12],ymm9[13],ymm11[13],ymm9[14],ymm11[14],ymm9[15],ymm11[15]
; AVX512-FCP-NEXT: vpermt2d %zmm3, %zmm18, %zmm9
; AVX512-FCP-NEXT: vpunpckhwd {{.*#+}} ymm0 = ymm2[4],ymm0[4],ymm2[5],ymm0[5],ymm2[6],ymm0[6],ymm2[7],ymm0[7],ymm2[12],ymm0[12],ymm2[13],ymm0[13],ymm2[14],ymm0[14],ymm2[15],ymm0[15]
; AVX512-FCP-NEXT: vpunpckhwd {{.*#+}} ymm1 = ymm1[4],ymm4[4],ymm1[5],ymm4[5],ymm1[6],ymm4[6],ymm1[7],ymm4[7],ymm1[12],ymm4[12],ymm1[13],ymm4[13],ymm1[14],ymm4[14],ymm1[15],ymm4[15]
; AVX512-FCP-NEXT: vpermt2d %zmm0, %zmm19, %zmm1
; AVX512-FCP-NEXT: vmovdqa64 %zmm9, %zmm1 {%k1}
; AVX512-FCP-NEXT: vmovdqa64 %xmm21, %xmm0
; AVX512-FCP-NEXT: vmovdqa64 %xmm22, %xmm2
; AVX512-FCP-NEXT: vpunpcklwd {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1],xmm0[2],xmm2[2],xmm0[3],xmm2[3]
; AVX512-FCP-NEXT: vmovdqa64 %xmm23, %xmm2
; AVX512-FCP-NEXT: vmovdqa64 %xmm24, %xmm3
; AVX512-FCP-NEXT: vpunpcklwd {{.*#+}} xmm2 = xmm2[0],xmm3[0],xmm2[1],xmm3[1],xmm2[2],xmm3[2],xmm2[3],xmm3[3]
; AVX512-FCP-NEXT: vpermt2d %zmm0, %zmm16, %zmm2
; AVX512-FCP-NEXT: vpunpcklwd {{.*#+}} xmm0 = xmm7[0],xmm6[0],xmm7[1],xmm6[1],xmm7[2],xmm6[2],xmm7[3],xmm6[3]
; AVX512-FCP-NEXT: vpunpcklwd {{.*#+}} xmm4 = xmm10[0],xmm8[0],xmm10[1],xmm8[1],xmm10[2],xmm8[2],xmm10[3],xmm8[3]
; AVX512-FCP-NEXT: vpermt2d %zmm0, %zmm17, %zmm4
; AVX512-FCP-NEXT: vmovdqa64 %zmm2, %zmm4 {%k1}
; AVX512-FCP-NEXT: movq {{[0-9]+}}(%rsp), %rax
; AVX512-FCP-NEXT: vmovdqa64 %zmm4, (%rax)
; AVX512-FCP-NEXT: vmovdqa64 %zmm1, 192(%rax)
; AVX512-FCP-NEXT: vmovdqa64 %zmm14, 128(%rax)
; AVX512-FCP-NEXT: vmovdqa64 %zmm5, 64(%rax)
; AVX512-FCP-NEXT: vzeroupper
; AVX512-FCP-NEXT: retq
;
; AVX512DQ-LABEL: store_i16_stride8_vf16:
; AVX512DQ: # %bb.0:
; AVX512DQ-NEXT: movq {{[0-9]+}}(%rsp), %rax
; AVX512DQ-NEXT: movq {{[0-9]+}}(%rsp), %r10
; AVX512DQ-NEXT: vmovdqa64 (%rdi), %ymm20
; AVX512DQ-NEXT: vmovdqa (%r8), %ymm9
; AVX512DQ-NEXT: vmovdqa (%r9), %ymm11
; AVX512DQ-NEXT: vmovdqa (%r10), %ymm12
; AVX512DQ-NEXT: vmovdqa (%rax), %ymm13
; AVX512DQ-NEXT: vmovdqa (%rax), %xmm0
; AVX512DQ-NEXT: vmovdqa (%r10), %xmm2
; AVX512DQ-NEXT: vpunpckhwd {{.*#+}} xmm1 = xmm2[4],xmm0[4],xmm2[5],xmm0[5],xmm2[6],xmm0[6],xmm2[7],xmm0[7]
; AVX512DQ-NEXT: vmovdqa64 %xmm2, %xmm21
; AVX512DQ-NEXT: vmovdqa64 %xmm0, %xmm22
; AVX512DQ-NEXT: vmovdqa (%r9), %xmm0
; AVX512DQ-NEXT: vmovdqa (%r8), %xmm2
; AVX512DQ-NEXT: vpunpckhwd {{.*#+}} xmm14 = xmm2[4],xmm0[4],xmm2[5],xmm0[5],xmm2[6],xmm0[6],xmm2[7],xmm0[7]
; AVX512DQ-NEXT: vmovdqa64 %xmm2, %xmm23
; AVX512DQ-NEXT: vmovdqa64 %xmm0, %xmm24
; AVX512DQ-NEXT: vpmovsxbd {{.*#+}} zmm16 = [0,0,0,16,0,0,1,17,2,2,2,18,0,0,3,19]
; AVX512DQ-NEXT: vpermt2d %zmm1, %zmm16, %zmm14
; AVX512DQ-NEXT: vmovdqa (%rcx), %xmm6
; AVX512DQ-NEXT: vmovdqa (%rdx), %xmm7
; AVX512DQ-NEXT: vpunpckhwd {{.*#+}} xmm15 = xmm7[4],xmm6[4],xmm7[5],xmm6[5],xmm7[6],xmm6[6],xmm7[7],xmm6[7]
; AVX512DQ-NEXT: vmovdqa (%rsi), %xmm8
; AVX512DQ-NEXT: vmovdqa (%rdi), %xmm10
; AVX512DQ-NEXT: vpunpckhwd {{.*#+}} xmm5 = xmm10[4],xmm8[4],xmm10[5],xmm8[5],xmm10[6],xmm8[6],xmm10[7],xmm8[7]
; AVX512DQ-NEXT: vpmovsxbd {{.*#+}} zmm17 = [0,16,1,0,1,17,0,0,2,18,3,3,3,19,0,0]
; AVX512DQ-NEXT: vpermt2d %zmm15, %zmm17, %zmm5
; AVX512DQ-NEXT: movb $-86, %al
; AVX512DQ-NEXT: kmovw %eax, %k1
; AVX512DQ-NEXT: vmovdqa64 %zmm14, %zmm5 {%k1}
; AVX512DQ-NEXT: vpunpcklwd {{.*#+}} ymm14 = ymm12[0],ymm13[0],ymm12[1],ymm13[1],ymm12[2],ymm13[2],ymm12[3],ymm13[3],ymm12[8],ymm13[8],ymm12[9],ymm13[9],ymm12[10],ymm13[10],ymm12[11],ymm13[11]
; AVX512DQ-NEXT: vpunpcklwd {{.*#+}} ymm15 = ymm9[0],ymm11[0],ymm9[1],ymm11[1],ymm9[2],ymm11[2],ymm9[3],ymm11[3],ymm9[8],ymm11[8],ymm9[9],ymm11[9],ymm9[10],ymm11[10],ymm9[11],ymm11[11]
; AVX512DQ-NEXT: vpmovsxbd {{.*#+}} zmm18 = [0,1,4,20,4,5,5,21,2,1,6,22,6,5,7,23]
; AVX512DQ-NEXT: vpermt2d %zmm14, %zmm18, %zmm15
; AVX512DQ-NEXT: vmovdqa (%rsi), %ymm4
; AVX512DQ-NEXT: vpmovsxbd {{.*#+}} zmm19 = [4,20,1,3,5,21,5,7,6,22,3,3,7,23,7,7]
; AVX512DQ-NEXT: vmovdqa (%rdx), %ymm2
; AVX512DQ-NEXT: vmovdqa (%rcx), %ymm0
; AVX512DQ-NEXT: vpunpcklwd {{.*#+}} ymm3 = ymm2[0],ymm0[0],ymm2[1],ymm0[1],ymm2[2],ymm0[2],ymm2[3],ymm0[3],ymm2[8],ymm0[8],ymm2[9],ymm0[9],ymm2[10],ymm0[10],ymm2[11],ymm0[11]
; AVX512DQ-NEXT: vmovdqa64 %ymm20, %ymm1
; AVX512DQ-NEXT: vpunpcklwd {{.*#+}} ymm14 = ymm1[0],ymm4[0],ymm1[1],ymm4[1],ymm1[2],ymm4[2],ymm1[3],ymm4[3],ymm1[8],ymm4[8],ymm1[9],ymm4[9],ymm1[10],ymm4[10],ymm1[11],ymm4[11]
; AVX512DQ-NEXT: vpermt2d %zmm3, %zmm19, %zmm14
; AVX512DQ-NEXT: vmovdqa64 %zmm15, %zmm14 {%k1}
; AVX512DQ-NEXT: vpunpckhwd {{.*#+}} ymm3 = ymm12[4],ymm13[4],ymm12[5],ymm13[5],ymm12[6],ymm13[6],ymm12[7],ymm13[7],ymm12[12],ymm13[12],ymm12[13],ymm13[13],ymm12[14],ymm13[14],ymm12[15],ymm13[15]
; AVX512DQ-NEXT: vpunpckhwd {{.*#+}} ymm9 = ymm9[4],ymm11[4],ymm9[5],ymm11[5],ymm9[6],ymm11[6],ymm9[7],ymm11[7],ymm9[12],ymm11[12],ymm9[13],ymm11[13],ymm9[14],ymm11[14],ymm9[15],ymm11[15]
; AVX512DQ-NEXT: vpermt2d %zmm3, %zmm18, %zmm9
; AVX512DQ-NEXT: vpunpckhwd {{.*#+}} ymm0 = ymm2[4],ymm0[4],ymm2[5],ymm0[5],ymm2[6],ymm0[6],ymm2[7],ymm0[7],ymm2[12],ymm0[12],ymm2[13],ymm0[13],ymm2[14],ymm0[14],ymm2[15],ymm0[15]
; AVX512DQ-NEXT: vpunpckhwd {{.*#+}} ymm1 = ymm1[4],ymm4[4],ymm1[5],ymm4[5],ymm1[6],ymm4[6],ymm1[7],ymm4[7],ymm1[12],ymm4[12],ymm1[13],ymm4[13],ymm1[14],ymm4[14],ymm1[15],ymm4[15]
; AVX512DQ-NEXT: vpermt2d %zmm0, %zmm19, %zmm1
; AVX512DQ-NEXT: vmovdqa64 %zmm9, %zmm1 {%k1}
; AVX512DQ-NEXT: vmovdqa64 %xmm21, %xmm0
; AVX512DQ-NEXT: vmovdqa64 %xmm22, %xmm2
; AVX512DQ-NEXT: vpunpcklwd {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1],xmm0[2],xmm2[2],xmm0[3],xmm2[3]
; AVX512DQ-NEXT: vmovdqa64 %xmm23, %xmm2
; AVX512DQ-NEXT: vmovdqa64 %xmm24, %xmm3
; AVX512DQ-NEXT: vpunpcklwd {{.*#+}} xmm2 = xmm2[0],xmm3[0],xmm2[1],xmm3[1],xmm2[2],xmm3[2],xmm2[3],xmm3[3]
; AVX512DQ-NEXT: vpermt2d %zmm0, %zmm16, %zmm2
; AVX512DQ-NEXT: vpunpcklwd {{.*#+}} xmm0 = xmm7[0],xmm6[0],xmm7[1],xmm6[1],xmm7[2],xmm6[2],xmm7[3],xmm6[3]
; AVX512DQ-NEXT: vpunpcklwd {{.*#+}} xmm4 = xmm10[0],xmm8[0],xmm10[1],xmm8[1],xmm10[2],xmm8[2],xmm10[3],xmm8[3]
; AVX512DQ-NEXT: vpermt2d %zmm0, %zmm17, %zmm4
; AVX512DQ-NEXT: vmovdqa64 %zmm2, %zmm4 {%k1}
; AVX512DQ-NEXT: movq {{[0-9]+}}(%rsp), %rax
; AVX512DQ-NEXT: vmovdqa64 %zmm4, (%rax)
; AVX512DQ-NEXT: vmovdqa64 %zmm1, 192(%rax)
; AVX512DQ-NEXT: vmovdqa64 %zmm14, 128(%rax)
; AVX512DQ-NEXT: vmovdqa64 %zmm5, 64(%rax)
; AVX512DQ-NEXT: vzeroupper
; AVX512DQ-NEXT: retq
;
; AVX512DQ-FCP-LABEL: store_i16_stride8_vf16:
; AVX512DQ-FCP: # %bb.0:
; AVX512DQ-FCP-NEXT: movq {{[0-9]+}}(%rsp), %rax
; AVX512DQ-FCP-NEXT: movq {{[0-9]+}}(%rsp), %r10
; AVX512DQ-FCP-NEXT: vmovdqa64 (%rdi), %ymm20
; AVX512DQ-FCP-NEXT: vmovdqa (%r8), %ymm9
; AVX512DQ-FCP-NEXT: vmovdqa (%r9), %ymm11
; AVX512DQ-FCP-NEXT: vmovdqa (%r10), %ymm12
; AVX512DQ-FCP-NEXT: vmovdqa (%rax), %ymm13
; AVX512DQ-FCP-NEXT: vmovdqa (%rax), %xmm0
; AVX512DQ-FCP-NEXT: vmovdqa (%r10), %xmm2
; AVX512DQ-FCP-NEXT: vpunpckhwd {{.*#+}} xmm1 = xmm2[4],xmm0[4],xmm2[5],xmm0[5],xmm2[6],xmm0[6],xmm2[7],xmm0[7]
; AVX512DQ-FCP-NEXT: vmovdqa64 %xmm2, %xmm21
; AVX512DQ-FCP-NEXT: vmovdqa64 %xmm0, %xmm22
; AVX512DQ-FCP-NEXT: vmovdqa (%r9), %xmm0
; AVX512DQ-FCP-NEXT: vmovdqa (%r8), %xmm2
; AVX512DQ-FCP-NEXT: vpunpckhwd {{.*#+}} xmm14 = xmm2[4],xmm0[4],xmm2[5],xmm0[5],xmm2[6],xmm0[6],xmm2[7],xmm0[7]
; AVX512DQ-FCP-NEXT: vmovdqa64 %xmm2, %xmm23
; AVX512DQ-FCP-NEXT: vmovdqa64 %xmm0, %xmm24
; AVX512DQ-FCP-NEXT: vpmovsxbd {{.*#+}} zmm16 = [0,0,0,16,0,0,1,17,2,2,2,18,0,0,3,19]
; AVX512DQ-FCP-NEXT: vpermt2d %zmm1, %zmm16, %zmm14
; AVX512DQ-FCP-NEXT: vmovdqa (%rcx), %xmm6
; AVX512DQ-FCP-NEXT: vmovdqa (%rdx), %xmm7
; AVX512DQ-FCP-NEXT: vpunpckhwd {{.*#+}} xmm15 = xmm7[4],xmm6[4],xmm7[5],xmm6[5],xmm7[6],xmm6[6],xmm7[7],xmm6[7]
; AVX512DQ-FCP-NEXT: vmovdqa (%rsi), %xmm8
; AVX512DQ-FCP-NEXT: vmovdqa (%rdi), %xmm10
; AVX512DQ-FCP-NEXT: vpunpckhwd {{.*#+}} xmm5 = xmm10[4],xmm8[4],xmm10[5],xmm8[5],xmm10[6],xmm8[6],xmm10[7],xmm8[7]
; AVX512DQ-FCP-NEXT: vpmovsxbd {{.*#+}} zmm17 = [0,16,1,0,1,17,0,0,2,18,3,3,3,19,0,0]
; AVX512DQ-FCP-NEXT: vpermt2d %zmm15, %zmm17, %zmm5
; AVX512DQ-FCP-NEXT: movb $-86, %al
; AVX512DQ-FCP-NEXT: kmovw %eax, %k1
; AVX512DQ-FCP-NEXT: vmovdqa64 %zmm14, %zmm5 {%k1}
; AVX512DQ-FCP-NEXT: vpunpcklwd {{.*#+}} ymm14 = ymm12[0],ymm13[0],ymm12[1],ymm13[1],ymm12[2],ymm13[2],ymm12[3],ymm13[3],ymm12[8],ymm13[8],ymm12[9],ymm13[9],ymm12[10],ymm13[10],ymm12[11],ymm13[11]
; AVX512DQ-FCP-NEXT: vpunpcklwd {{.*#+}} ymm15 = ymm9[0],ymm11[0],ymm9[1],ymm11[1],ymm9[2],ymm11[2],ymm9[3],ymm11[3],ymm9[8],ymm11[8],ymm9[9],ymm11[9],ymm9[10],ymm11[10],ymm9[11],ymm11[11]
; AVX512DQ-FCP-NEXT: vpmovsxbd {{.*#+}} zmm18 = [0,1,4,20,4,5,5,21,2,1,6,22,6,5,7,23]
; AVX512DQ-FCP-NEXT: vpermt2d %zmm14, %zmm18, %zmm15
; AVX512DQ-FCP-NEXT: vmovdqa (%rsi), %ymm4
; AVX512DQ-FCP-NEXT: vpmovsxbd {{.*#+}} zmm19 = [4,20,1,3,5,21,5,7,6,22,3,3,7,23,7,7]
; AVX512DQ-FCP-NEXT: vmovdqa (%rdx), %ymm2
; AVX512DQ-FCP-NEXT: vmovdqa (%rcx), %ymm0
; AVX512DQ-FCP-NEXT: vpunpcklwd {{.*#+}} ymm3 = ymm2[0],ymm0[0],ymm2[1],ymm0[1],ymm2[2],ymm0[2],ymm2[3],ymm0[3],ymm2[8],ymm0[8],ymm2[9],ymm0[9],ymm2[10],ymm0[10],ymm2[11],ymm0[11]
; AVX512DQ-FCP-NEXT: vmovdqa64 %ymm20, %ymm1
; AVX512DQ-FCP-NEXT: vpunpcklwd {{.*#+}} ymm14 = ymm1[0],ymm4[0],ymm1[1],ymm4[1],ymm1[2],ymm4[2],ymm1[3],ymm4[3],ymm1[8],ymm4[8],ymm1[9],ymm4[9],ymm1[10],ymm4[10],ymm1[11],ymm4[11]
; AVX512DQ-FCP-NEXT: vpermt2d %zmm3, %zmm19, %zmm14
; AVX512DQ-FCP-NEXT: vmovdqa64 %zmm15, %zmm14 {%k1}
; AVX512DQ-FCP-NEXT: vpunpckhwd {{.*#+}} ymm3 = ymm12[4],ymm13[4],ymm12[5],ymm13[5],ymm12[6],ymm13[6],ymm12[7],ymm13[7],ymm12[12],ymm13[12],ymm12[13],ymm13[13],ymm12[14],ymm13[14],ymm12[15],ymm13[15]
; AVX512DQ-FCP-NEXT: vpunpckhwd {{.*#+}} ymm9 = ymm9[4],ymm11[4],ymm9[5],ymm11[5],ymm9[6],ymm11[6],ymm9[7],ymm11[7],ymm9[12],ymm11[12],ymm9[13],ymm11[13],ymm9[14],ymm11[14],ymm9[15],ymm11[15]
; AVX512DQ-FCP-NEXT: vpermt2d %zmm3, %zmm18, %zmm9
; AVX512DQ-FCP-NEXT: vpunpckhwd {{.*#+}} ymm0 = ymm2[4],ymm0[4],ymm2[5],ymm0[5],ymm2[6],ymm0[6],ymm2[7],ymm0[7],ymm2[12],ymm0[12],ymm2[13],ymm0[13],ymm2[14],ymm0[14],ymm2[15],ymm0[15]
; AVX512DQ-FCP-NEXT: vpunpckhwd {{.*#+}} ymm1 = ymm1[4],ymm4[4],ymm1[5],ymm4[5],ymm1[6],ymm4[6],ymm1[7],ymm4[7],ymm1[12],ymm4[12],ymm1[13],ymm4[13],ymm1[14],ymm4[14],ymm1[15],ymm4[15]
; AVX512DQ-FCP-NEXT: vpermt2d %zmm0, %zmm19, %zmm1
; AVX512DQ-FCP-NEXT: vmovdqa64 %zmm9, %zmm1 {%k1}
; AVX512DQ-FCP-NEXT: vmovdqa64 %xmm21, %xmm0
; AVX512DQ-FCP-NEXT: vmovdqa64 %xmm22, %xmm2
; AVX512DQ-FCP-NEXT: vpunpcklwd {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1],xmm0[2],xmm2[2],xmm0[3],xmm2[3]
; AVX512DQ-FCP-NEXT: vmovdqa64 %xmm23, %xmm2
; AVX512DQ-FCP-NEXT: vmovdqa64 %xmm24, %xmm3
; AVX512DQ-FCP-NEXT: vpunpcklwd {{.*#+}} xmm2 = xmm2[0],xmm3[0],xmm2[1],xmm3[1],xmm2[2],xmm3[2],xmm2[3],xmm3[3]
; AVX512DQ-FCP-NEXT: vpermt2d %zmm0, %zmm16, %zmm2
; AVX512DQ-FCP-NEXT: vpunpcklwd {{.*#+}} xmm0 = xmm7[0],xmm6[0],xmm7[1],xmm6[1],xmm7[2],xmm6[2],xmm7[3],xmm6[3]
; AVX512DQ-FCP-NEXT: vpunpcklwd {{.*#+}} xmm4 = xmm10[0],xmm8[0],xmm10[1],xmm8[1],xmm10[2],xmm8[2],xmm10[3],xmm8[3]
; AVX512DQ-FCP-NEXT: vpermt2d %zmm0, %zmm17, %zmm4
; AVX512DQ-FCP-NEXT: vmovdqa64 %zmm2, %zmm4 {%k1}
; AVX512DQ-FCP-NEXT: movq {{[0-9]+}}(%rsp), %rax
; AVX512DQ-FCP-NEXT: vmovdqa64 %zmm4, (%rax)
; AVX512DQ-FCP-NEXT: vmovdqa64 %zmm1, 192(%rax)
; AVX512DQ-FCP-NEXT: vmovdqa64 %zmm14, 128(%rax)
; AVX512DQ-FCP-NEXT: vmovdqa64 %zmm5, 64(%rax)
; AVX512DQ-FCP-NEXT: vzeroupper
; AVX512DQ-FCP-NEXT: retq
;
; AVX512BW-LABEL: store_i16_stride8_vf16:
; AVX512BW: # %bb.0:
; AVX512BW-NEXT: movq {{[0-9]+}}(%rsp), %rax
; AVX512BW-NEXT: movq {{[0-9]+}}(%rsp), %r10
; AVX512BW-NEXT: movq {{[0-9]+}}(%rsp), %r11
; AVX512BW-NEXT: vmovdqa (%rdi), %ymm0
; AVX512BW-NEXT: vmovdqa (%rdx), %ymm1
; AVX512BW-NEXT: vmovdqa (%r8), %ymm2
; AVX512BW-NEXT: vmovdqa (%r11), %ymm3
; AVX512BW-NEXT: vinserti64x4 $1, (%rsi), %zmm0, %zmm0
; AVX512BW-NEXT: vinserti64x4 $1, (%rcx), %zmm1, %zmm1
; AVX512BW-NEXT: vinserti64x4 $1, (%r9), %zmm2, %zmm2
; AVX512BW-NEXT: vinserti64x4 $1, (%r10), %zmm3, %zmm3
; AVX512BW-NEXT: vpmovsxbw {{.*#+}} zmm4 = [0,0,0,0,0,16,32,48,0,0,0,0,1,17,33,49,0,0,0,0,2,18,34,50,0,0,0,0,3,19,35,51]
; AVX512BW-NEXT: vpermi2w %zmm3, %zmm2, %zmm4
; AVX512BW-NEXT: vpmovsxbw {{.*#+}} zmm5 = [0,16,32,48,0,0,0,0,1,17,33,49,0,0,0,0,2,18,34,50,0,0,0,0,3,19,35,51,0,0,0,0]
; AVX512BW-NEXT: vpermi2w %zmm1, %zmm0, %zmm5
; AVX512BW-NEXT: movb $-86, %cl
; AVX512BW-NEXT: kmovd %ecx, %k1
; AVX512BW-NEXT: vmovdqa64 %zmm4, %zmm5 {%k1}
; AVX512BW-NEXT: vpmovsxbw {{.*#+}} zmm4 = [0,0,0,0,4,20,36,52,0,0,0,0,5,21,37,53,0,0,0,0,6,22,38,54,0,0,0,0,7,23,39,55]
; AVX512BW-NEXT: vpermi2w %zmm3, %zmm2, %zmm4
; AVX512BW-NEXT: vpmovsxbw {{.*#+}} zmm6 = [4,20,36,52,0,0,0,0,5,21,37,53,0,0,0,0,6,22,38,54,0,0,0,0,7,23,39,55,0,0,0,0]
; AVX512BW-NEXT: vpermi2w %zmm1, %zmm0, %zmm6
; AVX512BW-NEXT: vmovdqa64 %zmm4, %zmm6 {%k1}
; AVX512BW-NEXT: vpmovsxbw {{.*#+}} zmm4 = [0,0,0,0,8,24,40,56,0,0,0,0,9,25,41,57,0,0,0,0,10,26,42,58,0,0,0,0,11,27,43,59]
; AVX512BW-NEXT: vpermi2w %zmm3, %zmm2, %zmm4
; AVX512BW-NEXT: vpmovsxbw {{.*#+}} zmm7 = [8,24,40,56,0,0,0,0,9,25,41,57,0,0,0,0,10,26,42,58,0,0,0,0,11,27,43,59,0,0,0,0]
; AVX512BW-NEXT: vpermi2w %zmm1, %zmm0, %zmm7
; AVX512BW-NEXT: vmovdqa64 %zmm4, %zmm7 {%k1}
; AVX512BW-NEXT: vpmovsxbw {{.*#+}} zmm4 = [0,0,0,0,12,28,44,60,0,0,0,0,13,29,45,61,0,0,0,0,14,30,46,62,0,0,0,0,15,31,47,63]
; AVX512BW-NEXT: vpermi2w %zmm3, %zmm2, %zmm4
; AVX512BW-NEXT: vpmovsxbw {{.*#+}} zmm2 = [12,28,44,60,0,0,0,0,13,29,45,61,0,0,0,0,14,30,46,62,0,0,0,0,15,31,47,63,0,0,0,0]
; AVX512BW-NEXT: vpermi2w %zmm1, %zmm0, %zmm2
; AVX512BW-NEXT: vmovdqa64 %zmm4, %zmm2 {%k1}
; AVX512BW-NEXT: vmovdqa64 %zmm2, 192(%rax)
; AVX512BW-NEXT: vmovdqa64 %zmm7, 128(%rax)
; AVX512BW-NEXT: vmovdqa64 %zmm6, 64(%rax)
; AVX512BW-NEXT: vmovdqa64 %zmm5, (%rax)
; AVX512BW-NEXT: vzeroupper
; AVX512BW-NEXT: retq
;
; AVX512BW-FCP-LABEL: store_i16_stride8_vf16:
; AVX512BW-FCP: # %bb.0:
; AVX512BW-FCP-NEXT: movq {{[0-9]+}}(%rsp), %rax
; AVX512BW-FCP-NEXT: movq {{[0-9]+}}(%rsp), %r10
; AVX512BW-FCP-NEXT: movq {{[0-9]+}}(%rsp), %r11
; AVX512BW-FCP-NEXT: vmovdqa (%rdi), %ymm0
; AVX512BW-FCP-NEXT: vmovdqa (%rdx), %ymm1
; AVX512BW-FCP-NEXT: vmovdqa (%r8), %ymm2
; AVX512BW-FCP-NEXT: vmovdqa (%r11), %ymm3
; AVX512BW-FCP-NEXT: vinserti64x4 $1, (%rsi), %zmm0, %zmm0
; AVX512BW-FCP-NEXT: vinserti64x4 $1, (%rcx), %zmm1, %zmm1
; AVX512BW-FCP-NEXT: vinserti64x4 $1, (%r9), %zmm2, %zmm2
; AVX512BW-FCP-NEXT: vinserti64x4 $1, (%r10), %zmm3, %zmm3
; AVX512BW-FCP-NEXT: vpmovsxbw {{.*#+}} zmm4 = [0,0,0,0,0,16,32,48,0,0,0,0,1,17,33,49,0,0,0,0,2,18,34,50,0,0,0,0,3,19,35,51]
; AVX512BW-FCP-NEXT: vpermi2w %zmm3, %zmm2, %zmm4
; AVX512BW-FCP-NEXT: vpmovsxbw {{.*#+}} zmm5 = [0,16,32,48,0,0,0,0,1,17,33,49,0,0,0,0,2,18,34,50,0,0,0,0,3,19,35,51,0,0,0,0]
; AVX512BW-FCP-NEXT: vpermi2w %zmm1, %zmm0, %zmm5
; AVX512BW-FCP-NEXT: movb $-86, %cl
; AVX512BW-FCP-NEXT: kmovd %ecx, %k1
; AVX512BW-FCP-NEXT: vmovdqa64 %zmm4, %zmm5 {%k1}
; AVX512BW-FCP-NEXT: vpmovsxbw {{.*#+}} zmm4 = [0,0,0,0,4,20,36,52,0,0,0,0,5,21,37,53,0,0,0,0,6,22,38,54,0,0,0,0,7,23,39,55]
; AVX512BW-FCP-NEXT: vpermi2w %zmm3, %zmm2, %zmm4
; AVX512BW-FCP-NEXT: vpmovsxbw {{.*#+}} zmm6 = [4,20,36,52,0,0,0,0,5,21,37,53,0,0,0,0,6,22,38,54,0,0,0,0,7,23,39,55,0,0,0,0]
; AVX512BW-FCP-NEXT: vpermi2w %zmm1, %zmm0, %zmm6
; AVX512BW-FCP-NEXT: vmovdqa64 %zmm4, %zmm6 {%k1}
; AVX512BW-FCP-NEXT: vpmovsxbw {{.*#+}} zmm4 = [0,0,0,0,8,24,40,56,0,0,0,0,9,25,41,57,0,0,0,0,10,26,42,58,0,0,0,0,11,27,43,59]
; AVX512BW-FCP-NEXT: vpermi2w %zmm3, %zmm2, %zmm4
; AVX512BW-FCP-NEXT: vpmovsxbw {{.*#+}} zmm7 = [8,24,40,56,0,0,0,0,9,25,41,57,0,0,0,0,10,26,42,58,0,0,0,0,11,27,43,59,0,0,0,0]
; AVX512BW-FCP-NEXT: vpermi2w %zmm1, %zmm0, %zmm7
; AVX512BW-FCP-NEXT: vmovdqa64 %zmm4, %zmm7 {%k1}
; AVX512BW-FCP-NEXT: vpmovsxbw {{.*#+}} zmm4 = [0,0,0,0,12,28,44,60,0,0,0,0,13,29,45,61,0,0,0,0,14,30,46,62,0,0,0,0,15,31,47,63]
; AVX512BW-FCP-NEXT: vpermi2w %zmm3, %zmm2, %zmm4
; AVX512BW-FCP-NEXT: vpmovsxbw {{.*#+}} zmm2 = [12,28,44,60,0,0,0,0,13,29,45,61,0,0,0,0,14,30,46,62,0,0,0,0,15,31,47,63,0,0,0,0]
; AVX512BW-FCP-NEXT: vpermi2w %zmm1, %zmm0, %zmm2
; AVX512BW-FCP-NEXT: vmovdqa64 %zmm4, %zmm2 {%k1}
; AVX512BW-FCP-NEXT: vmovdqa64 %zmm2, 192(%rax)
; AVX512BW-FCP-NEXT: vmovdqa64 %zmm7, 128(%rax)
; AVX512BW-FCP-NEXT: vmovdqa64 %zmm6, 64(%rax)
; AVX512BW-FCP-NEXT: vmovdqa64 %zmm5, (%rax)
; AVX512BW-FCP-NEXT: vzeroupper
; AVX512BW-FCP-NEXT: retq
;
; AVX512DQ-BW-LABEL: store_i16_stride8_vf16:
; AVX512DQ-BW: # %bb.0:
; AVX512DQ-BW-NEXT: movq {{[0-9]+}}(%rsp), %rax
; AVX512DQ-BW-NEXT: movq {{[0-9]+}}(%rsp), %r10
; AVX512DQ-BW-NEXT: movq {{[0-9]+}}(%rsp), %r11
; AVX512DQ-BW-NEXT: vmovdqa (%rdi), %ymm0
; AVX512DQ-BW-NEXT: vmovdqa (%rdx), %ymm1
; AVX512DQ-BW-NEXT: vmovdqa (%r8), %ymm2
; AVX512DQ-BW-NEXT: vmovdqa (%r11), %ymm3
; AVX512DQ-BW-NEXT: vinserti64x4 $1, (%rsi), %zmm0, %zmm0
; AVX512DQ-BW-NEXT: vinserti64x4 $1, (%rcx), %zmm1, %zmm1
; AVX512DQ-BW-NEXT: vinserti64x4 $1, (%r9), %zmm2, %zmm2
; AVX512DQ-BW-NEXT: vinserti64x4 $1, (%r10), %zmm3, %zmm3
; AVX512DQ-BW-NEXT: vpmovsxbw {{.*#+}} zmm4 = [0,0,0,0,0,16,32,48,0,0,0,0,1,17,33,49,0,0,0,0,2,18,34,50,0,0,0,0,3,19,35,51]
; AVX512DQ-BW-NEXT: vpermi2w %zmm3, %zmm2, %zmm4
; AVX512DQ-BW-NEXT: vpmovsxbw {{.*#+}} zmm5 = [0,16,32,48,0,0,0,0,1,17,33,49,0,0,0,0,2,18,34,50,0,0,0,0,3,19,35,51,0,0,0,0]
; AVX512DQ-BW-NEXT: vpermi2w %zmm1, %zmm0, %zmm5
; AVX512DQ-BW-NEXT: movb $-86, %cl
; AVX512DQ-BW-NEXT: kmovd %ecx, %k1
; AVX512DQ-BW-NEXT: vmovdqa64 %zmm4, %zmm5 {%k1}
; AVX512DQ-BW-NEXT: vpmovsxbw {{.*#+}} zmm4 = [0,0,0,0,4,20,36,52,0,0,0,0,5,21,37,53,0,0,0,0,6,22,38,54,0,0,0,0,7,23,39,55]
; AVX512DQ-BW-NEXT: vpermi2w %zmm3, %zmm2, %zmm4
; AVX512DQ-BW-NEXT: vpmovsxbw {{.*#+}} zmm6 = [4,20,36,52,0,0,0,0,5,21,37,53,0,0,0,0,6,22,38,54,0,0,0,0,7,23,39,55,0,0,0,0]
; AVX512DQ-BW-NEXT: vpermi2w %zmm1, %zmm0, %zmm6
; AVX512DQ-BW-NEXT: vmovdqa64 %zmm4, %zmm6 {%k1}
; AVX512DQ-BW-NEXT: vpmovsxbw {{.*#+}} zmm4 = [0,0,0,0,8,24,40,56,0,0,0,0,9,25,41,57,0,0,0,0,10,26,42,58,0,0,0,0,11,27,43,59]
; AVX512DQ-BW-NEXT: vpermi2w %zmm3, %zmm2, %zmm4
; AVX512DQ-BW-NEXT: vpmovsxbw {{.*#+}} zmm7 = [8,24,40,56,0,0,0,0,9,25,41,57,0,0,0,0,10,26,42,58,0,0,0,0,11,27,43,59,0,0,0,0]
; AVX512DQ-BW-NEXT: vpermi2w %zmm1, %zmm0, %zmm7
; AVX512DQ-BW-NEXT: vmovdqa64 %zmm4, %zmm7 {%k1}
; AVX512DQ-BW-NEXT: vpmovsxbw {{.*#+}} zmm4 = [0,0,0,0,12,28,44,60,0,0,0,0,13,29,45,61,0,0,0,0,14,30,46,62,0,0,0,0,15,31,47,63]
; AVX512DQ-BW-NEXT: vpermi2w %zmm3, %zmm2, %zmm4
; AVX512DQ-BW-NEXT: vpmovsxbw {{.*#+}} zmm2 = [12,28,44,60,0,0,0,0,13,29,45,61,0,0,0,0,14,30,46,62,0,0,0,0,15,31,47,63,0,0,0,0]
; AVX512DQ-BW-NEXT: vpermi2w %zmm1, %zmm0, %zmm2
; AVX512DQ-BW-NEXT: vmovdqa64 %zmm4, %zmm2 {%k1}
; AVX512DQ-BW-NEXT: vmovdqa64 %zmm2, 192(%rax)
; AVX512DQ-BW-NEXT: vmovdqa64 %zmm7, 128(%rax)
; AVX512DQ-BW-NEXT: vmovdqa64 %zmm6, 64(%rax)
; AVX512DQ-BW-NEXT: vmovdqa64 %zmm5, (%rax)
; AVX512DQ-BW-NEXT: vzeroupper
; AVX512DQ-BW-NEXT: retq
;
; AVX512DQ-BW-FCP-LABEL: store_i16_stride8_vf16:
; AVX512DQ-BW-FCP: # %bb.0:
; AVX512DQ-BW-FCP-NEXT: movq {{[0-9]+}}(%rsp), %rax
; AVX512DQ-BW-FCP-NEXT: movq {{[0-9]+}}(%rsp), %r10
; AVX512DQ-BW-FCP-NEXT: movq {{[0-9]+}}(%rsp), %r11
; AVX512DQ-BW-FCP-NEXT: vmovdqa (%rdi), %ymm0
; AVX512DQ-BW-FCP-NEXT: vmovdqa (%rdx), %ymm1
; AVX512DQ-BW-FCP-NEXT: vmovdqa (%r8), %ymm2
; AVX512DQ-BW-FCP-NEXT: vmovdqa (%r11), %ymm3
; AVX512DQ-BW-FCP-NEXT: vinserti64x4 $1, (%rsi), %zmm0, %zmm0
; AVX512DQ-BW-FCP-NEXT: vinserti64x4 $1, (%rcx), %zmm1, %zmm1
; AVX512DQ-BW-FCP-NEXT: vinserti64x4 $1, (%r9), %zmm2, %zmm2
; AVX512DQ-BW-FCP-NEXT: vinserti64x4 $1, (%r10), %zmm3, %zmm3
; AVX512DQ-BW-FCP-NEXT: vpmovsxbw {{.*#+}} zmm4 = [0,0,0,0,0,16,32,48,0,0,0,0,1,17,33,49,0,0,0,0,2,18,34,50,0,0,0,0,3,19,35,51]
; AVX512DQ-BW-FCP-NEXT: vpermi2w %zmm3, %zmm2, %zmm4
; AVX512DQ-BW-FCP-NEXT: vpmovsxbw {{.*#+}} zmm5 = [0,16,32,48,0,0,0,0,1,17,33,49,0,0,0,0,2,18,34,50,0,0,0,0,3,19,35,51,0,0,0,0]
; AVX512DQ-BW-FCP-NEXT: vpermi2w %zmm1, %zmm0, %zmm5
; AVX512DQ-BW-FCP-NEXT: movb $-86, %cl
; AVX512DQ-BW-FCP-NEXT: kmovd %ecx, %k1
; AVX512DQ-BW-FCP-NEXT: vmovdqa64 %zmm4, %zmm5 {%k1}
; AVX512DQ-BW-FCP-NEXT: vpmovsxbw {{.*#+}} zmm4 = [0,0,0,0,4,20,36,52,0,0,0,0,5,21,37,53,0,0,0,0,6,22,38,54,0,0,0,0,7,23,39,55]
; AVX512DQ-BW-FCP-NEXT: vpermi2w %zmm3, %zmm2, %zmm4
; AVX512DQ-BW-FCP-NEXT: vpmovsxbw {{.*#+}} zmm6 = [4,20,36,52,0,0,0,0,5,21,37,53,0,0,0,0,6,22,38,54,0,0,0,0,7,23,39,55,0,0,0,0]
; AVX512DQ-BW-FCP-NEXT: vpermi2w %zmm1, %zmm0, %zmm6
; AVX512DQ-BW-FCP-NEXT: vmovdqa64 %zmm4, %zmm6 {%k1}
; AVX512DQ-BW-FCP-NEXT: vpmovsxbw {{.*#+}} zmm4 = [0,0,0,0,8,24,40,56,0,0,0,0,9,25,41,57,0,0,0,0,10,26,42,58,0,0,0,0,11,27,43,59]
; AVX512DQ-BW-FCP-NEXT: vpermi2w %zmm3, %zmm2, %zmm4
; AVX512DQ-BW-FCP-NEXT: vpmovsxbw {{.*#+}} zmm7 = [8,24,40,56,0,0,0,0,9,25,41,57,0,0,0,0,10,26,42,58,0,0,0,0,11,27,43,59,0,0,0,0]
; AVX512DQ-BW-FCP-NEXT: vpermi2w %zmm1, %zmm0, %zmm7
; AVX512DQ-BW-FCP-NEXT: vmovdqa64 %zmm4, %zmm7 {%k1}
; AVX512DQ-BW-FCP-NEXT: vpmovsxbw {{.*#+}} zmm4 = [0,0,0,0,12,28,44,60,0,0,0,0,13,29,45,61,0,0,0,0,14,30,46,62,0,0,0,0,15,31,47,63]
; AVX512DQ-BW-FCP-NEXT: vpermi2w %zmm3, %zmm2, %zmm4
; AVX512DQ-BW-FCP-NEXT: vpmovsxbw {{.*#+}} zmm2 = [12,28,44,60,0,0,0,0,13,29,45,61,0,0,0,0,14,30,46,62,0,0,0,0,15,31,47,63,0,0,0,0]
; AVX512DQ-BW-FCP-NEXT: vpermi2w %zmm1, %zmm0, %zmm2
; AVX512DQ-BW-FCP-NEXT: vmovdqa64 %zmm4, %zmm2 {%k1}
; AVX512DQ-BW-FCP-NEXT: vmovdqa64 %zmm2, 192(%rax)
; AVX512DQ-BW-FCP-NEXT: vmovdqa64 %zmm7, 128(%rax)
; AVX512DQ-BW-FCP-NEXT: vmovdqa64 %zmm6, 64(%rax)
; AVX512DQ-BW-FCP-NEXT: vmovdqa64 %zmm5, (%rax)
; AVX512DQ-BW-FCP-NEXT: vzeroupper
; AVX512DQ-BW-FCP-NEXT: retq
%in.vec0 = load <16 x i16>, ptr %in.vecptr0, align 64
%in.vec1 = load <16 x i16>, ptr %in.vecptr1, align 64
%in.vec2 = load <16 x i16>, ptr %in.vecptr2, align 64
%in.vec3 = load <16 x i16>, ptr %in.vecptr3, align 64
%in.vec4 = load <16 x i16>, ptr %in.vecptr4, align 64
%in.vec5 = load <16 x i16>, ptr %in.vecptr5, align 64
%in.vec6 = load <16 x i16>, ptr %in.vecptr6, align 64
%in.vec7 = load <16 x i16>, ptr %in.vecptr7, align 64
%1 = shufflevector <16 x i16> %in.vec0, <16 x i16> %in.vec1, <32 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27, i32 28, i32 29, i32 30, i32 31>
%2 = shufflevector <16 x i16> %in.vec2, <16 x i16> %in.vec3, <32 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27, i32 28, i32 29, i32 30, i32 31>
%3 = shufflevector <16 x i16> %in.vec4, <16 x i16> %in.vec5, <32 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27, i32 28, i32 29, i32 30, i32 31>
%4 = shufflevector <16 x i16> %in.vec6, <16 x i16> %in.vec7, <32 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27, i32 28, i32 29, i32 30, i32 31>
%5 = shufflevector <32 x i16> %1, <32 x i16> %2, <64 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27, i32 28, i32 29, i32 30, i32 31, i32 32, i32 33, i32 34, i32 35, i32 36, i32 37, i32 38, i32 39, i32 40, i32 41, i32 42, i32 43, i32 44, i32 45, i32 46, i32 47, i32 48, i32 49, i32 50, i32 51, i32 52, i32 53, i32 54, i32 55, i32 56, i32 57, i32 58, i32 59, i32 60, i32 61, i32 62, i32 63>
%6 = shufflevector <32 x i16> %3, <32 x i16> %4, <64 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27, i32 28, i32 29, i32 30, i32 31, i32 32, i32 33, i32 34, i32 35, i32 36, i32 37, i32 38, i32 39, i32 40, i32 41, i32 42, i32 43, i32 44, i32 45, i32 46, i32 47, i32 48, i32 49, i32 50, i32 51, i32 52, i32 53, i32 54, i32 55, i32 56, i32 57, i32 58, i32 59, i32 60, i32 61, i32 62, i32 63>
%7 = shufflevector <64 x i16> %5, <64 x i16> %6, <128 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27, i32 28, i32 29, i32 30, i32 31, i32 32, i32 33, i32 34, i32 35, i32 36, i32 37, i32 38, i32 39, i32 40, i32 41, i32 42, i32 43, i32 44, i32 45, i32 46, i32 47, i32 48, i32 49, i32 50, i32 51, i32 52, i32 53, i32 54, i32 55, i32 56, i32 57, i32 58, i32 59, i32 60, i32 61, i32 62, i32 63, i32 64, i32 65, i32 66, i32 67, i32 68, i32 69, i32 70, i32 71, i32 72, i32 73, i32 74, i32 75, i32 76, i32 77, i32 78, i32 79, i32 80, i32 81, i32 82, i32 83, i32 84, i32 85, i32 86, i32 87, i32 88, i32 89, i32 90, i32 91, i32 92, i32 93, i32 94, i32 95, i32 96, i32 97, i32 98, i32 99, i32 100, i32 101, i32 102, i32 103, i32 104, i32 105, i32 106, i32 107, i32 108, i32 109, i32 110, i32 111, i32 112, i32 113, i32 114, i32 115, i32 116, i32 117, i32 118, i32 119, i32 120, i32 121, i32 122, i32 123, i32 124, i32 125, i32 126, i32 127>
%interleaved.vec = shufflevector <128 x i16> %7, <128 x i16> poison, <128 x i32> <i32 0, i32 16, i32 32, i32 48, i32 64, i32 80, i32 96, i32 112, i32 1, i32 17, i32 33, i32 49, i32 65, i32 81, i32 97, i32 113, i32 2, i32 18, i32 34, i32 50, i32 66, i32 82, i32 98, i32 114, i32 3, i32 19, i32 35, i32 51, i32 67, i32 83, i32 99, i32 115, i32 4, i32 20, i32 36, i32 52, i32 68, i32 84, i32 100, i32 116, i32 5, i32 21, i32 37, i32 53, i32 69, i32 85, i32 101, i32 117, i32 6, i32 22, i32 38, i32 54, i32 70, i32 86, i32 102, i32 118, i32 7, i32 23, i32 39, i32 55, i32 71, i32 87, i32 103, i32 119, i32 8, i32 24, i32 40, i32 56, i32 72, i32 88, i32 104, i32 120, i32 9, i32 25, i32 41, i32 57, i32 73, i32 89, i32 105, i32 121, i32 10, i32 26, i32 42, i32 58, i32 74, i32 90, i32 106, i32 122, i32 11, i32 27, i32 43, i32 59, i32 75, i32 91, i32 107, i32 123, i32 12, i32 28, i32 44, i32 60, i32 76, i32 92, i32 108, i32 124, i32 13, i32 29, i32 45, i32 61, i32 77, i32 93, i32 109, i32 125, i32 14, i32 30, i32 46, i32 62, i32 78, i32 94, i32 110, i32 126, i32 15, i32 31, i32 47, i32 63, i32 79, i32 95, i32 111, i32 127>
store <128 x i16> %interleaved.vec, ptr %out.vec, align 64
ret void
}
define void @store_i16_stride8_vf32(ptr %in.vecptr0, ptr %in.vecptr1, ptr %in.vecptr2, ptr %in.vecptr3, ptr %in.vecptr4, ptr %in.vecptr5, ptr %in.vecptr6, ptr %in.vecptr7, ptr %out.vec) nounwind {
; SSE-LABEL: store_i16_stride8_vf32:
; SSE: # %bb.0:
; SSE-NEXT: subq $264, %rsp # imm = 0x108
; SSE-NEXT: movq {{[0-9]+}}(%rsp), %rax
; SSE-NEXT: movq {{[0-9]+}}(%rsp), %r10
; SSE-NEXT: movdqa (%rdi), %xmm3
; SSE-NEXT: movdqa (%rsi), %xmm8
; SSE-NEXT: movdqa (%rdx), %xmm4
; SSE-NEXT: movdqa (%rcx), %xmm10
; SSE-NEXT: movdqa (%r8), %xmm6
; SSE-NEXT: movdqa (%r9), %xmm9
; SSE-NEXT: movdqa (%r10), %xmm7
; SSE-NEXT: movdqa (%rax), %xmm11
; SSE-NEXT: movdqa %xmm4, %xmm1
; SSE-NEXT: punpcklwd {{.*#+}} xmm1 = xmm1[0],xmm10[0],xmm1[1],xmm10[1],xmm1[2],xmm10[2],xmm1[3],xmm10[3]
; SSE-NEXT: movdqa %xmm3, %xmm0
; SSE-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0],xmm8[0],xmm0[1],xmm8[1],xmm0[2],xmm8[2],xmm0[3],xmm8[3]
; SSE-NEXT: movdqa %xmm0, %xmm2
; SSE-NEXT: punpckldq {{.*#+}} xmm2 = xmm2[0],xmm1[0],xmm2[1],xmm1[1]
; SSE-NEXT: movdqa %xmm7, %xmm12
; SSE-NEXT: punpcklwd {{.*#+}} xmm12 = xmm12[0],xmm11[0],xmm12[1],xmm11[1],xmm12[2],xmm11[2],xmm12[3],xmm11[3]
; SSE-NEXT: pshufd {{.*#+}} xmm13 = xmm12[0,0,0,0]
; SSE-NEXT: movdqa %xmm6, %xmm5
; SSE-NEXT: punpcklwd {{.*#+}} xmm5 = xmm5[0],xmm9[0],xmm5[1],xmm9[1],xmm5[2],xmm9[2],xmm5[3],xmm9[3]
; SSE-NEXT: pshufd {{.*#+}} xmm14 = xmm5[0,0,0,0]
; SSE-NEXT: punpckhdq {{.*#+}} xmm14 = xmm14[2],xmm13[2],xmm14[3],xmm13[3]
; SSE-NEXT: movsd {{.*#+}} xmm14 = xmm2[0],xmm14[1]
; SSE-NEXT: movapd %xmm14, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
; SSE-NEXT: movdqa %xmm5, %xmm2
; SSE-NEXT: punpckldq {{.*#+}} xmm2 = xmm2[0],xmm12[0],xmm2[1],xmm12[1]
; SSE-NEXT: pshufd {{.*#+}} xmm13 = xmm1[1,1,1,1]
; SSE-NEXT: pshufd {{.*#+}} xmm14 = xmm0[1,1,1,1]
; SSE-NEXT: punpckldq {{.*#+}} xmm14 = xmm14[0],xmm13[0],xmm14[1],xmm13[1]
; SSE-NEXT: shufps {{.*#+}} xmm14 = xmm14[0,1],xmm2[2,3]
; SSE-NEXT: movaps %xmm14, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
; SSE-NEXT: pshufd {{.*#+}} xmm2 = xmm12[2,2,2,2]
; SSE-NEXT: pshufd {{.*#+}} xmm13 = xmm5[2,2,2,2]
; SSE-NEXT: punpckhdq {{.*#+}} xmm13 = xmm13[2],xmm2[2],xmm13[3],xmm2[3]
; SSE-NEXT: pshufd {{.*#+}} xmm14 = xmm0[3,3,3,3]
; SSE-NEXT: punpckhdq {{.*#+}} xmm0 = xmm0[2],xmm1[2],xmm0[3],xmm1[3]
; SSE-NEXT: movsd {{.*#+}} xmm13 = xmm0[0],xmm13[1]
; SSE-NEXT: movapd %xmm13, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
; SSE-NEXT: movdqa 16(%r8), %xmm0
; SSE-NEXT: punpckhdq {{.*#+}} xmm5 = xmm5[2],xmm12[2],xmm5[3],xmm12[3]
; SSE-NEXT: movdqa 16(%r9), %xmm2
; SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm1[3,3,3,3]
; SSE-NEXT: punpckldq {{.*#+}} xmm14 = xmm14[0],xmm1[0],xmm14[1],xmm1[1]
; SSE-NEXT: movdqa 16(%r10), %xmm1
; SSE-NEXT: shufps {{.*#+}} xmm14 = xmm14[0,1],xmm5[2,3]
; SSE-NEXT: movaps %xmm14, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
; SSE-NEXT: movdqa 16(%rax), %xmm5
; SSE-NEXT: punpckhwd {{.*#+}} xmm4 = xmm4[4],xmm10[4],xmm4[5],xmm10[5],xmm4[6],xmm10[6],xmm4[7],xmm10[7]
; SSE-NEXT: punpckhwd {{.*#+}} xmm3 = xmm3[4],xmm8[4],xmm3[5],xmm8[5],xmm3[6],xmm8[6],xmm3[7],xmm8[7]
; SSE-NEXT: movdqa %xmm3, %xmm8
; SSE-NEXT: punpckldq {{.*#+}} xmm8 = xmm8[0],xmm4[0],xmm8[1],xmm4[1]
; SSE-NEXT: punpckhwd {{.*#+}} xmm7 = xmm7[4],xmm11[4],xmm7[5],xmm11[5],xmm7[6],xmm11[6],xmm7[7],xmm11[7]
; SSE-NEXT: pshufd {{.*#+}} xmm10 = xmm7[0,0,0,0]
; SSE-NEXT: punpckhwd {{.*#+}} xmm6 = xmm6[4],xmm9[4],xmm6[5],xmm9[5],xmm6[6],xmm9[6],xmm6[7],xmm9[7]
; SSE-NEXT: pshufd {{.*#+}} xmm9 = xmm6[0,0,0,0]
; SSE-NEXT: punpckhdq {{.*#+}} xmm9 = xmm9[2],xmm10[2],xmm9[3],xmm10[3]
; SSE-NEXT: movsd {{.*#+}} xmm9 = xmm8[0],xmm9[1]
; SSE-NEXT: movapd %xmm9, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
; SSE-NEXT: movdqa %xmm6, %xmm8
; SSE-NEXT: punpckldq {{.*#+}} xmm8 = xmm8[0],xmm7[0],xmm8[1],xmm7[1]
; SSE-NEXT: pshufd {{.*#+}} xmm9 = xmm4[1,1,1,1]
; SSE-NEXT: pshufd {{.*#+}} xmm10 = xmm3[1,1,1,1]
; SSE-NEXT: punpckldq {{.*#+}} xmm10 = xmm10[0],xmm9[0],xmm10[1],xmm9[1]
; SSE-NEXT: shufps {{.*#+}} xmm10 = xmm10[0,1],xmm8[2,3]
; SSE-NEXT: movaps %xmm10, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
; SSE-NEXT: pshufd {{.*#+}} xmm8 = xmm7[2,2,2,2]
; SSE-NEXT: pshufd {{.*#+}} xmm9 = xmm6[2,2,2,2]
; SSE-NEXT: punpckhdq {{.*#+}} xmm9 = xmm9[2],xmm8[2],xmm9[3],xmm8[3]
; SSE-NEXT: pshufd {{.*#+}} xmm8 = xmm3[3,3,3,3]
; SSE-NEXT: punpckhdq {{.*#+}} xmm3 = xmm3[2],xmm4[2],xmm3[3],xmm4[3]
; SSE-NEXT: movsd {{.*#+}} xmm9 = xmm3[0],xmm9[1]
; SSE-NEXT: movapd %xmm9, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
; SSE-NEXT: punpckhdq {{.*#+}} xmm6 = xmm6[2],xmm7[2],xmm6[3],xmm7[3]
; SSE-NEXT: pshufd {{.*#+}} xmm3 = xmm4[3,3,3,3]
; SSE-NEXT: punpckldq {{.*#+}} xmm8 = xmm8[0],xmm3[0],xmm8[1],xmm3[1]
; SSE-NEXT: shufps {{.*#+}} xmm8 = xmm8[0,1],xmm6[2,3]
; SSE-NEXT: movaps %xmm8, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
; SSE-NEXT: movdqa %xmm1, %xmm7
; SSE-NEXT: punpcklwd {{.*#+}} xmm7 = xmm7[0],xmm5[0],xmm7[1],xmm5[1],xmm7[2],xmm5[2],xmm7[3],xmm5[3]
; SSE-NEXT: pshufd {{.*#+}} xmm3 = xmm7[0,0,0,0]
; SSE-NEXT: movdqa %xmm0, %xmm6
; SSE-NEXT: punpcklwd {{.*#+}} xmm6 = xmm6[0],xmm2[0],xmm6[1],xmm2[1],xmm6[2],xmm2[2],xmm6[3],xmm2[3]
; SSE-NEXT: pshufd {{.*#+}} xmm4 = xmm6[0,0,0,0]
; SSE-NEXT: punpckhdq {{.*#+}} xmm4 = xmm4[2],xmm3[2],xmm4[3],xmm3[3]
; SSE-NEXT: movdqa %xmm4, %xmm13
; SSE-NEXT: movdqa 16(%rdx), %xmm3
; SSE-NEXT: movdqa 16(%rcx), %xmm8
; SSE-NEXT: movdqa %xmm3, %xmm10
; SSE-NEXT: punpcklwd {{.*#+}} xmm10 = xmm10[0],xmm8[0],xmm10[1],xmm8[1],xmm10[2],xmm8[2],xmm10[3],xmm8[3]
; SSE-NEXT: movdqa 16(%rdi), %xmm4
; SSE-NEXT: movdqa 16(%rsi), %xmm9
; SSE-NEXT: movdqa %xmm4, %xmm11
; SSE-NEXT: punpcklwd {{.*#+}} xmm11 = xmm11[0],xmm9[0],xmm11[1],xmm9[1],xmm11[2],xmm9[2],xmm11[3],xmm9[3]
; SSE-NEXT: movdqa %xmm11, %xmm12
; SSE-NEXT: punpckldq {{.*#+}} xmm12 = xmm12[0],xmm10[0],xmm12[1],xmm10[1]
; SSE-NEXT: movsd {{.*#+}} xmm13 = xmm12[0],xmm13[1]
; SSE-NEXT: movapd %xmm13, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
; SSE-NEXT: pshufd {{.*#+}} xmm12 = xmm10[1,1,1,1]
; SSE-NEXT: pshufd {{.*#+}} xmm13 = xmm11[1,1,1,1]
; SSE-NEXT: punpckldq {{.*#+}} xmm13 = xmm13[0],xmm12[0],xmm13[1],xmm12[1]
; SSE-NEXT: movdqa %xmm6, %xmm12
; SSE-NEXT: punpckldq {{.*#+}} xmm12 = xmm12[0],xmm7[0],xmm12[1],xmm7[1]
; SSE-NEXT: shufps {{.*#+}} xmm13 = xmm13[0,1],xmm12[2,3]
; SSE-NEXT: movaps %xmm13, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
; SSE-NEXT: pshufd {{.*#+}} xmm12 = xmm7[2,2,2,2]
; SSE-NEXT: pshufd {{.*#+}} xmm13 = xmm6[2,2,2,2]
; SSE-NEXT: punpckhdq {{.*#+}} xmm13 = xmm13[2],xmm12[2],xmm13[3],xmm12[3]
; SSE-NEXT: pshufd {{.*#+}} xmm12 = xmm11[3,3,3,3]
; SSE-NEXT: punpckhdq {{.*#+}} xmm11 = xmm11[2],xmm10[2],xmm11[3],xmm10[3]
; SSE-NEXT: movsd {{.*#+}} xmm13 = xmm11[0],xmm13[1]
; SSE-NEXT: movapd %xmm13, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
; SSE-NEXT: punpckhdq {{.*#+}} xmm6 = xmm6[2],xmm7[2],xmm6[3],xmm7[3]
; SSE-NEXT: pshufd {{.*#+}} xmm7 = xmm10[3,3,3,3]
; SSE-NEXT: punpckldq {{.*#+}} xmm12 = xmm12[0],xmm7[0],xmm12[1],xmm7[1]
; SSE-NEXT: shufps {{.*#+}} xmm12 = xmm12[0,1],xmm6[2,3]
; SSE-NEXT: movaps %xmm12, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
; SSE-NEXT: punpckhwd {{.*#+}} xmm3 = xmm3[4],xmm8[4],xmm3[5],xmm8[5],xmm3[6],xmm8[6],xmm3[7],xmm8[7]
; SSE-NEXT: punpckhwd {{.*#+}} xmm4 = xmm4[4],xmm9[4],xmm4[5],xmm9[5],xmm4[6],xmm9[6],xmm4[7],xmm9[7]
; SSE-NEXT: punpckhwd {{.*#+}} xmm1 = xmm1[4],xmm5[4],xmm1[5],xmm5[5],xmm1[6],xmm5[6],xmm1[7],xmm5[7]
; SSE-NEXT: punpckhwd {{.*#+}} xmm0 = xmm0[4],xmm2[4],xmm0[5],xmm2[5],xmm0[6],xmm2[6],xmm0[7],xmm2[7]
; SSE-NEXT: pshufd {{.*#+}} xmm2 = xmm1[0,0,0,0]
; SSE-NEXT: pshufd {{.*#+}} xmm5 = xmm0[0,0,0,0]
; SSE-NEXT: punpckhdq {{.*#+}} xmm5 = xmm5[2],xmm2[2],xmm5[3],xmm2[3]
; SSE-NEXT: movdqa %xmm4, %xmm2
; SSE-NEXT: punpckldq {{.*#+}} xmm2 = xmm2[0],xmm3[0],xmm2[1],xmm3[1]
; SSE-NEXT: movsd {{.*#+}} xmm5 = xmm2[0],xmm5[1]
; SSE-NEXT: movapd %xmm5, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
; SSE-NEXT: pshufd {{.*#+}} xmm2 = xmm3[1,1,1,1]
; SSE-NEXT: pshufd {{.*#+}} xmm5 = xmm4[1,1,1,1]
; SSE-NEXT: punpckldq {{.*#+}} xmm5 = xmm5[0],xmm2[0],xmm5[1],xmm2[1]
; SSE-NEXT: movdqa %xmm0, %xmm2
; SSE-NEXT: punpckldq {{.*#+}} xmm2 = xmm2[0],xmm1[0],xmm2[1],xmm1[1]
; SSE-NEXT: shufps {{.*#+}} xmm5 = xmm5[0,1],xmm2[2,3]
; SSE-NEXT: movaps %xmm5, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
; SSE-NEXT: pshufd {{.*#+}} xmm2 = xmm1[2,2,2,2]
; SSE-NEXT: pshufd {{.*#+}} xmm5 = xmm0[2,2,2,2]
; SSE-NEXT: punpckhdq {{.*#+}} xmm5 = xmm5[2],xmm2[2],xmm5[3],xmm2[3]
; SSE-NEXT: pshufd {{.*#+}} xmm2 = xmm4[3,3,3,3]
; SSE-NEXT: punpckhdq {{.*#+}} xmm4 = xmm4[2],xmm3[2],xmm4[3],xmm3[3]
; SSE-NEXT: movsd {{.*#+}} xmm5 = xmm4[0],xmm5[1]
; SSE-NEXT: movapd %xmm5, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
; SSE-NEXT: punpckhdq {{.*#+}} xmm0 = xmm0[2],xmm1[2],xmm0[3],xmm1[3]
; SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm3[3,3,3,3]
; SSE-NEXT: punpckldq {{.*#+}} xmm2 = xmm2[0],xmm1[0],xmm2[1],xmm1[1]
; SSE-NEXT: shufps {{.*#+}} xmm2 = xmm2[0,1],xmm0[2,3]
; SSE-NEXT: movaps %xmm2, (%rsp) # 16-byte Spill
; SSE-NEXT: movdqa 32(%r10), %xmm0
; SSE-NEXT: movdqa 32(%rax), %xmm4
; SSE-NEXT: movdqa %xmm0, %xmm6
; SSE-NEXT: punpcklwd {{.*#+}} xmm6 = xmm6[0],xmm4[0],xmm6[1],xmm4[1],xmm6[2],xmm4[2],xmm6[3],xmm4[3]
; SSE-NEXT: movdqa 32(%r8), %xmm1
; SSE-NEXT: movdqa 32(%r9), %xmm5
; SSE-NEXT: movdqa %xmm1, %xmm7
; SSE-NEXT: punpcklwd {{.*#+}} xmm7 = xmm7[0],xmm5[0],xmm7[1],xmm5[1],xmm7[2],xmm5[2],xmm7[3],xmm5[3]
; SSE-NEXT: pshufd {{.*#+}} xmm2 = xmm6[0,0,0,0]
; SSE-NEXT: pshufd {{.*#+}} xmm3 = xmm7[0,0,0,0]
; SSE-NEXT: punpckhdq {{.*#+}} xmm3 = xmm3[2],xmm2[2],xmm3[3],xmm2[3]
; SSE-NEXT: movdqa %xmm3, %xmm13
; SSE-NEXT: movdqa 32(%rdx), %xmm2
; SSE-NEXT: movdqa 32(%rcx), %xmm8
; SSE-NEXT: movdqa %xmm2, %xmm10
; SSE-NEXT: punpcklwd {{.*#+}} xmm10 = xmm10[0],xmm8[0],xmm10[1],xmm8[1],xmm10[2],xmm8[2],xmm10[3],xmm8[3]
; SSE-NEXT: movdqa 32(%rdi), %xmm3
; SSE-NEXT: movdqa 32(%rsi), %xmm9
; SSE-NEXT: movdqa %xmm3, %xmm11
; SSE-NEXT: punpcklwd {{.*#+}} xmm11 = xmm11[0],xmm9[0],xmm11[1],xmm9[1],xmm11[2],xmm9[2],xmm11[3],xmm9[3]
; SSE-NEXT: movdqa %xmm11, %xmm12
; SSE-NEXT: punpckldq {{.*#+}} xmm12 = xmm12[0],xmm10[0],xmm12[1],xmm10[1]
; SSE-NEXT: movsd {{.*#+}} xmm13 = xmm12[0],xmm13[1]
; SSE-NEXT: movapd %xmm13, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
; SSE-NEXT: pshufd {{.*#+}} xmm12 = xmm10[1,1,1,1]
; SSE-NEXT: pshufd {{.*#+}} xmm13 = xmm11[1,1,1,1]
; SSE-NEXT: punpckldq {{.*#+}} xmm13 = xmm13[0],xmm12[0],xmm13[1],xmm12[1]
; SSE-NEXT: movdqa %xmm7, %xmm12
; SSE-NEXT: punpckldq {{.*#+}} xmm12 = xmm12[0],xmm6[0],xmm12[1],xmm6[1]
; SSE-NEXT: shufps {{.*#+}} xmm13 = xmm13[0,1],xmm12[2,3]
; SSE-NEXT: movaps %xmm13, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
; SSE-NEXT: pshufd {{.*#+}} xmm12 = xmm6[2,2,2,2]
; SSE-NEXT: pshufd {{.*#+}} xmm13 = xmm7[2,2,2,2]
; SSE-NEXT: punpckhdq {{.*#+}} xmm13 = xmm13[2],xmm12[2],xmm13[3],xmm12[3]
; SSE-NEXT: pshufd {{.*#+}} xmm12 = xmm11[3,3,3,3]
; SSE-NEXT: punpckhdq {{.*#+}} xmm11 = xmm11[2],xmm10[2],xmm11[3],xmm10[3]
; SSE-NEXT: movsd {{.*#+}} xmm13 = xmm11[0],xmm13[1]
; SSE-NEXT: movapd %xmm13, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
; SSE-NEXT: punpckhdq {{.*#+}} xmm7 = xmm7[2],xmm6[2],xmm7[3],xmm6[3]
; SSE-NEXT: pshufd {{.*#+}} xmm6 = xmm10[3,3,3,3]
; SSE-NEXT: punpckldq {{.*#+}} xmm12 = xmm12[0],xmm6[0],xmm12[1],xmm6[1]
; SSE-NEXT: shufps {{.*#+}} xmm12 = xmm12[0,1],xmm7[2,3]
; SSE-NEXT: movaps %xmm12, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
; SSE-NEXT: punpckhwd {{.*#+}} xmm2 = xmm2[4],xmm8[4],xmm2[5],xmm8[5],xmm2[6],xmm8[6],xmm2[7],xmm8[7]
; SSE-NEXT: punpckhwd {{.*#+}} xmm3 = xmm3[4],xmm9[4],xmm3[5],xmm9[5],xmm3[6],xmm9[6],xmm3[7],xmm9[7]
; SSE-NEXT: punpckhwd {{.*#+}} xmm0 = xmm0[4],xmm4[4],xmm0[5],xmm4[5],xmm0[6],xmm4[6],xmm0[7],xmm4[7]
; SSE-NEXT: punpckhwd {{.*#+}} xmm1 = xmm1[4],xmm5[4],xmm1[5],xmm5[5],xmm1[6],xmm5[6],xmm1[7],xmm5[7]
; SSE-NEXT: pshufd {{.*#+}} xmm4 = xmm0[0,0,0,0]
; SSE-NEXT: pshufd {{.*#+}} xmm5 = xmm1[0,0,0,0]
; SSE-NEXT: punpckhdq {{.*#+}} xmm5 = xmm5[2],xmm4[2],xmm5[3],xmm4[3]
; SSE-NEXT: movdqa %xmm3, %xmm4
; SSE-NEXT: punpckldq {{.*#+}} xmm4 = xmm4[0],xmm2[0],xmm4[1],xmm2[1]
; SSE-NEXT: movsd {{.*#+}} xmm5 = xmm4[0],xmm5[1]
; SSE-NEXT: movapd %xmm5, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
; SSE-NEXT: pshufd {{.*#+}} xmm4 = xmm2[1,1,1,1]
; SSE-NEXT: pshufd {{.*#+}} xmm5 = xmm3[1,1,1,1]
; SSE-NEXT: punpckldq {{.*#+}} xmm5 = xmm5[0],xmm4[0],xmm5[1],xmm4[1]
; SSE-NEXT: movdqa %xmm1, %xmm4
; SSE-NEXT: punpckldq {{.*#+}} xmm4 = xmm4[0],xmm0[0],xmm4[1],xmm0[1]
; SSE-NEXT: shufps {{.*#+}} xmm5 = xmm5[0,1],xmm4[2,3]
; SSE-NEXT: movaps %xmm5, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
; SSE-NEXT: pshufd {{.*#+}} xmm4 = xmm0[2,2,2,2]
; SSE-NEXT: pshufd {{.*#+}} xmm15 = xmm1[2,2,2,2]
; SSE-NEXT: punpckhdq {{.*#+}} xmm15 = xmm15[2],xmm4[2],xmm15[3],xmm4[3]
; SSE-NEXT: pshufd {{.*#+}} xmm14 = xmm3[3,3,3,3]
; SSE-NEXT: punpckhdq {{.*#+}} xmm3 = xmm3[2],xmm2[2],xmm3[3],xmm2[3]
; SSE-NEXT: movsd {{.*#+}} xmm15 = xmm3[0],xmm15[1]
; SSE-NEXT: punpckhdq {{.*#+}} xmm1 = xmm1[2],xmm0[2],xmm1[3],xmm0[3]
; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm2[3,3,3,3]
; SSE-NEXT: punpckldq {{.*#+}} xmm14 = xmm14[0],xmm0[0],xmm14[1],xmm0[1]
; SSE-NEXT: shufps {{.*#+}} xmm14 = xmm14[0,1],xmm1[2,3]
; SSE-NEXT: movdqa 48(%r10), %xmm9
; SSE-NEXT: movdqa 48(%rax), %xmm0
; SSE-NEXT: movdqa %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
; SSE-NEXT: movdqa %xmm9, %xmm5
; SSE-NEXT: punpcklwd {{.*#+}} xmm5 = xmm5[0],xmm0[0],xmm5[1],xmm0[1],xmm5[2],xmm0[2],xmm5[3],xmm0[3]
; SSE-NEXT: movdqa 48(%r8), %xmm4
; SSE-NEXT: movdqa 48(%r9), %xmm0
; SSE-NEXT: movdqa %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
; SSE-NEXT: movdqa %xmm4, %xmm1
; SSE-NEXT: punpcklwd {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1],xmm1[2],xmm0[2],xmm1[3],xmm0[3]
; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm5[0,0,0,0]
; SSE-NEXT: pshufd {{.*#+}} xmm11 = xmm1[0,0,0,0]
; SSE-NEXT: punpckhdq {{.*#+}} xmm11 = xmm11[2],xmm0[2],xmm11[3],xmm0[3]
; SSE-NEXT: movdqa 48(%rdx), %xmm6
; SSE-NEXT: movdqa 48(%rcx), %xmm13
; SSE-NEXT: movdqa %xmm6, %xmm3
; SSE-NEXT: punpcklwd {{.*#+}} xmm3 = xmm3[0],xmm13[0],xmm3[1],xmm13[1],xmm3[2],xmm13[2],xmm3[3],xmm13[3]
; SSE-NEXT: movdqa 48(%rdi), %xmm2
; SSE-NEXT: movdqa 48(%rsi), %xmm12
; SSE-NEXT: movdqa %xmm2, %xmm0
; SSE-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0],xmm12[0],xmm0[1],xmm12[1],xmm0[2],xmm12[2],xmm0[3],xmm12[3]
; SSE-NEXT: movdqa %xmm0, %xmm7
; SSE-NEXT: punpckldq {{.*#+}} xmm7 = xmm7[0],xmm3[0],xmm7[1],xmm3[1]
; SSE-NEXT: movsd {{.*#+}} xmm11 = xmm7[0],xmm11[1]
; SSE-NEXT: pshufd {{.*#+}} xmm7 = xmm3[1,1,1,1]
; SSE-NEXT: pshufd {{.*#+}} xmm10 = xmm0[1,1,1,1]
; SSE-NEXT: punpckldq {{.*#+}} xmm10 = xmm10[0],xmm7[0],xmm10[1],xmm7[1]
; SSE-NEXT: movdqa %xmm1, %xmm7
; SSE-NEXT: punpckldq {{.*#+}} xmm7 = xmm7[0],xmm5[0],xmm7[1],xmm5[1]
; SSE-NEXT: shufps {{.*#+}} xmm10 = xmm10[0,1],xmm7[2,3]
; SSE-NEXT: pshufd {{.*#+}} xmm7 = xmm5[2,2,2,2]
; SSE-NEXT: pshufd {{.*#+}} xmm8 = xmm1[2,2,2,2]
; SSE-NEXT: punpckhdq {{.*#+}} xmm8 = xmm8[2],xmm7[2],xmm8[3],xmm7[3]
; SSE-NEXT: pshufd {{.*#+}} xmm7 = xmm0[3,3,3,3]
; SSE-NEXT: punpckhdq {{.*#+}} xmm0 = xmm0[2],xmm3[2],xmm0[3],xmm3[3]
; SSE-NEXT: movsd {{.*#+}} xmm8 = xmm0[0],xmm8[1]
; SSE-NEXT: punpckhdq {{.*#+}} xmm1 = xmm1[2],xmm5[2],xmm1[3],xmm5[3]
; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm3[3,3,3,3]
; SSE-NEXT: punpckldq {{.*#+}} xmm7 = xmm7[0],xmm0[0],xmm7[1],xmm0[1]
; SSE-NEXT: shufps {{.*#+}} xmm7 = xmm7[0,1],xmm1[2,3]
; SSE-NEXT: punpckhwd {{.*#+}} xmm6 = xmm6[4],xmm13[4],xmm6[5],xmm13[5],xmm6[6],xmm13[6],xmm6[7],xmm13[7]
; SSE-NEXT: punpckhwd {{.*#+}} xmm2 = xmm2[4],xmm12[4],xmm2[5],xmm12[5],xmm2[6],xmm12[6],xmm2[7],xmm12[7]
; SSE-NEXT: punpckhwd {{[-0-9]+}}(%r{{[sb]}}p), %xmm9 # 16-byte Folded Reload
; SSE-NEXT: # xmm9 = xmm9[4],mem[4],xmm9[5],mem[5],xmm9[6],mem[6],xmm9[7],mem[7]
; SSE-NEXT: punpckhwd {{[-0-9]+}}(%r{{[sb]}}p), %xmm4 # 16-byte Folded Reload
; SSE-NEXT: # xmm4 = xmm4[4],mem[4],xmm4[5],mem[5],xmm4[6],mem[6],xmm4[7],mem[7]
; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm9[0,0,0,0]
; SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm4[0,0,0,0]
; SSE-NEXT: punpckhdq {{.*#+}} xmm1 = xmm1[2],xmm0[2],xmm1[3],xmm0[3]
; SSE-NEXT: movdqa %xmm2, %xmm0
; SSE-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm6[0],xmm0[1],xmm6[1]
; SSE-NEXT: movsd {{.*#+}} xmm1 = xmm0[0],xmm1[1]
; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm6[1,1,1,1]
; SSE-NEXT: pshufd {{.*#+}} xmm3 = xmm2[1,1,1,1]
; SSE-NEXT: punpckldq {{.*#+}} xmm3 = xmm3[0],xmm0[0],xmm3[1],xmm0[1]
; SSE-NEXT: movdqa %xmm4, %xmm0
; SSE-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm9[0],xmm0[1],xmm9[1]
; SSE-NEXT: shufps {{.*#+}} xmm3 = xmm3[0,1],xmm0[2,3]
; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm9[2,2,2,2]
; SSE-NEXT: pshufd {{.*#+}} xmm5 = xmm4[2,2,2,2]
; SSE-NEXT: punpckhdq {{.*#+}} xmm5 = xmm5[2],xmm0[2],xmm5[3],xmm0[3]
; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm2[3,3,3,3]
; SSE-NEXT: punpckhdq {{.*#+}} xmm2 = xmm2[2],xmm6[2],xmm2[3],xmm6[3]
; SSE-NEXT: movsd {{.*#+}} xmm5 = xmm2[0],xmm5[1]
; SSE-NEXT: punpckhdq {{.*#+}} xmm4 = xmm4[2],xmm9[2],xmm4[3],xmm9[3]
; SSE-NEXT: pshufd {{.*#+}} xmm2 = xmm6[3,3,3,3]
; SSE-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1]
; SSE-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,1],xmm4[2,3]
; SSE-NEXT: movq {{[0-9]+}}(%rsp), %rax
; SSE-NEXT: movaps %xmm0, 496(%rax)
; SSE-NEXT: movapd %xmm5, 480(%rax)
; SSE-NEXT: movaps %xmm3, 464(%rax)
; SSE-NEXT: movapd %xmm1, 448(%rax)
; SSE-NEXT: movaps %xmm7, 432(%rax)
; SSE-NEXT: movapd %xmm8, 416(%rax)
; SSE-NEXT: movaps %xmm10, 400(%rax)
; SSE-NEXT: movapd %xmm11, 384(%rax)
; SSE-NEXT: movaps %xmm14, 368(%rax)
; SSE-NEXT: movapd %xmm15, 352(%rax)
; SSE-NEXT: movaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Reload
; SSE-NEXT: movaps %xmm0, 336(%rax)
; SSE-NEXT: movaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Reload
; SSE-NEXT: movaps %xmm0, 320(%rax)
; SSE-NEXT: movaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Reload
; SSE-NEXT: movaps %xmm0, 304(%rax)
; SSE-NEXT: movaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Reload
; SSE-NEXT: movaps %xmm0, 288(%rax)
; SSE-NEXT: movaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Reload
; SSE-NEXT: movaps %xmm0, 272(%rax)
; SSE-NEXT: movaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Reload
; SSE-NEXT: movaps %xmm0, 256(%rax)
; SSE-NEXT: movaps (%rsp), %xmm0 # 16-byte Reload
; SSE-NEXT: movaps %xmm0, 240(%rax)
; SSE-NEXT: movaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Reload
; SSE-NEXT: movaps %xmm0, 224(%rax)
; SSE-NEXT: movaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Reload
; SSE-NEXT: movaps %xmm0, 208(%rax)
; SSE-NEXT: movaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Reload
; SSE-NEXT: movaps %xmm0, 192(%rax)
; SSE-NEXT: movaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Reload
; SSE-NEXT: movaps %xmm0, 176(%rax)
; SSE-NEXT: movaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Reload
; SSE-NEXT: movaps %xmm0, 160(%rax)
; SSE-NEXT: movaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Reload
; SSE-NEXT: movaps %xmm0, 144(%rax)
; SSE-NEXT: movaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Reload
; SSE-NEXT: movaps %xmm0, 128(%rax)
; SSE-NEXT: movaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Reload
; SSE-NEXT: movaps %xmm0, 112(%rax)
; SSE-NEXT: movaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Reload
; SSE-NEXT: movaps %xmm0, 96(%rax)
; SSE-NEXT: movaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Reload
; SSE-NEXT: movaps %xmm0, 80(%rax)
; SSE-NEXT: movaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Reload
; SSE-NEXT: movaps %xmm0, 64(%rax)
; SSE-NEXT: movaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Reload
; SSE-NEXT: movaps %xmm0, 48(%rax)
; SSE-NEXT: movaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Reload
; SSE-NEXT: movaps %xmm0, 32(%rax)
; SSE-NEXT: movaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Reload
; SSE-NEXT: movaps %xmm0, 16(%rax)
; SSE-NEXT: movaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Reload
; SSE-NEXT: movaps %xmm0, (%rax)
; SSE-NEXT: addq $264, %rsp # imm = 0x108
; SSE-NEXT: retq
;
; AVX-LABEL: store_i16_stride8_vf32:
; AVX: # %bb.0:
; AVX-NEXT: subq $296, %rsp # imm = 0x128
; AVX-NEXT: movq {{[0-9]+}}(%rsp), %rax
; AVX-NEXT: movq {{[0-9]+}}(%rsp), %r10
; AVX-NEXT: vmovdqa (%r9), %xmm0
; AVX-NEXT: vmovdqa %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
; AVX-NEXT: vmovdqa (%r8), %xmm1
; AVX-NEXT: vmovdqa %xmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
; AVX-NEXT: vpunpcklwd {{.*#+}} xmm2 = xmm1[0],xmm0[0],xmm1[1],xmm0[1],xmm1[2],xmm0[2],xmm1[3],xmm0[3]
; AVX-NEXT: vpshufd {{.*#+}} xmm0 = xmm2[2,2,3,3]
; AVX-NEXT: vinsertf128 $1, %xmm0, %ymm2, %ymm0
; AVX-NEXT: vmovdqa (%r10), %xmm1
; AVX-NEXT: vmovdqa %xmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
; AVX-NEXT: vmovdqa (%rax), %xmm3
; AVX-NEXT: vmovdqa %xmm3, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
; AVX-NEXT: vpunpcklwd {{.*#+}} xmm3 = xmm3[0],xmm1[0],xmm3[1],xmm1[1],xmm3[2],xmm1[2],xmm3[3],xmm1[3]
; AVX-NEXT: vpshufd {{.*#+}} xmm1 = xmm3[2,2,2,2]
; AVX-NEXT: vinsertf128 $1, %xmm3, %ymm1, %ymm1
; AVX-NEXT: vblendps {{.*#+}} ymm5 = ymm0[0,1,2],ymm1[3],ymm0[4,5,6],ymm1[7]
; AVX-NEXT: vmovdqa (%rcx), %xmm0
; AVX-NEXT: vmovdqa %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
; AVX-NEXT: vmovdqa (%rdx), %xmm1
; AVX-NEXT: vmovdqa %xmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
; AVX-NEXT: vpunpcklwd {{.*#+}} xmm4 = xmm1[0],xmm0[0],xmm1[1],xmm0[1],xmm1[2],xmm0[2],xmm1[3],xmm0[3]
; AVX-NEXT: vpshufd {{.*#+}} xmm0 = xmm4[2,2,3,3]
; AVX-NEXT: vpshufd {{.*#+}} xmm1 = xmm4[2,3,2,3]
; AVX-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm1
; AVX-NEXT: vmovdqa (%rsi), %xmm0
; AVX-NEXT: vmovdqa %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
; AVX-NEXT: vmovdqa (%rdi), %xmm6
; AVX-NEXT: vmovdqa %xmm6, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
; AVX-NEXT: vpunpcklwd {{.*#+}} xmm6 = xmm6[0],xmm0[0],xmm6[1],xmm0[1],xmm6[2],xmm0[2],xmm6[3],xmm0[3]
; AVX-NEXT: vpshufd {{.*#+}} xmm0 = xmm6[2,3,2,3]
; AVX-NEXT: vpshufd {{.*#+}} xmm7 = xmm6[3,3,3,3]
; AVX-NEXT: vinsertf128 $1, %xmm7, %ymm0, %ymm7
; AVX-NEXT: vmovdqa 48(%r9), %xmm0
; AVX-NEXT: vblendps {{.*#+}} ymm7 = ymm7[0],ymm1[1],ymm7[2,3,4],ymm1[5],ymm7[6,7]
; AVX-NEXT: vmovdqa 48(%r10), %xmm1
; AVX-NEXT: vblendps {{.*#+}} ymm5 = ymm7[0,1],ymm5[2,3],ymm7[4,5],ymm5[6,7]
; AVX-NEXT: vmovups %ymm5, {{[-0-9]+}}(%r{{[sb]}}p) # 32-byte Spill
; AVX-NEXT: vpshufd {{.*#+}} xmm5 = xmm3[0,0,0,0]
; AVX-NEXT: vpshufd {{.*#+}} xmm3 = xmm3[0,1,0,1]
; AVX-NEXT: vinsertf128 $1, %xmm3, %ymm5, %ymm3
; AVX-NEXT: vpshufd {{.*#+}} xmm5 = xmm2[0,1,0,1]
; AVX-NEXT: vpmovzxdq {{.*#+}} xmm2 = xmm2[0],zero,xmm2[1],zero
; AVX-NEXT: vinsertf128 $1, %xmm2, %ymm5, %ymm5
; AVX-NEXT: vmovdqa 48(%rax), %xmm2
; AVX-NEXT: vblendps {{.*#+}} ymm3 = ymm5[0,1,2],ymm3[3],ymm5[4,5,6],ymm3[7]
; AVX-NEXT: vpshufd {{.*#+}} xmm5 = xmm6[1,1,1,1]
; AVX-NEXT: vinsertf128 $1, %xmm5, %ymm6, %ymm5
; AVX-NEXT: vpshufd {{.*#+}} xmm6 = xmm4[0,0,1,1]
; AVX-NEXT: vinsertf128 $1, %xmm4, %ymm6, %ymm4
; AVX-NEXT: vblendps {{.*#+}} ymm4 = ymm5[0],ymm4[1],ymm5[2,3,4],ymm4[5],ymm5[6,7]
; AVX-NEXT: vblendps {{.*#+}} ymm3 = ymm4[0,1],ymm3[2,3],ymm4[4,5],ymm3[6,7]
; AVX-NEXT: vmovups %ymm3, {{[-0-9]+}}(%r{{[sb]}}p) # 32-byte Spill
; AVX-NEXT: vpunpckhwd {{.*#+}} xmm8 = xmm2[4],xmm1[4],xmm2[5],xmm1[5],xmm2[6],xmm1[6],xmm2[7],xmm1[7]
; AVX-NEXT: vpshufd {{.*#+}} xmm3 = xmm8[0,0,0,0]
; AVX-NEXT: vpshufd {{.*#+}} xmm4 = xmm8[0,1,0,1]
; AVX-NEXT: vinsertf128 $1, %xmm4, %ymm3, %ymm4
; AVX-NEXT: vmovdqa 48(%r8), %xmm3
; AVX-NEXT: vpunpckhwd {{.*#+}} xmm9 = xmm3[4],xmm0[4],xmm3[5],xmm0[5],xmm3[6],xmm0[6],xmm3[7],xmm0[7]
; AVX-NEXT: vpshufd {{.*#+}} xmm5 = xmm9[0,1,0,1]
; AVX-NEXT: vpmovzxdq {{.*#+}} xmm6 = xmm9[0],zero,xmm9[1],zero
; AVX-NEXT: vinsertf128 $1, %xmm6, %ymm5, %ymm5
; AVX-NEXT: vblendps {{.*#+}} ymm10 = ymm5[0,1,2],ymm4[3],ymm5[4,5,6],ymm4[7]
; AVX-NEXT: vmovdqa 48(%rsi), %xmm4
; AVX-NEXT: vmovdqa 48(%rdi), %xmm5
; AVX-NEXT: vpunpckhwd {{.*#+}} xmm11 = xmm5[4],xmm4[4],xmm5[5],xmm4[5],xmm5[6],xmm4[6],xmm5[7],xmm4[7]
; AVX-NEXT: vpshufd {{.*#+}} xmm6 = xmm11[1,1,1,1]
; AVX-NEXT: vinsertf128 $1, %xmm6, %ymm11, %ymm14
; AVX-NEXT: vmovdqa 48(%rcx), %xmm6
; AVX-NEXT: vmovdqa 48(%rdx), %xmm7
; AVX-NEXT: vpunpckhwd {{.*#+}} xmm15 = xmm7[4],xmm6[4],xmm7[5],xmm6[5],xmm7[6],xmm6[6],xmm7[7],xmm6[7]
; AVX-NEXT: vpshufd {{.*#+}} xmm13 = xmm15[0,0,1,1]
; AVX-NEXT: vinsertf128 $1, %xmm15, %ymm13, %ymm13
; AVX-NEXT: vblendps {{.*#+}} ymm13 = ymm14[0],ymm13[1],ymm14[2,3,4],ymm13[5],ymm14[6,7]
; AVX-NEXT: vblendps {{.*#+}} ymm10 = ymm13[0,1],ymm10[2,3],ymm13[4,5],ymm10[6,7]
; AVX-NEXT: vmovups %ymm10, {{[-0-9]+}}(%r{{[sb]}}p) # 32-byte Spill
; AVX-NEXT: vpshufd {{.*#+}} xmm10 = xmm9[2,2,3,3]
; AVX-NEXT: vinsertf128 $1, %xmm10, %ymm9, %ymm9
; AVX-NEXT: vpshufd {{.*#+}} xmm10 = xmm8[2,2,2,2]
; AVX-NEXT: vinsertf128 $1, %xmm8, %ymm10, %ymm8
; AVX-NEXT: vblendps {{.*#+}} ymm8 = ymm9[0,1,2],ymm8[3],ymm9[4,5,6],ymm8[7]
; AVX-NEXT: vpshufd {{.*#+}} xmm9 = xmm15[2,2,3,3]
; AVX-NEXT: vpshufd {{.*#+}} xmm10 = xmm15[2,3,2,3]
; AVX-NEXT: vinsertf128 $1, %xmm10, %ymm9, %ymm9
; AVX-NEXT: vpshufd {{.*#+}} xmm10 = xmm11[2,3,2,3]
; AVX-NEXT: vpshufd {{.*#+}} xmm11 = xmm11[3,3,3,3]
; AVX-NEXT: vinsertf128 $1, %xmm11, %ymm10, %ymm10
; AVX-NEXT: vblendps {{.*#+}} ymm9 = ymm10[0],ymm9[1],ymm10[2,3,4],ymm9[5],ymm10[6,7]
; AVX-NEXT: vblendps {{.*#+}} ymm8 = ymm9[0,1],ymm8[2,3],ymm9[4,5],ymm8[6,7]
; AVX-NEXT: vmovups %ymm8, {{[-0-9]+}}(%r{{[sb]}}p) # 32-byte Spill
; AVX-NEXT: vpunpcklwd {{.*#+}} xmm1 = xmm2[0],xmm1[0],xmm2[1],xmm1[1],xmm2[2],xmm1[2],xmm2[3],xmm1[3]
; AVX-NEXT: vpshufd {{.*#+}} xmm2 = xmm1[0,0,0,0]
; AVX-NEXT: vpshufd {{.*#+}} xmm8 = xmm1[0,1,0,1]
; AVX-NEXT: vinsertf128 $1, %xmm8, %ymm2, %ymm2
; AVX-NEXT: vpunpcklwd {{.*#+}} xmm0 = xmm3[0],xmm0[0],xmm3[1],xmm0[1],xmm3[2],xmm0[2],xmm3[3],xmm0[3]
; AVX-NEXT: vpshufd {{.*#+}} xmm3 = xmm0[0,1,0,1]
; AVX-NEXT: vpmovzxdq {{.*#+}} xmm8 = xmm0[0],zero,xmm0[1],zero
; AVX-NEXT: vinsertf128 $1, %xmm8, %ymm3, %ymm3
; AVX-NEXT: vblendps {{.*#+}} ymm2 = ymm3[0,1,2],ymm2[3],ymm3[4,5,6],ymm2[7]
; AVX-NEXT: vpunpcklwd {{.*#+}} xmm3 = xmm5[0],xmm4[0],xmm5[1],xmm4[1],xmm5[2],xmm4[2],xmm5[3],xmm4[3]
; AVX-NEXT: vpunpcklwd {{.*#+}} xmm4 = xmm7[0],xmm6[0],xmm7[1],xmm6[1],xmm7[2],xmm6[2],xmm7[3],xmm6[3]
; AVX-NEXT: vpshufd {{.*#+}} xmm5 = xmm3[1,1,1,1]
; AVX-NEXT: vinsertf128 $1, %xmm5, %ymm3, %ymm5
; AVX-NEXT: vpshufd {{.*#+}} xmm6 = xmm4[0,0,1,1]
; AVX-NEXT: vinsertf128 $1, %xmm4, %ymm6, %ymm6
; AVX-NEXT: vblendps {{.*#+}} ymm5 = ymm5[0],ymm6[1],ymm5[2,3,4],ymm6[5],ymm5[6,7]
; AVX-NEXT: vblendps {{.*#+}} ymm2 = ymm5[0,1],ymm2[2,3],ymm5[4,5],ymm2[6,7]
; AVX-NEXT: vmovups %ymm2, {{[-0-9]+}}(%r{{[sb]}}p) # 32-byte Spill
; AVX-NEXT: vpshufd {{.*#+}} xmm2 = xmm0[2,2,3,3]
; AVX-NEXT: vinsertf128 $1, %xmm2, %ymm0, %ymm0
; AVX-NEXT: vpshufd {{.*#+}} xmm2 = xmm1[2,2,2,2]
; AVX-NEXT: vinsertf128 $1, %xmm1, %ymm2, %ymm1
; AVX-NEXT: vblendps {{.*#+}} ymm1 = ymm0[0,1,2],ymm1[3],ymm0[4,5,6],ymm1[7]
; AVX-NEXT: vpshufd {{.*#+}} xmm0 = xmm4[2,2,3,3]
; AVX-NEXT: vpshufd {{.*#+}} xmm2 = xmm4[2,3,2,3]
; AVX-NEXT: vinsertf128 $1, %xmm2, %ymm0, %ymm0
; AVX-NEXT: vpshufd {{.*#+}} xmm2 = xmm3[2,3,2,3]
; AVX-NEXT: vpshufd {{.*#+}} xmm3 = xmm3[3,3,3,3]
; AVX-NEXT: vinsertf128 $1, %xmm3, %ymm2, %ymm2
; AVX-NEXT: vblendps {{.*#+}} ymm2 = ymm2[0],ymm0[1],ymm2[2,3,4],ymm0[5],ymm2[6,7]
; AVX-NEXT: vmovdqa 32(%r10), %xmm0
; AVX-NEXT: vblendps {{.*#+}} ymm1 = ymm2[0,1],ymm1[2,3],ymm2[4,5],ymm1[6,7]
; AVX-NEXT: vmovups %ymm1, {{[-0-9]+}}(%r{{[sb]}}p) # 32-byte Spill
; AVX-NEXT: vmovdqa 32(%rax), %xmm1
; AVX-NEXT: vpunpckhwd {{.*#+}} xmm8 = xmm1[4],xmm0[4],xmm1[5],xmm0[5],xmm1[6],xmm0[6],xmm1[7],xmm0[7]
; AVX-NEXT: vpshufd {{.*#+}} xmm2 = xmm8[0,0,0,0]
; AVX-NEXT: vpshufd {{.*#+}} xmm3 = xmm8[0,1,0,1]
; AVX-NEXT: vinsertf128 $1, %xmm3, %ymm2, %ymm4
; AVX-NEXT: vmovdqa 32(%r9), %xmm2
; AVX-NEXT: vmovdqa 32(%r8), %xmm3
; AVX-NEXT: vpunpckhwd {{.*#+}} xmm9 = xmm3[4],xmm2[4],xmm3[5],xmm2[5],xmm3[6],xmm2[6],xmm3[7],xmm2[7]
; AVX-NEXT: vpshufd {{.*#+}} xmm5 = xmm9[0,1,0,1]
; AVX-NEXT: vpmovzxdq {{.*#+}} xmm6 = xmm9[0],zero,xmm9[1],zero
; AVX-NEXT: vinsertf128 $1, %xmm6, %ymm5, %ymm5
; AVX-NEXT: vblendps {{.*#+}} ymm10 = ymm5[0,1,2],ymm4[3],ymm5[4,5,6],ymm4[7]
; AVX-NEXT: vmovdqa 32(%rsi), %xmm4
; AVX-NEXT: vmovdqa 32(%rdi), %xmm5
; AVX-NEXT: vpunpckhwd {{.*#+}} xmm11 = xmm5[4],xmm4[4],xmm5[5],xmm4[5],xmm5[6],xmm4[6],xmm5[7],xmm4[7]
; AVX-NEXT: vpshufd {{.*#+}} xmm6 = xmm11[1,1,1,1]
; AVX-NEXT: vinsertf128 $1, %xmm6, %ymm11, %ymm13
; AVX-NEXT: vmovdqa 32(%rcx), %xmm6
; AVX-NEXT: vmovdqa 32(%rdx), %xmm7
; AVX-NEXT: vpunpckhwd {{.*#+}} xmm15 = xmm7[4],xmm6[4],xmm7[5],xmm6[5],xmm7[6],xmm6[6],xmm7[7],xmm6[7]
; AVX-NEXT: vpshufd {{.*#+}} xmm14 = xmm15[0,0,1,1]
; AVX-NEXT: vinsertf128 $1, %xmm15, %ymm14, %ymm14
; AVX-NEXT: vblendps {{.*#+}} ymm13 = ymm13[0],ymm14[1],ymm13[2,3,4],ymm14[5],ymm13[6,7]
; AVX-NEXT: vblendps {{.*#+}} ymm10 = ymm13[0,1],ymm10[2,3],ymm13[4,5],ymm10[6,7]
; AVX-NEXT: vmovups %ymm10, {{[-0-9]+}}(%r{{[sb]}}p) # 32-byte Spill
; AVX-NEXT: vpshufd {{.*#+}} xmm10 = xmm9[2,2,3,3]
; AVX-NEXT: vinsertf128 $1, %xmm10, %ymm9, %ymm9
; AVX-NEXT: vpshufd {{.*#+}} xmm10 = xmm8[2,2,2,2]
; AVX-NEXT: vinsertf128 $1, %xmm8, %ymm10, %ymm8
; AVX-NEXT: vblendps {{.*#+}} ymm8 = ymm9[0,1,2],ymm8[3],ymm9[4,5,6],ymm8[7]
; AVX-NEXT: vpshufd {{.*#+}} xmm9 = xmm15[2,2,3,3]
; AVX-NEXT: vpshufd {{.*#+}} xmm10 = xmm15[2,3,2,3]
; AVX-NEXT: vinsertf128 $1, %xmm10, %ymm9, %ymm9
; AVX-NEXT: vpshufd {{.*#+}} xmm10 = xmm11[2,3,2,3]
; AVX-NEXT: vpshufd {{.*#+}} xmm11 = xmm11[3,3,3,3]
; AVX-NEXT: vinsertf128 $1, %xmm11, %ymm10, %ymm10
; AVX-NEXT: vblendps {{.*#+}} ymm9 = ymm10[0],ymm9[1],ymm10[2,3,4],ymm9[5],ymm10[6,7]
; AVX-NEXT: vblendps {{.*#+}} ymm8 = ymm9[0,1],ymm8[2,3],ymm9[4,5],ymm8[6,7]
; AVX-NEXT: vmovups %ymm8, {{[-0-9]+}}(%r{{[sb]}}p) # 32-byte Spill
; AVX-NEXT: vpunpcklwd {{.*#+}} xmm0 = xmm1[0],xmm0[0],xmm1[1],xmm0[1],xmm1[2],xmm0[2],xmm1[3],xmm0[3]
; AVX-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[0,0,0,0]
; AVX-NEXT: vpshufd {{.*#+}} xmm8 = xmm0[0,1,0,1]
; AVX-NEXT: vinsertf128 $1, %xmm8, %ymm1, %ymm1
; AVX-NEXT: vpunpcklwd {{.*#+}} xmm2 = xmm3[0],xmm2[0],xmm3[1],xmm2[1],xmm3[2],xmm2[2],xmm3[3],xmm2[3]
; AVX-NEXT: vpshufd {{.*#+}} xmm3 = xmm2[0,1,0,1]
; AVX-NEXT: vpmovzxdq {{.*#+}} xmm8 = xmm2[0],zero,xmm2[1],zero
; AVX-NEXT: vinsertf128 $1, %xmm8, %ymm3, %ymm3
; AVX-NEXT: vblendps {{.*#+}} ymm1 = ymm3[0,1,2],ymm1[3],ymm3[4,5,6],ymm1[7]
; AVX-NEXT: vpunpcklwd {{.*#+}} xmm3 = xmm5[0],xmm4[0],xmm5[1],xmm4[1],xmm5[2],xmm4[2],xmm5[3],xmm4[3]
; AVX-NEXT: vpunpcklwd {{.*#+}} xmm4 = xmm7[0],xmm6[0],xmm7[1],xmm6[1],xmm7[2],xmm6[2],xmm7[3],xmm6[3]
; AVX-NEXT: vpshufd {{.*#+}} xmm5 = xmm3[1,1,1,1]
; AVX-NEXT: vinsertf128 $1, %xmm5, %ymm3, %ymm5
; AVX-NEXT: vpshufd {{.*#+}} xmm6 = xmm4[0,0,1,1]
; AVX-NEXT: vinsertf128 $1, %xmm4, %ymm6, %ymm6
; AVX-NEXT: vblendps {{.*#+}} ymm5 = ymm5[0],ymm6[1],ymm5[2,3,4],ymm6[5],ymm5[6,7]
; AVX-NEXT: vblendps {{.*#+}} ymm1 = ymm5[0,1],ymm1[2,3],ymm5[4,5],ymm1[6,7]
; AVX-NEXT: vmovups %ymm1, (%rsp) # 32-byte Spill
; AVX-NEXT: vpshufd {{.*#+}} xmm1 = xmm2[2,2,3,3]
; AVX-NEXT: vinsertf128 $1, %xmm1, %ymm2, %ymm1
; AVX-NEXT: vpshufd {{.*#+}} xmm2 = xmm0[2,2,2,2]
; AVX-NEXT: vinsertf128 $1, %xmm0, %ymm2, %ymm0
; AVX-NEXT: vblendps {{.*#+}} ymm0 = ymm1[0,1,2],ymm0[3],ymm1[4,5,6],ymm0[7]
; AVX-NEXT: vpshufd {{.*#+}} xmm1 = xmm4[2,2,3,3]
; AVX-NEXT: vpshufd {{.*#+}} xmm2 = xmm4[2,3,2,3]
; AVX-NEXT: vinsertf128 $1, %xmm2, %ymm1, %ymm1
; AVX-NEXT: vpshufd {{.*#+}} xmm2 = xmm3[2,3,2,3]
; AVX-NEXT: vpshufd {{.*#+}} xmm3 = xmm3[3,3,3,3]
; AVX-NEXT: vinsertf128 $1, %xmm3, %ymm2, %ymm2
; AVX-NEXT: vblendps {{.*#+}} ymm1 = ymm2[0],ymm1[1],ymm2[2,3,4],ymm1[5],ymm2[6,7]
; AVX-NEXT: vblendps {{.*#+}} ymm14 = ymm1[0,1],ymm0[2,3],ymm1[4,5],ymm0[6,7]
; AVX-NEXT: vmovdqa 16(%r10), %xmm12
; AVX-NEXT: vmovdqa 16(%rax), %xmm11
; AVX-NEXT: vpunpckhwd {{.*#+}} xmm8 = xmm11[4],xmm12[4],xmm11[5],xmm12[5],xmm11[6],xmm12[6],xmm11[7],xmm12[7]
; AVX-NEXT: vpshufd {{.*#+}} xmm0 = xmm8[0,0,0,0]
; AVX-NEXT: vpshufd {{.*#+}} xmm1 = xmm8[0,1,0,1]
; AVX-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm0
; AVX-NEXT: vmovdqa 16(%r9), %xmm10
; AVX-NEXT: vmovdqa 16(%r8), %xmm7
; AVX-NEXT: vpunpckhwd {{.*#+}} xmm13 = xmm7[4],xmm10[4],xmm7[5],xmm10[5],xmm7[6],xmm10[6],xmm7[7],xmm10[7]
; AVX-NEXT: vpshufd {{.*#+}} xmm1 = xmm13[0,1,0,1]
; AVX-NEXT: vpmovzxdq {{.*#+}} xmm2 = xmm13[0],zero,xmm13[1],zero
; AVX-NEXT: vinsertf128 $1, %xmm2, %ymm1, %ymm1
; AVX-NEXT: vblendps {{.*#+}} ymm9 = ymm1[0,1,2],ymm0[3],ymm1[4,5,6],ymm0[7]
; AVX-NEXT: vmovdqa 16(%rsi), %xmm6
; AVX-NEXT: vmovdqa 16(%rdi), %xmm5
; AVX-NEXT: vpunpckhwd {{.*#+}} xmm2 = xmm5[4],xmm6[4],xmm5[5],xmm6[5],xmm5[6],xmm6[6],xmm5[7],xmm6[7]
; AVX-NEXT: vpshufd {{.*#+}} xmm1 = xmm2[1,1,1,1]
; AVX-NEXT: vinsertf128 $1, %xmm1, %ymm2, %ymm1
; AVX-NEXT: vmovdqa 16(%rcx), %xmm4
; AVX-NEXT: vmovdqa 16(%rdx), %xmm3
; AVX-NEXT: vpunpckhwd {{.*#+}} xmm0 = xmm3[4],xmm4[4],xmm3[5],xmm4[5],xmm3[6],xmm4[6],xmm3[7],xmm4[7]
; AVX-NEXT: vpshufd {{.*#+}} xmm15 = xmm0[0,0,1,1]
; AVX-NEXT: vinsertf128 $1, %xmm0, %ymm15, %ymm15
; AVX-NEXT: vblendps {{.*#+}} ymm1 = ymm1[0],ymm15[1],ymm1[2,3,4],ymm15[5],ymm1[6,7]
; AVX-NEXT: vblendps {{.*#+}} ymm9 = ymm1[0,1],ymm9[2,3],ymm1[4,5],ymm9[6,7]
; AVX-NEXT: vpshufd {{.*#+}} xmm1 = xmm13[2,2,3,3]
; AVX-NEXT: vinsertf128 $1, %xmm1, %ymm13, %ymm1
; AVX-NEXT: vpshufd {{.*#+}} xmm13 = xmm8[2,2,2,2]
; AVX-NEXT: vinsertf128 $1, %xmm8, %ymm13, %ymm8
; AVX-NEXT: vblendps {{.*#+}} ymm1 = ymm1[0,1,2],ymm8[3],ymm1[4,5,6],ymm8[7]
; AVX-NEXT: vpshufd {{.*#+}} xmm8 = xmm0[2,2,3,3]
; AVX-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[2,3,2,3]
; AVX-NEXT: vinsertf128 $1, %xmm0, %ymm8, %ymm0
; AVX-NEXT: vpshufd {{.*#+}} xmm8 = xmm2[2,3,2,3]
; AVX-NEXT: vpshufd {{.*#+}} xmm2 = xmm2[3,3,3,3]
; AVX-NEXT: vinsertf128 $1, %xmm2, %ymm8, %ymm2
; AVX-NEXT: vblendps {{.*#+}} ymm0 = ymm2[0],ymm0[1],ymm2[2,3,4],ymm0[5],ymm2[6,7]
; AVX-NEXT: vblendps {{.*#+}} ymm8 = ymm0[0,1],ymm1[2,3],ymm0[4,5],ymm1[6,7]
; AVX-NEXT: vpunpcklwd {{.*#+}} xmm1 = xmm11[0],xmm12[0],xmm11[1],xmm12[1],xmm11[2],xmm12[2],xmm11[3],xmm12[3]
; AVX-NEXT: vpshufd {{.*#+}} xmm0 = xmm1[0,0,0,0]
; AVX-NEXT: vpshufd {{.*#+}} xmm2 = xmm1[0,1,0,1]
; AVX-NEXT: vinsertf128 $1, %xmm2, %ymm0, %ymm0
; AVX-NEXT: vpunpcklwd {{.*#+}} xmm2 = xmm7[0],xmm10[0],xmm7[1],xmm10[1],xmm7[2],xmm10[2],xmm7[3],xmm10[3]
; AVX-NEXT: vpshufd {{.*#+}} xmm7 = xmm2[0,1,0,1]
; AVX-NEXT: vpmovzxdq {{.*#+}} xmm10 = xmm2[0],zero,xmm2[1],zero
; AVX-NEXT: vinsertf128 $1, %xmm10, %ymm7, %ymm7
; AVX-NEXT: vblendps {{.*#+}} ymm0 = ymm7[0,1,2],ymm0[3],ymm7[4,5,6],ymm0[7]
; AVX-NEXT: vpunpcklwd {{.*#+}} xmm5 = xmm5[0],xmm6[0],xmm5[1],xmm6[1],xmm5[2],xmm6[2],xmm5[3],xmm6[3]
; AVX-NEXT: vpunpcklwd {{.*#+}} xmm3 = xmm3[0],xmm4[0],xmm3[1],xmm4[1],xmm3[2],xmm4[2],xmm3[3],xmm4[3]
; AVX-NEXT: vpshufd {{.*#+}} xmm4 = xmm5[1,1,1,1]
; AVX-NEXT: vinsertf128 $1, %xmm4, %ymm5, %ymm4
; AVX-NEXT: vpshufd {{.*#+}} xmm6 = xmm3[0,0,1,1]
; AVX-NEXT: vinsertf128 $1, %xmm3, %ymm6, %ymm6
; AVX-NEXT: vblendps {{.*#+}} ymm4 = ymm4[0],ymm6[1],ymm4[2,3,4],ymm6[5],ymm4[6,7]
; AVX-NEXT: vblendps {{.*#+}} ymm0 = ymm4[0,1],ymm0[2,3],ymm4[4,5],ymm0[6,7]
; AVX-NEXT: vpshufd {{.*#+}} xmm4 = xmm2[2,2,3,3]
; AVX-NEXT: vinsertf128 $1, %xmm4, %ymm2, %ymm2
; AVX-NEXT: vpshufd {{.*#+}} xmm4 = xmm1[2,2,2,2]
; AVX-NEXT: vinsertf128 $1, %xmm1, %ymm4, %ymm1
; AVX-NEXT: vblendps {{.*#+}} ymm1 = ymm2[0,1,2],ymm1[3],ymm2[4,5,6],ymm1[7]
; AVX-NEXT: vpshufd {{.*#+}} xmm2 = xmm3[2,2,3,3]
; AVX-NEXT: vpshufd {{.*#+}} xmm3 = xmm3[2,3,2,3]
; AVX-NEXT: vinsertf128 $1, %xmm3, %ymm2, %ymm2
; AVX-NEXT: vpshufd {{.*#+}} xmm3 = xmm5[2,3,2,3]
; AVX-NEXT: vpshufd {{.*#+}} xmm4 = xmm5[3,3,3,3]
; AVX-NEXT: vinsertf128 $1, %xmm4, %ymm3, %ymm3
; AVX-NEXT: vblendps {{.*#+}} ymm2 = ymm3[0],ymm2[1],ymm3[2,3,4],ymm2[5],ymm3[6,7]
; AVX-NEXT: vblendps {{.*#+}} ymm1 = ymm2[0,1],ymm1[2,3],ymm2[4,5],ymm1[6,7]
; AVX-NEXT: vmovdqa {{[-0-9]+}}(%r{{[sb]}}p), %xmm2 # 16-byte Reload
; AVX-NEXT: vpunpckhwd {{[-0-9]+}}(%r{{[sb]}}p), %xmm2, %xmm2 # 16-byte Folded Reload
; AVX-NEXT: # xmm2 = xmm2[4],mem[4],xmm2[5],mem[5],xmm2[6],mem[6],xmm2[7],mem[7]
; AVX-NEXT: vpshufd {{.*#+}} xmm3 = xmm2[0,0,0,0]
; AVX-NEXT: vpshufd {{.*#+}} xmm4 = xmm2[0,1,0,1]
; AVX-NEXT: vinsertf128 $1, %xmm4, %ymm3, %ymm3
; AVX-NEXT: vmovdqa {{[-0-9]+}}(%r{{[sb]}}p), %xmm4 # 16-byte Reload
; AVX-NEXT: vpunpckhwd {{[-0-9]+}}(%r{{[sb]}}p), %xmm4, %xmm4 # 16-byte Folded Reload
; AVX-NEXT: # xmm4 = xmm4[4],mem[4],xmm4[5],mem[5],xmm4[6],mem[6],xmm4[7],mem[7]
; AVX-NEXT: vpshufd {{.*#+}} xmm5 = xmm4[0,1,0,1]
; AVX-NEXT: vpmovzxdq {{.*#+}} xmm6 = xmm4[0],zero,xmm4[1],zero
; AVX-NEXT: vinsertf128 $1, %xmm6, %ymm5, %ymm5
; AVX-NEXT: vblendps {{.*#+}} ymm3 = ymm5[0,1,2],ymm3[3],ymm5[4,5,6],ymm3[7]
; AVX-NEXT: vmovdqa {{[-0-9]+}}(%r{{[sb]}}p), %xmm5 # 16-byte Reload
; AVX-NEXT: vpunpckhwd {{[-0-9]+}}(%r{{[sb]}}p), %xmm5, %xmm5 # 16-byte Folded Reload
; AVX-NEXT: # xmm5 = xmm5[4],mem[4],xmm5[5],mem[5],xmm5[6],mem[6],xmm5[7],mem[7]
; AVX-NEXT: vmovdqa {{[-0-9]+}}(%r{{[sb]}}p), %xmm6 # 16-byte Reload
; AVX-NEXT: vpunpckhwd {{[-0-9]+}}(%r{{[sb]}}p), %xmm6, %xmm6 # 16-byte Folded Reload
; AVX-NEXT: # xmm6 = xmm6[4],mem[4],xmm6[5],mem[5],xmm6[6],mem[6],xmm6[7],mem[7]
; AVX-NEXT: vpshufd {{.*#+}} xmm7 = xmm5[1,1,1,1]
; AVX-NEXT: vinsertf128 $1, %xmm7, %ymm5, %ymm7
; AVX-NEXT: vpshufd {{.*#+}} xmm10 = xmm6[0,0,1,1]
; AVX-NEXT: vinsertf128 $1, %xmm6, %ymm10, %ymm10
; AVX-NEXT: vblendps {{.*#+}} ymm7 = ymm7[0],ymm10[1],ymm7[2,3,4],ymm10[5],ymm7[6,7]
; AVX-NEXT: vblendps {{.*#+}} ymm3 = ymm7[0,1],ymm3[2,3],ymm7[4,5],ymm3[6,7]
; AVX-NEXT: vpshufd {{.*#+}} xmm7 = xmm4[2,2,3,3]
; AVX-NEXT: vinsertf128 $1, %xmm7, %ymm4, %ymm4
; AVX-NEXT: vpshufd {{.*#+}} xmm7 = xmm2[2,2,2,2]
; AVX-NEXT: vinsertf128 $1, %xmm2, %ymm7, %ymm2
; AVX-NEXT: vblendps {{.*#+}} ymm2 = ymm4[0,1,2],ymm2[3],ymm4[4,5,6],ymm2[7]
; AVX-NEXT: vpshufd {{.*#+}} xmm4 = xmm6[2,2,3,3]
; AVX-NEXT: vpshufd {{.*#+}} xmm6 = xmm6[2,3,2,3]
; AVX-NEXT: vinsertf128 $1, %xmm6, %ymm4, %ymm4
; AVX-NEXT: vpshufd {{.*#+}} xmm6 = xmm5[2,3,2,3]
; AVX-NEXT: vpshufd {{.*#+}} xmm5 = xmm5[3,3,3,3]
; AVX-NEXT: vinsertf128 $1, %xmm5, %ymm6, %ymm5
; AVX-NEXT: vblendps {{.*#+}} ymm4 = ymm5[0],ymm4[1],ymm5[2,3,4],ymm4[5],ymm5[6,7]
; AVX-NEXT: vblendps {{.*#+}} ymm2 = ymm4[0,1],ymm2[2,3],ymm4[4,5],ymm2[6,7]
; AVX-NEXT: movq {{[0-9]+}}(%rsp), %rax
; AVX-NEXT: vmovaps %ymm2, 96(%rax)
; AVX-NEXT: vmovaps %ymm3, 64(%rax)
; AVX-NEXT: vmovaps %ymm1, 160(%rax)
; AVX-NEXT: vmovaps %ymm0, 128(%rax)
; AVX-NEXT: vmovaps %ymm8, 224(%rax)
; AVX-NEXT: vmovaps %ymm9, 192(%rax)
; AVX-NEXT: vmovaps %ymm14, 288(%rax)
; AVX-NEXT: vmovups (%rsp), %ymm0 # 32-byte Reload
; AVX-NEXT: vmovaps %ymm0, 256(%rax)
; AVX-NEXT: vmovups {{[-0-9]+}}(%r{{[sb]}}p), %ymm0 # 32-byte Reload
; AVX-NEXT: vmovaps %ymm0, 352(%rax)
; AVX-NEXT: vmovups {{[-0-9]+}}(%r{{[sb]}}p), %ymm0 # 32-byte Reload
; AVX-NEXT: vmovaps %ymm0, 320(%rax)
; AVX-NEXT: vmovups {{[-0-9]+}}(%r{{[sb]}}p), %ymm0 # 32-byte Reload
; AVX-NEXT: vmovaps %ymm0, 416(%rax)
; AVX-NEXT: vmovups {{[-0-9]+}}(%r{{[sb]}}p), %ymm0 # 32-byte Reload
; AVX-NEXT: vmovaps %ymm0, 384(%rax)
; AVX-NEXT: vmovups {{[-0-9]+}}(%r{{[sb]}}p), %ymm0 # 32-byte Reload
; AVX-NEXT: vmovaps %ymm0, 480(%rax)
; AVX-NEXT: vmovups {{[-0-9]+}}(%r{{[sb]}}p), %ymm0 # 32-byte Reload
; AVX-NEXT: vmovaps %ymm0, 448(%rax)
; AVX-NEXT: vmovups {{[-0-9]+}}(%r{{[sb]}}p), %ymm0 # 32-byte Reload
; AVX-NEXT: vmovaps %ymm0, (%rax)
; AVX-NEXT: vmovups {{[-0-9]+}}(%r{{[sb]}}p), %ymm0 # 32-byte Reload
; AVX-NEXT: vmovaps %ymm0, 32(%rax)
; AVX-NEXT: addq $296, %rsp # imm = 0x128
; AVX-NEXT: vzeroupper
; AVX-NEXT: retq
;
; AVX2-LABEL: store_i16_stride8_vf32:
; AVX2: # %bb.0:
; AVX2-NEXT: subq $232, %rsp
; AVX2-NEXT: movq {{[0-9]+}}(%rsp), %rax
; AVX2-NEXT: movq {{[0-9]+}}(%rsp), %r10
; AVX2-NEXT: vmovdqa (%rax), %xmm0
; AVX2-NEXT: vmovdqa %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
; AVX2-NEXT: vmovdqa 32(%rax), %xmm10
; AVX2-NEXT: vmovdqa (%r10), %xmm1
; AVX2-NEXT: vmovdqa %xmm1, (%rsp) # 16-byte Spill
; AVX2-NEXT: vmovdqa 32(%r10), %xmm9
; AVX2-NEXT: vpunpcklwd {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1],xmm1[2],xmm0[2],xmm1[3],xmm0[3]
; AVX2-NEXT: vmovdqa (%r9), %xmm0
; AVX2-NEXT: vmovdqa %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
; AVX2-NEXT: vmovdqa (%r8), %xmm2
; AVX2-NEXT: vmovdqa %xmm2, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
; AVX2-NEXT: vpunpcklwd {{.*#+}} xmm2 = xmm2[0],xmm0[0],xmm2[1],xmm0[1],xmm2[2],xmm0[2],xmm2[3],xmm0[3]
; AVX2-NEXT: vpunpckhdq {{.*#+}} xmm0 = xmm2[2],xmm1[2],xmm2[3],xmm1[3]
; AVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,0,2,1]
; AVX2-NEXT: vmovdqa (%rcx), %xmm4
; AVX2-NEXT: vmovdqa %xmm4, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
; AVX2-NEXT: vmovdqa (%rdx), %xmm3
; AVX2-NEXT: vmovdqa %xmm3, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
; AVX2-NEXT: vpunpcklwd {{.*#+}} xmm3 = xmm3[0],xmm4[0],xmm3[1],xmm4[1],xmm3[2],xmm4[2],xmm3[3],xmm4[3]
; AVX2-NEXT: vmovdqa (%rsi), %xmm12
; AVX2-NEXT: vmovdqa (%rdi), %xmm13
; AVX2-NEXT: vpunpcklwd {{.*#+}} xmm14 = xmm13[0],xmm12[0],xmm13[1],xmm12[1],xmm13[2],xmm12[2],xmm13[3],xmm12[3]
; AVX2-NEXT: vpunpckhdq {{.*#+}} xmm15 = xmm14[2],xmm3[2],xmm14[3],xmm3[3]
; AVX2-NEXT: vpermq {{.*#+}} ymm15 = ymm15[0,1,1,3]
; AVX2-NEXT: vpblendd {{.*#+}} ymm0 = ymm15[0,1],ymm0[2,3],ymm15[4,5],ymm0[6,7]
; AVX2-NEXT: vmovdqu %ymm0, {{[-0-9]+}}(%r{{[sb]}}p) # 32-byte Spill
; AVX2-NEXT: vmovdqa 32(%r9), %xmm8
; AVX2-NEXT: vpunpckldq {{.*#+}} xmm1 = xmm2[0],xmm1[0],xmm2[1],xmm1[1]
; AVX2-NEXT: vmovdqa 32(%r8), %xmm15
; AVX2-NEXT: vpermq {{.*#+}} ymm1 = ymm1[0,0,2,1]
; AVX2-NEXT: vpunpckldq {{.*#+}} xmm2 = xmm14[0],xmm3[0],xmm14[1],xmm3[1]
; AVX2-NEXT: vpermq {{.*#+}} ymm2 = ymm2[0,1,1,3]
; AVX2-NEXT: vpblendd {{.*#+}} ymm0 = ymm2[0,1],ymm1[2,3],ymm2[4,5],ymm1[6,7]
; AVX2-NEXT: vmovdqu %ymm0, {{[-0-9]+}}(%r{{[sb]}}p) # 32-byte Spill
; AVX2-NEXT: vpunpckhwd {{.*#+}} xmm3 = xmm9[4],xmm10[4],xmm9[5],xmm10[5],xmm9[6],xmm10[6],xmm9[7],xmm10[7]
; AVX2-NEXT: vpunpckhwd {{.*#+}} xmm14 = xmm15[4],xmm8[4],xmm15[5],xmm8[5],xmm15[6],xmm8[6],xmm15[7],xmm8[7]
; AVX2-NEXT: vpunpckldq {{.*#+}} xmm2 = xmm14[0],xmm3[0],xmm14[1],xmm3[1]
; AVX2-NEXT: vpermq {{.*#+}} ymm7 = ymm2[0,0,2,1]
; AVX2-NEXT: vmovdqa 32(%rcx), %xmm6
; AVX2-NEXT: vmovdqa 32(%rdx), %xmm5
; AVX2-NEXT: vmovdqa 32(%rsi), %xmm4
; AVX2-NEXT: vmovdqa 32(%rdi), %xmm2
; AVX2-NEXT: vpunpckhwd {{.*#+}} xmm1 = xmm5[4],xmm6[4],xmm5[5],xmm6[5],xmm5[6],xmm6[6],xmm5[7],xmm6[7]
; AVX2-NEXT: vpunpckhwd {{.*#+}} xmm0 = xmm2[4],xmm4[4],xmm2[5],xmm4[5],xmm2[6],xmm4[6],xmm2[7],xmm4[7]
; AVX2-NEXT: vpunpckldq {{.*#+}} xmm11 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
; AVX2-NEXT: vpermq {{.*#+}} ymm11 = ymm11[0,1,1,3]
; AVX2-NEXT: vpblendd {{.*#+}} ymm7 = ymm11[0,1],ymm7[2,3],ymm11[4,5],ymm7[6,7]
; AVX2-NEXT: vmovdqu %ymm7, {{[-0-9]+}}(%r{{[sb]}}p) # 32-byte Spill
; AVX2-NEXT: vpunpckhdq {{.*#+}} xmm3 = xmm14[2],xmm3[2],xmm14[3],xmm3[3]
; AVX2-NEXT: vpunpckhdq {{.*#+}} xmm0 = xmm0[2],xmm1[2],xmm0[3],xmm1[3]
; AVX2-NEXT: vpermq {{.*#+}} ymm1 = ymm3[0,0,2,1]
; AVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,1,1,3]
; AVX2-NEXT: vpblendd {{.*#+}} ymm0 = ymm0[0,1],ymm1[2,3],ymm0[4,5],ymm1[6,7]
; AVX2-NEXT: vmovdqu %ymm0, {{[-0-9]+}}(%r{{[sb]}}p) # 32-byte Spill
; AVX2-NEXT: vpunpcklwd {{.*#+}} xmm0 = xmm9[0],xmm10[0],xmm9[1],xmm10[1],xmm9[2],xmm10[2],xmm9[3],xmm10[3]
; AVX2-NEXT: vpunpcklwd {{.*#+}} xmm1 = xmm15[0],xmm8[0],xmm15[1],xmm8[1],xmm15[2],xmm8[2],xmm15[3],xmm8[3]
; AVX2-NEXT: vpunpcklwd {{.*#+}} xmm5 = xmm5[0],xmm6[0],xmm5[1],xmm6[1],xmm5[2],xmm6[2],xmm5[3],xmm6[3]
; AVX2-NEXT: vpunpcklwd {{.*#+}} xmm2 = xmm2[0],xmm4[0],xmm2[1],xmm4[1],xmm2[2],xmm4[2],xmm2[3],xmm4[3]
; AVX2-NEXT: vpunpckldq {{.*#+}} xmm4 = xmm1[0],xmm0[0],xmm1[1],xmm0[1]
; AVX2-NEXT: vpermq {{.*#+}} ymm4 = ymm4[0,0,2,1]
; AVX2-NEXT: vpunpckldq {{.*#+}} xmm6 = xmm2[0],xmm5[0],xmm2[1],xmm5[1]
; AVX2-NEXT: vpermq {{.*#+}} ymm6 = ymm6[0,1,1,3]
; AVX2-NEXT: vpblendd {{.*#+}} ymm3 = ymm6[0,1],ymm4[2,3],ymm6[4,5],ymm4[6,7]
; AVX2-NEXT: vmovdqu %ymm3, {{[-0-9]+}}(%r{{[sb]}}p) # 32-byte Spill
; AVX2-NEXT: vpunpckhdq {{.*#+}} xmm0 = xmm1[2],xmm0[2],xmm1[3],xmm0[3]
; AVX2-NEXT: vpunpckhdq {{.*#+}} xmm1 = xmm2[2],xmm5[2],xmm2[3],xmm5[3]
; AVX2-NEXT: vmovdqa 32(%rdi), %ymm14
; AVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,0,2,1]
; AVX2-NEXT: vpermq {{.*#+}} ymm1 = ymm1[0,1,1,3]
; AVX2-NEXT: vpblendd {{.*#+}} ymm0 = ymm1[0,1],ymm0[2,3],ymm1[4,5],ymm0[6,7]
; AVX2-NEXT: vmovdqu %ymm0, {{[-0-9]+}}(%r{{[sb]}}p) # 32-byte Spill
; AVX2-NEXT: vmovdqa 32(%r8), %ymm15
; AVX2-NEXT: vmovdqa (%rsp), %xmm0 # 16-byte Reload
; AVX2-NEXT: vpunpckhwd {{[-0-9]+}}(%r{{[sb]}}p), %xmm0, %xmm1 # 16-byte Folded Reload
; AVX2-NEXT: # xmm1 = xmm0[4],mem[4],xmm0[5],mem[5],xmm0[6],mem[6],xmm0[7],mem[7]
; AVX2-NEXT: vmovdqa 32(%r9), %ymm4
; AVX2-NEXT: vmovdqa {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Reload
; AVX2-NEXT: vpunpckhwd {{[-0-9]+}}(%r{{[sb]}}p), %xmm0, %xmm2 # 16-byte Folded Reload
; AVX2-NEXT: # xmm2 = xmm0[4],mem[4],xmm0[5],mem[5],xmm0[6],mem[6],xmm0[7],mem[7]
; AVX2-NEXT: vmovdqa 32(%r10), %ymm6
; AVX2-NEXT: vmovdqa {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Reload
; AVX2-NEXT: vpunpckhwd {{[-0-9]+}}(%r{{[sb]}}p), %xmm0, %xmm7 # 16-byte Folded Reload
; AVX2-NEXT: # xmm7 = xmm0[4],mem[4],xmm0[5],mem[5],xmm0[6],mem[6],xmm0[7],mem[7]
; AVX2-NEXT: vpunpckldq {{.*#+}} xmm8 = xmm2[0],xmm1[0],xmm2[1],xmm1[1]
; AVX2-NEXT: vpermq {{.*#+}} ymm8 = ymm8[0,0,2,1]
; AVX2-NEXT: vpunpckhwd {{.*#+}} xmm9 = xmm13[4],xmm12[4],xmm13[5],xmm12[5],xmm13[6],xmm12[6],xmm13[7],xmm12[7]
; AVX2-NEXT: vpunpckldq {{.*#+}} xmm10 = xmm9[0],xmm7[0],xmm9[1],xmm7[1]
; AVX2-NEXT: vpermq {{.*#+}} ymm10 = ymm10[0,1,1,3]
; AVX2-NEXT: vpblendd {{.*#+}} ymm0 = ymm10[0,1],ymm8[2,3],ymm10[4,5],ymm8[6,7]
; AVX2-NEXT: vmovdqu %ymm0, (%rsp) # 32-byte Spill
; AVX2-NEXT: vmovdqa 32(%rax), %ymm10
; AVX2-NEXT: vpunpckhdq {{.*#+}} xmm1 = xmm2[2],xmm1[2],xmm2[3],xmm1[3]
; AVX2-NEXT: vpermq {{.*#+}} ymm1 = ymm1[0,0,2,1]
; AVX2-NEXT: vpunpckhdq {{.*#+}} xmm2 = xmm9[2],xmm7[2],xmm9[3],xmm7[3]
; AVX2-NEXT: vpermq {{.*#+}} ymm2 = ymm2[0,1,1,3]
; AVX2-NEXT: vpblendd {{.*#+}} ymm0 = ymm2[0,1],ymm1[2,3],ymm2[4,5],ymm1[6,7]
; AVX2-NEXT: vmovdqu %ymm0, {{[-0-9]+}}(%r{{[sb]}}p) # 32-byte Spill
; AVX2-NEXT: vpunpckhwd {{.*#+}} ymm3 = ymm6[4],ymm10[4],ymm6[5],ymm10[5],ymm6[6],ymm10[6],ymm6[7],ymm10[7],ymm6[12],ymm10[12],ymm6[13],ymm10[13],ymm6[14],ymm10[14],ymm6[15],ymm10[15]
; AVX2-NEXT: vpunpckhwd {{.*#+}} ymm2 = ymm15[4],ymm4[4],ymm15[5],ymm4[5],ymm15[6],ymm4[6],ymm15[7],ymm4[7],ymm15[12],ymm4[12],ymm15[13],ymm4[13],ymm15[14],ymm4[14],ymm15[15],ymm4[15]
; AVX2-NEXT: vpunpckldq {{.*#+}} ymm8 = ymm2[0],ymm3[0],ymm2[1],ymm3[1],ymm2[4],ymm3[4],ymm2[5],ymm3[5]
; AVX2-NEXT: vpermq {{.*#+}} ymm8 = ymm8[0,2,2,3]
; AVX2-NEXT: vmovdqa 32(%rsi), %ymm11
; AVX2-NEXT: vmovdqa 32(%rdx), %ymm13
; AVX2-NEXT: vmovdqa 32(%rcx), %ymm9
; AVX2-NEXT: vpunpckhwd {{.*#+}} ymm1 = ymm13[4],ymm9[4],ymm13[5],ymm9[5],ymm13[6],ymm9[6],ymm13[7],ymm9[7],ymm13[12],ymm9[12],ymm13[13],ymm9[13],ymm13[14],ymm9[14],ymm13[15],ymm9[15]
; AVX2-NEXT: vpunpckhwd {{.*#+}} ymm0 = ymm14[4],ymm11[4],ymm14[5],ymm11[5],ymm14[6],ymm11[6],ymm14[7],ymm11[7],ymm14[12],ymm11[12],ymm14[13],ymm11[13],ymm14[14],ymm11[14],ymm14[15],ymm11[15]
; AVX2-NEXT: vpunpckldq {{.*#+}} ymm5 = ymm0[0],ymm1[0],ymm0[1],ymm1[1],ymm0[4],ymm1[4],ymm0[5],ymm1[5]
; AVX2-NEXT: vpermq {{.*#+}} ymm5 = ymm5[2,1,3,3]
; AVX2-NEXT: vpblendd {{.*#+}} ymm5 = ymm5[0,1],ymm8[2,3],ymm5[4,5],ymm8[6,7]
; AVX2-NEXT: vmovdqu %ymm5, {{[-0-9]+}}(%r{{[sb]}}p) # 32-byte Spill
; AVX2-NEXT: vpunpckhdq {{.*#+}} ymm2 = ymm2[2],ymm3[2],ymm2[3],ymm3[3],ymm2[6],ymm3[6],ymm2[7],ymm3[7]
; AVX2-NEXT: vpunpckhdq {{.*#+}} ymm0 = ymm0[2],ymm1[2],ymm0[3],ymm1[3],ymm0[6],ymm1[6],ymm0[7],ymm1[7]
; AVX2-NEXT: vpermq {{.*#+}} ymm1 = ymm2[0,2,2,3]
; AVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm0[2,1,3,3]
; AVX2-NEXT: vpblendd {{.*#+}} ymm0 = ymm0[0,1],ymm1[2,3],ymm0[4,5],ymm1[6,7]
; AVX2-NEXT: vmovdqu %ymm0, {{[-0-9]+}}(%r{{[sb]}}p) # 32-byte Spill
; AVX2-NEXT: vpunpcklwd {{.*#+}} ymm0 = ymm6[0],ymm10[0],ymm6[1],ymm10[1],ymm6[2],ymm10[2],ymm6[3],ymm10[3],ymm6[8],ymm10[8],ymm6[9],ymm10[9],ymm6[10],ymm10[10],ymm6[11],ymm10[11]
; AVX2-NEXT: vpunpcklwd {{.*#+}} ymm2 = ymm15[0],ymm4[0],ymm15[1],ymm4[1],ymm15[2],ymm4[2],ymm15[3],ymm4[3],ymm15[8],ymm4[8],ymm15[9],ymm4[9],ymm15[10],ymm4[10],ymm15[11],ymm4[11]
; AVX2-NEXT: vpunpcklwd {{.*#+}} ymm3 = ymm13[0],ymm9[0],ymm13[1],ymm9[1],ymm13[2],ymm9[2],ymm13[3],ymm9[3],ymm13[8],ymm9[8],ymm13[9],ymm9[9],ymm13[10],ymm9[10],ymm13[11],ymm9[11]
; AVX2-NEXT: vpunpckldq {{.*#+}} ymm4 = ymm2[0],ymm0[0],ymm2[1],ymm0[1],ymm2[4],ymm0[4],ymm2[5],ymm0[5]
; AVX2-NEXT: vpermq {{.*#+}} ymm4 = ymm4[0,2,2,3]
; AVX2-NEXT: vpunpcklwd {{.*#+}} ymm5 = ymm14[0],ymm11[0],ymm14[1],ymm11[1],ymm14[2],ymm11[2],ymm14[3],ymm11[3],ymm14[8],ymm11[8],ymm14[9],ymm11[9],ymm14[10],ymm11[10],ymm14[11],ymm11[11]
; AVX2-NEXT: vpunpckldq {{.*#+}} ymm6 = ymm5[0],ymm3[0],ymm5[1],ymm3[1],ymm5[4],ymm3[4],ymm5[5],ymm3[5]
; AVX2-NEXT: vpermq {{.*#+}} ymm6 = ymm6[2,1,3,3]
; AVX2-NEXT: vpblendd {{.*#+}} ymm10 = ymm6[0,1],ymm4[2,3],ymm6[4,5],ymm4[6,7]
; AVX2-NEXT: vmovdqa (%r8), %ymm8
; AVX2-NEXT: vpunpckhdq {{.*#+}} ymm0 = ymm2[2],ymm0[2],ymm2[3],ymm0[3],ymm2[6],ymm0[6],ymm2[7],ymm0[7]
; AVX2-NEXT: vmovdqa (%r9), %ymm7
; AVX2-NEXT: vpunpckhdq {{.*#+}} ymm3 = ymm5[2],ymm3[2],ymm5[3],ymm3[3],ymm5[6],ymm3[6],ymm5[7],ymm3[7]
; AVX2-NEXT: vmovdqa (%r10), %ymm5
; AVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,2,2,3]
; AVX2-NEXT: vpermq {{.*#+}} ymm3 = ymm3[2,1,3,3]
; AVX2-NEXT: vpblendd {{.*#+}} ymm11 = ymm3[0,1],ymm0[2,3],ymm3[4,5],ymm0[6,7]
; AVX2-NEXT: vmovdqa (%rax), %ymm4
; AVX2-NEXT: vpunpckhwd {{.*#+}} ymm3 = ymm5[4],ymm4[4],ymm5[5],ymm4[5],ymm5[6],ymm4[6],ymm5[7],ymm4[7],ymm5[12],ymm4[12],ymm5[13],ymm4[13],ymm5[14],ymm4[14],ymm5[15],ymm4[15]
; AVX2-NEXT: vpunpckhwd {{.*#+}} ymm6 = ymm8[4],ymm7[4],ymm8[5],ymm7[5],ymm8[6],ymm7[6],ymm8[7],ymm7[7],ymm8[12],ymm7[12],ymm8[13],ymm7[13],ymm8[14],ymm7[14],ymm8[15],ymm7[15]
; AVX2-NEXT: vpunpckldq {{.*#+}} ymm9 = ymm6[0],ymm3[0],ymm6[1],ymm3[1],ymm6[4],ymm3[4],ymm6[5],ymm3[5]
; AVX2-NEXT: vpermq {{.*#+}} ymm9 = ymm9[0,2,2,3]
; AVX2-NEXT: vmovdqa (%rdi), %ymm13
; AVX2-NEXT: vmovdqa (%rsi), %ymm14
; AVX2-NEXT: vmovdqa (%rdx), %ymm15
; AVX2-NEXT: vmovdqa (%rcx), %ymm2
; AVX2-NEXT: vpunpckhwd {{.*#+}} ymm1 = ymm15[4],ymm2[4],ymm15[5],ymm2[5],ymm15[6],ymm2[6],ymm15[7],ymm2[7],ymm15[12],ymm2[12],ymm15[13],ymm2[13],ymm15[14],ymm2[14],ymm15[15],ymm2[15]
; AVX2-NEXT: vpunpckhwd {{.*#+}} ymm0 = ymm13[4],ymm14[4],ymm13[5],ymm14[5],ymm13[6],ymm14[6],ymm13[7],ymm14[7],ymm13[12],ymm14[12],ymm13[13],ymm14[13],ymm13[14],ymm14[14],ymm13[15],ymm14[15]
; AVX2-NEXT: vpunpckldq {{.*#+}} ymm12 = ymm0[0],ymm1[0],ymm0[1],ymm1[1],ymm0[4],ymm1[4],ymm0[5],ymm1[5]
; AVX2-NEXT: vpermq {{.*#+}} ymm12 = ymm12[2,1,3,3]
; AVX2-NEXT: vpblendd {{.*#+}} ymm9 = ymm12[0,1],ymm9[2,3],ymm12[4,5],ymm9[6,7]
; AVX2-NEXT: vpunpckhdq {{.*#+}} ymm3 = ymm6[2],ymm3[2],ymm6[3],ymm3[3],ymm6[6],ymm3[6],ymm6[7],ymm3[7]
; AVX2-NEXT: vpunpckhdq {{.*#+}} ymm0 = ymm0[2],ymm1[2],ymm0[3],ymm1[3],ymm0[6],ymm1[6],ymm0[7],ymm1[7]
; AVX2-NEXT: vpermq {{.*#+}} ymm1 = ymm3[0,2,2,3]
; AVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm0[2,1,3,3]
; AVX2-NEXT: vpblendd {{.*#+}} ymm0 = ymm0[0,1],ymm1[2,3],ymm0[4,5],ymm1[6,7]
; AVX2-NEXT: vpunpcklwd {{.*#+}} ymm1 = ymm5[0],ymm4[0],ymm5[1],ymm4[1],ymm5[2],ymm4[2],ymm5[3],ymm4[3],ymm5[8],ymm4[8],ymm5[9],ymm4[9],ymm5[10],ymm4[10],ymm5[11],ymm4[11]
; AVX2-NEXT: vpunpcklwd {{.*#+}} ymm3 = ymm8[0],ymm7[0],ymm8[1],ymm7[1],ymm8[2],ymm7[2],ymm8[3],ymm7[3],ymm8[8],ymm7[8],ymm8[9],ymm7[9],ymm8[10],ymm7[10],ymm8[11],ymm7[11]
; AVX2-NEXT: vpunpcklwd {{.*#+}} ymm2 = ymm15[0],ymm2[0],ymm15[1],ymm2[1],ymm15[2],ymm2[2],ymm15[3],ymm2[3],ymm15[8],ymm2[8],ymm15[9],ymm2[9],ymm15[10],ymm2[10],ymm15[11],ymm2[11]
; AVX2-NEXT: vpunpcklwd {{.*#+}} ymm4 = ymm13[0],ymm14[0],ymm13[1],ymm14[1],ymm13[2],ymm14[2],ymm13[3],ymm14[3],ymm13[8],ymm14[8],ymm13[9],ymm14[9],ymm13[10],ymm14[10],ymm13[11],ymm14[11]
; AVX2-NEXT: vpunpckldq {{.*#+}} ymm5 = ymm3[0],ymm1[0],ymm3[1],ymm1[1],ymm3[4],ymm1[4],ymm3[5],ymm1[5]
; AVX2-NEXT: vpermq {{.*#+}} ymm5 = ymm5[0,2,2,3]
; AVX2-NEXT: vpunpckldq {{.*#+}} ymm6 = ymm4[0],ymm2[0],ymm4[1],ymm2[1],ymm4[4],ymm2[4],ymm4[5],ymm2[5]
; AVX2-NEXT: vpermq {{.*#+}} ymm6 = ymm6[2,1,3,3]
; AVX2-NEXT: vpblendd {{.*#+}} ymm5 = ymm6[0,1],ymm5[2,3],ymm6[4,5],ymm5[6,7]
; AVX2-NEXT: vpunpckhdq {{.*#+}} ymm1 = ymm3[2],ymm1[2],ymm3[3],ymm1[3],ymm3[6],ymm1[6],ymm3[7],ymm1[7]
; AVX2-NEXT: vpunpckhdq {{.*#+}} ymm2 = ymm4[2],ymm2[2],ymm4[3],ymm2[3],ymm4[6],ymm2[6],ymm4[7],ymm2[7]
; AVX2-NEXT: vpermq {{.*#+}} ymm1 = ymm1[0,2,2,3]
; AVX2-NEXT: vpermq {{.*#+}} ymm2 = ymm2[2,1,3,3]
; AVX2-NEXT: vpblendd {{.*#+}} ymm1 = ymm2[0,1],ymm1[2,3],ymm2[4,5],ymm1[6,7]
; AVX2-NEXT: movq {{[0-9]+}}(%rsp), %rax
; AVX2-NEXT: vmovdqa %ymm1, 160(%rax)
; AVX2-NEXT: vmovdqa %ymm5, 128(%rax)
; AVX2-NEXT: vmovdqa %ymm0, 224(%rax)
; AVX2-NEXT: vmovdqa %ymm9, 192(%rax)
; AVX2-NEXT: vmovdqa %ymm11, 416(%rax)
; AVX2-NEXT: vmovdqa %ymm10, 384(%rax)
; AVX2-NEXT: vmovups {{[-0-9]+}}(%r{{[sb]}}p), %ymm0 # 32-byte Reload
; AVX2-NEXT: vmovaps %ymm0, 480(%rax)
; AVX2-NEXT: vmovups {{[-0-9]+}}(%r{{[sb]}}p), %ymm0 # 32-byte Reload
; AVX2-NEXT: vmovaps %ymm0, 448(%rax)
; AVX2-NEXT: vmovups {{[-0-9]+}}(%r{{[sb]}}p), %ymm0 # 32-byte Reload
; AVX2-NEXT: vmovaps %ymm0, 96(%rax)
; AVX2-NEXT: vmovups (%rsp), %ymm0 # 32-byte Reload
; AVX2-NEXT: vmovaps %ymm0, 64(%rax)
; AVX2-NEXT: vmovups {{[-0-9]+}}(%r{{[sb]}}p), %ymm0 # 32-byte Reload
; AVX2-NEXT: vmovaps %ymm0, 288(%rax)
; AVX2-NEXT: vmovups {{[-0-9]+}}(%r{{[sb]}}p), %ymm0 # 32-byte Reload
; AVX2-NEXT: vmovaps %ymm0, 256(%rax)
; AVX2-NEXT: vmovups {{[-0-9]+}}(%r{{[sb]}}p), %ymm0 # 32-byte Reload
; AVX2-NEXT: vmovaps %ymm0, 352(%rax)
; AVX2-NEXT: vmovups {{[-0-9]+}}(%r{{[sb]}}p), %ymm0 # 32-byte Reload
; AVX2-NEXT: vmovaps %ymm0, 320(%rax)
; AVX2-NEXT: vmovups {{[-0-9]+}}(%r{{[sb]}}p), %ymm0 # 32-byte Reload
; AVX2-NEXT: vmovaps %ymm0, (%rax)
; AVX2-NEXT: vmovups {{[-0-9]+}}(%r{{[sb]}}p), %ymm0 # 32-byte Reload
; AVX2-NEXT: vmovaps %ymm0, 32(%rax)
; AVX2-NEXT: addq $232, %rsp
; AVX2-NEXT: vzeroupper
; AVX2-NEXT: retq
;
; AVX2-FP-LABEL: store_i16_stride8_vf32:
; AVX2-FP: # %bb.0:
; AVX2-FP-NEXT: subq $232, %rsp
; AVX2-FP-NEXT: movq {{[0-9]+}}(%rsp), %rax
; AVX2-FP-NEXT: movq {{[0-9]+}}(%rsp), %r10
; AVX2-FP-NEXT: vmovdqa (%rax), %xmm0
; AVX2-FP-NEXT: vmovdqa %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
; AVX2-FP-NEXT: vmovdqa 32(%rax), %xmm10
; AVX2-FP-NEXT: vmovdqa (%r10), %xmm1
; AVX2-FP-NEXT: vmovdqa %xmm1, (%rsp) # 16-byte Spill
; AVX2-FP-NEXT: vmovdqa 32(%r10), %xmm9
; AVX2-FP-NEXT: vpunpcklwd {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1],xmm1[2],xmm0[2],xmm1[3],xmm0[3]
; AVX2-FP-NEXT: vmovdqa (%r9), %xmm0
; AVX2-FP-NEXT: vmovdqa %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
; AVX2-FP-NEXT: vmovdqa (%r8), %xmm2
; AVX2-FP-NEXT: vmovdqa %xmm2, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
; AVX2-FP-NEXT: vpunpcklwd {{.*#+}} xmm2 = xmm2[0],xmm0[0],xmm2[1],xmm0[1],xmm2[2],xmm0[2],xmm2[3],xmm0[3]
; AVX2-FP-NEXT: vpunpckhdq {{.*#+}} xmm0 = xmm2[2],xmm1[2],xmm2[3],xmm1[3]
; AVX2-FP-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,0,2,1]
; AVX2-FP-NEXT: vmovdqa (%rcx), %xmm4
; AVX2-FP-NEXT: vmovdqa %xmm4, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
; AVX2-FP-NEXT: vmovdqa (%rdx), %xmm3
; AVX2-FP-NEXT: vmovdqa %xmm3, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
; AVX2-FP-NEXT: vpunpcklwd {{.*#+}} xmm3 = xmm3[0],xmm4[0],xmm3[1],xmm4[1],xmm3[2],xmm4[2],xmm3[3],xmm4[3]
; AVX2-FP-NEXT: vmovdqa (%rsi), %xmm12
; AVX2-FP-NEXT: vmovdqa (%rdi), %xmm13
; AVX2-FP-NEXT: vpunpcklwd {{.*#+}} xmm14 = xmm13[0],xmm12[0],xmm13[1],xmm12[1],xmm13[2],xmm12[2],xmm13[3],xmm12[3]
; AVX2-FP-NEXT: vpunpckhdq {{.*#+}} xmm15 = xmm14[2],xmm3[2],xmm14[3],xmm3[3]
; AVX2-FP-NEXT: vpermq {{.*#+}} ymm15 = ymm15[0,1,1,3]
; AVX2-FP-NEXT: vpblendd {{.*#+}} ymm0 = ymm15[0,1],ymm0[2,3],ymm15[4,5],ymm0[6,7]
; AVX2-FP-NEXT: vmovdqu %ymm0, {{[-0-9]+}}(%r{{[sb]}}p) # 32-byte Spill
; AVX2-FP-NEXT: vmovdqa 32(%r9), %xmm8
; AVX2-FP-NEXT: vpunpckldq {{.*#+}} xmm1 = xmm2[0],xmm1[0],xmm2[1],xmm1[1]
; AVX2-FP-NEXT: vmovdqa 32(%r8), %xmm15
; AVX2-FP-NEXT: vpermq {{.*#+}} ymm1 = ymm1[0,0,2,1]
; AVX2-FP-NEXT: vpunpckldq {{.*#+}} xmm2 = xmm14[0],xmm3[0],xmm14[1],xmm3[1]
; AVX2-FP-NEXT: vpermq {{.*#+}} ymm2 = ymm2[0,1,1,3]
; AVX2-FP-NEXT: vpblendd {{.*#+}} ymm0 = ymm2[0,1],ymm1[2,3],ymm2[4,5],ymm1[6,7]
; AVX2-FP-NEXT: vmovdqu %ymm0, {{[-0-9]+}}(%r{{[sb]}}p) # 32-byte Spill
; AVX2-FP-NEXT: vpunpckhwd {{.*#+}} xmm3 = xmm9[4],xmm10[4],xmm9[5],xmm10[5],xmm9[6],xmm10[6],xmm9[7],xmm10[7]
; AVX2-FP-NEXT: vpunpckhwd {{.*#+}} xmm14 = xmm15[4],xmm8[4],xmm15[5],xmm8[5],xmm15[6],xmm8[6],xmm15[7],xmm8[7]
; AVX2-FP-NEXT: vpunpckldq {{.*#+}} xmm2 = xmm14[0],xmm3[0],xmm14[1],xmm3[1]
; AVX2-FP-NEXT: vpermq {{.*#+}} ymm7 = ymm2[0,0,2,1]
; AVX2-FP-NEXT: vmovdqa 32(%rcx), %xmm6
; AVX2-FP-NEXT: vmovdqa 32(%rdx), %xmm5
; AVX2-FP-NEXT: vmovdqa 32(%rsi), %xmm4
; AVX2-FP-NEXT: vmovdqa 32(%rdi), %xmm2
; AVX2-FP-NEXT: vpunpckhwd {{.*#+}} xmm1 = xmm5[4],xmm6[4],xmm5[5],xmm6[5],xmm5[6],xmm6[6],xmm5[7],xmm6[7]
; AVX2-FP-NEXT: vpunpckhwd {{.*#+}} xmm0 = xmm2[4],xmm4[4],xmm2[5],xmm4[5],xmm2[6],xmm4[6],xmm2[7],xmm4[7]
; AVX2-FP-NEXT: vpunpckldq {{.*#+}} xmm11 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
; AVX2-FP-NEXT: vpermq {{.*#+}} ymm11 = ymm11[0,1,1,3]
; AVX2-FP-NEXT: vpblendd {{.*#+}} ymm7 = ymm11[0,1],ymm7[2,3],ymm11[4,5],ymm7[6,7]
; AVX2-FP-NEXT: vmovdqu %ymm7, {{[-0-9]+}}(%r{{[sb]}}p) # 32-byte Spill
; AVX2-FP-NEXT: vpunpckhdq {{.*#+}} xmm3 = xmm14[2],xmm3[2],xmm14[3],xmm3[3]
; AVX2-FP-NEXT: vpunpckhdq {{.*#+}} xmm0 = xmm0[2],xmm1[2],xmm0[3],xmm1[3]
; AVX2-FP-NEXT: vpermq {{.*#+}} ymm1 = ymm3[0,0,2,1]
; AVX2-FP-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,1,1,3]
; AVX2-FP-NEXT: vpblendd {{.*#+}} ymm0 = ymm0[0,1],ymm1[2,3],ymm0[4,5],ymm1[6,7]
; AVX2-FP-NEXT: vmovdqu %ymm0, {{[-0-9]+}}(%r{{[sb]}}p) # 32-byte Spill
; AVX2-FP-NEXT: vpunpcklwd {{.*#+}} xmm0 = xmm9[0],xmm10[0],xmm9[1],xmm10[1],xmm9[2],xmm10[2],xmm9[3],xmm10[3]
; AVX2-FP-NEXT: vpunpcklwd {{.*#+}} xmm1 = xmm15[0],xmm8[0],xmm15[1],xmm8[1],xmm15[2],xmm8[2],xmm15[3],xmm8[3]
; AVX2-FP-NEXT: vpunpcklwd {{.*#+}} xmm5 = xmm5[0],xmm6[0],xmm5[1],xmm6[1],xmm5[2],xmm6[2],xmm5[3],xmm6[3]
; AVX2-FP-NEXT: vpunpcklwd {{.*#+}} xmm2 = xmm2[0],xmm4[0],xmm2[1],xmm4[1],xmm2[2],xmm4[2],xmm2[3],xmm4[3]
; AVX2-FP-NEXT: vpunpckldq {{.*#+}} xmm4 = xmm1[0],xmm0[0],xmm1[1],xmm0[1]
; AVX2-FP-NEXT: vpermq {{.*#+}} ymm4 = ymm4[0,0,2,1]
; AVX2-FP-NEXT: vpunpckldq {{.*#+}} xmm6 = xmm2[0],xmm5[0],xmm2[1],xmm5[1]
; AVX2-FP-NEXT: vpermq {{.*#+}} ymm6 = ymm6[0,1,1,3]
; AVX2-FP-NEXT: vpblendd {{.*#+}} ymm3 = ymm6[0,1],ymm4[2,3],ymm6[4,5],ymm4[6,7]
; AVX2-FP-NEXT: vmovdqu %ymm3, {{[-0-9]+}}(%r{{[sb]}}p) # 32-byte Spill
; AVX2-FP-NEXT: vpunpckhdq {{.*#+}} xmm0 = xmm1[2],xmm0[2],xmm1[3],xmm0[3]
; AVX2-FP-NEXT: vpunpckhdq {{.*#+}} xmm1 = xmm2[2],xmm5[2],xmm2[3],xmm5[3]
; AVX2-FP-NEXT: vmovdqa 32(%rdi), %ymm14
; AVX2-FP-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,0,2,1]
; AVX2-FP-NEXT: vpermq {{.*#+}} ymm1 = ymm1[0,1,1,3]
; AVX2-FP-NEXT: vpblendd {{.*#+}} ymm0 = ymm1[0,1],ymm0[2,3],ymm1[4,5],ymm0[6,7]
; AVX2-FP-NEXT: vmovdqu %ymm0, {{[-0-9]+}}(%r{{[sb]}}p) # 32-byte Spill
; AVX2-FP-NEXT: vmovdqa 32(%r8), %ymm15
; AVX2-FP-NEXT: vmovdqa (%rsp), %xmm0 # 16-byte Reload
; AVX2-FP-NEXT: vpunpckhwd {{[-0-9]+}}(%r{{[sb]}}p), %xmm0, %xmm1 # 16-byte Folded Reload
; AVX2-FP-NEXT: # xmm1 = xmm0[4],mem[4],xmm0[5],mem[5],xmm0[6],mem[6],xmm0[7],mem[7]
; AVX2-FP-NEXT: vmovdqa 32(%r9), %ymm4
; AVX2-FP-NEXT: vmovdqa {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Reload
; AVX2-FP-NEXT: vpunpckhwd {{[-0-9]+}}(%r{{[sb]}}p), %xmm0, %xmm2 # 16-byte Folded Reload
; AVX2-FP-NEXT: # xmm2 = xmm0[4],mem[4],xmm0[5],mem[5],xmm0[6],mem[6],xmm0[7],mem[7]
; AVX2-FP-NEXT: vmovdqa 32(%r10), %ymm6
; AVX2-FP-NEXT: vmovdqa {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Reload
; AVX2-FP-NEXT: vpunpckhwd {{[-0-9]+}}(%r{{[sb]}}p), %xmm0, %xmm7 # 16-byte Folded Reload
; AVX2-FP-NEXT: # xmm7 = xmm0[4],mem[4],xmm0[5],mem[5],xmm0[6],mem[6],xmm0[7],mem[7]
; AVX2-FP-NEXT: vpunpckldq {{.*#+}} xmm8 = xmm2[0],xmm1[0],xmm2[1],xmm1[1]
; AVX2-FP-NEXT: vpermq {{.*#+}} ymm8 = ymm8[0,0,2,1]
; AVX2-FP-NEXT: vpunpckhwd {{.*#+}} xmm9 = xmm13[4],xmm12[4],xmm13[5],xmm12[5],xmm13[6],xmm12[6],xmm13[7],xmm12[7]
; AVX2-FP-NEXT: vpunpckldq {{.*#+}} xmm10 = xmm9[0],xmm7[0],xmm9[1],xmm7[1]
; AVX2-FP-NEXT: vpermq {{.*#+}} ymm10 = ymm10[0,1,1,3]
; AVX2-FP-NEXT: vpblendd {{.*#+}} ymm0 = ymm10[0,1],ymm8[2,3],ymm10[4,5],ymm8[6,7]
; AVX2-FP-NEXT: vmovdqu %ymm0, (%rsp) # 32-byte Spill
; AVX2-FP-NEXT: vmovdqa 32(%rax), %ymm10
; AVX2-FP-NEXT: vpunpckhdq {{.*#+}} xmm1 = xmm2[2],xmm1[2],xmm2[3],xmm1[3]
; AVX2-FP-NEXT: vpermq {{.*#+}} ymm1 = ymm1[0,0,2,1]
; AVX2-FP-NEXT: vpunpckhdq {{.*#+}} xmm2 = xmm9[2],xmm7[2],xmm9[3],xmm7[3]
; AVX2-FP-NEXT: vpermq {{.*#+}} ymm2 = ymm2[0,1,1,3]
; AVX2-FP-NEXT: vpblendd {{.*#+}} ymm0 = ymm2[0,1],ymm1[2,3],ymm2[4,5],ymm1[6,7]
; AVX2-FP-NEXT: vmovdqu %ymm0, {{[-0-9]+}}(%r{{[sb]}}p) # 32-byte Spill
; AVX2-FP-NEXT: vpunpckhwd {{.*#+}} ymm3 = ymm6[4],ymm10[4],ymm6[5],ymm10[5],ymm6[6],ymm10[6],ymm6[7],ymm10[7],ymm6[12],ymm10[12],ymm6[13],ymm10[13],ymm6[14],ymm10[14],ymm6[15],ymm10[15]
; AVX2-FP-NEXT: vpunpckhwd {{.*#+}} ymm2 = ymm15[4],ymm4[4],ymm15[5],ymm4[5],ymm15[6],ymm4[6],ymm15[7],ymm4[7],ymm15[12],ymm4[12],ymm15[13],ymm4[13],ymm15[14],ymm4[14],ymm15[15],ymm4[15]
; AVX2-FP-NEXT: vpunpckldq {{.*#+}} ymm8 = ymm2[0],ymm3[0],ymm2[1],ymm3[1],ymm2[4],ymm3[4],ymm2[5],ymm3[5]
; AVX2-FP-NEXT: vpermq {{.*#+}} ymm8 = ymm8[0,2,2,3]
; AVX2-FP-NEXT: vmovdqa 32(%rsi), %ymm11
; AVX2-FP-NEXT: vmovdqa 32(%rdx), %ymm13
; AVX2-FP-NEXT: vmovdqa 32(%rcx), %ymm9
; AVX2-FP-NEXT: vpunpckhwd {{.*#+}} ymm1 = ymm13[4],ymm9[4],ymm13[5],ymm9[5],ymm13[6],ymm9[6],ymm13[7],ymm9[7],ymm13[12],ymm9[12],ymm13[13],ymm9[13],ymm13[14],ymm9[14],ymm13[15],ymm9[15]
; AVX2-FP-NEXT: vpunpckhwd {{.*#+}} ymm0 = ymm14[4],ymm11[4],ymm14[5],ymm11[5],ymm14[6],ymm11[6],ymm14[7],ymm11[7],ymm14[12],ymm11[12],ymm14[13],ymm11[13],ymm14[14],ymm11[14],ymm14[15],ymm11[15]
; AVX2-FP-NEXT: vpunpckldq {{.*#+}} ymm5 = ymm0[0],ymm1[0],ymm0[1],ymm1[1],ymm0[4],ymm1[4],ymm0[5],ymm1[5]
; AVX2-FP-NEXT: vpermq {{.*#+}} ymm5 = ymm5[2,1,3,3]
; AVX2-FP-NEXT: vpblendd {{.*#+}} ymm5 = ymm5[0,1],ymm8[2,3],ymm5[4,5],ymm8[6,7]
; AVX2-FP-NEXT: vmovdqu %ymm5, {{[-0-9]+}}(%r{{[sb]}}p) # 32-byte Spill
; AVX2-FP-NEXT: vpunpckhdq {{.*#+}} ymm2 = ymm2[2],ymm3[2],ymm2[3],ymm3[3],ymm2[6],ymm3[6],ymm2[7],ymm3[7]
; AVX2-FP-NEXT: vpunpckhdq {{.*#+}} ymm0 = ymm0[2],ymm1[2],ymm0[3],ymm1[3],ymm0[6],ymm1[6],ymm0[7],ymm1[7]
; AVX2-FP-NEXT: vpermq {{.*#+}} ymm1 = ymm2[0,2,2,3]
; AVX2-FP-NEXT: vpermq {{.*#+}} ymm0 = ymm0[2,1,3,3]
; AVX2-FP-NEXT: vpblendd {{.*#+}} ymm0 = ymm0[0,1],ymm1[2,3],ymm0[4,5],ymm1[6,7]
; AVX2-FP-NEXT: vmovdqu %ymm0, {{[-0-9]+}}(%r{{[sb]}}p) # 32-byte Spill
; AVX2-FP-NEXT: vpunpcklwd {{.*#+}} ymm0 = ymm6[0],ymm10[0],ymm6[1],ymm10[1],ymm6[2],ymm10[2],ymm6[3],ymm10[3],ymm6[8],ymm10[8],ymm6[9],ymm10[9],ymm6[10],ymm10[10],ymm6[11],ymm10[11]
; AVX2-FP-NEXT: vpunpcklwd {{.*#+}} ymm2 = ymm15[0],ymm4[0],ymm15[1],ymm4[1],ymm15[2],ymm4[2],ymm15[3],ymm4[3],ymm15[8],ymm4[8],ymm15[9],ymm4[9],ymm15[10],ymm4[10],ymm15[11],ymm4[11]
; AVX2-FP-NEXT: vpunpcklwd {{.*#+}} ymm3 = ymm13[0],ymm9[0],ymm13[1],ymm9[1],ymm13[2],ymm9[2],ymm13[3],ymm9[3],ymm13[8],ymm9[8],ymm13[9],ymm9[9],ymm13[10],ymm9[10],ymm13[11],ymm9[11]
; AVX2-FP-NEXT: vpunpckldq {{.*#+}} ymm4 = ymm2[0],ymm0[0],ymm2[1],ymm0[1],ymm2[4],ymm0[4],ymm2[5],ymm0[5]
; AVX2-FP-NEXT: vpermq {{.*#+}} ymm4 = ymm4[0,2,2,3]
; AVX2-FP-NEXT: vpunpcklwd {{.*#+}} ymm5 = ymm14[0],ymm11[0],ymm14[1],ymm11[1],ymm14[2],ymm11[2],ymm14[3],ymm11[3],ymm14[8],ymm11[8],ymm14[9],ymm11[9],ymm14[10],ymm11[10],ymm14[11],ymm11[11]
; AVX2-FP-NEXT: vpunpckldq {{.*#+}} ymm6 = ymm5[0],ymm3[0],ymm5[1],ymm3[1],ymm5[4],ymm3[4],ymm5[5],ymm3[5]
; AVX2-FP-NEXT: vpermq {{.*#+}} ymm6 = ymm6[2,1,3,3]
; AVX2-FP-NEXT: vpblendd {{.*#+}} ymm10 = ymm6[0,1],ymm4[2,3],ymm6[4,5],ymm4[6,7]
; AVX2-FP-NEXT: vmovdqa (%r8), %ymm8
; AVX2-FP-NEXT: vpunpckhdq {{.*#+}} ymm0 = ymm2[2],ymm0[2],ymm2[3],ymm0[3],ymm2[6],ymm0[6],ymm2[7],ymm0[7]
; AVX2-FP-NEXT: vmovdqa (%r9), %ymm7
; AVX2-FP-NEXT: vpunpckhdq {{.*#+}} ymm3 = ymm5[2],ymm3[2],ymm5[3],ymm3[3],ymm5[6],ymm3[6],ymm5[7],ymm3[7]
; AVX2-FP-NEXT: vmovdqa (%r10), %ymm5
; AVX2-FP-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,2,2,3]
; AVX2-FP-NEXT: vpermq {{.*#+}} ymm3 = ymm3[2,1,3,3]
; AVX2-FP-NEXT: vpblendd {{.*#+}} ymm11 = ymm3[0,1],ymm0[2,3],ymm3[4,5],ymm0[6,7]
; AVX2-FP-NEXT: vmovdqa (%rax), %ymm4
; AVX2-FP-NEXT: vpunpckhwd {{.*#+}} ymm3 = ymm5[4],ymm4[4],ymm5[5],ymm4[5],ymm5[6],ymm4[6],ymm5[7],ymm4[7],ymm5[12],ymm4[12],ymm5[13],ymm4[13],ymm5[14],ymm4[14],ymm5[15],ymm4[15]
; AVX2-FP-NEXT: vpunpckhwd {{.*#+}} ymm6 = ymm8[4],ymm7[4],ymm8[5],ymm7[5],ymm8[6],ymm7[6],ymm8[7],ymm7[7],ymm8[12],ymm7[12],ymm8[13],ymm7[13],ymm8[14],ymm7[14],ymm8[15],ymm7[15]
; AVX2-FP-NEXT: vpunpckldq {{.*#+}} ymm9 = ymm6[0],ymm3[0],ymm6[1],ymm3[1],ymm6[4],ymm3[4],ymm6[5],ymm3[5]
; AVX2-FP-NEXT: vpermq {{.*#+}} ymm9 = ymm9[0,2,2,3]
; AVX2-FP-NEXT: vmovdqa (%rdi), %ymm13
; AVX2-FP-NEXT: vmovdqa (%rsi), %ymm14
; AVX2-FP-NEXT: vmovdqa (%rdx), %ymm15
; AVX2-FP-NEXT: vmovdqa (%rcx), %ymm2
; AVX2-FP-NEXT: vpunpckhwd {{.*#+}} ymm1 = ymm15[4],ymm2[4],ymm15[5],ymm2[5],ymm15[6],ymm2[6],ymm15[7],ymm2[7],ymm15[12],ymm2[12],ymm15[13],ymm2[13],ymm15[14],ymm2[14],ymm15[15],ymm2[15]
; AVX2-FP-NEXT: vpunpckhwd {{.*#+}} ymm0 = ymm13[4],ymm14[4],ymm13[5],ymm14[5],ymm13[6],ymm14[6],ymm13[7],ymm14[7],ymm13[12],ymm14[12],ymm13[13],ymm14[13],ymm13[14],ymm14[14],ymm13[15],ymm14[15]
; AVX2-FP-NEXT: vpunpckldq {{.*#+}} ymm12 = ymm0[0],ymm1[0],ymm0[1],ymm1[1],ymm0[4],ymm1[4],ymm0[5],ymm1[5]
; AVX2-FP-NEXT: vpermq {{.*#+}} ymm12 = ymm12[2,1,3,3]
; AVX2-FP-NEXT: vpblendd {{.*#+}} ymm9 = ymm12[0,1],ymm9[2,3],ymm12[4,5],ymm9[6,7]
; AVX2-FP-NEXT: vpunpckhdq {{.*#+}} ymm3 = ymm6[2],ymm3[2],ymm6[3],ymm3[3],ymm6[6],ymm3[6],ymm6[7],ymm3[7]
; AVX2-FP-NEXT: vpunpckhdq {{.*#+}} ymm0 = ymm0[2],ymm1[2],ymm0[3],ymm1[3],ymm0[6],ymm1[6],ymm0[7],ymm1[7]
; AVX2-FP-NEXT: vpermq {{.*#+}} ymm1 = ymm3[0,2,2,3]
; AVX2-FP-NEXT: vpermq {{.*#+}} ymm0 = ymm0[2,1,3,3]
; AVX2-FP-NEXT: vpblendd {{.*#+}} ymm0 = ymm0[0,1],ymm1[2,3],ymm0[4,5],ymm1[6,7]
; AVX2-FP-NEXT: vpunpcklwd {{.*#+}} ymm1 = ymm5[0],ymm4[0],ymm5[1],ymm4[1],ymm5[2],ymm4[2],ymm5[3],ymm4[3],ymm5[8],ymm4[8],ymm5[9],ymm4[9],ymm5[10],ymm4[10],ymm5[11],ymm4[11]
; AVX2-FP-NEXT: vpunpcklwd {{.*#+}} ymm3 = ymm8[0],ymm7[0],ymm8[1],ymm7[1],ymm8[2],ymm7[2],ymm8[3],ymm7[3],ymm8[8],ymm7[8],ymm8[9],ymm7[9],ymm8[10],ymm7[10],ymm8[11],ymm7[11]
; AVX2-FP-NEXT: vpunpcklwd {{.*#+}} ymm2 = ymm15[0],ymm2[0],ymm15[1],ymm2[1],ymm15[2],ymm2[2],ymm15[3],ymm2[3],ymm15[8],ymm2[8],ymm15[9],ymm2[9],ymm15[10],ymm2[10],ymm15[11],ymm2[11]
; AVX2-FP-NEXT: vpunpcklwd {{.*#+}} ymm4 = ymm13[0],ymm14[0],ymm13[1],ymm14[1],ymm13[2],ymm14[2],ymm13[3],ymm14[3],ymm13[8],ymm14[8],ymm13[9],ymm14[9],ymm13[10],ymm14[10],ymm13[11],ymm14[11]
; AVX2-FP-NEXT: vpunpckldq {{.*#+}} ymm5 = ymm3[0],ymm1[0],ymm3[1],ymm1[1],ymm3[4],ymm1[4],ymm3[5],ymm1[5]
; AVX2-FP-NEXT: vpermq {{.*#+}} ymm5 = ymm5[0,2,2,3]
; AVX2-FP-NEXT: vpunpckldq {{.*#+}} ymm6 = ymm4[0],ymm2[0],ymm4[1],ymm2[1],ymm4[4],ymm2[4],ymm4[5],ymm2[5]
; AVX2-FP-NEXT: vpermq {{.*#+}} ymm6 = ymm6[2,1,3,3]
; AVX2-FP-NEXT: vpblendd {{.*#+}} ymm5 = ymm6[0,1],ymm5[2,3],ymm6[4,5],ymm5[6,7]
; AVX2-FP-NEXT: vpunpckhdq {{.*#+}} ymm1 = ymm3[2],ymm1[2],ymm3[3],ymm1[3],ymm3[6],ymm1[6],ymm3[7],ymm1[7]
; AVX2-FP-NEXT: vpunpckhdq {{.*#+}} ymm2 = ymm4[2],ymm2[2],ymm4[3],ymm2[3],ymm4[6],ymm2[6],ymm4[7],ymm2[7]
; AVX2-FP-NEXT: vpermq {{.*#+}} ymm1 = ymm1[0,2,2,3]
; AVX2-FP-NEXT: vpermq {{.*#+}} ymm2 = ymm2[2,1,3,3]
; AVX2-FP-NEXT: vpblendd {{.*#+}} ymm1 = ymm2[0,1],ymm1[2,3],ymm2[4,5],ymm1[6,7]
; AVX2-FP-NEXT: movq {{[0-9]+}}(%rsp), %rax
; AVX2-FP-NEXT: vmovdqa %ymm1, 160(%rax)
; AVX2-FP-NEXT: vmovdqa %ymm5, 128(%rax)
; AVX2-FP-NEXT: vmovdqa %ymm0, 224(%rax)
; AVX2-FP-NEXT: vmovdqa %ymm9, 192(%rax)
; AVX2-FP-NEXT: vmovdqa %ymm11, 416(%rax)
; AVX2-FP-NEXT: vmovdqa %ymm10, 384(%rax)
; AVX2-FP-NEXT: vmovups {{[-0-9]+}}(%r{{[sb]}}p), %ymm0 # 32-byte Reload
; AVX2-FP-NEXT: vmovaps %ymm0, 480(%rax)
; AVX2-FP-NEXT: vmovups {{[-0-9]+}}(%r{{[sb]}}p), %ymm0 # 32-byte Reload
; AVX2-FP-NEXT: vmovaps %ymm0, 448(%rax)
; AVX2-FP-NEXT: vmovups {{[-0-9]+}}(%r{{[sb]}}p), %ymm0 # 32-byte Reload
; AVX2-FP-NEXT: vmovaps %ymm0, 96(%rax)
; AVX2-FP-NEXT: vmovups (%rsp), %ymm0 # 32-byte Reload
; AVX2-FP-NEXT: vmovaps %ymm0, 64(%rax)
; AVX2-FP-NEXT: vmovups {{[-0-9]+}}(%r{{[sb]}}p), %ymm0 # 32-byte Reload
; AVX2-FP-NEXT: vmovaps %ymm0, 288(%rax)
; AVX2-FP-NEXT: vmovups {{[-0-9]+}}(%r{{[sb]}}p), %ymm0 # 32-byte Reload
; AVX2-FP-NEXT: vmovaps %ymm0, 256(%rax)
; AVX2-FP-NEXT: vmovups {{[-0-9]+}}(%r{{[sb]}}p), %ymm0 # 32-byte Reload
; AVX2-FP-NEXT: vmovaps %ymm0, 352(%rax)
; AVX2-FP-NEXT: vmovups {{[-0-9]+}}(%r{{[sb]}}p), %ymm0 # 32-byte Reload
; AVX2-FP-NEXT: vmovaps %ymm0, 320(%rax)
; AVX2-FP-NEXT: vmovups {{[-0-9]+}}(%r{{[sb]}}p), %ymm0 # 32-byte Reload
; AVX2-FP-NEXT: vmovaps %ymm0, (%rax)
; AVX2-FP-NEXT: vmovups {{[-0-9]+}}(%r{{[sb]}}p), %ymm0 # 32-byte Reload
; AVX2-FP-NEXT: vmovaps %ymm0, 32(%rax)
; AVX2-FP-NEXT: addq $232, %rsp
; AVX2-FP-NEXT: vzeroupper
; AVX2-FP-NEXT: retq
;
; AVX2-FCP-LABEL: store_i16_stride8_vf32:
; AVX2-FCP: # %bb.0:
; AVX2-FCP-NEXT: subq $296, %rsp # imm = 0x128
; AVX2-FCP-NEXT: movq {{[0-9]+}}(%rsp), %rax
; AVX2-FCP-NEXT: movq {{[0-9]+}}(%rsp), %r10
; AVX2-FCP-NEXT: vmovdqa (%rax), %xmm0
; AVX2-FCP-NEXT: vmovdqa %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
; AVX2-FCP-NEXT: vmovdqa (%r10), %xmm1
; AVX2-FCP-NEXT: vmovdqa %xmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
; AVX2-FCP-NEXT: vpunpcklwd {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1],xmm1[2],xmm0[2],xmm1[3],xmm0[3]
; AVX2-FCP-NEXT: vpmovsxbd {{.*#+}} ymm4 = [2,2,2,2,0,0,3,3]
; AVX2-FCP-NEXT: vpermd %ymm1, %ymm4, %ymm0
; AVX2-FCP-NEXT: vmovdqa (%r9), %xmm3
; AVX2-FCP-NEXT: vmovdqa %xmm3, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
; AVX2-FCP-NEXT: vmovdqa (%r8), %xmm2
; AVX2-FCP-NEXT: vmovdqa %xmm2, (%rsp) # 16-byte Spill
; AVX2-FCP-NEXT: vpunpcklwd {{.*#+}} xmm2 = xmm2[0],xmm3[0],xmm2[1],xmm3[1],xmm2[2],xmm3[2],xmm2[3],xmm3[3]
; AVX2-FCP-NEXT: vpermd %ymm2, %ymm4, %ymm3
; AVX2-FCP-NEXT: vpblendd {{.*#+}} ymm0 = ymm3[0,1,2],ymm0[3],ymm3[4,5,6],ymm0[7]
; AVX2-FCP-NEXT: vmovdqa (%rcx), %xmm4
; AVX2-FCP-NEXT: vmovdqa %xmm4, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
; AVX2-FCP-NEXT: vmovdqa (%rdx), %xmm3
; AVX2-FCP-NEXT: vmovdqa %xmm3, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
; AVX2-FCP-NEXT: vpunpcklwd {{.*#+}} xmm3 = xmm3[0],xmm4[0],xmm3[1],xmm4[1],xmm3[2],xmm4[2],xmm3[3],xmm4[3]
; AVX2-FCP-NEXT: vpmovsxbd {{.*#+}} ymm7 = [2,2,3,3,3,3,0,0]
; AVX2-FCP-NEXT: vpermd %ymm3, %ymm7, %ymm4
; AVX2-FCP-NEXT: vmovdqa (%rsi), %xmm6
; AVX2-FCP-NEXT: vmovdqa %xmm6, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
; AVX2-FCP-NEXT: vmovdqa (%rdi), %xmm5
; AVX2-FCP-NEXT: vmovdqa %xmm5, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
; AVX2-FCP-NEXT: vpunpcklwd {{.*#+}} xmm5 = xmm5[0],xmm6[0],xmm5[1],xmm6[1],xmm5[2],xmm6[2],xmm5[3],xmm6[3]
; AVX2-FCP-NEXT: vpermd %ymm5, %ymm7, %ymm6
; AVX2-FCP-NEXT: vpblendd {{.*#+}} ymm4 = ymm6[0],ymm4[1],ymm6[2,3,4],ymm4[5],ymm6[6,7]
; AVX2-FCP-NEXT: vpblendd {{.*#+}} ymm0 = ymm4[0,1],ymm0[2,3],ymm4[4,5],ymm0[6,7]
; AVX2-FCP-NEXT: vmovdqu %ymm0, {{[-0-9]+}}(%r{{[sb]}}p) # 32-byte Spill
; AVX2-FCP-NEXT: vpmovsxbd {{.*#+}} ymm0 = [0,0,0,0,0,0,1,1]
; AVX2-FCP-NEXT: vpermd %ymm1, %ymm0, %ymm4
; AVX2-FCP-NEXT: vmovdqa %ymm0, %ymm1
; AVX2-FCP-NEXT: vpmovsxbq {{.*#+}} ymm0 = [0,0,0,1]
; AVX2-FCP-NEXT: vpermd %ymm2, %ymm0, %ymm2
; AVX2-FCP-NEXT: vmovdqa %ymm0, %ymm7
; AVX2-FCP-NEXT: vpblendd {{.*#+}} ymm4 = ymm2[0,1,2],ymm4[3],ymm2[4,5,6],ymm4[7]
; AVX2-FCP-NEXT: vpmovsxbd {{.*#+}} ymm0 = [0,0,1,1,1,1,0,0]
; AVX2-FCP-NEXT: vpermd %ymm3, %ymm0, %ymm6
; AVX2-FCP-NEXT: vmovdqa %ymm0, %ymm3
; AVX2-FCP-NEXT: vpmovsxbq {{.*#+}} ymm14 = [0,1,1,0]
; AVX2-FCP-NEXT: vpermd %ymm5, %ymm14, %ymm5
; AVX2-FCP-NEXT: vpblendd {{.*#+}} ymm5 = ymm5[0],ymm6[1],ymm5[2,3,4],ymm6[5],ymm5[6,7]
; AVX2-FCP-NEXT: vpblendd {{.*#+}} ymm0 = ymm5[0,1],ymm4[2,3],ymm5[4,5],ymm4[6,7]
; AVX2-FCP-NEXT: vmovdqu %ymm0, {{[-0-9]+}}(%r{{[sb]}}p) # 32-byte Spill
; AVX2-FCP-NEXT: vmovdqa 32(%rax), %xmm9
; AVX2-FCP-NEXT: vmovdqa 32(%r10), %xmm8
; AVX2-FCP-NEXT: vmovdqa 32(%r9), %xmm13
; AVX2-FCP-NEXT: vmovdqa 32(%r8), %xmm10
; AVX2-FCP-NEXT: vpunpckhwd {{.*#+}} xmm4 = xmm8[4],xmm9[4],xmm8[5],xmm9[5],xmm8[6],xmm9[6],xmm8[7],xmm9[7]
; AVX2-FCP-NEXT: vpermd %ymm4, %ymm1, %ymm0
; AVX2-FCP-NEXT: vpunpckhwd {{.*#+}} xmm2 = xmm10[4],xmm13[4],xmm10[5],xmm13[5],xmm10[6],xmm13[6],xmm10[7],xmm13[7]
; AVX2-FCP-NEXT: vpermd %ymm2, %ymm7, %ymm11
; AVX2-FCP-NEXT: vpblendd {{.*#+}} ymm12 = ymm11[0,1,2],ymm0[3],ymm11[4,5,6],ymm0[7]
; AVX2-FCP-NEXT: vmovdqa 32(%rcx), %xmm11
; AVX2-FCP-NEXT: vmovdqa 32(%rdx), %xmm5
; AVX2-FCP-NEXT: vmovdqa 32(%rsi), %xmm7
; AVX2-FCP-NEXT: vmovdqa 32(%rdi), %xmm6
; AVX2-FCP-NEXT: vpunpckhwd {{.*#+}} xmm1 = xmm5[4],xmm11[4],xmm5[5],xmm11[5],xmm5[6],xmm11[6],xmm5[7],xmm11[7]
; AVX2-FCP-NEXT: vpermd %ymm1, %ymm3, %ymm3
; AVX2-FCP-NEXT: vpunpckhwd {{.*#+}} xmm0 = xmm6[4],xmm7[4],xmm6[5],xmm7[5],xmm6[6],xmm7[6],xmm6[7],xmm7[7]
; AVX2-FCP-NEXT: vpermd %ymm0, %ymm14, %ymm14
; AVX2-FCP-NEXT: vpblendd {{.*#+}} ymm3 = ymm14[0],ymm3[1],ymm14[2,3,4],ymm3[5],ymm14[6,7]
; AVX2-FCP-NEXT: vpblendd {{.*#+}} ymm3 = ymm3[0,1],ymm12[2,3],ymm3[4,5],ymm12[6,7]
; AVX2-FCP-NEXT: vmovdqu %ymm3, {{[-0-9]+}}(%r{{[sb]}}p) # 32-byte Spill
; AVX2-FCP-NEXT: vpmovsxbd {{.*#+}} ymm12 = [2,2,2,2,0,0,3,3]
; AVX2-FCP-NEXT: vpermd %ymm4, %ymm12, %ymm3
; AVX2-FCP-NEXT: vpermd %ymm2, %ymm12, %ymm2
; AVX2-FCP-NEXT: vpblendd {{.*#+}} ymm2 = ymm2[0,1,2],ymm3[3],ymm2[4,5,6],ymm3[7]
; AVX2-FCP-NEXT: vpmovsxbd {{.*#+}} ymm15 = [2,2,3,3,3,3,0,0]
; AVX2-FCP-NEXT: vpermd %ymm1, %ymm15, %ymm1
; AVX2-FCP-NEXT: vpermd %ymm0, %ymm15, %ymm0
; AVX2-FCP-NEXT: vpblendd {{.*#+}} ymm0 = ymm0[0],ymm1[1],ymm0[2,3,4],ymm1[5],ymm0[6,7]
; AVX2-FCP-NEXT: vpblendd {{.*#+}} ymm0 = ymm0[0,1],ymm2[2,3],ymm0[4,5],ymm2[6,7]
; AVX2-FCP-NEXT: vmovdqu %ymm0, {{[-0-9]+}}(%r{{[sb]}}p) # 32-byte Spill
; AVX2-FCP-NEXT: vpunpcklwd {{.*#+}} xmm0 = xmm8[0],xmm9[0],xmm8[1],xmm9[1],xmm8[2],xmm9[2],xmm8[3],xmm9[3]
; AVX2-FCP-NEXT: vpunpcklwd {{.*#+}} xmm1 = xmm10[0],xmm13[0],xmm10[1],xmm13[1],xmm10[2],xmm13[2],xmm10[3],xmm13[3]
; AVX2-FCP-NEXT: vpmovsxbd {{.*#+}} ymm8 = [0,0,0,0,0,0,1,1]
; AVX2-FCP-NEXT: vpermd %ymm0, %ymm8, %ymm2
; AVX2-FCP-NEXT: vpmovsxbq {{.*#+}} ymm10 = [0,0,0,1]
; AVX2-FCP-NEXT: vpermd %ymm1, %ymm10, %ymm3
; AVX2-FCP-NEXT: vpblendd {{.*#+}} ymm2 = ymm3[0,1,2],ymm2[3],ymm3[4,5,6],ymm2[7]
; AVX2-FCP-NEXT: vpunpcklwd {{.*#+}} xmm3 = xmm5[0],xmm11[0],xmm5[1],xmm11[1],xmm5[2],xmm11[2],xmm5[3],xmm11[3]
; AVX2-FCP-NEXT: vpunpcklwd {{.*#+}} xmm4 = xmm6[0],xmm7[0],xmm6[1],xmm7[1],xmm6[2],xmm7[2],xmm6[3],xmm7[3]
; AVX2-FCP-NEXT: vpmovsxbd {{.*#+}} ymm11 = [0,0,1,1,1,1,0,0]
; AVX2-FCP-NEXT: vpermd %ymm3, %ymm11, %ymm5
; AVX2-FCP-NEXT: vpmovsxbq {{.*#+}} ymm7 = [0,1,1,0]
; AVX2-FCP-NEXT: vpermd %ymm4, %ymm7, %ymm6
; AVX2-FCP-NEXT: vpblendd {{.*#+}} ymm5 = ymm6[0],ymm5[1],ymm6[2,3,4],ymm5[5],ymm6[6,7]
; AVX2-FCP-NEXT: vpblendd {{.*#+}} ymm2 = ymm5[0,1],ymm2[2,3],ymm5[4,5],ymm2[6,7]
; AVX2-FCP-NEXT: vmovdqu %ymm2, {{[-0-9]+}}(%r{{[sb]}}p) # 32-byte Spill
; AVX2-FCP-NEXT: vpermd %ymm0, %ymm12, %ymm0
; AVX2-FCP-NEXT: vpermd %ymm1, %ymm12, %ymm1
; AVX2-FCP-NEXT: vpblendd {{.*#+}} ymm0 = ymm1[0,1,2],ymm0[3],ymm1[4,5,6],ymm0[7]
; AVX2-FCP-NEXT: vpermd %ymm3, %ymm15, %ymm1
; AVX2-FCP-NEXT: vpermd %ymm4, %ymm15, %ymm2
; AVX2-FCP-NEXT: vmovdqa %ymm15, %ymm9
; AVX2-FCP-NEXT: vpblendd {{.*#+}} ymm1 = ymm2[0],ymm1[1],ymm2[2,3,4],ymm1[5],ymm2[6,7]
; AVX2-FCP-NEXT: vpblendd {{.*#+}} ymm0 = ymm1[0,1],ymm0[2,3],ymm1[4,5],ymm0[6,7]
; AVX2-FCP-NEXT: vmovdqu %ymm0, {{[-0-9]+}}(%r{{[sb]}}p) # 32-byte Spill
; AVX2-FCP-NEXT: vmovdqa {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Reload
; AVX2-FCP-NEXT: vpunpckhwd {{[-0-9]+}}(%r{{[sb]}}p), %xmm0, %xmm0 # 16-byte Folded Reload
; AVX2-FCP-NEXT: # xmm0 = xmm0[4],mem[4],xmm0[5],mem[5],xmm0[6],mem[6],xmm0[7],mem[7]
; AVX2-FCP-NEXT: vmovdqa (%rsp), %xmm1 # 16-byte Reload
; AVX2-FCP-NEXT: vpunpckhwd {{[-0-9]+}}(%r{{[sb]}}p), %xmm1, %xmm2 # 16-byte Folded Reload
; AVX2-FCP-NEXT: # xmm2 = xmm1[4],mem[4],xmm1[5],mem[5],xmm1[6],mem[6],xmm1[7],mem[7]
; AVX2-FCP-NEXT: vpermd %ymm0, %ymm8, %ymm1
; AVX2-FCP-NEXT: vpermd %ymm2, %ymm10, %ymm3
; AVX2-FCP-NEXT: vpblendd {{.*#+}} ymm1 = ymm3[0,1,2],ymm1[3],ymm3[4,5,6],ymm1[7]
; AVX2-FCP-NEXT: vmovdqa {{[-0-9]+}}(%r{{[sb]}}p), %xmm3 # 16-byte Reload
; AVX2-FCP-NEXT: vpunpckhwd {{[-0-9]+}}(%r{{[sb]}}p), %xmm3, %xmm3 # 16-byte Folded Reload
; AVX2-FCP-NEXT: # xmm3 = xmm3[4],mem[4],xmm3[5],mem[5],xmm3[6],mem[6],xmm3[7],mem[7]
; AVX2-FCP-NEXT: vmovdqa {{[-0-9]+}}(%r{{[sb]}}p), %xmm4 # 16-byte Reload
; AVX2-FCP-NEXT: vpunpckhwd {{[-0-9]+}}(%r{{[sb]}}p), %xmm4, %xmm4 # 16-byte Folded Reload
; AVX2-FCP-NEXT: # xmm4 = xmm4[4],mem[4],xmm4[5],mem[5],xmm4[6],mem[6],xmm4[7],mem[7]
; AVX2-FCP-NEXT: vmovdqa 32(%r8), %ymm14
; AVX2-FCP-NEXT: vpermd %ymm3, %ymm11, %ymm5
; AVX2-FCP-NEXT: vpermd %ymm4, %ymm7, %ymm6
; AVX2-FCP-NEXT: vpblendd {{.*#+}} ymm5 = ymm6[0],ymm5[1],ymm6[2,3,4],ymm5[5],ymm6[6,7]
; AVX2-FCP-NEXT: vmovdqa 32(%r9), %ymm15
; AVX2-FCP-NEXT: vpblendd {{.*#+}} ymm1 = ymm5[0,1],ymm1[2,3],ymm5[4,5],ymm1[6,7]
; AVX2-FCP-NEXT: vmovdqu %ymm1, {{[-0-9]+}}(%r{{[sb]}}p) # 32-byte Spill
; AVX2-FCP-NEXT: vmovdqa 32(%r10), %ymm8
; AVX2-FCP-NEXT: vpermd %ymm0, %ymm12, %ymm5
; AVX2-FCP-NEXT: vpermd %ymm2, %ymm12, %ymm2
; AVX2-FCP-NEXT: vmovdqa 32(%rax), %ymm7
; AVX2-FCP-NEXT: vpblendd {{.*#+}} ymm2 = ymm2[0,1,2],ymm5[3],ymm2[4,5,6],ymm5[7]
; AVX2-FCP-NEXT: vpermd %ymm3, %ymm9, %ymm3
; AVX2-FCP-NEXT: vpermd %ymm4, %ymm9, %ymm4
; AVX2-FCP-NEXT: vpblendd {{.*#+}} ymm3 = ymm4[0],ymm3[1],ymm4[2,3,4],ymm3[5],ymm4[6,7]
; AVX2-FCP-NEXT: vpblendd {{.*#+}} ymm0 = ymm3[0,1],ymm2[2,3],ymm3[4,5],ymm2[6,7]
; AVX2-FCP-NEXT: vmovdqu %ymm0, {{[-0-9]+}}(%r{{[sb]}}p) # 32-byte Spill
; AVX2-FCP-NEXT: vpunpckhwd {{.*#+}} ymm2 = ymm8[4],ymm7[4],ymm8[5],ymm7[5],ymm8[6],ymm7[6],ymm8[7],ymm7[7],ymm8[12],ymm7[12],ymm8[13],ymm7[13],ymm8[14],ymm7[14],ymm8[15],ymm7[15]
; AVX2-FCP-NEXT: vpmovsxbd {{.*#+}} ymm0 = [0,0,4,4,4,4,6,5]
; AVX2-FCP-NEXT: vpermd %ymm2, %ymm0, %ymm3
; AVX2-FCP-NEXT: vpunpckhwd {{.*#+}} ymm11 = ymm14[4],ymm15[4],ymm14[5],ymm15[5],ymm14[6],ymm15[6],ymm14[7],ymm15[7],ymm14[12],ymm15[12],ymm14[13],ymm15[13],ymm14[14],ymm15[14],ymm14[15],ymm15[15]
; AVX2-FCP-NEXT: vpmovsxbd {{.*#+}} ymm0 = [0,1,4,5,4,5,5,7]
; AVX2-FCP-NEXT: vpermd %ymm11, %ymm0, %ymm4
; AVX2-FCP-NEXT: vpblendd {{.*#+}} ymm5 = ymm4[0,1,2],ymm3[3],ymm4[4,5,6],ymm3[7]
; AVX2-FCP-NEXT: vmovdqa 32(%rdi), %ymm9
; AVX2-FCP-NEXT: vmovdqa 32(%rsi), %ymm6
; AVX2-FCP-NEXT: vmovdqa 32(%rdx), %ymm3
; AVX2-FCP-NEXT: vmovdqa 32(%rcx), %ymm1
; AVX2-FCP-NEXT: vpunpckhwd {{.*#+}} ymm13 = ymm3[4],ymm1[4],ymm3[5],ymm1[5],ymm3[6],ymm1[6],ymm3[7],ymm1[7],ymm3[12],ymm1[12],ymm3[13],ymm1[13],ymm3[14],ymm1[14],ymm3[15],ymm1[15]
; AVX2-FCP-NEXT: vpmovsxbd {{.*#+}} ymm0 = [4,4,2,1,6,5,6,5]
; AVX2-FCP-NEXT: vpermd %ymm13, %ymm0, %ymm12
; AVX2-FCP-NEXT: vpunpckhwd {{.*#+}} ymm0 = ymm9[4],ymm6[4],ymm9[5],ymm6[5],ymm9[6],ymm6[6],ymm9[7],ymm6[7],ymm9[12],ymm6[12],ymm9[13],ymm6[13],ymm9[14],ymm6[14],ymm9[15],ymm6[15]
; AVX2-FCP-NEXT: vpmovsxbd {{.*#+}} ymm4 = [4,5,1,3,5,7,5,7]
; AVX2-FCP-NEXT: vpermd %ymm0, %ymm4, %ymm10
; AVX2-FCP-NEXT: vpblendd {{.*#+}} ymm10 = ymm10[0],ymm12[1],ymm10[2,3,4],ymm12[5],ymm10[6,7]
; AVX2-FCP-NEXT: vpblendd {{.*#+}} ymm5 = ymm10[0,1],ymm5[2,3],ymm10[4,5],ymm5[6,7]
; AVX2-FCP-NEXT: vmovdqu %ymm5, (%rsp) # 32-byte Spill
; AVX2-FCP-NEXT: vpmovsxbd {{.*#+}} ymm4 = [0,2,4,6,4,6,6,7]
; AVX2-FCP-NEXT: vpermd %ymm2, %ymm4, %ymm2
; AVX2-FCP-NEXT: vpmovsxbd {{.*#+}} ymm4 = [2,1,6,5,6,5,7,7]
; AVX2-FCP-NEXT: vpermd %ymm11, %ymm4, %ymm10
; AVX2-FCP-NEXT: vpblendd {{.*#+}} ymm10 = ymm10[0,1,2],ymm2[3],ymm10[4,5,6],ymm2[7]
; AVX2-FCP-NEXT: vpmovsxbd {{.*#+}} ymm2 = [4,6,2,3,6,7,6,7]
; AVX2-FCP-NEXT: vpermd %ymm13, %ymm2, %ymm11
; AVX2-FCP-NEXT: vmovdqa %ymm2, %ymm5
; AVX2-FCP-NEXT: vpmovsxbd {{.*#+}} ymm2 = [6,5,3,3,7,7,7,7]
; AVX2-FCP-NEXT: vpermd %ymm0, %ymm2, %ymm0
; AVX2-FCP-NEXT: vmovdqa %ymm2, %ymm13
; AVX2-FCP-NEXT: vpblendd {{.*#+}} ymm0 = ymm0[0],ymm11[1],ymm0[2,3,4],ymm11[5],ymm0[6,7]
; AVX2-FCP-NEXT: vpblendd {{.*#+}} ymm0 = ymm0[0,1],ymm10[2,3],ymm0[4,5],ymm10[6,7]
; AVX2-FCP-NEXT: vmovdqu %ymm0, {{[-0-9]+}}(%r{{[sb]}}p) # 32-byte Spill
; AVX2-FCP-NEXT: vpunpcklwd {{.*#+}} ymm0 = ymm8[0],ymm7[0],ymm8[1],ymm7[1],ymm8[2],ymm7[2],ymm8[3],ymm7[3],ymm8[8],ymm7[8],ymm8[9],ymm7[9],ymm8[10],ymm7[10],ymm8[11],ymm7[11]
; AVX2-FCP-NEXT: vpunpcklwd {{.*#+}} ymm7 = ymm14[0],ymm15[0],ymm14[1],ymm15[1],ymm14[2],ymm15[2],ymm14[3],ymm15[3],ymm14[8],ymm15[8],ymm14[9],ymm15[9],ymm14[10],ymm15[10],ymm14[11],ymm15[11]
; AVX2-FCP-NEXT: vpmovsxbd {{.*#+}} ymm2 = [0,0,4,4,4,4,6,5]
; AVX2-FCP-NEXT: vpermd %ymm0, %ymm2, %ymm8
; AVX2-FCP-NEXT: vpmovsxbd {{.*#+}} ymm12 = [0,1,4,5,4,5,5,7]
; AVX2-FCP-NEXT: vpermd %ymm7, %ymm12, %ymm10
; AVX2-FCP-NEXT: vpblendd {{.*#+}} ymm8 = ymm10[0,1,2],ymm8[3],ymm10[4,5,6],ymm8[7]
; AVX2-FCP-NEXT: vpunpcklwd {{.*#+}} ymm1 = ymm3[0],ymm1[0],ymm3[1],ymm1[1],ymm3[2],ymm1[2],ymm3[3],ymm1[3],ymm3[8],ymm1[8],ymm3[9],ymm1[9],ymm3[10],ymm1[10],ymm3[11],ymm1[11]
; AVX2-FCP-NEXT: vpunpcklwd {{.*#+}} ymm3 = ymm9[0],ymm6[0],ymm9[1],ymm6[1],ymm9[2],ymm6[2],ymm9[3],ymm6[3],ymm9[8],ymm6[8],ymm9[9],ymm6[9],ymm9[10],ymm6[10],ymm9[11],ymm6[11]
; AVX2-FCP-NEXT: vpmovsxbd {{.*#+}} ymm14 = [4,4,2,1,6,5,6,5]
; AVX2-FCP-NEXT: vpermd %ymm1, %ymm14, %ymm4
; AVX2-FCP-NEXT: vpmovsxbd {{.*#+}} ymm15 = [4,5,1,3,5,7,5,7]
; AVX2-FCP-NEXT: vpermd %ymm3, %ymm15, %ymm6
; AVX2-FCP-NEXT: vpblendd {{.*#+}} ymm4 = ymm6[0],ymm4[1],ymm6[2,3,4],ymm4[5],ymm6[6,7]
; AVX2-FCP-NEXT: vpblendd {{.*#+}} ymm4 = ymm4[0,1],ymm8[2,3],ymm4[4,5],ymm8[6,7]
; AVX2-FCP-NEXT: vmovdqu %ymm4, {{[-0-9]+}}(%r{{[sb]}}p) # 32-byte Spill
; AVX2-FCP-NEXT: vpmovsxbd {{.*#+}} ymm4 = [0,2,4,6,4,6,6,7]
; AVX2-FCP-NEXT: vpermd %ymm0, %ymm4, %ymm0
; AVX2-FCP-NEXT: vpmovsxbd {{.*#+}} ymm4 = [2,1,6,5,6,5,7,7]
; AVX2-FCP-NEXT: vpermd %ymm7, %ymm4, %ymm4
; AVX2-FCP-NEXT: vpblendd {{.*#+}} ymm0 = ymm4[0,1,2],ymm0[3],ymm4[4,5,6],ymm0[7]
; AVX2-FCP-NEXT: vpermd %ymm1, %ymm5, %ymm1
; AVX2-FCP-NEXT: vpermd %ymm3, %ymm13, %ymm3
; AVX2-FCP-NEXT: vpblendd {{.*#+}} ymm1 = ymm3[0],ymm1[1],ymm3[2,3,4],ymm1[5],ymm3[6,7]
; AVX2-FCP-NEXT: vpblendd {{.*#+}} ymm0 = ymm1[0,1],ymm0[2,3],ymm1[4,5],ymm0[6,7]
; AVX2-FCP-NEXT: vmovdqu %ymm0, {{[-0-9]+}}(%r{{[sb]}}p) # 32-byte Spill
; AVX2-FCP-NEXT: vmovdqa (%r8), %ymm13
; AVX2-FCP-NEXT: vmovdqa (%r9), %ymm11
; AVX2-FCP-NEXT: vmovdqa (%r10), %ymm9
; AVX2-FCP-NEXT: vmovdqa (%rax), %ymm5
; AVX2-FCP-NEXT: vpunpckhwd {{.*#+}} ymm6 = ymm9[4],ymm5[4],ymm9[5],ymm5[5],ymm9[6],ymm5[6],ymm9[7],ymm5[7],ymm9[12],ymm5[12],ymm9[13],ymm5[13],ymm9[14],ymm5[14],ymm9[15],ymm5[15]
; AVX2-FCP-NEXT: vpermd %ymm6, %ymm2, %ymm7
; AVX2-FCP-NEXT: vpunpckhwd {{.*#+}} ymm8 = ymm13[4],ymm11[4],ymm13[5],ymm11[5],ymm13[6],ymm11[6],ymm13[7],ymm11[7],ymm13[12],ymm11[12],ymm13[13],ymm11[13],ymm13[14],ymm11[14],ymm13[15],ymm11[15]
; AVX2-FCP-NEXT: vpermd %ymm8, %ymm12, %ymm10
; AVX2-FCP-NEXT: vpblendd {{.*#+}} ymm12 = ymm10[0,1,2],ymm7[3],ymm10[4,5,6],ymm7[7]
; AVX2-FCP-NEXT: vmovdqa (%rdi), %ymm10
; AVX2-FCP-NEXT: vmovdqa (%rsi), %ymm7
; AVX2-FCP-NEXT: vmovdqa (%rdx), %ymm4
; AVX2-FCP-NEXT: vmovdqa (%rcx), %ymm3
; AVX2-FCP-NEXT: vpunpckhwd {{.*#+}} ymm1 = ymm4[4],ymm3[4],ymm4[5],ymm3[5],ymm4[6],ymm3[6],ymm4[7],ymm3[7],ymm4[12],ymm3[12],ymm4[13],ymm3[13],ymm4[14],ymm3[14],ymm4[15],ymm3[15]
; AVX2-FCP-NEXT: vpermd %ymm1, %ymm14, %ymm2
; AVX2-FCP-NEXT: vpunpckhwd {{.*#+}} ymm0 = ymm10[4],ymm7[4],ymm10[5],ymm7[5],ymm10[6],ymm7[6],ymm10[7],ymm7[7],ymm10[12],ymm7[12],ymm10[13],ymm7[13],ymm10[14],ymm7[14],ymm10[15],ymm7[15]
; AVX2-FCP-NEXT: vpermd %ymm0, %ymm15, %ymm14
; AVX2-FCP-NEXT: vpblendd {{.*#+}} ymm2 = ymm14[0],ymm2[1],ymm14[2,3,4],ymm2[5],ymm14[6,7]
; AVX2-FCP-NEXT: vpblendd {{.*#+}} ymm2 = ymm2[0,1],ymm12[2,3],ymm2[4,5],ymm12[6,7]
; AVX2-FCP-NEXT: vpmovsxbd {{.*#+}} ymm12 = [0,2,4,6,4,6,6,7]
; AVX2-FCP-NEXT: vpermd %ymm6, %ymm12, %ymm6
; AVX2-FCP-NEXT: vpmovsxbd {{.*#+}} ymm14 = [2,1,6,5,6,5,7,7]
; AVX2-FCP-NEXT: vpermd %ymm8, %ymm14, %ymm8
; AVX2-FCP-NEXT: vpblendd {{.*#+}} ymm6 = ymm8[0,1,2],ymm6[3],ymm8[4,5,6],ymm6[7]
; AVX2-FCP-NEXT: vpmovsxbd {{.*#+}} ymm15 = [4,6,2,3,6,7,6,7]
; AVX2-FCP-NEXT: vpermd %ymm1, %ymm15, %ymm1
; AVX2-FCP-NEXT: vpmovsxbd {{.*#+}} ymm8 = [6,5,3,3,7,7,7,7]
; AVX2-FCP-NEXT: vpermd %ymm0, %ymm8, %ymm0
; AVX2-FCP-NEXT: vpblendd {{.*#+}} ymm0 = ymm0[0],ymm1[1],ymm0[2,3,4],ymm1[5],ymm0[6,7]
; AVX2-FCP-NEXT: vpblendd {{.*#+}} ymm0 = ymm0[0,1],ymm6[2,3],ymm0[4,5],ymm6[6,7]
; AVX2-FCP-NEXT: vpunpcklwd {{.*#+}} ymm1 = ymm9[0],ymm5[0],ymm9[1],ymm5[1],ymm9[2],ymm5[2],ymm9[3],ymm5[3],ymm9[8],ymm5[8],ymm9[9],ymm5[9],ymm9[10],ymm5[10],ymm9[11],ymm5[11]
; AVX2-FCP-NEXT: vpunpcklwd {{.*#+}} ymm5 = ymm13[0],ymm11[0],ymm13[1],ymm11[1],ymm13[2],ymm11[2],ymm13[3],ymm11[3],ymm13[8],ymm11[8],ymm13[9],ymm11[9],ymm13[10],ymm11[10],ymm13[11],ymm11[11]
; AVX2-FCP-NEXT: vpmovsxbd {{.*#+}} ymm6 = [0,0,4,4,4,4,6,5]
; AVX2-FCP-NEXT: vpermd %ymm1, %ymm6, %ymm6
; AVX2-FCP-NEXT: vpmovsxbd {{.*#+}} ymm8 = [0,1,4,5,4,5,5,7]
; AVX2-FCP-NEXT: vpermd %ymm5, %ymm8, %ymm8
; AVX2-FCP-NEXT: vpblendd {{.*#+}} ymm6 = ymm8[0,1,2],ymm6[3],ymm8[4,5,6],ymm6[7]
; AVX2-FCP-NEXT: vpunpcklwd {{.*#+}} ymm3 = ymm4[0],ymm3[0],ymm4[1],ymm3[1],ymm4[2],ymm3[2],ymm4[3],ymm3[3],ymm4[8],ymm3[8],ymm4[9],ymm3[9],ymm4[10],ymm3[10],ymm4[11],ymm3[11]
; AVX2-FCP-NEXT: vpunpcklwd {{.*#+}} ymm4 = ymm10[0],ymm7[0],ymm10[1],ymm7[1],ymm10[2],ymm7[2],ymm10[3],ymm7[3],ymm10[8],ymm7[8],ymm10[9],ymm7[9],ymm10[10],ymm7[10],ymm10[11],ymm7[11]
; AVX2-FCP-NEXT: vpmovsxbd {{.*#+}} ymm7 = [4,4,2,1,6,5,6,5]
; AVX2-FCP-NEXT: vpermd %ymm3, %ymm7, %ymm7
; AVX2-FCP-NEXT: vpmovsxbd {{.*#+}} ymm8 = [4,5,1,3,5,7,5,7]
; AVX2-FCP-NEXT: vpermd %ymm4, %ymm8, %ymm8
; AVX2-FCP-NEXT: vpblendd {{.*#+}} ymm7 = ymm8[0],ymm7[1],ymm8[2,3,4],ymm7[5],ymm8[6,7]
; AVX2-FCP-NEXT: vpblendd {{.*#+}} ymm6 = ymm7[0,1],ymm6[2,3],ymm7[4,5],ymm6[6,7]
; AVX2-FCP-NEXT: vpermd %ymm1, %ymm12, %ymm1
; AVX2-FCP-NEXT: vpermd %ymm5, %ymm14, %ymm5
; AVX2-FCP-NEXT: vpblendd {{.*#+}} ymm1 = ymm5[0,1,2],ymm1[3],ymm5[4,5,6],ymm1[7]
; AVX2-FCP-NEXT: vpermd %ymm3, %ymm15, %ymm3
; AVX2-FCP-NEXT: vpmovsxbd {{.*#+}} ymm5 = [6,5,3,3,7,7,7,7]
; AVX2-FCP-NEXT: vpermd %ymm4, %ymm5, %ymm4
; AVX2-FCP-NEXT: vpblendd {{.*#+}} ymm3 = ymm4[0],ymm3[1],ymm4[2,3,4],ymm3[5],ymm4[6,7]
; AVX2-FCP-NEXT: vpblendd {{.*#+}} ymm1 = ymm3[0,1],ymm1[2,3],ymm3[4,5],ymm1[6,7]
; AVX2-FCP-NEXT: movq {{[0-9]+}}(%rsp), %rax
; AVX2-FCP-NEXT: vmovdqa %ymm1, 160(%rax)
; AVX2-FCP-NEXT: vmovdqa %ymm6, 128(%rax)
; AVX2-FCP-NEXT: vmovdqa %ymm0, 224(%rax)
; AVX2-FCP-NEXT: vmovdqa %ymm2, 192(%rax)
; AVX2-FCP-NEXT: vmovups {{[-0-9]+}}(%r{{[sb]}}p), %ymm0 # 32-byte Reload
; AVX2-FCP-NEXT: vmovaps %ymm0, 416(%rax)
; AVX2-FCP-NEXT: vmovups {{[-0-9]+}}(%r{{[sb]}}p), %ymm0 # 32-byte Reload
; AVX2-FCP-NEXT: vmovaps %ymm0, 384(%rax)
; AVX2-FCP-NEXT: vmovups {{[-0-9]+}}(%r{{[sb]}}p), %ymm0 # 32-byte Reload
; AVX2-FCP-NEXT: vmovaps %ymm0, 480(%rax)
; AVX2-FCP-NEXT: vmovups (%rsp), %ymm0 # 32-byte Reload
; AVX2-FCP-NEXT: vmovaps %ymm0, 448(%rax)
; AVX2-FCP-NEXT: vmovups {{[-0-9]+}}(%r{{[sb]}}p), %ymm0 # 32-byte Reload
; AVX2-FCP-NEXT: vmovaps %ymm0, 96(%rax)
; AVX2-FCP-NEXT: vmovups {{[-0-9]+}}(%r{{[sb]}}p), %ymm0 # 32-byte Reload
; AVX2-FCP-NEXT: vmovaps %ymm0, 64(%rax)
; AVX2-FCP-NEXT: vmovups {{[-0-9]+}}(%r{{[sb]}}p), %ymm0 # 32-byte Reload
; AVX2-FCP-NEXT: vmovaps %ymm0, 288(%rax)
; AVX2-FCP-NEXT: vmovups {{[-0-9]+}}(%r{{[sb]}}p), %ymm0 # 32-byte Reload
; AVX2-FCP-NEXT: vmovaps %ymm0, 256(%rax)
; AVX2-FCP-NEXT: vmovups {{[-0-9]+}}(%r{{[sb]}}p), %ymm0 # 32-byte Reload
; AVX2-FCP-NEXT: vmovaps %ymm0, 352(%rax)
; AVX2-FCP-NEXT: vmovups {{[-0-9]+}}(%r{{[sb]}}p), %ymm0 # 32-byte Reload
; AVX2-FCP-NEXT: vmovaps %ymm0, 320(%rax)
; AVX2-FCP-NEXT: vmovups {{[-0-9]+}}(%r{{[sb]}}p), %ymm0 # 32-byte Reload
; AVX2-FCP-NEXT: vmovaps %ymm0, (%rax)
; AVX2-FCP-NEXT: vmovups {{[-0-9]+}}(%r{{[sb]}}p), %ymm0 # 32-byte Reload
; AVX2-FCP-NEXT: vmovaps %ymm0, 32(%rax)
; AVX2-FCP-NEXT: addq $296, %rsp # imm = 0x128
; AVX2-FCP-NEXT: vzeroupper
; AVX2-FCP-NEXT: retq
;
; AVX512-LABEL: store_i16_stride8_vf32:
; AVX512: # %bb.0:
; AVX512-NEXT: movq {{[0-9]+}}(%rsp), %rax
; AVX512-NEXT: movq {{[0-9]+}}(%rsp), %r10
; AVX512-NEXT: vmovdqa (%r10), %xmm1
; AVX512-NEXT: vmovdqa %xmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
; AVX512-NEXT: vmovdqa (%rax), %xmm0
; AVX512-NEXT: vmovdqa %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
; AVX512-NEXT: vpunpckhwd {{.*#+}} xmm0 = xmm0[4],xmm1[4],xmm0[5],xmm1[5],xmm0[6],xmm1[6],xmm0[7],xmm1[7]
; AVX512-NEXT: vmovdqa (%r9), %xmm1
; AVX512-NEXT: vmovdqa %xmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
; AVX512-NEXT: vmovdqa (%r8), %xmm5
; AVX512-NEXT: vpunpckhwd {{.*#+}} xmm1 = xmm5[4],xmm1[4],xmm5[5],xmm1[5],xmm5[6],xmm1[6],xmm5[7],xmm1[7]
; AVX512-NEXT: vpmovsxbd {{.*#+}} zmm26 = [0,0,0,0,0,0,1,0,2,2,2,2,0,0,3,3]
; AVX512-NEXT: vpermd %zmm1, %zmm26, %zmm30
; AVX512-NEXT: vpmovsxbd {{.*#+}} zmm27 = [0,0,0,0,0,0,1,1,2,2,2,2,0,0,3,3]
; AVX512-NEXT: movw $-30584, %r11w # imm = 0x8888
; AVX512-NEXT: kmovw %r11d, %k1
; AVX512-NEXT: vpermd %zmm0, %zmm27, %zmm30 {%k1}
; AVX512-NEXT: vmovdqa (%rcx), %xmm8
; AVX512-NEXT: vmovdqa (%rdx), %xmm9
; AVX512-NEXT: vpunpckhwd {{.*#+}} xmm0 = xmm9[4],xmm8[4],xmm9[5],xmm8[5],xmm9[6],xmm8[6],xmm9[7],xmm8[7]
; AVX512-NEXT: vmovdqa (%rsi), %xmm10
; AVX512-NEXT: vmovdqa (%rdi), %xmm11
; AVX512-NEXT: vpunpckhwd {{.*#+}} xmm1 = xmm11[4],xmm10[4],xmm11[5],xmm10[5],xmm11[6],xmm10[6],xmm11[7],xmm10[7]
; AVX512-NEXT: vpmovsxbd {{.*#+}} zmm28 = [0,0,1,0,1,0,0,0,2,2,3,3,3,3,0,0]
; AVX512-NEXT: vpermd %zmm1, %zmm28, %zmm3
; AVX512-NEXT: vpmovsxbd {{.*#+}} zmm29 = [0,0,1,1,1,1,0,0,2,2,3,3,3,3,0,0]
; AVX512-NEXT: movw $8738, %r11w # imm = 0x2222
; AVX512-NEXT: kmovw %r11d, %k2
; AVX512-NEXT: vpermd %zmm0, %zmm29, %zmm3 {%k2}
; AVX512-NEXT: vmovdqa 32(%r10), %ymm15
; AVX512-NEXT: vmovdqa 32(%rax), %ymm2
; AVX512-NEXT: vpunpcklwd {{.*#+}} ymm6 = ymm2[0],ymm15[0],ymm2[1],ymm15[1],ymm2[2],ymm15[2],ymm2[3],ymm15[3],ymm2[8],ymm15[8],ymm2[9],ymm15[9],ymm2[10],ymm15[10],ymm2[11],ymm15[11]
; AVX512-NEXT: vmovdqa 32(%r9), %ymm7
; AVX512-NEXT: vmovdqa 32(%r8), %ymm12
; AVX512-NEXT: vpunpcklwd {{.*#+}} ymm13 = ymm12[0],ymm7[0],ymm12[1],ymm7[1],ymm12[2],ymm7[2],ymm12[3],ymm7[3],ymm12[8],ymm7[8],ymm12[9],ymm7[9],ymm12[10],ymm7[10],ymm12[11],ymm7[11]
; AVX512-NEXT: vpmovsxbd {{.*#+}} zmm19 = [0,1,4,5,4,5,5,7,2,1,6,5,6,5,7,7]
; AVX512-NEXT: vpermd %zmm13, %zmm19, %zmm31
; AVX512-NEXT: vpmovsxbd {{.*#+}} zmm18 = [0,0,4,4,4,4,6,5,0,2,4,6,4,6,6,7]
; AVX512-NEXT: vpermd %zmm6, %zmm18, %zmm31 {%k1}
; AVX512-NEXT: vmovdqa 32(%rcx), %ymm13
; AVX512-NEXT: vmovdqa 32(%rsi), %ymm1
; AVX512-NEXT: vmovdqa 32(%rdi), %ymm0
; AVX512-NEXT: vpunpcklwd {{.*#+}} ymm6 = ymm0[0],ymm1[0],ymm0[1],ymm1[1],ymm0[2],ymm1[2],ymm0[3],ymm1[3],ymm0[8],ymm1[8],ymm0[9],ymm1[9],ymm0[10],ymm1[10],ymm0[11],ymm1[11]
; AVX512-NEXT: vpmovsxbd {{.*#+}} zmm20 = [4,5,1,3,5,7,5,7,6,5,3,3,7,7,7,7]
; AVX512-NEXT: vpermd %zmm6, %zmm20, %zmm14
; AVX512-NEXT: vmovdqa 32(%rdx), %ymm6
; AVX512-NEXT: vpmovsxbd {{.*#+}} zmm21 = [4,4,2,1,6,5,6,5,4,6,2,3,6,7,6,7]
; AVX512-NEXT: vpunpcklwd {{.*#+}} ymm4 = ymm6[0],ymm13[0],ymm6[1],ymm13[1],ymm6[2],ymm13[2],ymm6[3],ymm13[3],ymm6[8],ymm13[8],ymm6[9],ymm13[9],ymm6[10],ymm13[10],ymm6[11],ymm13[11]
; AVX512-NEXT: vpermd %zmm4, %zmm21, %zmm14 {%k2}
; AVX512-NEXT: vpunpckhwd {{.*#+}} ymm4 = ymm2[4],ymm15[4],ymm2[5],ymm15[5],ymm2[6],ymm15[6],ymm2[7],ymm15[7],ymm2[12],ymm15[12],ymm2[13],ymm15[13],ymm2[14],ymm15[14],ymm2[15],ymm15[15]
; AVX512-NEXT: vmovdqa 32(%r10), %xmm2
; AVX512-NEXT: vpunpckhwd {{.*#+}} ymm12 = ymm12[4],ymm7[4],ymm12[5],ymm7[5],ymm12[6],ymm7[6],ymm12[7],ymm7[7],ymm12[12],ymm7[12],ymm12[13],ymm7[13],ymm12[14],ymm7[14],ymm12[15],ymm7[15]
; AVX512-NEXT: vmovdqa 32(%rax), %xmm7
; AVX512-NEXT: vpermd %zmm12, %zmm19, %zmm17
; AVX512-NEXT: vmovdqa 32(%r9), %xmm12
; AVX512-NEXT: vpermd %zmm4, %zmm18, %zmm17 {%k1}
; AVX512-NEXT: vmovdqa 32(%r8), %xmm15
; AVX512-NEXT: vpunpckhwd {{.*#+}} ymm4 = ymm6[4],ymm13[4],ymm6[5],ymm13[5],ymm6[6],ymm13[6],ymm6[7],ymm13[7],ymm6[12],ymm13[12],ymm6[13],ymm13[13],ymm6[14],ymm13[14],ymm6[15],ymm13[15]
; AVX512-NEXT: vmovdqa 32(%rcx), %xmm13
; AVX512-NEXT: vpunpckhwd {{.*#+}} ymm0 = ymm0[4],ymm1[4],ymm0[5],ymm1[5],ymm0[6],ymm1[6],ymm0[7],ymm1[7],ymm0[12],ymm1[12],ymm0[13],ymm1[13],ymm0[14],ymm1[14],ymm0[15],ymm1[15]
; AVX512-NEXT: vmovdqa 32(%rsi), %xmm1
; AVX512-NEXT: vpermd %zmm0, %zmm20, %zmm16
; AVX512-NEXT: vmovdqa 32(%rdi), %xmm0
; AVX512-NEXT: vpermd %zmm4, %zmm21, %zmm16 {%k2}
; AVX512-NEXT: vpunpcklwd {{.*#+}} xmm4 = xmm15[0],xmm12[0],xmm15[1],xmm12[1],xmm15[2],xmm12[2],xmm15[3],xmm12[3]
; AVX512-NEXT: vpermd %zmm4, %zmm26, %zmm23
; AVX512-NEXT: vpunpcklwd {{.*#+}} xmm4 = xmm7[0],xmm2[0],xmm7[1],xmm2[1],xmm7[2],xmm2[2],xmm7[3],xmm2[3]
; AVX512-NEXT: vpermd %zmm4, %zmm27, %zmm23 {%k1}
; AVX512-NEXT: vpunpcklwd {{.*#+}} xmm4 = xmm0[0],xmm1[0],xmm0[1],xmm1[1],xmm0[2],xmm1[2],xmm0[3],xmm1[3]
; AVX512-NEXT: vpermd %zmm4, %zmm28, %zmm22
; AVX512-NEXT: vmovdqa 32(%rdx), %xmm4
; AVX512-NEXT: vpunpcklwd {{.*#+}} xmm6 = xmm4[0],xmm13[0],xmm4[1],xmm13[1],xmm4[2],xmm13[2],xmm4[3],xmm13[3]
; AVX512-NEXT: vpermd %zmm6, %zmm29, %zmm22 {%k2}
; AVX512-NEXT: vpunpckhwd {{.*#+}} xmm2 = xmm7[4],xmm2[4],xmm7[5],xmm2[5],xmm7[6],xmm2[6],xmm7[7],xmm2[7]
; AVX512-NEXT: vpunpckhwd {{.*#+}} xmm6 = xmm15[4],xmm12[4],xmm15[5],xmm12[5],xmm15[6],xmm12[6],xmm15[7],xmm12[7]
; AVX512-NEXT: vpermd %zmm6, %zmm26, %zmm25
; AVX512-NEXT: vpermd %zmm2, %zmm27, %zmm25 {%k1}
; AVX512-NEXT: vpunpckhwd {{.*#+}} xmm2 = xmm4[4],xmm13[4],xmm4[5],xmm13[5],xmm4[6],xmm13[6],xmm4[7],xmm13[7]
; AVX512-NEXT: vpunpckhwd {{.*#+}} xmm0 = xmm0[4],xmm1[4],xmm0[5],xmm1[5],xmm0[6],xmm1[6],xmm0[7],xmm1[7]
; AVX512-NEXT: vpermd %zmm0, %zmm28, %zmm24
; AVX512-NEXT: vpermd %zmm2, %zmm29, %zmm24 {%k2}
; AVX512-NEXT: vmovdqa (%r10), %ymm0
; AVX512-NEXT: vmovdqa (%rax), %ymm1
; AVX512-NEXT: vmovdqa (%r9), %ymm2
; AVX512-NEXT: vmovdqa (%r8), %ymm4
; AVX512-NEXT: vpunpcklwd {{.*#+}} ymm6 = ymm4[0],ymm2[0],ymm4[1],ymm2[1],ymm4[2],ymm2[2],ymm4[3],ymm2[3],ymm4[8],ymm2[8],ymm4[9],ymm2[9],ymm4[10],ymm2[10],ymm4[11],ymm2[11]
; AVX512-NEXT: vpermd %zmm6, %zmm19, %zmm6
; AVX512-NEXT: vpunpcklwd {{.*#+}} ymm7 = ymm1[0],ymm0[0],ymm1[1],ymm0[1],ymm1[2],ymm0[2],ymm1[3],ymm0[3],ymm1[8],ymm0[8],ymm1[9],ymm0[9],ymm1[10],ymm0[10],ymm1[11],ymm0[11]
; AVX512-NEXT: vpermd %zmm7, %zmm18, %zmm6 {%k1}
; AVX512-NEXT: vmovdqa (%rcx), %ymm7
; AVX512-NEXT: vpunpckhwd {{.*#+}} ymm0 = ymm1[4],ymm0[4],ymm1[5],ymm0[5],ymm1[6],ymm0[6],ymm1[7],ymm0[7],ymm1[12],ymm0[12],ymm1[13],ymm0[13],ymm1[14],ymm0[14],ymm1[15],ymm0[15]
; AVX512-NEXT: vmovdqa (%rdx), %ymm1
; AVX512-NEXT: vpunpckhwd {{.*#+}} ymm2 = ymm4[4],ymm2[4],ymm4[5],ymm2[5],ymm4[6],ymm2[6],ymm4[7],ymm2[7],ymm4[12],ymm2[12],ymm4[13],ymm2[13],ymm4[14],ymm2[14],ymm4[15],ymm2[15]
; AVX512-NEXT: vmovdqa (%rsi), %ymm4
; AVX512-NEXT: vpermd %zmm2, %zmm19, %zmm2
; AVX512-NEXT: vmovdqa (%rdi), %ymm12
; AVX512-NEXT: vpermd %zmm0, %zmm18, %zmm2 {%k1}
; AVX512-NEXT: vpunpcklwd {{.*#+}} ymm0 = ymm12[0],ymm4[0],ymm12[1],ymm4[1],ymm12[2],ymm4[2],ymm12[3],ymm4[3],ymm12[8],ymm4[8],ymm12[9],ymm4[9],ymm12[10],ymm4[10],ymm12[11],ymm4[11]
; AVX512-NEXT: vpermd %zmm0, %zmm20, %zmm0
; AVX512-NEXT: vpunpcklwd {{.*#+}} ymm13 = ymm1[0],ymm7[0],ymm1[1],ymm7[1],ymm1[2],ymm7[2],ymm1[3],ymm7[3],ymm1[8],ymm7[8],ymm1[9],ymm7[9],ymm1[10],ymm7[10],ymm1[11],ymm7[11]
; AVX512-NEXT: vpermd %zmm13, %zmm21, %zmm0 {%k2}
; AVX512-NEXT: vpunpckhwd {{.*#+}} ymm1 = ymm1[4],ymm7[4],ymm1[5],ymm7[5],ymm1[6],ymm7[6],ymm1[7],ymm7[7],ymm1[12],ymm7[12],ymm1[13],ymm7[13],ymm1[14],ymm7[14],ymm1[15],ymm7[15]
; AVX512-NEXT: vpunpckhwd {{.*#+}} ymm4 = ymm12[4],ymm4[4],ymm12[5],ymm4[5],ymm12[6],ymm4[6],ymm12[7],ymm4[7],ymm12[12],ymm4[12],ymm12[13],ymm4[13],ymm12[14],ymm4[14],ymm12[15],ymm4[15]
; AVX512-NEXT: vpermd %zmm4, %zmm20, %zmm4
; AVX512-NEXT: vpermd %zmm1, %zmm21, %zmm4 {%k2}
; AVX512-NEXT: vmovdqa {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 # 16-byte Reload
; AVX512-NEXT: vpunpcklwd {{[-0-9]+}}(%r{{[sb]}}p), %xmm1, %xmm1 # 16-byte Folded Reload
; AVX512-NEXT: # xmm1 = xmm1[0],mem[0],xmm1[1],mem[1],xmm1[2],mem[2],xmm1[3],mem[3]
; AVX512-NEXT: vpunpcklwd {{[-0-9]+}}(%r{{[sb]}}p), %xmm5, %xmm5 # 16-byte Folded Reload
; AVX512-NEXT: # xmm5 = xmm5[0],mem[0],xmm5[1],mem[1],xmm5[2],mem[2],xmm5[3],mem[3]
; AVX512-NEXT: vpermd %zmm5, %zmm26, %zmm5
; AVX512-NEXT: vpermd %zmm1, %zmm27, %zmm5 {%k1}
; AVX512-NEXT: vpunpcklwd {{.*#+}} xmm1 = xmm9[0],xmm8[0],xmm9[1],xmm8[1],xmm9[2],xmm8[2],xmm9[3],xmm8[3]
; AVX512-NEXT: vpunpcklwd {{.*#+}} xmm7 = xmm11[0],xmm10[0],xmm11[1],xmm10[1],xmm11[2],xmm10[2],xmm11[3],xmm10[3]
; AVX512-NEXT: vpermd %zmm7, %zmm28, %zmm7
; AVX512-NEXT: vpermd %zmm1, %zmm29, %zmm7 {%k2}
; AVX512-NEXT: movb $-86, %al
; AVX512-NEXT: kmovw %eax, %k1
; AVX512-NEXT: vmovdqa64 %zmm30, %zmm3 {%k1}
; AVX512-NEXT: vmovdqa64 %zmm31, %zmm14 {%k1}
; AVX512-NEXT: vmovdqa64 %zmm17, %zmm16 {%k1}
; AVX512-NEXT: vmovdqa64 %zmm23, %zmm22 {%k1}
; AVX512-NEXT: vmovdqa64 %zmm25, %zmm24 {%k1}
; AVX512-NEXT: vmovdqa64 %zmm6, %zmm0 {%k1}
; AVX512-NEXT: vmovdqa64 %zmm2, %zmm4 {%k1}
; AVX512-NEXT: vmovdqa64 %zmm5, %zmm7 {%k1}
; AVX512-NEXT: movq {{[0-9]+}}(%rsp), %rax
; AVX512-NEXT: vmovdqa64 %zmm7, (%rax)
; AVX512-NEXT: vmovdqa64 %zmm4, 192(%rax)
; AVX512-NEXT: vmovdqa64 %zmm0, 128(%rax)
; AVX512-NEXT: vmovdqa64 %zmm24, 320(%rax)
; AVX512-NEXT: vmovdqa64 %zmm22, 256(%rax)
; AVX512-NEXT: vmovdqa64 %zmm16, 448(%rax)
; AVX512-NEXT: vmovdqa64 %zmm14, 384(%rax)
; AVX512-NEXT: vmovdqa64 %zmm3, 64(%rax)
; AVX512-NEXT: vzeroupper
; AVX512-NEXT: retq
;
; AVX512-FCP-LABEL: store_i16_stride8_vf32:
; AVX512-FCP: # %bb.0:
; AVX512-FCP-NEXT: subq $520, %rsp # imm = 0x208
; AVX512-FCP-NEXT: movq {{[0-9]+}}(%rsp), %rax
; AVX512-FCP-NEXT: movq {{[0-9]+}}(%rsp), %r10
; AVX512-FCP-NEXT: vmovdqa (%r10), %xmm1
; AVX512-FCP-NEXT: vmovdqa (%rax), %xmm2
; AVX512-FCP-NEXT: vpunpckhwd {{.*#+}} xmm0 = xmm2[4],xmm1[4],xmm2[5],xmm1[5],xmm2[6],xmm1[6],xmm2[7],xmm1[7]
; AVX512-FCP-NEXT: vmovdqa64 %xmm2, %xmm25
; AVX512-FCP-NEXT: vmovdqa64 %xmm1, %xmm26
; AVX512-FCP-NEXT: vinserti32x4 $2, %xmm0, %zmm0, %zmm0
; AVX512-FCP-NEXT: vmovdqu64 %zmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 64-byte Spill
; AVX512-FCP-NEXT: vmovdqa (%r9), %xmm1
; AVX512-FCP-NEXT: vmovdqa (%r8), %xmm2
; AVX512-FCP-NEXT: vpunpckhwd {{.*#+}} xmm0 = xmm2[4],xmm1[4],xmm2[5],xmm1[5],xmm2[6],xmm1[6],xmm2[7],xmm1[7]
; AVX512-FCP-NEXT: vmovdqa64 %xmm2, %xmm27
; AVX512-FCP-NEXT: vmovdqa64 %xmm1, %xmm28
; AVX512-FCP-NEXT: vinserti32x4 $2, %xmm0, %zmm0, %zmm0
; AVX512-FCP-NEXT: vmovdqu64 %zmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 64-byte Spill
; AVX512-FCP-NEXT: vmovdqa (%rcx), %xmm1
; AVX512-FCP-NEXT: vmovdqa (%rdx), %xmm2
; AVX512-FCP-NEXT: vpunpckhwd {{.*#+}} xmm0 = xmm2[4],xmm1[4],xmm2[5],xmm1[5],xmm2[6],xmm1[6],xmm2[7],xmm1[7]
; AVX512-FCP-NEXT: vmovdqa64 %xmm2, %xmm31
; AVX512-FCP-NEXT: vmovdqa64 %xmm1, %xmm19
; AVX512-FCP-NEXT: vinserti32x4 $2, %xmm0, %zmm0, %zmm0
; AVX512-FCP-NEXT: vmovdqu64 %zmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 64-byte Spill
; AVX512-FCP-NEXT: vmovdqa (%rsi), %xmm1
; AVX512-FCP-NEXT: vmovdqa (%rdi), %xmm2
; AVX512-FCP-NEXT: vpunpckhwd {{.*#+}} xmm0 = xmm2[4],xmm1[4],xmm2[5],xmm1[5],xmm2[6],xmm1[6],xmm2[7],xmm1[7]
; AVX512-FCP-NEXT: vmovdqa64 %xmm2, %xmm17
; AVX512-FCP-NEXT: vmovdqa64 %xmm1, %xmm18
; AVX512-FCP-NEXT: vinserti32x4 $2, %xmm0, %zmm0, %zmm20
; AVX512-FCP-NEXT: vmovdqa 32(%r10), %ymm0
; AVX512-FCP-NEXT: vmovdqa 32(%rax), %ymm1
; AVX512-FCP-NEXT: vpunpcklwd {{.*#+}} ymm2 = ymm1[0],ymm0[0],ymm1[1],ymm0[1],ymm1[2],ymm0[2],ymm1[3],ymm0[3],ymm1[8],ymm0[8],ymm1[9],ymm0[9],ymm1[10],ymm0[10],ymm1[11],ymm0[11]
; AVX512-FCP-NEXT: vinserti64x4 $1, %ymm2, %zmm2, %zmm23
; AVX512-FCP-NEXT: vmovdqa 32(%r9), %ymm3
; AVX512-FCP-NEXT: vmovdqa 32(%r8), %ymm4
; AVX512-FCP-NEXT: vpunpcklwd {{.*#+}} ymm2 = ymm4[0],ymm3[0],ymm4[1],ymm3[1],ymm4[2],ymm3[2],ymm4[3],ymm3[3],ymm4[8],ymm3[8],ymm4[9],ymm3[9],ymm4[10],ymm3[10],ymm4[11],ymm3[11]
; AVX512-FCP-NEXT: vinserti64x4 $1, %ymm2, %zmm2, %zmm24
; AVX512-FCP-NEXT: vmovdqa 32(%rcx), %ymm5
; AVX512-FCP-NEXT: vmovdqa 32(%rdx), %ymm6
; AVX512-FCP-NEXT: vpunpcklwd {{.*#+}} ymm2 = ymm6[0],ymm5[0],ymm6[1],ymm5[1],ymm6[2],ymm5[2],ymm6[3],ymm5[3],ymm6[8],ymm5[8],ymm6[9],ymm5[9],ymm6[10],ymm5[10],ymm6[11],ymm5[11]
; AVX512-FCP-NEXT: vinserti64x4 $1, %ymm2, %zmm2, %zmm21
; AVX512-FCP-NEXT: vmovdqa 32(%rsi), %ymm7
; AVX512-FCP-NEXT: vmovdqa 32(%rdi), %ymm8
; AVX512-FCP-NEXT: vpunpcklwd {{.*#+}} ymm2 = ymm8[0],ymm7[0],ymm8[1],ymm7[1],ymm8[2],ymm7[2],ymm8[3],ymm7[3],ymm8[8],ymm7[8],ymm8[9],ymm7[9],ymm8[10],ymm7[10],ymm8[11],ymm7[11]
; AVX512-FCP-NEXT: vinserti64x4 $1, %ymm2, %zmm2, %zmm22
; AVX512-FCP-NEXT: vpunpckhwd {{.*#+}} ymm1 = ymm1[4],ymm0[4],ymm1[5],ymm0[5],ymm1[6],ymm0[6],ymm1[7],ymm0[7],ymm1[12],ymm0[12],ymm1[13],ymm0[13],ymm1[14],ymm0[14],ymm1[15],ymm0[15]
; AVX512-FCP-NEXT: vmovdqa 32(%r10), %xmm0
; AVX512-FCP-NEXT: vinserti64x4 $1, %ymm1, %zmm1, %zmm16
; AVX512-FCP-NEXT: vmovdqa 32(%rax), %xmm2
; AVX512-FCP-NEXT: vpunpckhwd {{.*#+}} ymm1 = ymm4[4],ymm3[4],ymm4[5],ymm3[5],ymm4[6],ymm3[6],ymm4[7],ymm3[7],ymm4[12],ymm3[12],ymm4[13],ymm3[13],ymm4[14],ymm3[14],ymm4[15],ymm3[15]
; AVX512-FCP-NEXT: vmovdqu64 %zmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 64-byte Spill
; AVX512-FCP-NEXT: vmovdqa 32(%r9), %xmm1
; AVX512-FCP-NEXT: vpunpckhwd {{.*#+}} ymm3 = ymm6[4],ymm5[4],ymm6[5],ymm5[5],ymm6[6],ymm5[6],ymm6[7],ymm5[7],ymm6[12],ymm5[12],ymm6[13],ymm5[13],ymm6[14],ymm5[14],ymm6[15],ymm5[15]
; AVX512-FCP-NEXT: vmovdqu64 %zmm3, {{[-0-9]+}}(%r{{[sb]}}p) # 64-byte Spill
; AVX512-FCP-NEXT: vmovdqa 32(%r8), %xmm3
; AVX512-FCP-NEXT: vpunpckhwd {{.*#+}} ymm4 = ymm8[4],ymm7[4],ymm8[5],ymm7[5],ymm8[6],ymm7[6],ymm8[7],ymm7[7],ymm8[12],ymm7[12],ymm8[13],ymm7[13],ymm8[14],ymm7[14],ymm8[15],ymm7[15]
; AVX512-FCP-NEXT: vmovdqu64 %zmm4, {{[-0-9]+}}(%r{{[sb]}}p) # 64-byte Spill
; AVX512-FCP-NEXT: vpunpcklwd {{.*#+}} xmm4 = xmm2[0],xmm0[0],xmm2[1],xmm0[1],xmm2[2],xmm0[2],xmm2[3],xmm0[3]
; AVX512-FCP-NEXT: vmovdqu64 %zmm4, {{[-0-9]+}}(%r{{[sb]}}p) # 64-byte Spill
; AVX512-FCP-NEXT: vpunpckhwd {{.*#+}} xmm0 = xmm2[4],xmm0[4],xmm2[5],xmm0[5],xmm2[6],xmm0[6],xmm2[7],xmm0[7]
; AVX512-FCP-NEXT: vmovdqu64 %zmm0, (%rsp) # 64-byte Spill
; AVX512-FCP-NEXT: vpunpcklwd {{.*#+}} xmm12 = xmm3[0],xmm1[0],xmm3[1],xmm1[1],xmm3[2],xmm1[2],xmm3[3],xmm1[3]
; AVX512-FCP-NEXT: vpunpckhwd {{.*#+}} xmm0 = xmm3[4],xmm1[4],xmm3[5],xmm1[5],xmm3[6],xmm1[6],xmm3[7],xmm1[7]
; AVX512-FCP-NEXT: vmovdqu64 %zmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 64-byte Spill
; AVX512-FCP-NEXT: vmovdqa 32(%rcx), %xmm0
; AVX512-FCP-NEXT: vmovdqa 32(%rdx), %xmm1
; AVX512-FCP-NEXT: vpunpcklwd {{.*#+}} xmm9 = xmm1[0],xmm0[0],xmm1[1],xmm0[1],xmm1[2],xmm0[2],xmm1[3],xmm0[3]
; AVX512-FCP-NEXT: vpunpckhwd {{.*#+}} xmm0 = xmm1[4],xmm0[4],xmm1[5],xmm0[5],xmm1[6],xmm0[6],xmm1[7],xmm0[7]
; AVX512-FCP-NEXT: vmovdqu64 %zmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 64-byte Spill
; AVX512-FCP-NEXT: vmovdqa 32(%rsi), %xmm0
; AVX512-FCP-NEXT: vmovdqa 32(%rdi), %xmm1
; AVX512-FCP-NEXT: vpunpcklwd {{.*#+}} xmm10 = xmm1[0],xmm0[0],xmm1[1],xmm0[1],xmm1[2],xmm0[2],xmm1[3],xmm0[3]
; AVX512-FCP-NEXT: vpunpckhwd {{.*#+}} xmm15 = xmm1[4],xmm0[4],xmm1[5],xmm0[5],xmm1[6],xmm0[6],xmm1[7],xmm0[7]
; AVX512-FCP-NEXT: vmovdqa (%r10), %ymm0
; AVX512-FCP-NEXT: vmovdqa (%rax), %ymm1
; AVX512-FCP-NEXT: vpunpcklwd {{.*#+}} ymm13 = ymm1[0],ymm0[0],ymm1[1],ymm0[1],ymm1[2],ymm0[2],ymm1[3],ymm0[3],ymm1[8],ymm0[8],ymm1[9],ymm0[9],ymm1[10],ymm0[10],ymm1[11],ymm0[11]
; AVX512-FCP-NEXT: vpunpckhwd {{.*#+}} ymm11 = ymm1[4],ymm0[4],ymm1[5],ymm0[5],ymm1[6],ymm0[6],ymm1[7],ymm0[7],ymm1[12],ymm0[12],ymm1[13],ymm0[13],ymm1[14],ymm0[14],ymm1[15],ymm0[15]
; AVX512-FCP-NEXT: vmovdqa (%r9), %ymm0
; AVX512-FCP-NEXT: vmovdqa (%r8), %ymm1
; AVX512-FCP-NEXT: vpunpcklwd {{.*#+}} ymm7 = ymm1[0],ymm0[0],ymm1[1],ymm0[1],ymm1[2],ymm0[2],ymm1[3],ymm0[3],ymm1[8],ymm0[8],ymm1[9],ymm0[9],ymm1[10],ymm0[10],ymm1[11],ymm0[11]
; AVX512-FCP-NEXT: vpunpckhwd {{.*#+}} ymm8 = ymm1[4],ymm0[4],ymm1[5],ymm0[5],ymm1[6],ymm0[6],ymm1[7],ymm0[7],ymm1[12],ymm0[12],ymm1[13],ymm0[13],ymm1[14],ymm0[14],ymm1[15],ymm0[15]
; AVX512-FCP-NEXT: vmovdqa (%rcx), %ymm0
; AVX512-FCP-NEXT: vmovdqa (%rdx), %ymm1
; AVX512-FCP-NEXT: vpunpcklwd {{.*#+}} ymm6 = ymm1[0],ymm0[0],ymm1[1],ymm0[1],ymm1[2],ymm0[2],ymm1[3],ymm0[3],ymm1[8],ymm0[8],ymm1[9],ymm0[9],ymm1[10],ymm0[10],ymm1[11],ymm0[11]
; AVX512-FCP-NEXT: vpunpckhwd {{.*#+}} ymm5 = ymm1[4],ymm0[4],ymm1[5],ymm0[5],ymm1[6],ymm0[6],ymm1[7],ymm0[7],ymm1[12],ymm0[12],ymm1[13],ymm0[13],ymm1[14],ymm0[14],ymm1[15],ymm0[15]
; AVX512-FCP-NEXT: vmovdqa (%rsi), %ymm0
; AVX512-FCP-NEXT: vmovdqa (%rdi), %ymm1
; AVX512-FCP-NEXT: vpunpcklwd {{.*#+}} ymm3 = ymm1[0],ymm0[0],ymm1[1],ymm0[1],ymm1[2],ymm0[2],ymm1[3],ymm0[3],ymm1[8],ymm0[8],ymm1[9],ymm0[9],ymm1[10],ymm0[10],ymm1[11],ymm0[11]
; AVX512-FCP-NEXT: vpunpckhwd {{.*#+}} ymm4 = ymm1[4],ymm0[4],ymm1[5],ymm0[5],ymm1[6],ymm0[6],ymm1[7],ymm0[7],ymm1[12],ymm0[12],ymm1[13],ymm0[13],ymm1[14],ymm0[14],ymm1[15],ymm0[15]
; AVX512-FCP-NEXT: vmovdqa64 %xmm25, %xmm0
; AVX512-FCP-NEXT: vmovdqa64 %xmm26, %xmm1
; AVX512-FCP-NEXT: vpunpcklwd {{.*#+}} xmm2 = xmm0[0],xmm1[0],xmm0[1],xmm1[1],xmm0[2],xmm1[2],xmm0[3],xmm1[3]
; AVX512-FCP-NEXT: vmovdqa64 %xmm27, %xmm0
; AVX512-FCP-NEXT: vmovdqa64 %xmm28, %xmm1
; AVX512-FCP-NEXT: vpunpcklwd {{.*#+}} xmm1 = xmm0[0],xmm1[0],xmm0[1],xmm1[1],xmm0[2],xmm1[2],xmm0[3],xmm1[3]
; AVX512-FCP-NEXT: vmovdqu64 {{[-0-9]+}}(%r{{[sb]}}p), %zmm0 # 64-byte Reload
; AVX512-FCP-NEXT: vinserti64x4 $1, %ymm0, %zmm0, %zmm25
; AVX512-FCP-NEXT: vmovdqu64 {{[-0-9]+}}(%r{{[sb]}}p), %zmm0 # 64-byte Reload
; AVX512-FCP-NEXT: vinserti64x4 $1, %ymm0, %zmm0, %zmm26
; AVX512-FCP-NEXT: vmovdqu64 {{[-0-9]+}}(%r{{[sb]}}p), %zmm0 # 64-byte Reload
; AVX512-FCP-NEXT: vinserti64x4 $1, %ymm0, %zmm0, %zmm27
; AVX512-FCP-NEXT: vmovdqu64 {{[-0-9]+}}(%r{{[sb]}}p), %zmm0 # 64-byte Reload
; AVX512-FCP-NEXT: vinserti32x4 $2, %xmm0, %zmm0, %zmm28
; AVX512-FCP-NEXT: vinserti32x4 $2, %xmm12, %zmm12, %zmm12
; AVX512-FCP-NEXT: vinserti32x4 $2, %xmm9, %zmm9, %zmm29
; AVX512-FCP-NEXT: vinserti32x4 $2, %xmm10, %zmm10, %zmm30
; AVX512-FCP-NEXT: vmovdqa64 %xmm31, %xmm0
; AVX512-FCP-NEXT: vmovdqa64 %xmm19, %xmm9
; AVX512-FCP-NEXT: vpunpcklwd {{.*#+}} xmm9 = xmm0[0],xmm9[0],xmm0[1],xmm9[1],xmm0[2],xmm9[2],xmm0[3],xmm9[3]
; AVX512-FCP-NEXT: vmovdqa64 %xmm17, %xmm0
; AVX512-FCP-NEXT: vmovdqa64 %xmm18, %xmm10
; AVX512-FCP-NEXT: vpunpcklwd {{.*#+}} xmm10 = xmm0[0],xmm10[0],xmm0[1],xmm10[1],xmm0[2],xmm10[2],xmm0[3],xmm10[3]
; AVX512-FCP-NEXT: movw $-30584, %ax # imm = 0x8888
; AVX512-FCP-NEXT: kmovw %eax, %k1
; AVX512-FCP-NEXT: vpmovsxbd {{.*#+}} zmm31 = [0,1,4,5,4,5,5,7,10,9,14,13,14,13,15,15]
; AVX512-FCP-NEXT: vpermd %zmm24, %zmm31, %zmm24
; AVX512-FCP-NEXT: vpmovsxbd {{.*#+}} zmm0 = [0,0,4,4,4,4,6,5,8,10,12,14,12,14,14,15]
; AVX512-FCP-NEXT: vpermd %zmm23, %zmm0, %zmm24 {%k1}
; AVX512-FCP-NEXT: vpermd %zmm25, %zmm31, %zmm23
; AVX512-FCP-NEXT: vpermd %zmm16, %zmm0, %zmm23 {%k1}
; AVX512-FCP-NEXT: vmovdqu64 (%rsp), %zmm14 # 64-byte Reload
; AVX512-FCP-NEXT: vinserti32x4 $2, %xmm14, %zmm14, %zmm16
; AVX512-FCP-NEXT: vmovdqu64 {{[-0-9]+}}(%r{{[sb]}}p), %zmm14 # 64-byte Reload
; AVX512-FCP-NEXT: vinserti32x4 $2, %xmm14, %zmm14, %zmm25
; AVX512-FCP-NEXT: vmovdqu64 {{[-0-9]+}}(%r{{[sb]}}p), %zmm14 # 64-byte Reload
; AVX512-FCP-NEXT: vinserti32x4 $2, %xmm14, %zmm14, %zmm14
; AVX512-FCP-NEXT: vinserti32x4 $2, %xmm15, %zmm15, %zmm15
; AVX512-FCP-NEXT: vinserti64x4 $1, %ymm13, %zmm13, %zmm13
; AVX512-FCP-NEXT: vinserti64x4 $1, %ymm7, %zmm7, %zmm7
; AVX512-FCP-NEXT: vinserti64x4 $1, %ymm6, %zmm6, %zmm6
; AVX512-FCP-NEXT: vinserti64x4 $1, %ymm3, %zmm3, %zmm3
; AVX512-FCP-NEXT: vinserti64x4 $1, %ymm11, %zmm11, %zmm11
; AVX512-FCP-NEXT: vinserti64x4 $1, %ymm8, %zmm8, %zmm8
; AVX512-FCP-NEXT: vinserti64x4 $1, %ymm5, %zmm5, %zmm5
; AVX512-FCP-NEXT: vinserti64x4 $1, %ymm4, %zmm4, %zmm4
; AVX512-FCP-NEXT: vinserti32x4 $2, %xmm2, %zmm2, %zmm2
; AVX512-FCP-NEXT: vinserti32x4 $2, %xmm1, %zmm1, %zmm1
; AVX512-FCP-NEXT: vinserti32x4 $2, %xmm9, %zmm9, %zmm9
; AVX512-FCP-NEXT: vinserti32x4 $2, %xmm10, %zmm10, %zmm10
; AVX512-FCP-NEXT: vpermd %zmm7, %zmm31, %zmm7
; AVX512-FCP-NEXT: vpermd %zmm13, %zmm0, %zmm7 {%k1}
; AVX512-FCP-NEXT: vpermd %zmm8, %zmm31, %zmm8
; AVX512-FCP-NEXT: movw $8738, %ax # imm = 0x2222
; AVX512-FCP-NEXT: kmovw %eax, %k2
; AVX512-FCP-NEXT: vpermd %zmm11, %zmm0, %zmm8 {%k1}
; AVX512-FCP-NEXT: vpmovsxbd {{.*#+}} zmm0 = [4,5,1,3,5,7,5,7,14,13,11,11,15,15,15,15]
; AVX512-FCP-NEXT: vpermd %zmm22, %zmm0, %zmm11
; AVX512-FCP-NEXT: vpmovsxbd {{.*#+}} zmm13 = [4,4,2,1,6,5,6,5,12,14,10,11,14,15,14,15]
; AVX512-FCP-NEXT: vpermd %zmm21, %zmm13, %zmm11 {%k2}
; AVX512-FCP-NEXT: vpermd %zmm27, %zmm0, %zmm21
; AVX512-FCP-NEXT: vpermd %zmm26, %zmm13, %zmm21 {%k2}
; AVX512-FCP-NEXT: vpermd %zmm3, %zmm0, %zmm3
; AVX512-FCP-NEXT: vpermd %zmm6, %zmm13, %zmm3 {%k2}
; AVX512-FCP-NEXT: vpermd %zmm4, %zmm0, %zmm0
; AVX512-FCP-NEXT: vpermd %zmm5, %zmm13, %zmm0 {%k2}
; AVX512-FCP-NEXT: vpmovsxbd {{.*#+}} zmm4 = [0,0,0,0,0,0,1,1,10,10,10,10,0,0,11,11]
; AVX512-FCP-NEXT: vpermd {{[-0-9]+}}(%r{{[sb]}}p), %zmm4, %zmm5 # 64-byte Folded Reload
; AVX512-FCP-NEXT: vpermd {{[-0-9]+}}(%r{{[sb]}}p), %zmm4, %zmm5 {%k1} # 64-byte Folded Reload
; AVX512-FCP-NEXT: vpmovsxbd {{.*#+}} zmm6 = [0,0,0,0,0,0,1,0,10,10,10,10,0,0,11,11]
; AVX512-FCP-NEXT: vpermd %zmm12, %zmm6, %zmm6
; AVX512-FCP-NEXT: vpermd %zmm28, %zmm4, %zmm6 {%k1}
; AVX512-FCP-NEXT: vpermd %zmm25, %zmm4, %zmm12
; AVX512-FCP-NEXT: vpermd %zmm16, %zmm4, %zmm12 {%k1}
; AVX512-FCP-NEXT: vpermd %zmm1, %zmm4, %zmm1
; AVX512-FCP-NEXT: vpermd %zmm2, %zmm4, %zmm1 {%k1}
; AVX512-FCP-NEXT: vpmovsxbd {{.*#+}} zmm2 = [0,0,1,1,1,1,0,0,10,0,11,0,11,0,0,0]
; AVX512-FCP-NEXT: vpermd %zmm20, %zmm2, %zmm2
; AVX512-FCP-NEXT: vpmovsxbd {{.*#+}} zmm4 = [0,0,1,1,1,1,0,0,10,10,11,11,11,11,0,0]
; AVX512-FCP-NEXT: vpermd {{[-0-9]+}}(%r{{[sb]}}p), %zmm4, %zmm2 {%k2} # 64-byte Folded Reload
; AVX512-FCP-NEXT: vpmovsxbd {{.*#+}} zmm13 = [0,0,1,0,1,0,0,0,10,10,11,11,11,11,0,0]
; AVX512-FCP-NEXT: vpermd %zmm30, %zmm13, %zmm13
; AVX512-FCP-NEXT: vpermd %zmm29, %zmm4, %zmm13 {%k2}
; AVX512-FCP-NEXT: vpermd %zmm15, %zmm4, %zmm15
; AVX512-FCP-NEXT: vpermd %zmm14, %zmm4, %zmm15 {%k2}
; AVX512-FCP-NEXT: vpermd %zmm10, %zmm4, %zmm10
; AVX512-FCP-NEXT: vpermd %zmm9, %zmm4, %zmm10 {%k2}
; AVX512-FCP-NEXT: movb $-86, %al
; AVX512-FCP-NEXT: kmovw %eax, %k1
; AVX512-FCP-NEXT: vmovdqa64 %zmm5, %zmm2 {%k1}
; AVX512-FCP-NEXT: vmovdqa64 %zmm24, %zmm11 {%k1}
; AVX512-FCP-NEXT: vmovdqa64 %zmm23, %zmm21 {%k1}
; AVX512-FCP-NEXT: vmovdqa64 %zmm6, %zmm13 {%k1}
; AVX512-FCP-NEXT: vmovdqa64 %zmm12, %zmm15 {%k1}
; AVX512-FCP-NEXT: vmovdqa64 %zmm7, %zmm3 {%k1}
; AVX512-FCP-NEXT: vmovdqa64 %zmm8, %zmm0 {%k1}
; AVX512-FCP-NEXT: vmovdqa64 %zmm1, %zmm10 {%k1}
; AVX512-FCP-NEXT: movq {{[0-9]+}}(%rsp), %rax
; AVX512-FCP-NEXT: vmovdqa64 %zmm10, (%rax)
; AVX512-FCP-NEXT: vmovdqa64 %zmm0, 192(%rax)
; AVX512-FCP-NEXT: vmovdqa64 %zmm3, 128(%rax)
; AVX512-FCP-NEXT: vmovdqa64 %zmm15, 320(%rax)
; AVX512-FCP-NEXT: vmovdqa64 %zmm13, 256(%rax)
; AVX512-FCP-NEXT: vmovdqa64 %zmm21, 448(%rax)
; AVX512-FCP-NEXT: vmovdqa64 %zmm11, 384(%rax)
; AVX512-FCP-NEXT: vmovdqa64 %zmm2, 64(%rax)
; AVX512-FCP-NEXT: addq $520, %rsp # imm = 0x208
; AVX512-FCP-NEXT: vzeroupper
; AVX512-FCP-NEXT: retq
;
; AVX512DQ-LABEL: store_i16_stride8_vf32:
; AVX512DQ: # %bb.0:
; AVX512DQ-NEXT: movq {{[0-9]+}}(%rsp), %rax
; AVX512DQ-NEXT: movq {{[0-9]+}}(%rsp), %r10
; AVX512DQ-NEXT: vmovdqa (%r10), %xmm1
; AVX512DQ-NEXT: vmovdqa %xmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
; AVX512DQ-NEXT: vmovdqa (%rax), %xmm0
; AVX512DQ-NEXT: vmovdqa %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
; AVX512DQ-NEXT: vpunpckhwd {{.*#+}} xmm0 = xmm0[4],xmm1[4],xmm0[5],xmm1[5],xmm0[6],xmm1[6],xmm0[7],xmm1[7]
; AVX512DQ-NEXT: vmovdqa (%r9), %xmm1
; AVX512DQ-NEXT: vmovdqa %xmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
; AVX512DQ-NEXT: vmovdqa (%r8), %xmm5
; AVX512DQ-NEXT: vpunpckhwd {{.*#+}} xmm1 = xmm5[4],xmm1[4],xmm5[5],xmm1[5],xmm5[6],xmm1[6],xmm5[7],xmm1[7]
; AVX512DQ-NEXT: vpmovsxbd {{.*#+}} zmm26 = [0,0,0,0,0,0,1,0,2,2,2,2,0,0,3,3]
; AVX512DQ-NEXT: vpermd %zmm1, %zmm26, %zmm30
; AVX512DQ-NEXT: vpmovsxbd {{.*#+}} zmm27 = [0,0,0,0,0,0,1,1,2,2,2,2,0,0,3,3]
; AVX512DQ-NEXT: movw $-30584, %r11w # imm = 0x8888
; AVX512DQ-NEXT: kmovw %r11d, %k1
; AVX512DQ-NEXT: vpermd %zmm0, %zmm27, %zmm30 {%k1}
; AVX512DQ-NEXT: vmovdqa (%rcx), %xmm8
; AVX512DQ-NEXT: vmovdqa (%rdx), %xmm9
; AVX512DQ-NEXT: vpunpckhwd {{.*#+}} xmm0 = xmm9[4],xmm8[4],xmm9[5],xmm8[5],xmm9[6],xmm8[6],xmm9[7],xmm8[7]
; AVX512DQ-NEXT: vmovdqa (%rsi), %xmm10
; AVX512DQ-NEXT: vmovdqa (%rdi), %xmm11
; AVX512DQ-NEXT: vpunpckhwd {{.*#+}} xmm1 = xmm11[4],xmm10[4],xmm11[5],xmm10[5],xmm11[6],xmm10[6],xmm11[7],xmm10[7]
; AVX512DQ-NEXT: vpmovsxbd {{.*#+}} zmm28 = [0,0,1,0,1,0,0,0,2,2,3,3,3,3,0,0]
; AVX512DQ-NEXT: vpermd %zmm1, %zmm28, %zmm3
; AVX512DQ-NEXT: vpmovsxbd {{.*#+}} zmm29 = [0,0,1,1,1,1,0,0,2,2,3,3,3,3,0,0]
; AVX512DQ-NEXT: movw $8738, %r11w # imm = 0x2222
; AVX512DQ-NEXT: kmovw %r11d, %k2
; AVX512DQ-NEXT: vpermd %zmm0, %zmm29, %zmm3 {%k2}
; AVX512DQ-NEXT: vmovdqa 32(%r10), %ymm15
; AVX512DQ-NEXT: vmovdqa 32(%rax), %ymm2
; AVX512DQ-NEXT: vpunpcklwd {{.*#+}} ymm6 = ymm2[0],ymm15[0],ymm2[1],ymm15[1],ymm2[2],ymm15[2],ymm2[3],ymm15[3],ymm2[8],ymm15[8],ymm2[9],ymm15[9],ymm2[10],ymm15[10],ymm2[11],ymm15[11]
; AVX512DQ-NEXT: vmovdqa 32(%r9), %ymm7
; AVX512DQ-NEXT: vmovdqa 32(%r8), %ymm12
; AVX512DQ-NEXT: vpunpcklwd {{.*#+}} ymm13 = ymm12[0],ymm7[0],ymm12[1],ymm7[1],ymm12[2],ymm7[2],ymm12[3],ymm7[3],ymm12[8],ymm7[8],ymm12[9],ymm7[9],ymm12[10],ymm7[10],ymm12[11],ymm7[11]
; AVX512DQ-NEXT: vpmovsxbd {{.*#+}} zmm19 = [0,1,4,5,4,5,5,7,2,1,6,5,6,5,7,7]
; AVX512DQ-NEXT: vpermd %zmm13, %zmm19, %zmm31
; AVX512DQ-NEXT: vpmovsxbd {{.*#+}} zmm18 = [0,0,4,4,4,4,6,5,0,2,4,6,4,6,6,7]
; AVX512DQ-NEXT: vpermd %zmm6, %zmm18, %zmm31 {%k1}
; AVX512DQ-NEXT: vmovdqa 32(%rcx), %ymm13
; AVX512DQ-NEXT: vmovdqa 32(%rsi), %ymm1
; AVX512DQ-NEXT: vmovdqa 32(%rdi), %ymm0
; AVX512DQ-NEXT: vpunpcklwd {{.*#+}} ymm6 = ymm0[0],ymm1[0],ymm0[1],ymm1[1],ymm0[2],ymm1[2],ymm0[3],ymm1[3],ymm0[8],ymm1[8],ymm0[9],ymm1[9],ymm0[10],ymm1[10],ymm0[11],ymm1[11]
; AVX512DQ-NEXT: vpmovsxbd {{.*#+}} zmm20 = [4,5,1,3,5,7,5,7,6,5,3,3,7,7,7,7]
; AVX512DQ-NEXT: vpermd %zmm6, %zmm20, %zmm14
; AVX512DQ-NEXT: vmovdqa 32(%rdx), %ymm6
; AVX512DQ-NEXT: vpmovsxbd {{.*#+}} zmm21 = [4,4,2,1,6,5,6,5,4,6,2,3,6,7,6,7]
; AVX512DQ-NEXT: vpunpcklwd {{.*#+}} ymm4 = ymm6[0],ymm13[0],ymm6[1],ymm13[1],ymm6[2],ymm13[2],ymm6[3],ymm13[3],ymm6[8],ymm13[8],ymm6[9],ymm13[9],ymm6[10],ymm13[10],ymm6[11],ymm13[11]
; AVX512DQ-NEXT: vpermd %zmm4, %zmm21, %zmm14 {%k2}
; AVX512DQ-NEXT: vpunpckhwd {{.*#+}} ymm4 = ymm2[4],ymm15[4],ymm2[5],ymm15[5],ymm2[6],ymm15[6],ymm2[7],ymm15[7],ymm2[12],ymm15[12],ymm2[13],ymm15[13],ymm2[14],ymm15[14],ymm2[15],ymm15[15]
; AVX512DQ-NEXT: vmovdqa 32(%r10), %xmm2
; AVX512DQ-NEXT: vpunpckhwd {{.*#+}} ymm12 = ymm12[4],ymm7[4],ymm12[5],ymm7[5],ymm12[6],ymm7[6],ymm12[7],ymm7[7],ymm12[12],ymm7[12],ymm12[13],ymm7[13],ymm12[14],ymm7[14],ymm12[15],ymm7[15]
; AVX512DQ-NEXT: vmovdqa 32(%rax), %xmm7
; AVX512DQ-NEXT: vpermd %zmm12, %zmm19, %zmm17
; AVX512DQ-NEXT: vmovdqa 32(%r9), %xmm12
; AVX512DQ-NEXT: vpermd %zmm4, %zmm18, %zmm17 {%k1}
; AVX512DQ-NEXT: vmovdqa 32(%r8), %xmm15
; AVX512DQ-NEXT: vpunpckhwd {{.*#+}} ymm4 = ymm6[4],ymm13[4],ymm6[5],ymm13[5],ymm6[6],ymm13[6],ymm6[7],ymm13[7],ymm6[12],ymm13[12],ymm6[13],ymm13[13],ymm6[14],ymm13[14],ymm6[15],ymm13[15]
; AVX512DQ-NEXT: vmovdqa 32(%rcx), %xmm13
; AVX512DQ-NEXT: vpunpckhwd {{.*#+}} ymm0 = ymm0[4],ymm1[4],ymm0[5],ymm1[5],ymm0[6],ymm1[6],ymm0[7],ymm1[7],ymm0[12],ymm1[12],ymm0[13],ymm1[13],ymm0[14],ymm1[14],ymm0[15],ymm1[15]
; AVX512DQ-NEXT: vmovdqa 32(%rsi), %xmm1
; AVX512DQ-NEXT: vpermd %zmm0, %zmm20, %zmm16
; AVX512DQ-NEXT: vmovdqa 32(%rdi), %xmm0
; AVX512DQ-NEXT: vpermd %zmm4, %zmm21, %zmm16 {%k2}
; AVX512DQ-NEXT: vpunpcklwd {{.*#+}} xmm4 = xmm15[0],xmm12[0],xmm15[1],xmm12[1],xmm15[2],xmm12[2],xmm15[3],xmm12[3]
; AVX512DQ-NEXT: vpermd %zmm4, %zmm26, %zmm23
; AVX512DQ-NEXT: vpunpcklwd {{.*#+}} xmm4 = xmm7[0],xmm2[0],xmm7[1],xmm2[1],xmm7[2],xmm2[2],xmm7[3],xmm2[3]
; AVX512DQ-NEXT: vpermd %zmm4, %zmm27, %zmm23 {%k1}
; AVX512DQ-NEXT: vpunpcklwd {{.*#+}} xmm4 = xmm0[0],xmm1[0],xmm0[1],xmm1[1],xmm0[2],xmm1[2],xmm0[3],xmm1[3]
; AVX512DQ-NEXT: vpermd %zmm4, %zmm28, %zmm22
; AVX512DQ-NEXT: vmovdqa 32(%rdx), %xmm4
; AVX512DQ-NEXT: vpunpcklwd {{.*#+}} xmm6 = xmm4[0],xmm13[0],xmm4[1],xmm13[1],xmm4[2],xmm13[2],xmm4[3],xmm13[3]
; AVX512DQ-NEXT: vpermd %zmm6, %zmm29, %zmm22 {%k2}
; AVX512DQ-NEXT: vpunpckhwd {{.*#+}} xmm2 = xmm7[4],xmm2[4],xmm7[5],xmm2[5],xmm7[6],xmm2[6],xmm7[7],xmm2[7]
; AVX512DQ-NEXT: vpunpckhwd {{.*#+}} xmm6 = xmm15[4],xmm12[4],xmm15[5],xmm12[5],xmm15[6],xmm12[6],xmm15[7],xmm12[7]
; AVX512DQ-NEXT: vpermd %zmm6, %zmm26, %zmm25
; AVX512DQ-NEXT: vpermd %zmm2, %zmm27, %zmm25 {%k1}
; AVX512DQ-NEXT: vpunpckhwd {{.*#+}} xmm2 = xmm4[4],xmm13[4],xmm4[5],xmm13[5],xmm4[6],xmm13[6],xmm4[7],xmm13[7]
; AVX512DQ-NEXT: vpunpckhwd {{.*#+}} xmm0 = xmm0[4],xmm1[4],xmm0[5],xmm1[5],xmm0[6],xmm1[6],xmm0[7],xmm1[7]
; AVX512DQ-NEXT: vpermd %zmm0, %zmm28, %zmm24
; AVX512DQ-NEXT: vpermd %zmm2, %zmm29, %zmm24 {%k2}
; AVX512DQ-NEXT: vmovdqa (%r10), %ymm0
; AVX512DQ-NEXT: vmovdqa (%rax), %ymm1
; AVX512DQ-NEXT: vmovdqa (%r9), %ymm2
; AVX512DQ-NEXT: vmovdqa (%r8), %ymm4
; AVX512DQ-NEXT: vpunpcklwd {{.*#+}} ymm6 = ymm4[0],ymm2[0],ymm4[1],ymm2[1],ymm4[2],ymm2[2],ymm4[3],ymm2[3],ymm4[8],ymm2[8],ymm4[9],ymm2[9],ymm4[10],ymm2[10],ymm4[11],ymm2[11]
; AVX512DQ-NEXT: vpermd %zmm6, %zmm19, %zmm6
; AVX512DQ-NEXT: vpunpcklwd {{.*#+}} ymm7 = ymm1[0],ymm0[0],ymm1[1],ymm0[1],ymm1[2],ymm0[2],ymm1[3],ymm0[3],ymm1[8],ymm0[8],ymm1[9],ymm0[9],ymm1[10],ymm0[10],ymm1[11],ymm0[11]
; AVX512DQ-NEXT: vpermd %zmm7, %zmm18, %zmm6 {%k1}
; AVX512DQ-NEXT: vmovdqa (%rcx), %ymm7
; AVX512DQ-NEXT: vpunpckhwd {{.*#+}} ymm0 = ymm1[4],ymm0[4],ymm1[5],ymm0[5],ymm1[6],ymm0[6],ymm1[7],ymm0[7],ymm1[12],ymm0[12],ymm1[13],ymm0[13],ymm1[14],ymm0[14],ymm1[15],ymm0[15]
; AVX512DQ-NEXT: vmovdqa (%rdx), %ymm1
; AVX512DQ-NEXT: vpunpckhwd {{.*#+}} ymm2 = ymm4[4],ymm2[4],ymm4[5],ymm2[5],ymm4[6],ymm2[6],ymm4[7],ymm2[7],ymm4[12],ymm2[12],ymm4[13],ymm2[13],ymm4[14],ymm2[14],ymm4[15],ymm2[15]
; AVX512DQ-NEXT: vmovdqa (%rsi), %ymm4
; AVX512DQ-NEXT: vpermd %zmm2, %zmm19, %zmm2
; AVX512DQ-NEXT: vmovdqa (%rdi), %ymm12
; AVX512DQ-NEXT: vpermd %zmm0, %zmm18, %zmm2 {%k1}
; AVX512DQ-NEXT: vpunpcklwd {{.*#+}} ymm0 = ymm12[0],ymm4[0],ymm12[1],ymm4[1],ymm12[2],ymm4[2],ymm12[3],ymm4[3],ymm12[8],ymm4[8],ymm12[9],ymm4[9],ymm12[10],ymm4[10],ymm12[11],ymm4[11]
; AVX512DQ-NEXT: vpermd %zmm0, %zmm20, %zmm0
; AVX512DQ-NEXT: vpunpcklwd {{.*#+}} ymm13 = ymm1[0],ymm7[0],ymm1[1],ymm7[1],ymm1[2],ymm7[2],ymm1[3],ymm7[3],ymm1[8],ymm7[8],ymm1[9],ymm7[9],ymm1[10],ymm7[10],ymm1[11],ymm7[11]
; AVX512DQ-NEXT: vpermd %zmm13, %zmm21, %zmm0 {%k2}
; AVX512DQ-NEXT: vpunpckhwd {{.*#+}} ymm1 = ymm1[4],ymm7[4],ymm1[5],ymm7[5],ymm1[6],ymm7[6],ymm1[7],ymm7[7],ymm1[12],ymm7[12],ymm1[13],ymm7[13],ymm1[14],ymm7[14],ymm1[15],ymm7[15]
; AVX512DQ-NEXT: vpunpckhwd {{.*#+}} ymm4 = ymm12[4],ymm4[4],ymm12[5],ymm4[5],ymm12[6],ymm4[6],ymm12[7],ymm4[7],ymm12[12],ymm4[12],ymm12[13],ymm4[13],ymm12[14],ymm4[14],ymm12[15],ymm4[15]
; AVX512DQ-NEXT: vpermd %zmm4, %zmm20, %zmm4
; AVX512DQ-NEXT: vpermd %zmm1, %zmm21, %zmm4 {%k2}
; AVX512DQ-NEXT: vmovdqa {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 # 16-byte Reload
; AVX512DQ-NEXT: vpunpcklwd {{[-0-9]+}}(%r{{[sb]}}p), %xmm1, %xmm1 # 16-byte Folded Reload
; AVX512DQ-NEXT: # xmm1 = xmm1[0],mem[0],xmm1[1],mem[1],xmm1[2],mem[2],xmm1[3],mem[3]
; AVX512DQ-NEXT: vpunpcklwd {{[-0-9]+}}(%r{{[sb]}}p), %xmm5, %xmm5 # 16-byte Folded Reload
; AVX512DQ-NEXT: # xmm5 = xmm5[0],mem[0],xmm5[1],mem[1],xmm5[2],mem[2],xmm5[3],mem[3]
; AVX512DQ-NEXT: vpermd %zmm5, %zmm26, %zmm5
; AVX512DQ-NEXT: vpermd %zmm1, %zmm27, %zmm5 {%k1}
; AVX512DQ-NEXT: vpunpcklwd {{.*#+}} xmm1 = xmm9[0],xmm8[0],xmm9[1],xmm8[1],xmm9[2],xmm8[2],xmm9[3],xmm8[3]
; AVX512DQ-NEXT: vpunpcklwd {{.*#+}} xmm7 = xmm11[0],xmm10[0],xmm11[1],xmm10[1],xmm11[2],xmm10[2],xmm11[3],xmm10[3]
; AVX512DQ-NEXT: vpermd %zmm7, %zmm28, %zmm7
; AVX512DQ-NEXT: vpermd %zmm1, %zmm29, %zmm7 {%k2}
; AVX512DQ-NEXT: movb $-86, %al
; AVX512DQ-NEXT: kmovw %eax, %k1
; AVX512DQ-NEXT: vmovdqa64 %zmm30, %zmm3 {%k1}
; AVX512DQ-NEXT: vmovdqa64 %zmm31, %zmm14 {%k1}
; AVX512DQ-NEXT: vmovdqa64 %zmm17, %zmm16 {%k1}
; AVX512DQ-NEXT: vmovdqa64 %zmm23, %zmm22 {%k1}
; AVX512DQ-NEXT: vmovdqa64 %zmm25, %zmm24 {%k1}
; AVX512DQ-NEXT: vmovdqa64 %zmm6, %zmm0 {%k1}
; AVX512DQ-NEXT: vmovdqa64 %zmm2, %zmm4 {%k1}
; AVX512DQ-NEXT: vmovdqa64 %zmm5, %zmm7 {%k1}
; AVX512DQ-NEXT: movq {{[0-9]+}}(%rsp), %rax
; AVX512DQ-NEXT: vmovdqa64 %zmm7, (%rax)
; AVX512DQ-NEXT: vmovdqa64 %zmm4, 192(%rax)
; AVX512DQ-NEXT: vmovdqa64 %zmm0, 128(%rax)
; AVX512DQ-NEXT: vmovdqa64 %zmm24, 320(%rax)
; AVX512DQ-NEXT: vmovdqa64 %zmm22, 256(%rax)
; AVX512DQ-NEXT: vmovdqa64 %zmm16, 448(%rax)
; AVX512DQ-NEXT: vmovdqa64 %zmm14, 384(%rax)
; AVX512DQ-NEXT: vmovdqa64 %zmm3, 64(%rax)
; AVX512DQ-NEXT: vzeroupper
; AVX512DQ-NEXT: retq
;
; AVX512DQ-FCP-LABEL: store_i16_stride8_vf32:
; AVX512DQ-FCP: # %bb.0:
; AVX512DQ-FCP-NEXT: subq $520, %rsp # imm = 0x208
; AVX512DQ-FCP-NEXT: movq {{[0-9]+}}(%rsp), %rax
; AVX512DQ-FCP-NEXT: movq {{[0-9]+}}(%rsp), %r10
; AVX512DQ-FCP-NEXT: vmovdqa (%r10), %xmm1
; AVX512DQ-FCP-NEXT: vmovdqa (%rax), %xmm2
; AVX512DQ-FCP-NEXT: vpunpckhwd {{.*#+}} xmm0 = xmm2[4],xmm1[4],xmm2[5],xmm1[5],xmm2[6],xmm1[6],xmm2[7],xmm1[7]
; AVX512DQ-FCP-NEXT: vmovdqa64 %xmm2, %xmm25
; AVX512DQ-FCP-NEXT: vmovdqa64 %xmm1, %xmm26
; AVX512DQ-FCP-NEXT: vinserti32x4 $2, %xmm0, %zmm0, %zmm0
; AVX512DQ-FCP-NEXT: vmovdqu64 %zmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 64-byte Spill
; AVX512DQ-FCP-NEXT: vmovdqa (%r9), %xmm1
; AVX512DQ-FCP-NEXT: vmovdqa (%r8), %xmm2
; AVX512DQ-FCP-NEXT: vpunpckhwd {{.*#+}} xmm0 = xmm2[4],xmm1[4],xmm2[5],xmm1[5],xmm2[6],xmm1[6],xmm2[7],xmm1[7]
; AVX512DQ-FCP-NEXT: vmovdqa64 %xmm2, %xmm27
; AVX512DQ-FCP-NEXT: vmovdqa64 %xmm1, %xmm28
; AVX512DQ-FCP-NEXT: vinserti32x4 $2, %xmm0, %zmm0, %zmm0
; AVX512DQ-FCP-NEXT: vmovdqu64 %zmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 64-byte Spill
; AVX512DQ-FCP-NEXT: vmovdqa (%rcx), %xmm1
; AVX512DQ-FCP-NEXT: vmovdqa (%rdx), %xmm2
; AVX512DQ-FCP-NEXT: vpunpckhwd {{.*#+}} xmm0 = xmm2[4],xmm1[4],xmm2[5],xmm1[5],xmm2[6],xmm1[6],xmm2[7],xmm1[7]
; AVX512DQ-FCP-NEXT: vmovdqa64 %xmm2, %xmm31
; AVX512DQ-FCP-NEXT: vmovdqa64 %xmm1, %xmm19
; AVX512DQ-FCP-NEXT: vinserti32x4 $2, %xmm0, %zmm0, %zmm0
; AVX512DQ-FCP-NEXT: vmovdqu64 %zmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 64-byte Spill
; AVX512DQ-FCP-NEXT: vmovdqa (%rsi), %xmm1
; AVX512DQ-FCP-NEXT: vmovdqa (%rdi), %xmm2
; AVX512DQ-FCP-NEXT: vpunpckhwd {{.*#+}} xmm0 = xmm2[4],xmm1[4],xmm2[5],xmm1[5],xmm2[6],xmm1[6],xmm2[7],xmm1[7]
; AVX512DQ-FCP-NEXT: vmovdqa64 %xmm2, %xmm17
; AVX512DQ-FCP-NEXT: vmovdqa64 %xmm1, %xmm18
; AVX512DQ-FCP-NEXT: vinserti32x4 $2, %xmm0, %zmm0, %zmm20
; AVX512DQ-FCP-NEXT: vmovdqa 32(%r10), %ymm0
; AVX512DQ-FCP-NEXT: vmovdqa 32(%rax), %ymm1
; AVX512DQ-FCP-NEXT: vpunpcklwd {{.*#+}} ymm2 = ymm1[0],ymm0[0],ymm1[1],ymm0[1],ymm1[2],ymm0[2],ymm1[3],ymm0[3],ymm1[8],ymm0[8],ymm1[9],ymm0[9],ymm1[10],ymm0[10],ymm1[11],ymm0[11]
; AVX512DQ-FCP-NEXT: vinserti64x4 $1, %ymm2, %zmm2, %zmm23
; AVX512DQ-FCP-NEXT: vmovdqa 32(%r9), %ymm3
; AVX512DQ-FCP-NEXT: vmovdqa 32(%r8), %ymm4
; AVX512DQ-FCP-NEXT: vpunpcklwd {{.*#+}} ymm2 = ymm4[0],ymm3[0],ymm4[1],ymm3[1],ymm4[2],ymm3[2],ymm4[3],ymm3[3],ymm4[8],ymm3[8],ymm4[9],ymm3[9],ymm4[10],ymm3[10],ymm4[11],ymm3[11]
; AVX512DQ-FCP-NEXT: vinserti64x4 $1, %ymm2, %zmm2, %zmm24
; AVX512DQ-FCP-NEXT: vmovdqa 32(%rcx), %ymm5
; AVX512DQ-FCP-NEXT: vmovdqa 32(%rdx), %ymm6
; AVX512DQ-FCP-NEXT: vpunpcklwd {{.*#+}} ymm2 = ymm6[0],ymm5[0],ymm6[1],ymm5[1],ymm6[2],ymm5[2],ymm6[3],ymm5[3],ymm6[8],ymm5[8],ymm6[9],ymm5[9],ymm6[10],ymm5[10],ymm6[11],ymm5[11]
; AVX512DQ-FCP-NEXT: vinserti64x4 $1, %ymm2, %zmm2, %zmm21
; AVX512DQ-FCP-NEXT: vmovdqa 32(%rsi), %ymm7
; AVX512DQ-FCP-NEXT: vmovdqa 32(%rdi), %ymm8
; AVX512DQ-FCP-NEXT: vpunpcklwd {{.*#+}} ymm2 = ymm8[0],ymm7[0],ymm8[1],ymm7[1],ymm8[2],ymm7[2],ymm8[3],ymm7[3],ymm8[8],ymm7[8],ymm8[9],ymm7[9],ymm8[10],ymm7[10],ymm8[11],ymm7[11]
; AVX512DQ-FCP-NEXT: vinserti64x4 $1, %ymm2, %zmm2, %zmm22
; AVX512DQ-FCP-NEXT: vpunpckhwd {{.*#+}} ymm1 = ymm1[4],ymm0[4],ymm1[5],ymm0[5],ymm1[6],ymm0[6],ymm1[7],ymm0[7],ymm1[12],ymm0[12],ymm1[13],ymm0[13],ymm1[14],ymm0[14],ymm1[15],ymm0[15]
; AVX512DQ-FCP-NEXT: vmovdqa 32(%r10), %xmm0
; AVX512DQ-FCP-NEXT: vinserti64x4 $1, %ymm1, %zmm1, %zmm16
; AVX512DQ-FCP-NEXT: vmovdqa 32(%rax), %xmm2
; AVX512DQ-FCP-NEXT: vpunpckhwd {{.*#+}} ymm1 = ymm4[4],ymm3[4],ymm4[5],ymm3[5],ymm4[6],ymm3[6],ymm4[7],ymm3[7],ymm4[12],ymm3[12],ymm4[13],ymm3[13],ymm4[14],ymm3[14],ymm4[15],ymm3[15]
; AVX512DQ-FCP-NEXT: vmovdqu64 %zmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 64-byte Spill
; AVX512DQ-FCP-NEXT: vmovdqa 32(%r9), %xmm1
; AVX512DQ-FCP-NEXT: vpunpckhwd {{.*#+}} ymm3 = ymm6[4],ymm5[4],ymm6[5],ymm5[5],ymm6[6],ymm5[6],ymm6[7],ymm5[7],ymm6[12],ymm5[12],ymm6[13],ymm5[13],ymm6[14],ymm5[14],ymm6[15],ymm5[15]
; AVX512DQ-FCP-NEXT: vmovdqu64 %zmm3, {{[-0-9]+}}(%r{{[sb]}}p) # 64-byte Spill
; AVX512DQ-FCP-NEXT: vmovdqa 32(%r8), %xmm3
; AVX512DQ-FCP-NEXT: vpunpckhwd {{.*#+}} ymm4 = ymm8[4],ymm7[4],ymm8[5],ymm7[5],ymm8[6],ymm7[6],ymm8[7],ymm7[7],ymm8[12],ymm7[12],ymm8[13],ymm7[13],ymm8[14],ymm7[14],ymm8[15],ymm7[15]
; AVX512DQ-FCP-NEXT: vmovdqu64 %zmm4, {{[-0-9]+}}(%r{{[sb]}}p) # 64-byte Spill
; AVX512DQ-FCP-NEXT: vpunpcklwd {{.*#+}} xmm4 = xmm2[0],xmm0[0],xmm2[1],xmm0[1],xmm2[2],xmm0[2],xmm2[3],xmm0[3]
; AVX512DQ-FCP-NEXT: vmovdqu64 %zmm4, {{[-0-9]+}}(%r{{[sb]}}p) # 64-byte Spill
; AVX512DQ-FCP-NEXT: vpunpckhwd {{.*#+}} xmm0 = xmm2[4],xmm0[4],xmm2[5],xmm0[5],xmm2[6],xmm0[6],xmm2[7],xmm0[7]
; AVX512DQ-FCP-NEXT: vmovdqu64 %zmm0, (%rsp) # 64-byte Spill
; AVX512DQ-FCP-NEXT: vpunpcklwd {{.*#+}} xmm12 = xmm3[0],xmm1[0],xmm3[1],xmm1[1],xmm3[2],xmm1[2],xmm3[3],xmm1[3]
; AVX512DQ-FCP-NEXT: vpunpckhwd {{.*#+}} xmm0 = xmm3[4],xmm1[4],xmm3[5],xmm1[5],xmm3[6],xmm1[6],xmm3[7],xmm1[7]
; AVX512DQ-FCP-NEXT: vmovdqu64 %zmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 64-byte Spill
; AVX512DQ-FCP-NEXT: vmovdqa 32(%rcx), %xmm0
; AVX512DQ-FCP-NEXT: vmovdqa 32(%rdx), %xmm1
; AVX512DQ-FCP-NEXT: vpunpcklwd {{.*#+}} xmm9 = xmm1[0],xmm0[0],xmm1[1],xmm0[1],xmm1[2],xmm0[2],xmm1[3],xmm0[3]
; AVX512DQ-FCP-NEXT: vpunpckhwd {{.*#+}} xmm0 = xmm1[4],xmm0[4],xmm1[5],xmm0[5],xmm1[6],xmm0[6],xmm1[7],xmm0[7]
; AVX512DQ-FCP-NEXT: vmovdqu64 %zmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 64-byte Spill
; AVX512DQ-FCP-NEXT: vmovdqa 32(%rsi), %xmm0
; AVX512DQ-FCP-NEXT: vmovdqa 32(%rdi), %xmm1
; AVX512DQ-FCP-NEXT: vpunpcklwd {{.*#+}} xmm10 = xmm1[0],xmm0[0],xmm1[1],xmm0[1],xmm1[2],xmm0[2],xmm1[3],xmm0[3]
; AVX512DQ-FCP-NEXT: vpunpckhwd {{.*#+}} xmm15 = xmm1[4],xmm0[4],xmm1[5],xmm0[5],xmm1[6],xmm0[6],xmm1[7],xmm0[7]
; AVX512DQ-FCP-NEXT: vmovdqa (%r10), %ymm0
; AVX512DQ-FCP-NEXT: vmovdqa (%rax), %ymm1
; AVX512DQ-FCP-NEXT: vpunpcklwd {{.*#+}} ymm13 = ymm1[0],ymm0[0],ymm1[1],ymm0[1],ymm1[2],ymm0[2],ymm1[3],ymm0[3],ymm1[8],ymm0[8],ymm1[9],ymm0[9],ymm1[10],ymm0[10],ymm1[11],ymm0[11]
; AVX512DQ-FCP-NEXT: vpunpckhwd {{.*#+}} ymm11 = ymm1[4],ymm0[4],ymm1[5],ymm0[5],ymm1[6],ymm0[6],ymm1[7],ymm0[7],ymm1[12],ymm0[12],ymm1[13],ymm0[13],ymm1[14],ymm0[14],ymm1[15],ymm0[15]
; AVX512DQ-FCP-NEXT: vmovdqa (%r9), %ymm0
; AVX512DQ-FCP-NEXT: vmovdqa (%r8), %ymm1
; AVX512DQ-FCP-NEXT: vpunpcklwd {{.*#+}} ymm7 = ymm1[0],ymm0[0],ymm1[1],ymm0[1],ymm1[2],ymm0[2],ymm1[3],ymm0[3],ymm1[8],ymm0[8],ymm1[9],ymm0[9],ymm1[10],ymm0[10],ymm1[11],ymm0[11]
; AVX512DQ-FCP-NEXT: vpunpckhwd {{.*#+}} ymm8 = ymm1[4],ymm0[4],ymm1[5],ymm0[5],ymm1[6],ymm0[6],ymm1[7],ymm0[7],ymm1[12],ymm0[12],ymm1[13],ymm0[13],ymm1[14],ymm0[14],ymm1[15],ymm0[15]
; AVX512DQ-FCP-NEXT: vmovdqa (%rcx), %ymm0
; AVX512DQ-FCP-NEXT: vmovdqa (%rdx), %ymm1
; AVX512DQ-FCP-NEXT: vpunpcklwd {{.*#+}} ymm6 = ymm1[0],ymm0[0],ymm1[1],ymm0[1],ymm1[2],ymm0[2],ymm1[3],ymm0[3],ymm1[8],ymm0[8],ymm1[9],ymm0[9],ymm1[10],ymm0[10],ymm1[11],ymm0[11]
; AVX512DQ-FCP-NEXT: vpunpckhwd {{.*#+}} ymm5 = ymm1[4],ymm0[4],ymm1[5],ymm0[5],ymm1[6],ymm0[6],ymm1[7],ymm0[7],ymm1[12],ymm0[12],ymm1[13],ymm0[13],ymm1[14],ymm0[14],ymm1[15],ymm0[15]
; AVX512DQ-FCP-NEXT: vmovdqa (%rsi), %ymm0
; AVX512DQ-FCP-NEXT: vmovdqa (%rdi), %ymm1
; AVX512DQ-FCP-NEXT: vpunpcklwd {{.*#+}} ymm3 = ymm1[0],ymm0[0],ymm1[1],ymm0[1],ymm1[2],ymm0[2],ymm1[3],ymm0[3],ymm1[8],ymm0[8],ymm1[9],ymm0[9],ymm1[10],ymm0[10],ymm1[11],ymm0[11]
; AVX512DQ-FCP-NEXT: vpunpckhwd {{.*#+}} ymm4 = ymm1[4],ymm0[4],ymm1[5],ymm0[5],ymm1[6],ymm0[6],ymm1[7],ymm0[7],ymm1[12],ymm0[12],ymm1[13],ymm0[13],ymm1[14],ymm0[14],ymm1[15],ymm0[15]
; AVX512DQ-FCP-NEXT: vmovdqa64 %xmm25, %xmm0
; AVX512DQ-FCP-NEXT: vmovdqa64 %xmm26, %xmm1
; AVX512DQ-FCP-NEXT: vpunpcklwd {{.*#+}} xmm2 = xmm0[0],xmm1[0],xmm0[1],xmm1[1],xmm0[2],xmm1[2],xmm0[3],xmm1[3]
; AVX512DQ-FCP-NEXT: vmovdqa64 %xmm27, %xmm0
; AVX512DQ-FCP-NEXT: vmovdqa64 %xmm28, %xmm1
; AVX512DQ-FCP-NEXT: vpunpcklwd {{.*#+}} xmm1 = xmm0[0],xmm1[0],xmm0[1],xmm1[1],xmm0[2],xmm1[2],xmm0[3],xmm1[3]
; AVX512DQ-FCP-NEXT: vmovdqu64 {{[-0-9]+}}(%r{{[sb]}}p), %zmm0 # 64-byte Reload
; AVX512DQ-FCP-NEXT: vinserti64x4 $1, %ymm0, %zmm0, %zmm25
; AVX512DQ-FCP-NEXT: vmovdqu64 {{[-0-9]+}}(%r{{[sb]}}p), %zmm0 # 64-byte Reload
; AVX512DQ-FCP-NEXT: vinserti64x4 $1, %ymm0, %zmm0, %zmm26
; AVX512DQ-FCP-NEXT: vmovdqu64 {{[-0-9]+}}(%r{{[sb]}}p), %zmm0 # 64-byte Reload
; AVX512DQ-FCP-NEXT: vinserti64x4 $1, %ymm0, %zmm0, %zmm27
; AVX512DQ-FCP-NEXT: vmovdqu64 {{[-0-9]+}}(%r{{[sb]}}p), %zmm0 # 64-byte Reload
; AVX512DQ-FCP-NEXT: vinserti32x4 $2, %xmm0, %zmm0, %zmm28
; AVX512DQ-FCP-NEXT: vinserti32x4 $2, %xmm12, %zmm12, %zmm12
; AVX512DQ-FCP-NEXT: vinserti32x4 $2, %xmm9, %zmm9, %zmm29
; AVX512DQ-FCP-NEXT: vinserti32x4 $2, %xmm10, %zmm10, %zmm30
; AVX512DQ-FCP-NEXT: vmovdqa64 %xmm31, %xmm0
; AVX512DQ-FCP-NEXT: vmovdqa64 %xmm19, %xmm9
; AVX512DQ-FCP-NEXT: vpunpcklwd {{.*#+}} xmm9 = xmm0[0],xmm9[0],xmm0[1],xmm9[1],xmm0[2],xmm9[2],xmm0[3],xmm9[3]
; AVX512DQ-FCP-NEXT: vmovdqa64 %xmm17, %xmm0
; AVX512DQ-FCP-NEXT: vmovdqa64 %xmm18, %xmm10
; AVX512DQ-FCP-NEXT: vpunpcklwd {{.*#+}} xmm10 = xmm0[0],xmm10[0],xmm0[1],xmm10[1],xmm0[2],xmm10[2],xmm0[3],xmm10[3]
; AVX512DQ-FCP-NEXT: movw $-30584, %ax # imm = 0x8888
; AVX512DQ-FCP-NEXT: kmovw %eax, %k1
; AVX512DQ-FCP-NEXT: vpmovsxbd {{.*#+}} zmm31 = [0,1,4,5,4,5,5,7,10,9,14,13,14,13,15,15]
; AVX512DQ-FCP-NEXT: vpermd %zmm24, %zmm31, %zmm24
; AVX512DQ-FCP-NEXT: vpmovsxbd {{.*#+}} zmm0 = [0,0,4,4,4,4,6,5,8,10,12,14,12,14,14,15]
; AVX512DQ-FCP-NEXT: vpermd %zmm23, %zmm0, %zmm24 {%k1}
; AVX512DQ-FCP-NEXT: vpermd %zmm25, %zmm31, %zmm23
; AVX512DQ-FCP-NEXT: vpermd %zmm16, %zmm0, %zmm23 {%k1}
; AVX512DQ-FCP-NEXT: vmovdqu64 (%rsp), %zmm14 # 64-byte Reload
; AVX512DQ-FCP-NEXT: vinserti32x4 $2, %xmm14, %zmm14, %zmm16
; AVX512DQ-FCP-NEXT: vmovdqu64 {{[-0-9]+}}(%r{{[sb]}}p), %zmm14 # 64-byte Reload
; AVX512DQ-FCP-NEXT: vinserti32x4 $2, %xmm14, %zmm14, %zmm25
; AVX512DQ-FCP-NEXT: vmovdqu64 {{[-0-9]+}}(%r{{[sb]}}p), %zmm14 # 64-byte Reload
; AVX512DQ-FCP-NEXT: vinserti32x4 $2, %xmm14, %zmm14, %zmm14
; AVX512DQ-FCP-NEXT: vinserti32x4 $2, %xmm15, %zmm15, %zmm15
; AVX512DQ-FCP-NEXT: vinserti64x4 $1, %ymm13, %zmm13, %zmm13
; AVX512DQ-FCP-NEXT: vinserti64x4 $1, %ymm7, %zmm7, %zmm7
; AVX512DQ-FCP-NEXT: vinserti64x4 $1, %ymm6, %zmm6, %zmm6
; AVX512DQ-FCP-NEXT: vinserti64x4 $1, %ymm3, %zmm3, %zmm3
; AVX512DQ-FCP-NEXT: vinserti64x4 $1, %ymm11, %zmm11, %zmm11
; AVX512DQ-FCP-NEXT: vinserti64x4 $1, %ymm8, %zmm8, %zmm8
; AVX512DQ-FCP-NEXT: vinserti64x4 $1, %ymm5, %zmm5, %zmm5
; AVX512DQ-FCP-NEXT: vinserti64x4 $1, %ymm4, %zmm4, %zmm4
; AVX512DQ-FCP-NEXT: vinserti32x4 $2, %xmm2, %zmm2, %zmm2
; AVX512DQ-FCP-NEXT: vinserti32x4 $2, %xmm1, %zmm1, %zmm1
; AVX512DQ-FCP-NEXT: vinserti32x4 $2, %xmm9, %zmm9, %zmm9
; AVX512DQ-FCP-NEXT: vinserti32x4 $2, %xmm10, %zmm10, %zmm10
; AVX512DQ-FCP-NEXT: vpermd %zmm7, %zmm31, %zmm7
; AVX512DQ-FCP-NEXT: vpermd %zmm13, %zmm0, %zmm7 {%k1}
; AVX512DQ-FCP-NEXT: vpermd %zmm8, %zmm31, %zmm8
; AVX512DQ-FCP-NEXT: movw $8738, %ax # imm = 0x2222
; AVX512DQ-FCP-NEXT: kmovw %eax, %k2
; AVX512DQ-FCP-NEXT: vpermd %zmm11, %zmm0, %zmm8 {%k1}
; AVX512DQ-FCP-NEXT: vpmovsxbd {{.*#+}} zmm0 = [4,5,1,3,5,7,5,7,14,13,11,11,15,15,15,15]
; AVX512DQ-FCP-NEXT: vpermd %zmm22, %zmm0, %zmm11
; AVX512DQ-FCP-NEXT: vpmovsxbd {{.*#+}} zmm13 = [4,4,2,1,6,5,6,5,12,14,10,11,14,15,14,15]
; AVX512DQ-FCP-NEXT: vpermd %zmm21, %zmm13, %zmm11 {%k2}
; AVX512DQ-FCP-NEXT: vpermd %zmm27, %zmm0, %zmm21
; AVX512DQ-FCP-NEXT: vpermd %zmm26, %zmm13, %zmm21 {%k2}
; AVX512DQ-FCP-NEXT: vpermd %zmm3, %zmm0, %zmm3
; AVX512DQ-FCP-NEXT: vpermd %zmm6, %zmm13, %zmm3 {%k2}
; AVX512DQ-FCP-NEXT: vpermd %zmm4, %zmm0, %zmm0
; AVX512DQ-FCP-NEXT: vpermd %zmm5, %zmm13, %zmm0 {%k2}
; AVX512DQ-FCP-NEXT: vpmovsxbd {{.*#+}} zmm4 = [0,0,0,0,0,0,1,1,10,10,10,10,0,0,11,11]
; AVX512DQ-FCP-NEXT: vpermd {{[-0-9]+}}(%r{{[sb]}}p), %zmm4, %zmm5 # 64-byte Folded Reload
; AVX512DQ-FCP-NEXT: vpermd {{[-0-9]+}}(%r{{[sb]}}p), %zmm4, %zmm5 {%k1} # 64-byte Folded Reload
; AVX512DQ-FCP-NEXT: vpmovsxbd {{.*#+}} zmm6 = [0,0,0,0,0,0,1,0,10,10,10,10,0,0,11,11]
; AVX512DQ-FCP-NEXT: vpermd %zmm12, %zmm6, %zmm6
; AVX512DQ-FCP-NEXT: vpermd %zmm28, %zmm4, %zmm6 {%k1}
; AVX512DQ-FCP-NEXT: vpermd %zmm25, %zmm4, %zmm12
; AVX512DQ-FCP-NEXT: vpermd %zmm16, %zmm4, %zmm12 {%k1}
; AVX512DQ-FCP-NEXT: vpermd %zmm1, %zmm4, %zmm1
; AVX512DQ-FCP-NEXT: vpermd %zmm2, %zmm4, %zmm1 {%k1}
; AVX512DQ-FCP-NEXT: vpmovsxbd {{.*#+}} zmm2 = [0,0,1,1,1,1,0,0,10,0,11,0,11,0,0,0]
; AVX512DQ-FCP-NEXT: vpermd %zmm20, %zmm2, %zmm2
; AVX512DQ-FCP-NEXT: vpmovsxbd {{.*#+}} zmm4 = [0,0,1,1,1,1,0,0,10,10,11,11,11,11,0,0]
; AVX512DQ-FCP-NEXT: vpermd {{[-0-9]+}}(%r{{[sb]}}p), %zmm4, %zmm2 {%k2} # 64-byte Folded Reload
; AVX512DQ-FCP-NEXT: vpmovsxbd {{.*#+}} zmm13 = [0,0,1,0,1,0,0,0,10,10,11,11,11,11,0,0]
; AVX512DQ-FCP-NEXT: vpermd %zmm30, %zmm13, %zmm13
; AVX512DQ-FCP-NEXT: vpermd %zmm29, %zmm4, %zmm13 {%k2}
; AVX512DQ-FCP-NEXT: vpermd %zmm15, %zmm4, %zmm15
; AVX512DQ-FCP-NEXT: vpermd %zmm14, %zmm4, %zmm15 {%k2}
; AVX512DQ-FCP-NEXT: vpermd %zmm10, %zmm4, %zmm10
; AVX512DQ-FCP-NEXT: vpermd %zmm9, %zmm4, %zmm10 {%k2}
; AVX512DQ-FCP-NEXT: movb $-86, %al
; AVX512DQ-FCP-NEXT: kmovw %eax, %k1
; AVX512DQ-FCP-NEXT: vmovdqa64 %zmm5, %zmm2 {%k1}
; AVX512DQ-FCP-NEXT: vmovdqa64 %zmm24, %zmm11 {%k1}
; AVX512DQ-FCP-NEXT: vmovdqa64 %zmm23, %zmm21 {%k1}
; AVX512DQ-FCP-NEXT: vmovdqa64 %zmm6, %zmm13 {%k1}
; AVX512DQ-FCP-NEXT: vmovdqa64 %zmm12, %zmm15 {%k1}
; AVX512DQ-FCP-NEXT: vmovdqa64 %zmm7, %zmm3 {%k1}
; AVX512DQ-FCP-NEXT: vmovdqa64 %zmm8, %zmm0 {%k1}
; AVX512DQ-FCP-NEXT: vmovdqa64 %zmm1, %zmm10 {%k1}
; AVX512DQ-FCP-NEXT: movq {{[0-9]+}}(%rsp), %rax
; AVX512DQ-FCP-NEXT: vmovdqa64 %zmm10, (%rax)
; AVX512DQ-FCP-NEXT: vmovdqa64 %zmm0, 192(%rax)
; AVX512DQ-FCP-NEXT: vmovdqa64 %zmm3, 128(%rax)
; AVX512DQ-FCP-NEXT: vmovdqa64 %zmm15, 320(%rax)
; AVX512DQ-FCP-NEXT: vmovdqa64 %zmm13, 256(%rax)
; AVX512DQ-FCP-NEXT: vmovdqa64 %zmm21, 448(%rax)
; AVX512DQ-FCP-NEXT: vmovdqa64 %zmm11, 384(%rax)
; AVX512DQ-FCP-NEXT: vmovdqa64 %zmm2, 64(%rax)
; AVX512DQ-FCP-NEXT: addq $520, %rsp # imm = 0x208
; AVX512DQ-FCP-NEXT: vzeroupper
; AVX512DQ-FCP-NEXT: retq
;
; AVX512BW-LABEL: store_i16_stride8_vf32:
; AVX512BW: # %bb.0:
; AVX512BW-NEXT: movq {{[0-9]+}}(%rsp), %rax
; AVX512BW-NEXT: movq {{[0-9]+}}(%rsp), %r10
; AVX512BW-NEXT: movq {{[0-9]+}}(%rsp), %r11
; AVX512BW-NEXT: vmovdqa64 (%rdi), %zmm0
; AVX512BW-NEXT: vmovdqa64 (%rsi), %zmm1
; AVX512BW-NEXT: vmovdqa64 (%rdx), %zmm2
; AVX512BW-NEXT: vmovdqa64 (%rcx), %zmm3
; AVX512BW-NEXT: vmovdqa64 (%r8), %zmm5
; AVX512BW-NEXT: vmovdqa64 (%r9), %zmm6
; AVX512BW-NEXT: vmovdqa64 (%r11), %zmm7
; AVX512BW-NEXT: vmovdqa64 (%r10), %zmm8
; AVX512BW-NEXT: vpmovsxbw {{.*#+}} zmm4 = [0,0,0,0,0,0,0,32,0,0,0,0,0,0,1,33,0,0,0,0,0,0,2,34,0,0,0,0,0,0,3,35]
; AVX512BW-NEXT: vpermi2w %zmm8, %zmm7, %zmm4
; AVX512BW-NEXT: vpmovsxbw {{.*#+}} zmm9 = [0,0,0,0,0,32,0,0,0,0,0,0,1,33,0,0,0,0,0,0,2,34,0,0,0,0,0,0,3,35,0,0]
; AVX512BW-NEXT: vpermi2w %zmm6, %zmm5, %zmm9
; AVX512BW-NEXT: movw $-30584, %cx # imm = 0x8888
; AVX512BW-NEXT: kmovd %ecx, %k1
; AVX512BW-NEXT: vmovdqa32 %zmm4, %zmm9 {%k1}
; AVX512BW-NEXT: vpmovsxbw {{.*#+}} zmm10 = [0,0,0,32,0,0,0,0,0,0,1,33,0,0,0,0,0,0,2,34,0,0,0,0,0,0,3,35,0,0,0,0]
; AVX512BW-NEXT: vpermi2w %zmm3, %zmm2, %zmm10
; AVX512BW-NEXT: vpmovsxbw {{.*#+}} zmm4 = [0,32,0,0,0,0,0,0,1,33,0,0,0,0,0,0,2,34,0,0,0,0,0,0,3,35,0,0,0,0,0,0]
; AVX512BW-NEXT: vpermi2w %zmm1, %zmm0, %zmm4
; AVX512BW-NEXT: movw $8738, %cx # imm = 0x2222
; AVX512BW-NEXT: kmovd %ecx, %k2
; AVX512BW-NEXT: vmovdqa32 %zmm10, %zmm4 {%k2}
; AVX512BW-NEXT: movb $-86, %cl
; AVX512BW-NEXT: kmovd %ecx, %k3
; AVX512BW-NEXT: vmovdqa64 %zmm9, %zmm4 {%k3}
; AVX512BW-NEXT: vpmovsxbw {{.*#+}} zmm9 = [0,0,0,0,0,0,4,36,0,0,0,0,0,0,5,37,0,0,0,0,0,0,6,38,0,0,0,0,0,0,7,39]
; AVX512BW-NEXT: vpermi2w %zmm8, %zmm7, %zmm9
; AVX512BW-NEXT: vpmovsxbw {{.*#+}} zmm10 = [0,0,0,0,4,36,0,0,0,0,0,0,5,37,0,0,0,0,0,0,6,38,0,0,0,0,0,0,7,39,0,0]
; AVX512BW-NEXT: vpermi2w %zmm6, %zmm5, %zmm10
; AVX512BW-NEXT: vmovdqa32 %zmm9, %zmm10 {%k1}
; AVX512BW-NEXT: vpmovsxbw {{.*#+}} zmm11 = [0,0,4,36,0,0,0,0,0,0,5,37,0,0,0,0,0,0,6,38,0,0,0,0,0,0,7,39,0,0,0,0]
; AVX512BW-NEXT: vpermi2w %zmm3, %zmm2, %zmm11
; AVX512BW-NEXT: vpmovsxbw {{.*#+}} zmm9 = [4,36,0,0,0,0,0,0,5,37,0,0,0,0,0,0,6,38,0,0,0,0,0,0,7,39,0,0,0,0,0,0]
; AVX512BW-NEXT: vpermi2w %zmm1, %zmm0, %zmm9
; AVX512BW-NEXT: vmovdqa32 %zmm11, %zmm9 {%k2}
; AVX512BW-NEXT: vmovdqa64 %zmm10, %zmm9 {%k3}
; AVX512BW-NEXT: vpmovsxbw {{.*#+}} zmm10 = [0,0,0,0,0,0,8,40,0,0,0,0,0,0,9,41,0,0,0,0,0,0,10,42,0,0,0,0,0,0,11,43]
; AVX512BW-NEXT: vpermi2w %zmm8, %zmm7, %zmm10
; AVX512BW-NEXT: vpmovsxbw {{.*#+}} zmm11 = [0,0,0,0,8,40,0,0,0,0,0,0,9,41,0,0,0,0,0,0,10,42,0,0,0,0,0,0,11,43,0,0]
; AVX512BW-NEXT: vpermi2w %zmm6, %zmm5, %zmm11
; AVX512BW-NEXT: vmovdqa32 %zmm10, %zmm11 {%k1}
; AVX512BW-NEXT: vpmovsxbw {{.*#+}} zmm12 = [0,0,8,40,0,0,0,0,0,0,9,41,0,0,0,0,0,0,10,42,0,0,0,0,0,0,11,43,0,0,0,0]
; AVX512BW-NEXT: vpermi2w %zmm3, %zmm2, %zmm12
; AVX512BW-NEXT: vpmovsxbw {{.*#+}} zmm10 = [8,40,0,0,0,0,0,0,9,41,0,0,0,0,0,0,10,42,0,0,0,0,0,0,11,43,0,0,0,0,0,0]
; AVX512BW-NEXT: vpermi2w %zmm1, %zmm0, %zmm10
; AVX512BW-NEXT: vmovdqa32 %zmm12, %zmm10 {%k2}
; AVX512BW-NEXT: vmovdqa64 %zmm11, %zmm10 {%k3}
; AVX512BW-NEXT: vpmovsxbw {{.*#+}} zmm11 = [0,0,0,0,0,0,12,44,0,0,0,0,0,0,13,45,0,0,0,0,0,0,14,46,0,0,0,0,0,0,15,47]
; AVX512BW-NEXT: vpermi2w %zmm8, %zmm7, %zmm11
; AVX512BW-NEXT: vpmovsxbw {{.*#+}} zmm12 = [0,0,0,0,12,44,0,0,0,0,0,0,13,45,0,0,0,0,0,0,14,46,0,0,0,0,0,0,15,47,0,0]
; AVX512BW-NEXT: vpermi2w %zmm6, %zmm5, %zmm12
; AVX512BW-NEXT: vmovdqa32 %zmm11, %zmm12 {%k1}
; AVX512BW-NEXT: vpmovsxbw {{.*#+}} zmm13 = [0,0,12,44,0,0,0,0,0,0,13,45,0,0,0,0,0,0,14,46,0,0,0,0,0,0,15,47,0,0,0,0]
; AVX512BW-NEXT: vpermi2w %zmm3, %zmm2, %zmm13
; AVX512BW-NEXT: vpmovsxbw {{.*#+}} zmm11 = [12,44,0,0,0,0,0,0,13,45,0,0,0,0,0,0,14,46,0,0,0,0,0,0,15,47,0,0,0,0,0,0]
; AVX512BW-NEXT: vpermi2w %zmm1, %zmm0, %zmm11
; AVX512BW-NEXT: vmovdqa32 %zmm13, %zmm11 {%k2}
; AVX512BW-NEXT: vmovdqa64 %zmm12, %zmm11 {%k3}
; AVX512BW-NEXT: vpmovsxbw {{.*#+}} zmm12 = [0,0,0,0,0,0,16,48,0,0,0,0,0,0,17,49,0,0,0,0,0,0,18,50,0,0,0,0,0,0,19,51]
; AVX512BW-NEXT: vpermi2w %zmm8, %zmm7, %zmm12
; AVX512BW-NEXT: vpmovsxbw {{.*#+}} zmm13 = [0,0,0,0,16,48,0,0,0,0,0,0,17,49,0,0,0,0,0,0,18,50,0,0,0,0,0,0,19,51,0,0]
; AVX512BW-NEXT: vpermi2w %zmm6, %zmm5, %zmm13
; AVX512BW-NEXT: vmovdqa32 %zmm12, %zmm13 {%k1}
; AVX512BW-NEXT: vpmovsxbw {{.*#+}} zmm12 = [0,0,16,48,0,0,0,0,0,0,17,49,0,0,0,0,0,0,18,50,0,0,0,0,0,0,19,51,0,0,0,0]
; AVX512BW-NEXT: vpermi2w %zmm3, %zmm2, %zmm12
; AVX512BW-NEXT: vpmovsxbw {{.*#+}} zmm14 = [16,48,0,0,0,0,0,0,17,49,0,0,0,0,0,0,18,50,0,0,0,0,0,0,19,51,0,0,0,0,0,0]
; AVX512BW-NEXT: vpermi2w %zmm1, %zmm0, %zmm14
; AVX512BW-NEXT: vmovdqa32 %zmm12, %zmm14 {%k2}
; AVX512BW-NEXT: vmovdqa64 %zmm13, %zmm14 {%k3}
; AVX512BW-NEXT: vpmovsxbw {{.*#+}} zmm12 = [0,0,0,0,0,0,20,52,0,0,0,0,0,0,21,53,0,0,0,0,0,0,22,54,0,0,0,0,0,0,23,55]
; AVX512BW-NEXT: vpermi2w %zmm8, %zmm7, %zmm12
; AVX512BW-NEXT: vpmovsxbw {{.*#+}} zmm13 = [0,0,0,0,20,52,0,0,0,0,0,0,21,53,0,0,0,0,0,0,22,54,0,0,0,0,0,0,23,55,0,0]
; AVX512BW-NEXT: vpermi2w %zmm6, %zmm5, %zmm13
; AVX512BW-NEXT: vmovdqa32 %zmm12, %zmm13 {%k1}
; AVX512BW-NEXT: vpmovsxbw {{.*#+}} zmm12 = [0,0,20,52,0,0,0,0,0,0,21,53,0,0,0,0,0,0,22,54,0,0,0,0,0,0,23,55,0,0,0,0]
; AVX512BW-NEXT: vpermi2w %zmm3, %zmm2, %zmm12
; AVX512BW-NEXT: vpmovsxbw {{.*#+}} zmm15 = [20,52,0,0,0,0,0,0,21,53,0,0,0,0,0,0,22,54,0,0,0,0,0,0,23,55,0,0,0,0,0,0]
; AVX512BW-NEXT: vpermi2w %zmm1, %zmm0, %zmm15
; AVX512BW-NEXT: vmovdqa32 %zmm12, %zmm15 {%k2}
; AVX512BW-NEXT: vmovdqa64 %zmm13, %zmm15 {%k3}
; AVX512BW-NEXT: vpmovsxbw {{.*#+}} zmm12 = [0,0,0,0,0,0,24,56,0,0,0,0,0,0,25,57,0,0,0,0,0,0,26,58,0,0,0,0,0,0,27,59]
; AVX512BW-NEXT: vpermi2w %zmm8, %zmm7, %zmm12
; AVX512BW-NEXT: vpmovsxbw {{.*#+}} zmm13 = [0,0,0,0,24,56,0,0,0,0,0,0,25,57,0,0,0,0,0,0,26,58,0,0,0,0,0,0,27,59,0,0]
; AVX512BW-NEXT: vpermi2w %zmm6, %zmm5, %zmm13
; AVX512BW-NEXT: vmovdqa32 %zmm12, %zmm13 {%k1}
; AVX512BW-NEXT: vpmovsxbw {{.*#+}} zmm12 = [0,0,24,56,0,0,0,0,0,0,25,57,0,0,0,0,0,0,26,58,0,0,0,0,0,0,27,59,0,0,0,0]
; AVX512BW-NEXT: vpermi2w %zmm3, %zmm2, %zmm12
; AVX512BW-NEXT: vpmovsxbw {{.*#+}} zmm16 = [24,56,0,0,0,0,0,0,25,57,0,0,0,0,0,0,26,58,0,0,0,0,0,0,27,59,0,0,0,0,0,0]
; AVX512BW-NEXT: vpermi2w %zmm1, %zmm0, %zmm16
; AVX512BW-NEXT: vmovdqa32 %zmm12, %zmm16 {%k2}
; AVX512BW-NEXT: vmovdqa64 %zmm13, %zmm16 {%k3}
; AVX512BW-NEXT: vpmovsxbw {{.*#+}} zmm12 = [0,0,0,0,0,0,28,60,0,0,0,0,0,0,29,61,0,0,0,0,0,0,30,62,0,0,0,0,0,0,31,63]
; AVX512BW-NEXT: vpermi2w %zmm8, %zmm7, %zmm12
; AVX512BW-NEXT: vpmovsxbw {{.*#+}} zmm7 = [0,0,0,0,28,60,0,0,0,0,0,0,29,61,0,0,0,0,0,0,30,62,0,0,0,0,0,0,31,63,0,0]
; AVX512BW-NEXT: vpermi2w %zmm6, %zmm5, %zmm7
; AVX512BW-NEXT: vmovdqa32 %zmm12, %zmm7 {%k1}
; AVX512BW-NEXT: vpmovsxbw {{.*#+}} zmm5 = [0,0,28,60,0,0,0,0,0,0,29,61,0,0,0,0,0,0,30,62,0,0,0,0,0,0,31,63,0,0,0,0]
; AVX512BW-NEXT: vpermi2w %zmm3, %zmm2, %zmm5
; AVX512BW-NEXT: vpmovsxbw {{.*#+}} zmm2 = [28,60,0,0,0,0,0,0,29,61,0,0,0,0,0,0,30,62,0,0,0,0,0,0,31,63,0,0,0,0,0,0]
; AVX512BW-NEXT: vpermi2w %zmm1, %zmm0, %zmm2
; AVX512BW-NEXT: vmovdqa32 %zmm5, %zmm2 {%k2}
; AVX512BW-NEXT: vmovdqa64 %zmm7, %zmm2 {%k3}
; AVX512BW-NEXT: vmovdqa64 %zmm2, 448(%rax)
; AVX512BW-NEXT: vmovdqa64 %zmm16, 384(%rax)
; AVX512BW-NEXT: vmovdqa64 %zmm15, 320(%rax)
; AVX512BW-NEXT: vmovdqa64 %zmm14, 256(%rax)
; AVX512BW-NEXT: vmovdqa64 %zmm11, 192(%rax)
; AVX512BW-NEXT: vmovdqa64 %zmm10, 128(%rax)
; AVX512BW-NEXT: vmovdqa64 %zmm9, 64(%rax)
; AVX512BW-NEXT: vmovdqa64 %zmm4, (%rax)
; AVX512BW-NEXT: vzeroupper
; AVX512BW-NEXT: retq
;
; AVX512BW-FCP-LABEL: store_i16_stride8_vf32:
; AVX512BW-FCP: # %bb.0:
; AVX512BW-FCP-NEXT: movq {{[0-9]+}}(%rsp), %rax
; AVX512BW-FCP-NEXT: movq {{[0-9]+}}(%rsp), %r10
; AVX512BW-FCP-NEXT: movq {{[0-9]+}}(%rsp), %r11
; AVX512BW-FCP-NEXT: vmovdqa64 (%rdi), %zmm0
; AVX512BW-FCP-NEXT: vmovdqa64 (%rsi), %zmm1
; AVX512BW-FCP-NEXT: vmovdqa64 (%rdx), %zmm2
; AVX512BW-FCP-NEXT: vmovdqa64 (%rcx), %zmm3
; AVX512BW-FCP-NEXT: vmovdqa64 (%r8), %zmm5
; AVX512BW-FCP-NEXT: vmovdqa64 (%r9), %zmm6
; AVX512BW-FCP-NEXT: vmovdqa64 (%r11), %zmm7
; AVX512BW-FCP-NEXT: vmovdqa64 (%r10), %zmm8
; AVX512BW-FCP-NEXT: vpmovsxbw {{.*#+}} zmm4 = [0,0,0,0,0,0,0,32,0,0,0,0,0,0,1,33,0,0,0,0,0,0,2,34,0,0,0,0,0,0,3,35]
; AVX512BW-FCP-NEXT: vpermi2w %zmm8, %zmm7, %zmm4
; AVX512BW-FCP-NEXT: vpmovsxbw {{.*#+}} zmm9 = [0,0,0,0,0,32,0,0,0,0,0,0,1,33,0,0,0,0,0,0,2,34,0,0,0,0,0,0,3,35,0,0]
; AVX512BW-FCP-NEXT: vpermi2w %zmm6, %zmm5, %zmm9
; AVX512BW-FCP-NEXT: movw $-30584, %cx # imm = 0x8888
; AVX512BW-FCP-NEXT: kmovd %ecx, %k1
; AVX512BW-FCP-NEXT: vmovdqa32 %zmm4, %zmm9 {%k1}
; AVX512BW-FCP-NEXT: vpmovsxbw {{.*#+}} zmm10 = [0,0,0,32,0,0,0,0,0,0,1,33,0,0,0,0,0,0,2,34,0,0,0,0,0,0,3,35,0,0,0,0]
; AVX512BW-FCP-NEXT: vpermi2w %zmm3, %zmm2, %zmm10
; AVX512BW-FCP-NEXT: vpmovsxbw {{.*#+}} zmm4 = [0,32,0,0,0,0,0,0,1,33,0,0,0,0,0,0,2,34,0,0,0,0,0,0,3,35,0,0,0,0,0,0]
; AVX512BW-FCP-NEXT: vpermi2w %zmm1, %zmm0, %zmm4
; AVX512BW-FCP-NEXT: movw $8738, %cx # imm = 0x2222
; AVX512BW-FCP-NEXT: kmovd %ecx, %k2
; AVX512BW-FCP-NEXT: vmovdqa32 %zmm10, %zmm4 {%k2}
; AVX512BW-FCP-NEXT: movb $-86, %cl
; AVX512BW-FCP-NEXT: kmovd %ecx, %k3
; AVX512BW-FCP-NEXT: vmovdqa64 %zmm9, %zmm4 {%k3}
; AVX512BW-FCP-NEXT: vpmovsxbw {{.*#+}} zmm9 = [0,0,0,0,0,0,4,36,0,0,0,0,0,0,5,37,0,0,0,0,0,0,6,38,0,0,0,0,0,0,7,39]
; AVX512BW-FCP-NEXT: vpermi2w %zmm8, %zmm7, %zmm9
; AVX512BW-FCP-NEXT: vpmovsxbw {{.*#+}} zmm10 = [0,0,0,0,4,36,0,0,0,0,0,0,5,37,0,0,0,0,0,0,6,38,0,0,0,0,0,0,7,39,0,0]
; AVX512BW-FCP-NEXT: vpermi2w %zmm6, %zmm5, %zmm10
; AVX512BW-FCP-NEXT: vmovdqa32 %zmm9, %zmm10 {%k1}
; AVX512BW-FCP-NEXT: vpmovsxbw {{.*#+}} zmm11 = [0,0,4,36,0,0,0,0,0,0,5,37,0,0,0,0,0,0,6,38,0,0,0,0,0,0,7,39,0,0,0,0]
; AVX512BW-FCP-NEXT: vpermi2w %zmm3, %zmm2, %zmm11
; AVX512BW-FCP-NEXT: vpmovsxbw {{.*#+}} zmm9 = [4,36,0,0,0,0,0,0,5,37,0,0,0,0,0,0,6,38,0,0,0,0,0,0,7,39,0,0,0,0,0,0]
; AVX512BW-FCP-NEXT: vpermi2w %zmm1, %zmm0, %zmm9
; AVX512BW-FCP-NEXT: vmovdqa32 %zmm11, %zmm9 {%k2}
; AVX512BW-FCP-NEXT: vmovdqa64 %zmm10, %zmm9 {%k3}
; AVX512BW-FCP-NEXT: vpmovsxbw {{.*#+}} zmm10 = [0,0,0,0,0,0,8,40,0,0,0,0,0,0,9,41,0,0,0,0,0,0,10,42,0,0,0,0,0,0,11,43]
; AVX512BW-FCP-NEXT: vpermi2w %zmm8, %zmm7, %zmm10
; AVX512BW-FCP-NEXT: vpmovsxbw {{.*#+}} zmm11 = [0,0,0,0,8,40,0,0,0,0,0,0,9,41,0,0,0,0,0,0,10,42,0,0,0,0,0,0,11,43,0,0]
; AVX512BW-FCP-NEXT: vpermi2w %zmm6, %zmm5, %zmm11
; AVX512BW-FCP-NEXT: vmovdqa32 %zmm10, %zmm11 {%k1}
; AVX512BW-FCP-NEXT: vpmovsxbw {{.*#+}} zmm12 = [0,0,8,40,0,0,0,0,0,0,9,41,0,0,0,0,0,0,10,42,0,0,0,0,0,0,11,43,0,0,0,0]
; AVX512BW-FCP-NEXT: vpermi2w %zmm3, %zmm2, %zmm12
; AVX512BW-FCP-NEXT: vpmovsxbw {{.*#+}} zmm10 = [8,40,0,0,0,0,0,0,9,41,0,0,0,0,0,0,10,42,0,0,0,0,0,0,11,43,0,0,0,0,0,0]
; AVX512BW-FCP-NEXT: vpermi2w %zmm1, %zmm0, %zmm10
; AVX512BW-FCP-NEXT: vmovdqa32 %zmm12, %zmm10 {%k2}
; AVX512BW-FCP-NEXT: vmovdqa64 %zmm11, %zmm10 {%k3}
; AVX512BW-FCP-NEXT: vpmovsxbw {{.*#+}} zmm11 = [0,0,0,0,0,0,12,44,0,0,0,0,0,0,13,45,0,0,0,0,0,0,14,46,0,0,0,0,0,0,15,47]
; AVX512BW-FCP-NEXT: vpermi2w %zmm8, %zmm7, %zmm11
; AVX512BW-FCP-NEXT: vpmovsxbw {{.*#+}} zmm12 = [0,0,0,0,12,44,0,0,0,0,0,0,13,45,0,0,0,0,0,0,14,46,0,0,0,0,0,0,15,47,0,0]
; AVX512BW-FCP-NEXT: vpermi2w %zmm6, %zmm5, %zmm12
; AVX512BW-FCP-NEXT: vmovdqa32 %zmm11, %zmm12 {%k1}
; AVX512BW-FCP-NEXT: vpmovsxbw {{.*#+}} zmm13 = [0,0,12,44,0,0,0,0,0,0,13,45,0,0,0,0,0,0,14,46,0,0,0,0,0,0,15,47,0,0,0,0]
; AVX512BW-FCP-NEXT: vpermi2w %zmm3, %zmm2, %zmm13
; AVX512BW-FCP-NEXT: vpmovsxbw {{.*#+}} zmm11 = [12,44,0,0,0,0,0,0,13,45,0,0,0,0,0,0,14,46,0,0,0,0,0,0,15,47,0,0,0,0,0,0]
; AVX512BW-FCP-NEXT: vpermi2w %zmm1, %zmm0, %zmm11
; AVX512BW-FCP-NEXT: vmovdqa32 %zmm13, %zmm11 {%k2}
; AVX512BW-FCP-NEXT: vmovdqa64 %zmm12, %zmm11 {%k3}
; AVX512BW-FCP-NEXT: vpmovsxbw {{.*#+}} zmm12 = [0,0,0,0,0,0,16,48,0,0,0,0,0,0,17,49,0,0,0,0,0,0,18,50,0,0,0,0,0,0,19,51]
; AVX512BW-FCP-NEXT: vpermi2w %zmm8, %zmm7, %zmm12
; AVX512BW-FCP-NEXT: vpmovsxbw {{.*#+}} zmm13 = [0,0,0,0,16,48,0,0,0,0,0,0,17,49,0,0,0,0,0,0,18,50,0,0,0,0,0,0,19,51,0,0]
; AVX512BW-FCP-NEXT: vpermi2w %zmm6, %zmm5, %zmm13
; AVX512BW-FCP-NEXT: vmovdqa32 %zmm12, %zmm13 {%k1}
; AVX512BW-FCP-NEXT: vpmovsxbw {{.*#+}} zmm12 = [0,0,16,48,0,0,0,0,0,0,17,49,0,0,0,0,0,0,18,50,0,0,0,0,0,0,19,51,0,0,0,0]
; AVX512BW-FCP-NEXT: vpermi2w %zmm3, %zmm2, %zmm12
; AVX512BW-FCP-NEXT: vpmovsxbw {{.*#+}} zmm14 = [16,48,0,0,0,0,0,0,17,49,0,0,0,0,0,0,18,50,0,0,0,0,0,0,19,51,0,0,0,0,0,0]
; AVX512BW-FCP-NEXT: vpermi2w %zmm1, %zmm0, %zmm14
; AVX512BW-FCP-NEXT: vmovdqa32 %zmm12, %zmm14 {%k2}
; AVX512BW-FCP-NEXT: vmovdqa64 %zmm13, %zmm14 {%k3}
; AVX512BW-FCP-NEXT: vpmovsxbw {{.*#+}} zmm12 = [0,0,0,0,0,0,20,52,0,0,0,0,0,0,21,53,0,0,0,0,0,0,22,54,0,0,0,0,0,0,23,55]
; AVX512BW-FCP-NEXT: vpermi2w %zmm8, %zmm7, %zmm12
; AVX512BW-FCP-NEXT: vpmovsxbw {{.*#+}} zmm13 = [0,0,0,0,20,52,0,0,0,0,0,0,21,53,0,0,0,0,0,0,22,54,0,0,0,0,0,0,23,55,0,0]
; AVX512BW-FCP-NEXT: vpermi2w %zmm6, %zmm5, %zmm13
; AVX512BW-FCP-NEXT: vmovdqa32 %zmm12, %zmm13 {%k1}
; AVX512BW-FCP-NEXT: vpmovsxbw {{.*#+}} zmm12 = [0,0,20,52,0,0,0,0,0,0,21,53,0,0,0,0,0,0,22,54,0,0,0,0,0,0,23,55,0,0,0,0]
; AVX512BW-FCP-NEXT: vpermi2w %zmm3, %zmm2, %zmm12
; AVX512BW-FCP-NEXT: vpmovsxbw {{.*#+}} zmm15 = [20,52,0,0,0,0,0,0,21,53,0,0,0,0,0,0,22,54,0,0,0,0,0,0,23,55,0,0,0,0,0,0]
; AVX512BW-FCP-NEXT: vpermi2w %zmm1, %zmm0, %zmm15
; AVX512BW-FCP-NEXT: vmovdqa32 %zmm12, %zmm15 {%k2}
; AVX512BW-FCP-NEXT: vmovdqa64 %zmm13, %zmm15 {%k3}
; AVX512BW-FCP-NEXT: vpmovsxbw {{.*#+}} zmm12 = [0,0,0,0,0,0,24,56,0,0,0,0,0,0,25,57,0,0,0,0,0,0,26,58,0,0,0,0,0,0,27,59]
; AVX512BW-FCP-NEXT: vpermi2w %zmm8, %zmm7, %zmm12
; AVX512BW-FCP-NEXT: vpmovsxbw {{.*#+}} zmm13 = [0,0,0,0,24,56,0,0,0,0,0,0,25,57,0,0,0,0,0,0,26,58,0,0,0,0,0,0,27,59,0,0]
; AVX512BW-FCP-NEXT: vpermi2w %zmm6, %zmm5, %zmm13
; AVX512BW-FCP-NEXT: vmovdqa32 %zmm12, %zmm13 {%k1}
; AVX512BW-FCP-NEXT: vpmovsxbw {{.*#+}} zmm12 = [0,0,24,56,0,0,0,0,0,0,25,57,0,0,0,0,0,0,26,58,0,0,0,0,0,0,27,59,0,0,0,0]
; AVX512BW-FCP-NEXT: vpermi2w %zmm3, %zmm2, %zmm12
; AVX512BW-FCP-NEXT: vpmovsxbw {{.*#+}} zmm16 = [24,56,0,0,0,0,0,0,25,57,0,0,0,0,0,0,26,58,0,0,0,0,0,0,27,59,0,0,0,0,0,0]
; AVX512BW-FCP-NEXT: vpermi2w %zmm1, %zmm0, %zmm16
; AVX512BW-FCP-NEXT: vmovdqa32 %zmm12, %zmm16 {%k2}
; AVX512BW-FCP-NEXT: vmovdqa64 %zmm13, %zmm16 {%k3}
; AVX512BW-FCP-NEXT: vpmovsxbw {{.*#+}} zmm12 = [0,0,0,0,0,0,28,60,0,0,0,0,0,0,29,61,0,0,0,0,0,0,30,62,0,0,0,0,0,0,31,63]
; AVX512BW-FCP-NEXT: vpermi2w %zmm8, %zmm7, %zmm12
; AVX512BW-FCP-NEXT: vpmovsxbw {{.*#+}} zmm7 = [0,0,0,0,28,60,0,0,0,0,0,0,29,61,0,0,0,0,0,0,30,62,0,0,0,0,0,0,31,63,0,0]
; AVX512BW-FCP-NEXT: vpermi2w %zmm6, %zmm5, %zmm7
; AVX512BW-FCP-NEXT: vmovdqa32 %zmm12, %zmm7 {%k1}
; AVX512BW-FCP-NEXT: vpmovsxbw {{.*#+}} zmm5 = [0,0,28,60,0,0,0,0,0,0,29,61,0,0,0,0,0,0,30,62,0,0,0,0,0,0,31,63,0,0,0,0]
; AVX512BW-FCP-NEXT: vpermi2w %zmm3, %zmm2, %zmm5
; AVX512BW-FCP-NEXT: vpmovsxbw {{.*#+}} zmm2 = [28,60,0,0,0,0,0,0,29,61,0,0,0,0,0,0,30,62,0,0,0,0,0,0,31,63,0,0,0,0,0,0]
; AVX512BW-FCP-NEXT: vpermi2w %zmm1, %zmm0, %zmm2
; AVX512BW-FCP-NEXT: vmovdqa32 %zmm5, %zmm2 {%k2}
; AVX512BW-FCP-NEXT: vmovdqa64 %zmm7, %zmm2 {%k3}
; AVX512BW-FCP-NEXT: vmovdqa64 %zmm2, 448(%rax)
; AVX512BW-FCP-NEXT: vmovdqa64 %zmm16, 384(%rax)
; AVX512BW-FCP-NEXT: vmovdqa64 %zmm15, 320(%rax)
; AVX512BW-FCP-NEXT: vmovdqa64 %zmm14, 256(%rax)
; AVX512BW-FCP-NEXT: vmovdqa64 %zmm11, 192(%rax)
; AVX512BW-FCP-NEXT: vmovdqa64 %zmm10, 128(%rax)
; AVX512BW-FCP-NEXT: vmovdqa64 %zmm9, 64(%rax)
; AVX512BW-FCP-NEXT: vmovdqa64 %zmm4, (%rax)
; AVX512BW-FCP-NEXT: vzeroupper
; AVX512BW-FCP-NEXT: retq
;
; AVX512DQ-BW-LABEL: store_i16_stride8_vf32:
; AVX512DQ-BW: # %bb.0:
; AVX512DQ-BW-NEXT: movq {{[0-9]+}}(%rsp), %rax
; AVX512DQ-BW-NEXT: movq {{[0-9]+}}(%rsp), %r10
; AVX512DQ-BW-NEXT: movq {{[0-9]+}}(%rsp), %r11
; AVX512DQ-BW-NEXT: vmovdqa64 (%rdi), %zmm0
; AVX512DQ-BW-NEXT: vmovdqa64 (%rsi), %zmm1
; AVX512DQ-BW-NEXT: vmovdqa64 (%rdx), %zmm2
; AVX512DQ-BW-NEXT: vmovdqa64 (%rcx), %zmm3
; AVX512DQ-BW-NEXT: vmovdqa64 (%r8), %zmm5
; AVX512DQ-BW-NEXT: vmovdqa64 (%r9), %zmm6
; AVX512DQ-BW-NEXT: vmovdqa64 (%r11), %zmm7
; AVX512DQ-BW-NEXT: vmovdqa64 (%r10), %zmm8
; AVX512DQ-BW-NEXT: vpmovsxbw {{.*#+}} zmm4 = [0,0,0,0,0,0,0,32,0,0,0,0,0,0,1,33,0,0,0,0,0,0,2,34,0,0,0,0,0,0,3,35]
; AVX512DQ-BW-NEXT: vpermi2w %zmm8, %zmm7, %zmm4
; AVX512DQ-BW-NEXT: vpmovsxbw {{.*#+}} zmm9 = [0,0,0,0,0,32,0,0,0,0,0,0,1,33,0,0,0,0,0,0,2,34,0,0,0,0,0,0,3,35,0,0]
; AVX512DQ-BW-NEXT: vpermi2w %zmm6, %zmm5, %zmm9
; AVX512DQ-BW-NEXT: movw $-30584, %cx # imm = 0x8888
; AVX512DQ-BW-NEXT: kmovd %ecx, %k1
; AVX512DQ-BW-NEXT: vmovdqa32 %zmm4, %zmm9 {%k1}
; AVX512DQ-BW-NEXT: vpmovsxbw {{.*#+}} zmm10 = [0,0,0,32,0,0,0,0,0,0,1,33,0,0,0,0,0,0,2,34,0,0,0,0,0,0,3,35,0,0,0,0]
; AVX512DQ-BW-NEXT: vpermi2w %zmm3, %zmm2, %zmm10
; AVX512DQ-BW-NEXT: vpmovsxbw {{.*#+}} zmm4 = [0,32,0,0,0,0,0,0,1,33,0,0,0,0,0,0,2,34,0,0,0,0,0,0,3,35,0,0,0,0,0,0]
; AVX512DQ-BW-NEXT: vpermi2w %zmm1, %zmm0, %zmm4
; AVX512DQ-BW-NEXT: movw $8738, %cx # imm = 0x2222
; AVX512DQ-BW-NEXT: kmovd %ecx, %k2
; AVX512DQ-BW-NEXT: vmovdqa32 %zmm10, %zmm4 {%k2}
; AVX512DQ-BW-NEXT: movb $-86, %cl
; AVX512DQ-BW-NEXT: kmovd %ecx, %k3
; AVX512DQ-BW-NEXT: vmovdqa64 %zmm9, %zmm4 {%k3}
; AVX512DQ-BW-NEXT: vpmovsxbw {{.*#+}} zmm9 = [0,0,0,0,0,0,4,36,0,0,0,0,0,0,5,37,0,0,0,0,0,0,6,38,0,0,0,0,0,0,7,39]
; AVX512DQ-BW-NEXT: vpermi2w %zmm8, %zmm7, %zmm9
; AVX512DQ-BW-NEXT: vpmovsxbw {{.*#+}} zmm10 = [0,0,0,0,4,36,0,0,0,0,0,0,5,37,0,0,0,0,0,0,6,38,0,0,0,0,0,0,7,39,0,0]
; AVX512DQ-BW-NEXT: vpermi2w %zmm6, %zmm5, %zmm10
; AVX512DQ-BW-NEXT: vmovdqa32 %zmm9, %zmm10 {%k1}
; AVX512DQ-BW-NEXT: vpmovsxbw {{.*#+}} zmm11 = [0,0,4,36,0,0,0,0,0,0,5,37,0,0,0,0,0,0,6,38,0,0,0,0,0,0,7,39,0,0,0,0]
; AVX512DQ-BW-NEXT: vpermi2w %zmm3, %zmm2, %zmm11
; AVX512DQ-BW-NEXT: vpmovsxbw {{.*#+}} zmm9 = [4,36,0,0,0,0,0,0,5,37,0,0,0,0,0,0,6,38,0,0,0,0,0,0,7,39,0,0,0,0,0,0]
; AVX512DQ-BW-NEXT: vpermi2w %zmm1, %zmm0, %zmm9
; AVX512DQ-BW-NEXT: vmovdqa32 %zmm11, %zmm9 {%k2}
; AVX512DQ-BW-NEXT: vmovdqa64 %zmm10, %zmm9 {%k3}
; AVX512DQ-BW-NEXT: vpmovsxbw {{.*#+}} zmm10 = [0,0,0,0,0,0,8,40,0,0,0,0,0,0,9,41,0,0,0,0,0,0,10,42,0,0,0,0,0,0,11,43]
; AVX512DQ-BW-NEXT: vpermi2w %zmm8, %zmm7, %zmm10
; AVX512DQ-BW-NEXT: vpmovsxbw {{.*#+}} zmm11 = [0,0,0,0,8,40,0,0,0,0,0,0,9,41,0,0,0,0,0,0,10,42,0,0,0,0,0,0,11,43,0,0]
; AVX512DQ-BW-NEXT: vpermi2w %zmm6, %zmm5, %zmm11
; AVX512DQ-BW-NEXT: vmovdqa32 %zmm10, %zmm11 {%k1}
; AVX512DQ-BW-NEXT: vpmovsxbw {{.*#+}} zmm12 = [0,0,8,40,0,0,0,0,0,0,9,41,0,0,0,0,0,0,10,42,0,0,0,0,0,0,11,43,0,0,0,0]
; AVX512DQ-BW-NEXT: vpermi2w %zmm3, %zmm2, %zmm12
; AVX512DQ-BW-NEXT: vpmovsxbw {{.*#+}} zmm10 = [8,40,0,0,0,0,0,0,9,41,0,0,0,0,0,0,10,42,0,0,0,0,0,0,11,43,0,0,0,0,0,0]
; AVX512DQ-BW-NEXT: vpermi2w %zmm1, %zmm0, %zmm10
; AVX512DQ-BW-NEXT: vmovdqa32 %zmm12, %zmm10 {%k2}
; AVX512DQ-BW-NEXT: vmovdqa64 %zmm11, %zmm10 {%k3}
; AVX512DQ-BW-NEXT: vpmovsxbw {{.*#+}} zmm11 = [0,0,0,0,0,0,12,44,0,0,0,0,0,0,13,45,0,0,0,0,0,0,14,46,0,0,0,0,0,0,15,47]
; AVX512DQ-BW-NEXT: vpermi2w %zmm8, %zmm7, %zmm11
; AVX512DQ-BW-NEXT: vpmovsxbw {{.*#+}} zmm12 = [0,0,0,0,12,44,0,0,0,0,0,0,13,45,0,0,0,0,0,0,14,46,0,0,0,0,0,0,15,47,0,0]
; AVX512DQ-BW-NEXT: vpermi2w %zmm6, %zmm5, %zmm12
; AVX512DQ-BW-NEXT: vmovdqa32 %zmm11, %zmm12 {%k1}
; AVX512DQ-BW-NEXT: vpmovsxbw {{.*#+}} zmm13 = [0,0,12,44,0,0,0,0,0,0,13,45,0,0,0,0,0,0,14,46,0,0,0,0,0,0,15,47,0,0,0,0]
; AVX512DQ-BW-NEXT: vpermi2w %zmm3, %zmm2, %zmm13
; AVX512DQ-BW-NEXT: vpmovsxbw {{.*#+}} zmm11 = [12,44,0,0,0,0,0,0,13,45,0,0,0,0,0,0,14,46,0,0,0,0,0,0,15,47,0,0,0,0,0,0]
; AVX512DQ-BW-NEXT: vpermi2w %zmm1, %zmm0, %zmm11
; AVX512DQ-BW-NEXT: vmovdqa32 %zmm13, %zmm11 {%k2}
; AVX512DQ-BW-NEXT: vmovdqa64 %zmm12, %zmm11 {%k3}
; AVX512DQ-BW-NEXT: vpmovsxbw {{.*#+}} zmm12 = [0,0,0,0,0,0,16,48,0,0,0,0,0,0,17,49,0,0,0,0,0,0,18,50,0,0,0,0,0,0,19,51]
; AVX512DQ-BW-NEXT: vpermi2w %zmm8, %zmm7, %zmm12
; AVX512DQ-BW-NEXT: vpmovsxbw {{.*#+}} zmm13 = [0,0,0,0,16,48,0,0,0,0,0,0,17,49,0,0,0,0,0,0,18,50,0,0,0,0,0,0,19,51,0,0]
; AVX512DQ-BW-NEXT: vpermi2w %zmm6, %zmm5, %zmm13
; AVX512DQ-BW-NEXT: vmovdqa32 %zmm12, %zmm13 {%k1}
; AVX512DQ-BW-NEXT: vpmovsxbw {{.*#+}} zmm12 = [0,0,16,48,0,0,0,0,0,0,17,49,0,0,0,0,0,0,18,50,0,0,0,0,0,0,19,51,0,0,0,0]
; AVX512DQ-BW-NEXT: vpermi2w %zmm3, %zmm2, %zmm12
; AVX512DQ-BW-NEXT: vpmovsxbw {{.*#+}} zmm14 = [16,48,0,0,0,0,0,0,17,49,0,0,0,0,0,0,18,50,0,0,0,0,0,0,19,51,0,0,0,0,0,0]
; AVX512DQ-BW-NEXT: vpermi2w %zmm1, %zmm0, %zmm14
; AVX512DQ-BW-NEXT: vmovdqa32 %zmm12, %zmm14 {%k2}
; AVX512DQ-BW-NEXT: vmovdqa64 %zmm13, %zmm14 {%k3}
; AVX512DQ-BW-NEXT: vpmovsxbw {{.*#+}} zmm12 = [0,0,0,0,0,0,20,52,0,0,0,0,0,0,21,53,0,0,0,0,0,0,22,54,0,0,0,0,0,0,23,55]
; AVX512DQ-BW-NEXT: vpermi2w %zmm8, %zmm7, %zmm12
; AVX512DQ-BW-NEXT: vpmovsxbw {{.*#+}} zmm13 = [0,0,0,0,20,52,0,0,0,0,0,0,21,53,0,0,0,0,0,0,22,54,0,0,0,0,0,0,23,55,0,0]
; AVX512DQ-BW-NEXT: vpermi2w %zmm6, %zmm5, %zmm13
; AVX512DQ-BW-NEXT: vmovdqa32 %zmm12, %zmm13 {%k1}
; AVX512DQ-BW-NEXT: vpmovsxbw {{.*#+}} zmm12 = [0,0,20,52,0,0,0,0,0,0,21,53,0,0,0,0,0,0,22,54,0,0,0,0,0,0,23,55,0,0,0,0]
; AVX512DQ-BW-NEXT: vpermi2w %zmm3, %zmm2, %zmm12
; AVX512DQ-BW-NEXT: vpmovsxbw {{.*#+}} zmm15 = [20,52,0,0,0,0,0,0,21,53,0,0,0,0,0,0,22,54,0,0,0,0,0,0,23,55,0,0,0,0,0,0]
; AVX512DQ-BW-NEXT: vpermi2w %zmm1, %zmm0, %zmm15
; AVX512DQ-BW-NEXT: vmovdqa32 %zmm12, %zmm15 {%k2}
; AVX512DQ-BW-NEXT: vmovdqa64 %zmm13, %zmm15 {%k3}
; AVX512DQ-BW-NEXT: vpmovsxbw {{.*#+}} zmm12 = [0,0,0,0,0,0,24,56,0,0,0,0,0,0,25,57,0,0,0,0,0,0,26,58,0,0,0,0,0,0,27,59]
; AVX512DQ-BW-NEXT: vpermi2w %zmm8, %zmm7, %zmm12
; AVX512DQ-BW-NEXT: vpmovsxbw {{.*#+}} zmm13 = [0,0,0,0,24,56,0,0,0,0,0,0,25,57,0,0,0,0,0,0,26,58,0,0,0,0,0,0,27,59,0,0]
; AVX512DQ-BW-NEXT: vpermi2w %zmm6, %zmm5, %zmm13
; AVX512DQ-BW-NEXT: vmovdqa32 %zmm12, %zmm13 {%k1}
; AVX512DQ-BW-NEXT: vpmovsxbw {{.*#+}} zmm12 = [0,0,24,56,0,0,0,0,0,0,25,57,0,0,0,0,0,0,26,58,0,0,0,0,0,0,27,59,0,0,0,0]
; AVX512DQ-BW-NEXT: vpermi2w %zmm3, %zmm2, %zmm12
; AVX512DQ-BW-NEXT: vpmovsxbw {{.*#+}} zmm16 = [24,56,0,0,0,0,0,0,25,57,0,0,0,0,0,0,26,58,0,0,0,0,0,0,27,59,0,0,0,0,0,0]
; AVX512DQ-BW-NEXT: vpermi2w %zmm1, %zmm0, %zmm16
; AVX512DQ-BW-NEXT: vmovdqa32 %zmm12, %zmm16 {%k2}
; AVX512DQ-BW-NEXT: vmovdqa64 %zmm13, %zmm16 {%k3}
; AVX512DQ-BW-NEXT: vpmovsxbw {{.*#+}} zmm12 = [0,0,0,0,0,0,28,60,0,0,0,0,0,0,29,61,0,0,0,0,0,0,30,62,0,0,0,0,0,0,31,63]
; AVX512DQ-BW-NEXT: vpermi2w %zmm8, %zmm7, %zmm12
; AVX512DQ-BW-NEXT: vpmovsxbw {{.*#+}} zmm7 = [0,0,0,0,28,60,0,0,0,0,0,0,29,61,0,0,0,0,0,0,30,62,0,0,0,0,0,0,31,63,0,0]
; AVX512DQ-BW-NEXT: vpermi2w %zmm6, %zmm5, %zmm7
; AVX512DQ-BW-NEXT: vmovdqa32 %zmm12, %zmm7 {%k1}
; AVX512DQ-BW-NEXT: vpmovsxbw {{.*#+}} zmm5 = [0,0,28,60,0,0,0,0,0,0,29,61,0,0,0,0,0,0,30,62,0,0,0,0,0,0,31,63,0,0,0,0]
; AVX512DQ-BW-NEXT: vpermi2w %zmm3, %zmm2, %zmm5
; AVX512DQ-BW-NEXT: vpmovsxbw {{.*#+}} zmm2 = [28,60,0,0,0,0,0,0,29,61,0,0,0,0,0,0,30,62,0,0,0,0,0,0,31,63,0,0,0,0,0,0]
; AVX512DQ-BW-NEXT: vpermi2w %zmm1, %zmm0, %zmm2
; AVX512DQ-BW-NEXT: vmovdqa32 %zmm5, %zmm2 {%k2}
; AVX512DQ-BW-NEXT: vmovdqa64 %zmm7, %zmm2 {%k3}
; AVX512DQ-BW-NEXT: vmovdqa64 %zmm2, 448(%rax)
; AVX512DQ-BW-NEXT: vmovdqa64 %zmm16, 384(%rax)
; AVX512DQ-BW-NEXT: vmovdqa64 %zmm15, 320(%rax)
; AVX512DQ-BW-NEXT: vmovdqa64 %zmm14, 256(%rax)
; AVX512DQ-BW-NEXT: vmovdqa64 %zmm11, 192(%rax)
; AVX512DQ-BW-NEXT: vmovdqa64 %zmm10, 128(%rax)
; AVX512DQ-BW-NEXT: vmovdqa64 %zmm9, 64(%rax)
; AVX512DQ-BW-NEXT: vmovdqa64 %zmm4, (%rax)
; AVX512DQ-BW-NEXT: vzeroupper
; AVX512DQ-BW-NEXT: retq
;
; AVX512DQ-BW-FCP-LABEL: store_i16_stride8_vf32:
; AVX512DQ-BW-FCP: # %bb.0:
; AVX512DQ-BW-FCP-NEXT: movq {{[0-9]+}}(%rsp), %rax
; AVX512DQ-BW-FCP-NEXT: movq {{[0-9]+}}(%rsp), %r10
; AVX512DQ-BW-FCP-NEXT: movq {{[0-9]+}}(%rsp), %r11
; AVX512DQ-BW-FCP-NEXT: vmovdqa64 (%rdi), %zmm0
; AVX512DQ-BW-FCP-NEXT: vmovdqa64 (%rsi), %zmm1
; AVX512DQ-BW-FCP-NEXT: vmovdqa64 (%rdx), %zmm2
; AVX512DQ-BW-FCP-NEXT: vmovdqa64 (%rcx), %zmm3
; AVX512DQ-BW-FCP-NEXT: vmovdqa64 (%r8), %zmm5
; AVX512DQ-BW-FCP-NEXT: vmovdqa64 (%r9), %zmm6
; AVX512DQ-BW-FCP-NEXT: vmovdqa64 (%r11), %zmm7
; AVX512DQ-BW-FCP-NEXT: vmovdqa64 (%r10), %zmm8
; AVX512DQ-BW-FCP-NEXT: vpmovsxbw {{.*#+}} zmm4 = [0,0,0,0,0,0,0,32,0,0,0,0,0,0,1,33,0,0,0,0,0,0,2,34,0,0,0,0,0,0,3,35]
; AVX512DQ-BW-FCP-NEXT: vpermi2w %zmm8, %zmm7, %zmm4
; AVX512DQ-BW-FCP-NEXT: vpmovsxbw {{.*#+}} zmm9 = [0,0,0,0,0,32,0,0,0,0,0,0,1,33,0,0,0,0,0,0,2,34,0,0,0,0,0,0,3,35,0,0]
; AVX512DQ-BW-FCP-NEXT: vpermi2w %zmm6, %zmm5, %zmm9
; AVX512DQ-BW-FCP-NEXT: movw $-30584, %cx # imm = 0x8888
; AVX512DQ-BW-FCP-NEXT: kmovd %ecx, %k1
; AVX512DQ-BW-FCP-NEXT: vmovdqa32 %zmm4, %zmm9 {%k1}
; AVX512DQ-BW-FCP-NEXT: vpmovsxbw {{.*#+}} zmm10 = [0,0,0,32,0,0,0,0,0,0,1,33,0,0,0,0,0,0,2,34,0,0,0,0,0,0,3,35,0,0,0,0]
; AVX512DQ-BW-FCP-NEXT: vpermi2w %zmm3, %zmm2, %zmm10
; AVX512DQ-BW-FCP-NEXT: vpmovsxbw {{.*#+}} zmm4 = [0,32,0,0,0,0,0,0,1,33,0,0,0,0,0,0,2,34,0,0,0,0,0,0,3,35,0,0,0,0,0,0]
; AVX512DQ-BW-FCP-NEXT: vpermi2w %zmm1, %zmm0, %zmm4
; AVX512DQ-BW-FCP-NEXT: movw $8738, %cx # imm = 0x2222
; AVX512DQ-BW-FCP-NEXT: kmovd %ecx, %k2
; AVX512DQ-BW-FCP-NEXT: vmovdqa32 %zmm10, %zmm4 {%k2}
; AVX512DQ-BW-FCP-NEXT: movb $-86, %cl
; AVX512DQ-BW-FCP-NEXT: kmovd %ecx, %k3
; AVX512DQ-BW-FCP-NEXT: vmovdqa64 %zmm9, %zmm4 {%k3}
; AVX512DQ-BW-FCP-NEXT: vpmovsxbw {{.*#+}} zmm9 = [0,0,0,0,0,0,4,36,0,0,0,0,0,0,5,37,0,0,0,0,0,0,6,38,0,0,0,0,0,0,7,39]
; AVX512DQ-BW-FCP-NEXT: vpermi2w %zmm8, %zmm7, %zmm9
; AVX512DQ-BW-FCP-NEXT: vpmovsxbw {{.*#+}} zmm10 = [0,0,0,0,4,36,0,0,0,0,0,0,5,37,0,0,0,0,0,0,6,38,0,0,0,0,0,0,7,39,0,0]
; AVX512DQ-BW-FCP-NEXT: vpermi2w %zmm6, %zmm5, %zmm10
; AVX512DQ-BW-FCP-NEXT: vmovdqa32 %zmm9, %zmm10 {%k1}
; AVX512DQ-BW-FCP-NEXT: vpmovsxbw {{.*#+}} zmm11 = [0,0,4,36,0,0,0,0,0,0,5,37,0,0,0,0,0,0,6,38,0,0,0,0,0,0,7,39,0,0,0,0]
; AVX512DQ-BW-FCP-NEXT: vpermi2w %zmm3, %zmm2, %zmm11
; AVX512DQ-BW-FCP-NEXT: vpmovsxbw {{.*#+}} zmm9 = [4,36,0,0,0,0,0,0,5,37,0,0,0,0,0,0,6,38,0,0,0,0,0,0,7,39,0,0,0,0,0,0]
; AVX512DQ-BW-FCP-NEXT: vpermi2w %zmm1, %zmm0, %zmm9
; AVX512DQ-BW-FCP-NEXT: vmovdqa32 %zmm11, %zmm9 {%k2}
; AVX512DQ-BW-FCP-NEXT: vmovdqa64 %zmm10, %zmm9 {%k3}
; AVX512DQ-BW-FCP-NEXT: vpmovsxbw {{.*#+}} zmm10 = [0,0,0,0,0,0,8,40,0,0,0,0,0,0,9,41,0,0,0,0,0,0,10,42,0,0,0,0,0,0,11,43]
; AVX512DQ-BW-FCP-NEXT: vpermi2w %zmm8, %zmm7, %zmm10
; AVX512DQ-BW-FCP-NEXT: vpmovsxbw {{.*#+}} zmm11 = [0,0,0,0,8,40,0,0,0,0,0,0,9,41,0,0,0,0,0,0,10,42,0,0,0,0,0,0,11,43,0,0]
; AVX512DQ-BW-FCP-NEXT: vpermi2w %zmm6, %zmm5, %zmm11
; AVX512DQ-BW-FCP-NEXT: vmovdqa32 %zmm10, %zmm11 {%k1}
; AVX512DQ-BW-FCP-NEXT: vpmovsxbw {{.*#+}} zmm12 = [0,0,8,40,0,0,0,0,0,0,9,41,0,0,0,0,0,0,10,42,0,0,0,0,0,0,11,43,0,0,0,0]
; AVX512DQ-BW-FCP-NEXT: vpermi2w %zmm3, %zmm2, %zmm12
; AVX512DQ-BW-FCP-NEXT: vpmovsxbw {{.*#+}} zmm10 = [8,40,0,0,0,0,0,0,9,41,0,0,0,0,0,0,10,42,0,0,0,0,0,0,11,43,0,0,0,0,0,0]
; AVX512DQ-BW-FCP-NEXT: vpermi2w %zmm1, %zmm0, %zmm10
; AVX512DQ-BW-FCP-NEXT: vmovdqa32 %zmm12, %zmm10 {%k2}
; AVX512DQ-BW-FCP-NEXT: vmovdqa64 %zmm11, %zmm10 {%k3}
; AVX512DQ-BW-FCP-NEXT: vpmovsxbw {{.*#+}} zmm11 = [0,0,0,0,0,0,12,44,0,0,0,0,0,0,13,45,0,0,0,0,0,0,14,46,0,0,0,0,0,0,15,47]
; AVX512DQ-BW-FCP-NEXT: vpermi2w %zmm8, %zmm7, %zmm11
; AVX512DQ-BW-FCP-NEXT: vpmovsxbw {{.*#+}} zmm12 = [0,0,0,0,12,44,0,0,0,0,0,0,13,45,0,0,0,0,0,0,14,46,0,0,0,0,0,0,15,47,0,0]
; AVX512DQ-BW-FCP-NEXT: vpermi2w %zmm6, %zmm5, %zmm12
; AVX512DQ-BW-FCP-NEXT: vmovdqa32 %zmm11, %zmm12 {%k1}
; AVX512DQ-BW-FCP-NEXT: vpmovsxbw {{.*#+}} zmm13 = [0,0,12,44,0,0,0,0,0,0,13,45,0,0,0,0,0,0,14,46,0,0,0,0,0,0,15,47,0,0,0,0]
; AVX512DQ-BW-FCP-NEXT: vpermi2w %zmm3, %zmm2, %zmm13
; AVX512DQ-BW-FCP-NEXT: vpmovsxbw {{.*#+}} zmm11 = [12,44,0,0,0,0,0,0,13,45,0,0,0,0,0,0,14,46,0,0,0,0,0,0,15,47,0,0,0,0,0,0]
; AVX512DQ-BW-FCP-NEXT: vpermi2w %zmm1, %zmm0, %zmm11
; AVX512DQ-BW-FCP-NEXT: vmovdqa32 %zmm13, %zmm11 {%k2}
; AVX512DQ-BW-FCP-NEXT: vmovdqa64 %zmm12, %zmm11 {%k3}
; AVX512DQ-BW-FCP-NEXT: vpmovsxbw {{.*#+}} zmm12 = [0,0,0,0,0,0,16,48,0,0,0,0,0,0,17,49,0,0,0,0,0,0,18,50,0,0,0,0,0,0,19,51]
; AVX512DQ-BW-FCP-NEXT: vpermi2w %zmm8, %zmm7, %zmm12
; AVX512DQ-BW-FCP-NEXT: vpmovsxbw {{.*#+}} zmm13 = [0,0,0,0,16,48,0,0,0,0,0,0,17,49,0,0,0,0,0,0,18,50,0,0,0,0,0,0,19,51,0,0]
; AVX512DQ-BW-FCP-NEXT: vpermi2w %zmm6, %zmm5, %zmm13
; AVX512DQ-BW-FCP-NEXT: vmovdqa32 %zmm12, %zmm13 {%k1}
; AVX512DQ-BW-FCP-NEXT: vpmovsxbw {{.*#+}} zmm12 = [0,0,16,48,0,0,0,0,0,0,17,49,0,0,0,0,0,0,18,50,0,0,0,0,0,0,19,51,0,0,0,0]
; AVX512DQ-BW-FCP-NEXT: vpermi2w %zmm3, %zmm2, %zmm12
; AVX512DQ-BW-FCP-NEXT: vpmovsxbw {{.*#+}} zmm14 = [16,48,0,0,0,0,0,0,17,49,0,0,0,0,0,0,18,50,0,0,0,0,0,0,19,51,0,0,0,0,0,0]
; AVX512DQ-BW-FCP-NEXT: vpermi2w %zmm1, %zmm0, %zmm14
; AVX512DQ-BW-FCP-NEXT: vmovdqa32 %zmm12, %zmm14 {%k2}
; AVX512DQ-BW-FCP-NEXT: vmovdqa64 %zmm13, %zmm14 {%k3}
; AVX512DQ-BW-FCP-NEXT: vpmovsxbw {{.*#+}} zmm12 = [0,0,0,0,0,0,20,52,0,0,0,0,0,0,21,53,0,0,0,0,0,0,22,54,0,0,0,0,0,0,23,55]
; AVX512DQ-BW-FCP-NEXT: vpermi2w %zmm8, %zmm7, %zmm12
; AVX512DQ-BW-FCP-NEXT: vpmovsxbw {{.*#+}} zmm13 = [0,0,0,0,20,52,0,0,0,0,0,0,21,53,0,0,0,0,0,0,22,54,0,0,0,0,0,0,23,55,0,0]
; AVX512DQ-BW-FCP-NEXT: vpermi2w %zmm6, %zmm5, %zmm13
; AVX512DQ-BW-FCP-NEXT: vmovdqa32 %zmm12, %zmm13 {%k1}
; AVX512DQ-BW-FCP-NEXT: vpmovsxbw {{.*#+}} zmm12 = [0,0,20,52,0,0,0,0,0,0,21,53,0,0,0,0,0,0,22,54,0,0,0,0,0,0,23,55,0,0,0,0]
; AVX512DQ-BW-FCP-NEXT: vpermi2w %zmm3, %zmm2, %zmm12
; AVX512DQ-BW-FCP-NEXT: vpmovsxbw {{.*#+}} zmm15 = [20,52,0,0,0,0,0,0,21,53,0,0,0,0,0,0,22,54,0,0,0,0,0,0,23,55,0,0,0,0,0,0]
; AVX512DQ-BW-FCP-NEXT: vpermi2w %zmm1, %zmm0, %zmm15
; AVX512DQ-BW-FCP-NEXT: vmovdqa32 %zmm12, %zmm15 {%k2}
; AVX512DQ-BW-FCP-NEXT: vmovdqa64 %zmm13, %zmm15 {%k3}
; AVX512DQ-BW-FCP-NEXT: vpmovsxbw {{.*#+}} zmm12 = [0,0,0,0,0,0,24,56,0,0,0,0,0,0,25,57,0,0,0,0,0,0,26,58,0,0,0,0,0,0,27,59]
; AVX512DQ-BW-FCP-NEXT: vpermi2w %zmm8, %zmm7, %zmm12
; AVX512DQ-BW-FCP-NEXT: vpmovsxbw {{.*#+}} zmm13 = [0,0,0,0,24,56,0,0,0,0,0,0,25,57,0,0,0,0,0,0,26,58,0,0,0,0,0,0,27,59,0,0]
; AVX512DQ-BW-FCP-NEXT: vpermi2w %zmm6, %zmm5, %zmm13
; AVX512DQ-BW-FCP-NEXT: vmovdqa32 %zmm12, %zmm13 {%k1}
; AVX512DQ-BW-FCP-NEXT: vpmovsxbw {{.*#+}} zmm12 = [0,0,24,56,0,0,0,0,0,0,25,57,0,0,0,0,0,0,26,58,0,0,0,0,0,0,27,59,0,0,0,0]
; AVX512DQ-BW-FCP-NEXT: vpermi2w %zmm3, %zmm2, %zmm12
; AVX512DQ-BW-FCP-NEXT: vpmovsxbw {{.*#+}} zmm16 = [24,56,0,0,0,0,0,0,25,57,0,0,0,0,0,0,26,58,0,0,0,0,0,0,27,59,0,0,0,0,0,0]
; AVX512DQ-BW-FCP-NEXT: vpermi2w %zmm1, %zmm0, %zmm16
; AVX512DQ-BW-FCP-NEXT: vmovdqa32 %zmm12, %zmm16 {%k2}
; AVX512DQ-BW-FCP-NEXT: vmovdqa64 %zmm13, %zmm16 {%k3}
; AVX512DQ-BW-FCP-NEXT: vpmovsxbw {{.*#+}} zmm12 = [0,0,0,0,0,0,28,60,0,0,0,0,0,0,29,61,0,0,0,0,0,0,30,62,0,0,0,0,0,0,31,63]
; AVX512DQ-BW-FCP-NEXT: vpermi2w %zmm8, %zmm7, %zmm12
; AVX512DQ-BW-FCP-NEXT: vpmovsxbw {{.*#+}} zmm7 = [0,0,0,0,28,60,0,0,0,0,0,0,29,61,0,0,0,0,0,0,30,62,0,0,0,0,0,0,31,63,0,0]
; AVX512DQ-BW-FCP-NEXT: vpermi2w %zmm6, %zmm5, %zmm7
; AVX512DQ-BW-FCP-NEXT: vmovdqa32 %zmm12, %zmm7 {%k1}
; AVX512DQ-BW-FCP-NEXT: vpmovsxbw {{.*#+}} zmm5 = [0,0,28,60,0,0,0,0,0,0,29,61,0,0,0,0,0,0,30,62,0,0,0,0,0,0,31,63,0,0,0,0]
; AVX512DQ-BW-FCP-NEXT: vpermi2w %zmm3, %zmm2, %zmm5
; AVX512DQ-BW-FCP-NEXT: vpmovsxbw {{.*#+}} zmm2 = [28,60,0,0,0,0,0,0,29,61,0,0,0,0,0,0,30,62,0,0,0,0,0,0,31,63,0,0,0,0,0,0]
; AVX512DQ-BW-FCP-NEXT: vpermi2w %zmm1, %zmm0, %zmm2
; AVX512DQ-BW-FCP-NEXT: vmovdqa32 %zmm5, %zmm2 {%k2}
; AVX512DQ-BW-FCP-NEXT: vmovdqa64 %zmm7, %zmm2 {%k3}
; AVX512DQ-BW-FCP-NEXT: vmovdqa64 %zmm2, 448(%rax)
; AVX512DQ-BW-FCP-NEXT: vmovdqa64 %zmm16, 384(%rax)
; AVX512DQ-BW-FCP-NEXT: vmovdqa64 %zmm15, 320(%rax)
; AVX512DQ-BW-FCP-NEXT: vmovdqa64 %zmm14, 256(%rax)
; AVX512DQ-BW-FCP-NEXT: vmovdqa64 %zmm11, 192(%rax)
; AVX512DQ-BW-FCP-NEXT: vmovdqa64 %zmm10, 128(%rax)
; AVX512DQ-BW-FCP-NEXT: vmovdqa64 %zmm9, 64(%rax)
; AVX512DQ-BW-FCP-NEXT: vmovdqa64 %zmm4, (%rax)
; AVX512DQ-BW-FCP-NEXT: vzeroupper
; AVX512DQ-BW-FCP-NEXT: retq
%in.vec0 = load <32 x i16>, ptr %in.vecptr0, align 64
%in.vec1 = load <32 x i16>, ptr %in.vecptr1, align 64
%in.vec2 = load <32 x i16>, ptr %in.vecptr2, align 64
%in.vec3 = load <32 x i16>, ptr %in.vecptr3, align 64
%in.vec4 = load <32 x i16>, ptr %in.vecptr4, align 64
%in.vec5 = load <32 x i16>, ptr %in.vecptr5, align 64
%in.vec6 = load <32 x i16>, ptr %in.vecptr6, align 64
%in.vec7 = load <32 x i16>, ptr %in.vecptr7, align 64
%1 = shufflevector <32 x i16> %in.vec0, <32 x i16> %in.vec1, <64 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27, i32 28, i32 29, i32 30, i32 31, i32 32, i32 33, i32 34, i32 35, i32 36, i32 37, i32 38, i32 39, i32 40, i32 41, i32 42, i32 43, i32 44, i32 45, i32 46, i32 47, i32 48, i32 49, i32 50, i32 51, i32 52, i32 53, i32 54, i32 55, i32 56, i32 57, i32 58, i32 59, i32 60, i32 61, i32 62, i32 63>
%2 = shufflevector <32 x i16> %in.vec2, <32 x i16> %in.vec3, <64 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27, i32 28, i32 29, i32 30, i32 31, i32 32, i32 33, i32 34, i32 35, i32 36, i32 37, i32 38, i32 39, i32 40, i32 41, i32 42, i32 43, i32 44, i32 45, i32 46, i32 47, i32 48, i32 49, i32 50, i32 51, i32 52, i32 53, i32 54, i32 55, i32 56, i32 57, i32 58, i32 59, i32 60, i32 61, i32 62, i32 63>
%3 = shufflevector <32 x i16> %in.vec4, <32 x i16> %in.vec5, <64 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27, i32 28, i32 29, i32 30, i32 31, i32 32, i32 33, i32 34, i32 35, i32 36, i32 37, i32 38, i32 39, i32 40, i32 41, i32 42, i32 43, i32 44, i32 45, i32 46, i32 47, i32 48, i32 49, i32 50, i32 51, i32 52, i32 53, i32 54, i32 55, i32 56, i32 57, i32 58, i32 59, i32 60, i32 61, i32 62, i32 63>
%4 = shufflevector <32 x i16> %in.vec6, <32 x i16> %in.vec7, <64 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27, i32 28, i32 29, i32 30, i32 31, i32 32, i32 33, i32 34, i32 35, i32 36, i32 37, i32 38, i32 39, i32 40, i32 41, i32 42, i32 43, i32 44, i32 45, i32 46, i32 47, i32 48, i32 49, i32 50, i32 51, i32 52, i32 53, i32 54, i32 55, i32 56, i32 57, i32 58, i32 59, i32 60, i32 61, i32 62, i32 63>
%5 = shufflevector <64 x i16> %1, <64 x i16> %2, <128 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27, i32 28, i32 29, i32 30, i32 31, i32 32, i32 33, i32 34, i32 35, i32 36, i32 37, i32 38, i32 39, i32 40, i32 41, i32 42, i32 43, i32 44, i32 45, i32 46, i32 47, i32 48, i32 49, i32 50, i32 51, i32 52, i32 53, i32 54, i32 55, i32 56, i32 57, i32 58, i32 59, i32 60, i32 61, i32 62, i32 63, i32 64, i32 65, i32 66, i32 67, i32 68, i32 69, i32 70, i32 71, i32 72, i32 73, i32 74, i32 75, i32 76, i32 77, i32 78, i32 79, i32 80, i32 81, i32 82, i32 83, i32 84, i32 85, i32 86, i32 87, i32 88, i32 89, i32 90, i32 91, i32 92, i32 93, i32 94, i32 95, i32 96, i32 97, i32 98, i32 99, i32 100, i32 101, i32 102, i32 103, i32 104, i32 105, i32 106, i32 107, i32 108, i32 109, i32 110, i32 111, i32 112, i32 113, i32 114, i32 115, i32 116, i32 117, i32 118, i32 119, i32 120, i32 121, i32 122, i32 123, i32 124, i32 125, i32 126, i32 127>
%6 = shufflevector <64 x i16> %3, <64 x i16> %4, <128 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27, i32 28, i32 29, i32 30, i32 31, i32 32, i32 33, i32 34, i32 35, i32 36, i32 37, i32 38, i32 39, i32 40, i32 41, i32 42, i32 43, i32 44, i32 45, i32 46, i32 47, i32 48, i32 49, i32 50, i32 51, i32 52, i32 53, i32 54, i32 55, i32 56, i32 57, i32 58, i32 59, i32 60, i32 61, i32 62, i32 63, i32 64, i32 65, i32 66, i32 67, i32 68, i32 69, i32 70, i32 71, i32 72, i32 73, i32 74, i32 75, i32 76, i32 77, i32 78, i32 79, i32 80, i32 81, i32 82, i32 83, i32 84, i32 85, i32 86, i32 87, i32 88, i32 89, i32 90, i32 91, i32 92, i32 93, i32 94, i32 95, i32 96, i32 97, i32 98, i32 99, i32 100, i32 101, i32 102, i32 103, i32 104, i32 105, i32 106, i32 107, i32 108, i32 109, i32 110, i32 111, i32 112, i32 113, i32 114, i32 115, i32 116, i32 117, i32 118, i32 119, i32 120, i32 121, i32 122, i32 123, i32 124, i32 125, i32 126, i32 127>
%7 = shufflevector <128 x i16> %5, <128 x i16> %6, <256 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27, i32 28, i32 29, i32 30, i32 31, i32 32, i32 33, i32 34, i32 35, i32 36, i32 37, i32 38, i32 39, i32 40, i32 41, i32 42, i32 43, i32 44, i32 45, i32 46, i32 47, i32 48, i32 49, i32 50, i32 51, i32 52, i32 53, i32 54, i32 55, i32 56, i32 57, i32 58, i32 59, i32 60, i32 61, i32 62, i32 63, i32 64, i32 65, i32 66, i32 67, i32 68, i32 69, i32 70, i32 71, i32 72, i32 73, i32 74, i32 75, i32 76, i32 77, i32 78, i32 79, i32 80, i32 81, i32 82, i32 83, i32 84, i32 85, i32 86, i32 87, i32 88, i32 89, i32 90, i32 91, i32 92, i32 93, i32 94, i32 95, i32 96, i32 97, i32 98, i32 99, i32 100, i32 101, i32 102, i32 103, i32 104, i32 105, i32 106, i32 107, i32 108, i32 109, i32 110, i32 111, i32 112, i32 113, i32 114, i32 115, i32 116, i32 117, i32 118, i32 119, i32 120, i32 121, i32 122, i32 123, i32 124, i32 125, i32 126, i32 127, i32 128, i32 129, i32 130, i32 131, i32 132, i32 133, i32 134, i32 135, i32 136, i32 137, i32 138, i32 139, i32 140, i32 141, i32 142, i32 143, i32 144, i32 145, i32 146, i32 147, i32 148, i32 149, i32 150, i32 151, i32 152, i32 153, i32 154, i32 155, i32 156, i32 157, i32 158, i32 159, i32 160, i32 161, i32 162, i32 163, i32 164, i32 165, i32 166, i32 167, i32 168, i32 169, i32 170, i32 171, i32 172, i32 173, i32 174, i32 175, i32 176, i32 177, i32 178, i32 179, i32 180, i32 181, i32 182, i32 183, i32 184, i32 185, i32 186, i32 187, i32 188, i32 189, i32 190, i32 191, i32 192, i32 193, i32 194, i32 195, i32 196, i32 197, i32 198, i32 199, i32 200, i32 201, i32 202, i32 203, i32 204, i32 205, i32 206, i32 207, i32 208, i32 209, i32 210, i32 211, i32 212, i32 213, i32 214, i32 215, i32 216, i32 217, i32 218, i32 219, i32 220, i32 221, i32 222, i32 223, i32 224, i32 225, i32 226, i32 227, i32 228, i32 229, i32 230, i32 231, i32 232, i32 233, i32 234, i32 235, i32 236, i32 237, i32 238, i32 239, i32 240, i32 241, i32 242, i32 243, i32 244, i32 245, i32 246, i32 247, i32 248, i32 249, i32 250, i32 251, i32 252, i32 253, i32 254, i32 255>
%interleaved.vec = shufflevector <256 x i16> %7, <256 x i16> poison, <256 x i32> <i32 0, i32 32, i32 64, i32 96, i32 128, i32 160, i32 192, i32 224, i32 1, i32 33, i32 65, i32 97, i32 129, i32 161, i32 193, i32 225, i32 2, i32 34, i32 66, i32 98, i32 130, i32 162, i32 194, i32 226, i32 3, i32 35, i32 67, i32 99, i32 131, i32 163, i32 195, i32 227, i32 4, i32 36, i32 68, i32 100, i32 132, i32 164, i32 196, i32 228, i32 5, i32 37, i32 69, i32 101, i32 133, i32 165, i32 197, i32 229, i32 6, i32 38, i32 70, i32 102, i32 134, i32 166, i32 198, i32 230, i32 7, i32 39, i32 71, i32 103, i32 135, i32 167, i32 199, i32 231, i32 8, i32 40, i32 72, i32 104, i32 136, i32 168, i32 200, i32 232, i32 9, i32 41, i32 73, i32 105, i32 137, i32 169, i32 201, i32 233, i32 10, i32 42, i32 74, i32 106, i32 138, i32 170, i32 202, i32 234, i32 11, i32 43, i32 75, i32 107, i32 139, i32 171, i32 203, i32 235, i32 12, i32 44, i32 76, i32 108, i32 140, i32 172, i32 204, i32 236, i32 13, i32 45, i32 77, i32 109, i32 141, i32 173, i32 205, i32 237, i32 14, i32 46, i32 78, i32 110, i32 142, i32 174, i32 206, i32 238, i32 15, i32 47, i32 79, i32 111, i32 143, i32 175, i32 207, i32 239, i32 16, i32 48, i32 80, i32 112, i32 144, i32 176, i32 208, i32 240, i32 17, i32 49, i32 81, i32 113, i32 145, i32 177, i32 209, i32 241, i32 18, i32 50, i32 82, i32 114, i32 146, i32 178, i32 210, i32 242, i32 19, i32 51, i32 83, i32 115, i32 147, i32 179, i32 211, i32 243, i32 20, i32 52, i32 84, i32 116, i32 148, i32 180, i32 212, i32 244, i32 21, i32 53, i32 85, i32 117, i32 149, i32 181, i32 213, i32 245, i32 22, i32 54, i32 86, i32 118, i32 150, i32 182, i32 214, i32 246, i32 23, i32 55, i32 87, i32 119, i32 151, i32 183, i32 215, i32 247, i32 24, i32 56, i32 88, i32 120, i32 152, i32 184, i32 216, i32 248, i32 25, i32 57, i32 89, i32 121, i32 153, i32 185, i32 217, i32 249, i32 26, i32 58, i32 90, i32 122, i32 154, i32 186, i32 218, i32 250, i32 27, i32 59, i32 91, i32 123, i32 155, i32 187, i32 219, i32 251, i32 28, i32 60, i32 92, i32 124, i32 156, i32 188, i32 220, i32 252, i32 29, i32 61, i32 93, i32 125, i32 157, i32 189, i32 221, i32 253, i32 30, i32 62, i32 94, i32 126, i32 158, i32 190, i32 222, i32 254, i32 31, i32 63, i32 95, i32 127, i32 159, i32 191, i32 223, i32 255>
store <256 x i16> %interleaved.vec, ptr %out.vec, align 64
ret void
}
define void @store_i16_stride8_vf64(ptr %in.vecptr0, ptr %in.vecptr1, ptr %in.vecptr2, ptr %in.vecptr3, ptr %in.vecptr4, ptr %in.vecptr5, ptr %in.vecptr6, ptr %in.vecptr7, ptr %out.vec) nounwind {
; SSE-LABEL: store_i16_stride8_vf64:
; SSE: # %bb.0:
; SSE-NEXT: subq $776, %rsp # imm = 0x308
; SSE-NEXT: movq {{[0-9]+}}(%rsp), %rax
; SSE-NEXT: movq {{[0-9]+}}(%rsp), %r10
; SSE-NEXT: movdqa (%rdi), %xmm2
; SSE-NEXT: movdqa (%rsi), %xmm7
; SSE-NEXT: movdqa (%rdx), %xmm3
; SSE-NEXT: movdqa (%rcx), %xmm9
; SSE-NEXT: movdqa (%r8), %xmm4
; SSE-NEXT: movdqa (%r9), %xmm10
; SSE-NEXT: movdqa (%r10), %xmm8
; SSE-NEXT: movdqa (%rax), %xmm11
; SSE-NEXT: movdqa %xmm3, %xmm1
; SSE-NEXT: punpcklwd {{.*#+}} xmm1 = xmm1[0],xmm9[0],xmm1[1],xmm9[1],xmm1[2],xmm9[2],xmm1[3],xmm9[3]
; SSE-NEXT: movdqa %xmm2, %xmm0
; SSE-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0],xmm7[0],xmm0[1],xmm7[1],xmm0[2],xmm7[2],xmm0[3],xmm7[3]
; SSE-NEXT: movdqa %xmm0, %xmm5
; SSE-NEXT: punpckldq {{.*#+}} xmm5 = xmm5[0],xmm1[0],xmm5[1],xmm1[1]
; SSE-NEXT: movdqa %xmm8, %xmm12
; SSE-NEXT: punpcklwd {{.*#+}} xmm12 = xmm12[0],xmm11[0],xmm12[1],xmm11[1],xmm12[2],xmm11[2],xmm12[3],xmm11[3]
; SSE-NEXT: pshufd {{.*#+}} xmm13 = xmm12[0,0,0,0]
; SSE-NEXT: movdqa %xmm4, %xmm6
; SSE-NEXT: punpcklwd {{.*#+}} xmm6 = xmm6[0],xmm10[0],xmm6[1],xmm10[1],xmm6[2],xmm10[2],xmm6[3],xmm10[3]
; SSE-NEXT: pshufd {{.*#+}} xmm14 = xmm6[0,0,0,0]
; SSE-NEXT: punpckhdq {{.*#+}} xmm14 = xmm14[2],xmm13[2],xmm14[3],xmm13[3]
; SSE-NEXT: movsd {{.*#+}} xmm14 = xmm5[0],xmm14[1]
; SSE-NEXT: movapd %xmm14, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
; SSE-NEXT: movdqa %xmm6, %xmm5
; SSE-NEXT: punpckldq {{.*#+}} xmm5 = xmm5[0],xmm12[0],xmm5[1],xmm12[1]
; SSE-NEXT: pshufd {{.*#+}} xmm13 = xmm1[1,1,1,1]
; SSE-NEXT: pshufd {{.*#+}} xmm14 = xmm0[1,1,1,1]
; SSE-NEXT: punpckldq {{.*#+}} xmm14 = xmm14[0],xmm13[0],xmm14[1],xmm13[1]
; SSE-NEXT: shufps {{.*#+}} xmm14 = xmm14[0,1],xmm5[2,3]
; SSE-NEXT: movaps %xmm14, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
; SSE-NEXT: pshufd {{.*#+}} xmm5 = xmm12[2,2,2,2]
; SSE-NEXT: pshufd {{.*#+}} xmm13 = xmm6[2,2,2,2]
; SSE-NEXT: punpckhdq {{.*#+}} xmm13 = xmm13[2],xmm5[2],xmm13[3],xmm5[3]
; SSE-NEXT: pshufd {{.*#+}} xmm14 = xmm0[3,3,3,3]
; SSE-NEXT: punpckhdq {{.*#+}} xmm0 = xmm0[2],xmm1[2],xmm0[3],xmm1[3]
; SSE-NEXT: movsd {{.*#+}} xmm13 = xmm0[0],xmm13[1]
; SSE-NEXT: movapd %xmm13, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
; SSE-NEXT: movdqa 16(%r8), %xmm0
; SSE-NEXT: punpckhdq {{.*#+}} xmm6 = xmm6[2],xmm12[2],xmm6[3],xmm12[3]
; SSE-NEXT: movdqa 16(%r9), %xmm5
; SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm1[3,3,3,3]
; SSE-NEXT: punpckldq {{.*#+}} xmm14 = xmm14[0],xmm1[0],xmm14[1],xmm1[1]
; SSE-NEXT: movdqa 16(%r10), %xmm1
; SSE-NEXT: shufps {{.*#+}} xmm14 = xmm14[0,1],xmm6[2,3]
; SSE-NEXT: movaps %xmm14, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
; SSE-NEXT: movdqa 16(%rax), %xmm6
; SSE-NEXT: punpckhwd {{.*#+}} xmm3 = xmm3[4],xmm9[4],xmm3[5],xmm9[5],xmm3[6],xmm9[6],xmm3[7],xmm9[7]
; SSE-NEXT: punpckhwd {{.*#+}} xmm2 = xmm2[4],xmm7[4],xmm2[5],xmm7[5],xmm2[6],xmm7[6],xmm2[7],xmm7[7]
; SSE-NEXT: movdqa %xmm2, %xmm7
; SSE-NEXT: punpckldq {{.*#+}} xmm7 = xmm7[0],xmm3[0],xmm7[1],xmm3[1]
; SSE-NEXT: punpckhwd {{.*#+}} xmm8 = xmm8[4],xmm11[4],xmm8[5],xmm11[5],xmm8[6],xmm11[6],xmm8[7],xmm11[7]
; SSE-NEXT: pshufd {{.*#+}} xmm9 = xmm8[0,0,0,0]
; SSE-NEXT: punpckhwd {{.*#+}} xmm4 = xmm4[4],xmm10[4],xmm4[5],xmm10[5],xmm4[6],xmm10[6],xmm4[7],xmm10[7]
; SSE-NEXT: pshufd {{.*#+}} xmm10 = xmm4[0,0,0,0]
; SSE-NEXT: punpckhdq {{.*#+}} xmm10 = xmm10[2],xmm9[2],xmm10[3],xmm9[3]
; SSE-NEXT: movsd {{.*#+}} xmm10 = xmm7[0],xmm10[1]
; SSE-NEXT: movapd %xmm10, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
; SSE-NEXT: movdqa %xmm4, %xmm7
; SSE-NEXT: punpckldq {{.*#+}} xmm7 = xmm7[0],xmm8[0],xmm7[1],xmm8[1]
; SSE-NEXT: pshufd {{.*#+}} xmm9 = xmm3[1,1,1,1]
; SSE-NEXT: pshufd {{.*#+}} xmm10 = xmm2[1,1,1,1]
; SSE-NEXT: punpckldq {{.*#+}} xmm10 = xmm10[0],xmm9[0],xmm10[1],xmm9[1]
; SSE-NEXT: shufps {{.*#+}} xmm10 = xmm10[0,1],xmm7[2,3]
; SSE-NEXT: movaps %xmm10, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
; SSE-NEXT: pshufd {{.*#+}} xmm7 = xmm8[2,2,2,2]
; SSE-NEXT: pshufd {{.*#+}} xmm9 = xmm4[2,2,2,2]
; SSE-NEXT: punpckhdq {{.*#+}} xmm9 = xmm9[2],xmm7[2],xmm9[3],xmm7[3]
; SSE-NEXT: pshufd {{.*#+}} xmm7 = xmm2[3,3,3,3]
; SSE-NEXT: punpckhdq {{.*#+}} xmm2 = xmm2[2],xmm3[2],xmm2[3],xmm3[3]
; SSE-NEXT: movsd {{.*#+}} xmm9 = xmm2[0],xmm9[1]
; SSE-NEXT: movapd %xmm9, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
; SSE-NEXT: punpckhdq {{.*#+}} xmm4 = xmm4[2],xmm8[2],xmm4[3],xmm8[3]
; SSE-NEXT: pshufd {{.*#+}} xmm2 = xmm3[3,3,3,3]
; SSE-NEXT: punpckldq {{.*#+}} xmm7 = xmm7[0],xmm2[0],xmm7[1],xmm2[1]
; SSE-NEXT: shufps {{.*#+}} xmm7 = xmm7[0,1],xmm4[2,3]
; SSE-NEXT: movaps %xmm7, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
; SSE-NEXT: movdqa %xmm1, %xmm7
; SSE-NEXT: punpcklwd {{.*#+}} xmm7 = xmm7[0],xmm6[0],xmm7[1],xmm6[1],xmm7[2],xmm6[2],xmm7[3],xmm6[3]
; SSE-NEXT: pshufd {{.*#+}} xmm2 = xmm7[0,0,0,0]
; SSE-NEXT: movdqa %xmm0, %xmm4
; SSE-NEXT: punpcklwd {{.*#+}} xmm4 = xmm4[0],xmm5[0],xmm4[1],xmm5[1],xmm4[2],xmm5[2],xmm4[3],xmm5[3]
; SSE-NEXT: pshufd {{.*#+}} xmm3 = xmm4[0,0,0,0]
; SSE-NEXT: punpckhdq {{.*#+}} xmm3 = xmm3[2],xmm2[2],xmm3[3],xmm2[3]
; SSE-NEXT: movdqa %xmm3, %xmm13
; SSE-NEXT: movdqa 16(%rdx), %xmm2
; SSE-NEXT: movdqa 16(%rcx), %xmm8
; SSE-NEXT: movdqa %xmm2, %xmm10
; SSE-NEXT: punpcklwd {{.*#+}} xmm10 = xmm10[0],xmm8[0],xmm10[1],xmm8[1],xmm10[2],xmm8[2],xmm10[3],xmm8[3]
; SSE-NEXT: movdqa 16(%rdi), %xmm3
; SSE-NEXT: movdqa 16(%rsi), %xmm9
; SSE-NEXT: movdqa %xmm3, %xmm11
; SSE-NEXT: punpcklwd {{.*#+}} xmm11 = xmm11[0],xmm9[0],xmm11[1],xmm9[1],xmm11[2],xmm9[2],xmm11[3],xmm9[3]
; SSE-NEXT: movdqa %xmm11, %xmm12
; SSE-NEXT: punpckldq {{.*#+}} xmm12 = xmm12[0],xmm10[0],xmm12[1],xmm10[1]
; SSE-NEXT: movsd {{.*#+}} xmm13 = xmm12[0],xmm13[1]
; SSE-NEXT: movapd %xmm13, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
; SSE-NEXT: pshufd {{.*#+}} xmm12 = xmm10[1,1,1,1]
; SSE-NEXT: pshufd {{.*#+}} xmm13 = xmm11[1,1,1,1]
; SSE-NEXT: punpckldq {{.*#+}} xmm13 = xmm13[0],xmm12[0],xmm13[1],xmm12[1]
; SSE-NEXT: movdqa %xmm4, %xmm12
; SSE-NEXT: punpckldq {{.*#+}} xmm12 = xmm12[0],xmm7[0],xmm12[1],xmm7[1]
; SSE-NEXT: shufps {{.*#+}} xmm13 = xmm13[0,1],xmm12[2,3]
; SSE-NEXT: movaps %xmm13, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
; SSE-NEXT: pshufd {{.*#+}} xmm12 = xmm7[2,2,2,2]
; SSE-NEXT: pshufd {{.*#+}} xmm13 = xmm4[2,2,2,2]
; SSE-NEXT: punpckhdq {{.*#+}} xmm13 = xmm13[2],xmm12[2],xmm13[3],xmm12[3]
; SSE-NEXT: pshufd {{.*#+}} xmm12 = xmm11[3,3,3,3]
; SSE-NEXT: punpckhdq {{.*#+}} xmm11 = xmm11[2],xmm10[2],xmm11[3],xmm10[3]
; SSE-NEXT: movsd {{.*#+}} xmm13 = xmm11[0],xmm13[1]
; SSE-NEXT: movapd %xmm13, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
; SSE-NEXT: punpckhdq {{.*#+}} xmm4 = xmm4[2],xmm7[2],xmm4[3],xmm7[3]
; SSE-NEXT: pshufd {{.*#+}} xmm7 = xmm10[3,3,3,3]
; SSE-NEXT: punpckldq {{.*#+}} xmm12 = xmm12[0],xmm7[0],xmm12[1],xmm7[1]
; SSE-NEXT: shufps {{.*#+}} xmm12 = xmm12[0,1],xmm4[2,3]
; SSE-NEXT: movaps %xmm12, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
; SSE-NEXT: punpckhwd {{.*#+}} xmm2 = xmm2[4],xmm8[4],xmm2[5],xmm8[5],xmm2[6],xmm8[6],xmm2[7],xmm8[7]
; SSE-NEXT: punpckhwd {{.*#+}} xmm3 = xmm3[4],xmm9[4],xmm3[5],xmm9[5],xmm3[6],xmm9[6],xmm3[7],xmm9[7]
; SSE-NEXT: punpckhwd {{.*#+}} xmm1 = xmm1[4],xmm6[4],xmm1[5],xmm6[5],xmm1[6],xmm6[6],xmm1[7],xmm6[7]
; SSE-NEXT: punpckhwd {{.*#+}} xmm0 = xmm0[4],xmm5[4],xmm0[5],xmm5[5],xmm0[6],xmm5[6],xmm0[7],xmm5[7]
; SSE-NEXT: pshufd {{.*#+}} xmm4 = xmm1[0,0,0,0]
; SSE-NEXT: pshufd {{.*#+}} xmm5 = xmm0[0,0,0,0]
; SSE-NEXT: punpckhdq {{.*#+}} xmm5 = xmm5[2],xmm4[2],xmm5[3],xmm4[3]
; SSE-NEXT: movdqa %xmm3, %xmm4
; SSE-NEXT: punpckldq {{.*#+}} xmm4 = xmm4[0],xmm2[0],xmm4[1],xmm2[1]
; SSE-NEXT: movsd {{.*#+}} xmm5 = xmm4[0],xmm5[1]
; SSE-NEXT: movapd %xmm5, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
; SSE-NEXT: pshufd {{.*#+}} xmm4 = xmm2[1,1,1,1]
; SSE-NEXT: pshufd {{.*#+}} xmm5 = xmm3[1,1,1,1]
; SSE-NEXT: punpckldq {{.*#+}} xmm5 = xmm5[0],xmm4[0],xmm5[1],xmm4[1]
; SSE-NEXT: movdqa %xmm0, %xmm4
; SSE-NEXT: punpckldq {{.*#+}} xmm4 = xmm4[0],xmm1[0],xmm4[1],xmm1[1]
; SSE-NEXT: shufps {{.*#+}} xmm5 = xmm5[0,1],xmm4[2,3]
; SSE-NEXT: movaps %xmm5, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
; SSE-NEXT: pshufd {{.*#+}} xmm4 = xmm1[2,2,2,2]
; SSE-NEXT: pshufd {{.*#+}} xmm5 = xmm0[2,2,2,2]
; SSE-NEXT: punpckhdq {{.*#+}} xmm5 = xmm5[2],xmm4[2],xmm5[3],xmm4[3]
; SSE-NEXT: pshufd {{.*#+}} xmm4 = xmm3[3,3,3,3]
; SSE-NEXT: punpckhdq {{.*#+}} xmm3 = xmm3[2],xmm2[2],xmm3[3],xmm2[3]
; SSE-NEXT: movsd {{.*#+}} xmm5 = xmm3[0],xmm5[1]
; SSE-NEXT: movapd %xmm5, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
; SSE-NEXT: punpckhdq {{.*#+}} xmm0 = xmm0[2],xmm1[2],xmm0[3],xmm1[3]
; SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm2[3,3,3,3]
; SSE-NEXT: punpckldq {{.*#+}} xmm4 = xmm4[0],xmm1[0],xmm4[1],xmm1[1]
; SSE-NEXT: shufps {{.*#+}} xmm4 = xmm4[0,1],xmm0[2,3]
; SSE-NEXT: movaps %xmm4, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
; SSE-NEXT: movdqa 32(%r10), %xmm0
; SSE-NEXT: movdqa 32(%rax), %xmm4
; SSE-NEXT: movdqa %xmm0, %xmm6
; SSE-NEXT: punpcklwd {{.*#+}} xmm6 = xmm6[0],xmm4[0],xmm6[1],xmm4[1],xmm6[2],xmm4[2],xmm6[3],xmm4[3]
; SSE-NEXT: movdqa 32(%r8), %xmm1
; SSE-NEXT: movdqa 32(%r9), %xmm5
; SSE-NEXT: movdqa %xmm1, %xmm7
; SSE-NEXT: punpcklwd {{.*#+}} xmm7 = xmm7[0],xmm5[0],xmm7[1],xmm5[1],xmm7[2],xmm5[2],xmm7[3],xmm5[3]
; SSE-NEXT: pshufd {{.*#+}} xmm2 = xmm6[0,0,0,0]
; SSE-NEXT: pshufd {{.*#+}} xmm3 = xmm7[0,0,0,0]
; SSE-NEXT: punpckhdq {{.*#+}} xmm3 = xmm3[2],xmm2[2],xmm3[3],xmm2[3]
; SSE-NEXT: movdqa %xmm3, %xmm13
; SSE-NEXT: movdqa 32(%rdx), %xmm2
; SSE-NEXT: movdqa 32(%rcx), %xmm8
; SSE-NEXT: movdqa %xmm2, %xmm10
; SSE-NEXT: punpcklwd {{.*#+}} xmm10 = xmm10[0],xmm8[0],xmm10[1],xmm8[1],xmm10[2],xmm8[2],xmm10[3],xmm8[3]
; SSE-NEXT: movdqa 32(%rdi), %xmm3
; SSE-NEXT: movdqa 32(%rsi), %xmm9
; SSE-NEXT: movdqa %xmm3, %xmm11
; SSE-NEXT: punpcklwd {{.*#+}} xmm11 = xmm11[0],xmm9[0],xmm11[1],xmm9[1],xmm11[2],xmm9[2],xmm11[3],xmm9[3]
; SSE-NEXT: movdqa %xmm11, %xmm12
; SSE-NEXT: punpckldq {{.*#+}} xmm12 = xmm12[0],xmm10[0],xmm12[1],xmm10[1]
; SSE-NEXT: movsd {{.*#+}} xmm13 = xmm12[0],xmm13[1]
; SSE-NEXT: movapd %xmm13, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
; SSE-NEXT: pshufd {{.*#+}} xmm12 = xmm10[1,1,1,1]
; SSE-NEXT: pshufd {{.*#+}} xmm13 = xmm11[1,1,1,1]
; SSE-NEXT: punpckldq {{.*#+}} xmm13 = xmm13[0],xmm12[0],xmm13[1],xmm12[1]
; SSE-NEXT: movdqa %xmm7, %xmm12
; SSE-NEXT: punpckldq {{.*#+}} xmm12 = xmm12[0],xmm6[0],xmm12[1],xmm6[1]
; SSE-NEXT: shufps {{.*#+}} xmm13 = xmm13[0,1],xmm12[2,3]
; SSE-NEXT: movaps %xmm13, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
; SSE-NEXT: pshufd {{.*#+}} xmm12 = xmm6[2,2,2,2]
; SSE-NEXT: pshufd {{.*#+}} xmm13 = xmm7[2,2,2,2]
; SSE-NEXT: punpckhdq {{.*#+}} xmm13 = xmm13[2],xmm12[2],xmm13[3],xmm12[3]
; SSE-NEXT: pshufd {{.*#+}} xmm12 = xmm11[3,3,3,3]
; SSE-NEXT: punpckhdq {{.*#+}} xmm11 = xmm11[2],xmm10[2],xmm11[3],xmm10[3]
; SSE-NEXT: movsd {{.*#+}} xmm13 = xmm11[0],xmm13[1]
; SSE-NEXT: movapd %xmm13, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
; SSE-NEXT: punpckhdq {{.*#+}} xmm7 = xmm7[2],xmm6[2],xmm7[3],xmm6[3]
; SSE-NEXT: pshufd {{.*#+}} xmm6 = xmm10[3,3,3,3]
; SSE-NEXT: punpckldq {{.*#+}} xmm12 = xmm12[0],xmm6[0],xmm12[1],xmm6[1]
; SSE-NEXT: shufps {{.*#+}} xmm12 = xmm12[0,1],xmm7[2,3]
; SSE-NEXT: movaps %xmm12, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
; SSE-NEXT: punpckhwd {{.*#+}} xmm2 = xmm2[4],xmm8[4],xmm2[5],xmm8[5],xmm2[6],xmm8[6],xmm2[7],xmm8[7]
; SSE-NEXT: punpckhwd {{.*#+}} xmm3 = xmm3[4],xmm9[4],xmm3[5],xmm9[5],xmm3[6],xmm9[6],xmm3[7],xmm9[7]
; SSE-NEXT: punpckhwd {{.*#+}} xmm0 = xmm0[4],xmm4[4],xmm0[5],xmm4[5],xmm0[6],xmm4[6],xmm0[7],xmm4[7]
; SSE-NEXT: punpckhwd {{.*#+}} xmm1 = xmm1[4],xmm5[4],xmm1[5],xmm5[5],xmm1[6],xmm5[6],xmm1[7],xmm5[7]
; SSE-NEXT: pshufd {{.*#+}} xmm4 = xmm0[0,0,0,0]
; SSE-NEXT: pshufd {{.*#+}} xmm5 = xmm1[0,0,0,0]
; SSE-NEXT: punpckhdq {{.*#+}} xmm5 = xmm5[2],xmm4[2],xmm5[3],xmm4[3]
; SSE-NEXT: movdqa %xmm3, %xmm4
; SSE-NEXT: punpckldq {{.*#+}} xmm4 = xmm4[0],xmm2[0],xmm4[1],xmm2[1]
; SSE-NEXT: movsd {{.*#+}} xmm5 = xmm4[0],xmm5[1]
; SSE-NEXT: movapd %xmm5, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
; SSE-NEXT: pshufd {{.*#+}} xmm4 = xmm2[1,1,1,1]
; SSE-NEXT: pshufd {{.*#+}} xmm5 = xmm3[1,1,1,1]
; SSE-NEXT: punpckldq {{.*#+}} xmm5 = xmm5[0],xmm4[0],xmm5[1],xmm4[1]
; SSE-NEXT: movdqa %xmm1, %xmm4
; SSE-NEXT: punpckldq {{.*#+}} xmm4 = xmm4[0],xmm0[0],xmm4[1],xmm0[1]
; SSE-NEXT: shufps {{.*#+}} xmm5 = xmm5[0,1],xmm4[2,3]
; SSE-NEXT: movaps %xmm5, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
; SSE-NEXT: pshufd {{.*#+}} xmm4 = xmm0[2,2,2,2]
; SSE-NEXT: pshufd {{.*#+}} xmm5 = xmm1[2,2,2,2]
; SSE-NEXT: punpckhdq {{.*#+}} xmm5 = xmm5[2],xmm4[2],xmm5[3],xmm4[3]
; SSE-NEXT: pshufd {{.*#+}} xmm4 = xmm3[3,3,3,3]
; SSE-NEXT: punpckhdq {{.*#+}} xmm3 = xmm3[2],xmm2[2],xmm3[3],xmm2[3]
; SSE-NEXT: movsd {{.*#+}} xmm5 = xmm3[0],xmm5[1]
; SSE-NEXT: movapd %xmm5, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
; SSE-NEXT: punpckhdq {{.*#+}} xmm1 = xmm1[2],xmm0[2],xmm1[3],xmm0[3]
; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm2[3,3,3,3]
; SSE-NEXT: punpckldq {{.*#+}} xmm4 = xmm4[0],xmm0[0],xmm4[1],xmm0[1]
; SSE-NEXT: shufps {{.*#+}} xmm4 = xmm4[0,1],xmm1[2,3]
; SSE-NEXT: movaps %xmm4, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
; SSE-NEXT: movdqa 48(%r10), %xmm0
; SSE-NEXT: movdqa 48(%rax), %xmm4
; SSE-NEXT: movdqa %xmm0, %xmm6
; SSE-NEXT: punpcklwd {{.*#+}} xmm6 = xmm6[0],xmm4[0],xmm6[1],xmm4[1],xmm6[2],xmm4[2],xmm6[3],xmm4[3]
; SSE-NEXT: movdqa 48(%r8), %xmm1
; SSE-NEXT: movdqa 48(%r9), %xmm5
; SSE-NEXT: movdqa %xmm1, %xmm7
; SSE-NEXT: punpcklwd {{.*#+}} xmm7 = xmm7[0],xmm5[0],xmm7[1],xmm5[1],xmm7[2],xmm5[2],xmm7[3],xmm5[3]
; SSE-NEXT: pshufd {{.*#+}} xmm2 = xmm6[0,0,0,0]
; SSE-NEXT: pshufd {{.*#+}} xmm3 = xmm7[0,0,0,0]
; SSE-NEXT: punpckhdq {{.*#+}} xmm3 = xmm3[2],xmm2[2],xmm3[3],xmm2[3]
; SSE-NEXT: movdqa %xmm3, %xmm13
; SSE-NEXT: movdqa 48(%rdx), %xmm2
; SSE-NEXT: movdqa 48(%rcx), %xmm8
; SSE-NEXT: movdqa %xmm2, %xmm10
; SSE-NEXT: punpcklwd {{.*#+}} xmm10 = xmm10[0],xmm8[0],xmm10[1],xmm8[1],xmm10[2],xmm8[2],xmm10[3],xmm8[3]
; SSE-NEXT: movdqa 48(%rdi), %xmm3
; SSE-NEXT: movdqa 48(%rsi), %xmm9
; SSE-NEXT: movdqa %xmm3, %xmm11
; SSE-NEXT: punpcklwd {{.*#+}} xmm11 = xmm11[0],xmm9[0],xmm11[1],xmm9[1],xmm11[2],xmm9[2],xmm11[3],xmm9[3]
; SSE-NEXT: movdqa %xmm11, %xmm12
; SSE-NEXT: punpckldq {{.*#+}} xmm12 = xmm12[0],xmm10[0],xmm12[1],xmm10[1]
; SSE-NEXT: movsd {{.*#+}} xmm13 = xmm12[0],xmm13[1]
; SSE-NEXT: movapd %xmm13, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
; SSE-NEXT: pshufd {{.*#+}} xmm12 = xmm10[1,1,1,1]
; SSE-NEXT: pshufd {{.*#+}} xmm13 = xmm11[1,1,1,1]
; SSE-NEXT: punpckldq {{.*#+}} xmm13 = xmm13[0],xmm12[0],xmm13[1],xmm12[1]
; SSE-NEXT: movdqa %xmm7, %xmm12
; SSE-NEXT: punpckldq {{.*#+}} xmm12 = xmm12[0],xmm6[0],xmm12[1],xmm6[1]
; SSE-NEXT: shufps {{.*#+}} xmm13 = xmm13[0,1],xmm12[2,3]
; SSE-NEXT: movaps %xmm13, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
; SSE-NEXT: pshufd {{.*#+}} xmm12 = xmm6[2,2,2,2]
; SSE-NEXT: pshufd {{.*#+}} xmm13 = xmm7[2,2,2,2]
; SSE-NEXT: punpckhdq {{.*#+}} xmm13 = xmm13[2],xmm12[2],xmm13[3],xmm12[3]
; SSE-NEXT: pshufd {{.*#+}} xmm12 = xmm11[3,3,3,3]
; SSE-NEXT: punpckhdq {{.*#+}} xmm11 = xmm11[2],xmm10[2],xmm11[3],xmm10[3]
; SSE-NEXT: movsd {{.*#+}} xmm13 = xmm11[0],xmm13[1]
; SSE-NEXT: movapd %xmm13, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
; SSE-NEXT: punpckhdq {{.*#+}} xmm7 = xmm7[2],xmm6[2],xmm7[3],xmm6[3]
; SSE-NEXT: pshufd {{.*#+}} xmm6 = xmm10[3,3,3,3]
; SSE-NEXT: punpckldq {{.*#+}} xmm12 = xmm12[0],xmm6[0],xmm12[1],xmm6[1]
; SSE-NEXT: shufps {{.*#+}} xmm12 = xmm12[0,1],xmm7[2,3]
; SSE-NEXT: movaps %xmm12, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
; SSE-NEXT: punpckhwd {{.*#+}} xmm2 = xmm2[4],xmm8[4],xmm2[5],xmm8[5],xmm2[6],xmm8[6],xmm2[7],xmm8[7]
; SSE-NEXT: punpckhwd {{.*#+}} xmm3 = xmm3[4],xmm9[4],xmm3[5],xmm9[5],xmm3[6],xmm9[6],xmm3[7],xmm9[7]
; SSE-NEXT: punpckhwd {{.*#+}} xmm0 = xmm0[4],xmm4[4],xmm0[5],xmm4[5],xmm0[6],xmm4[6],xmm0[7],xmm4[7]
; SSE-NEXT: punpckhwd {{.*#+}} xmm1 = xmm1[4],xmm5[4],xmm1[5],xmm5[5],xmm1[6],xmm5[6],xmm1[7],xmm5[7]
; SSE-NEXT: pshufd {{.*#+}} xmm4 = xmm0[0,0,0,0]
; SSE-NEXT: pshufd {{.*#+}} xmm5 = xmm1[0,0,0,0]
; SSE-NEXT: punpckhdq {{.*#+}} xmm5 = xmm5[2],xmm4[2],xmm5[3],xmm4[3]
; SSE-NEXT: movdqa %xmm3, %xmm4
; SSE-NEXT: punpckldq {{.*#+}} xmm4 = xmm4[0],xmm2[0],xmm4[1],xmm2[1]
; SSE-NEXT: movsd {{.*#+}} xmm5 = xmm4[0],xmm5[1]
; SSE-NEXT: movapd %xmm5, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
; SSE-NEXT: pshufd {{.*#+}} xmm4 = xmm2[1,1,1,1]
; SSE-NEXT: pshufd {{.*#+}} xmm5 = xmm3[1,1,1,1]
; SSE-NEXT: punpckldq {{.*#+}} xmm5 = xmm5[0],xmm4[0],xmm5[1],xmm4[1]
; SSE-NEXT: movdqa %xmm1, %xmm4
; SSE-NEXT: punpckldq {{.*#+}} xmm4 = xmm4[0],xmm0[0],xmm4[1],xmm0[1]
; SSE-NEXT: shufps {{.*#+}} xmm5 = xmm5[0,1],xmm4[2,3]
; SSE-NEXT: movaps %xmm5, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
; SSE-NEXT: pshufd {{.*#+}} xmm4 = xmm0[2,2,2,2]
; SSE-NEXT: pshufd {{.*#+}} xmm5 = xmm1[2,2,2,2]
; SSE-NEXT: punpckhdq {{.*#+}} xmm5 = xmm5[2],xmm4[2],xmm5[3],xmm4[3]
; SSE-NEXT: pshufd {{.*#+}} xmm4 = xmm3[3,3,3,3]
; SSE-NEXT: punpckhdq {{.*#+}} xmm3 = xmm3[2],xmm2[2],xmm3[3],xmm2[3]
; SSE-NEXT: movsd {{.*#+}} xmm5 = xmm3[0],xmm5[1]
; SSE-NEXT: movapd %xmm5, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
; SSE-NEXT: punpckhdq {{.*#+}} xmm1 = xmm1[2],xmm0[2],xmm1[3],xmm0[3]
; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm2[3,3,3,3]
; SSE-NEXT: punpckldq {{.*#+}} xmm4 = xmm4[0],xmm0[0],xmm4[1],xmm0[1]
; SSE-NEXT: shufps {{.*#+}} xmm4 = xmm4[0,1],xmm1[2,3]
; SSE-NEXT: movaps %xmm4, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
; SSE-NEXT: movdqa 64(%r10), %xmm0
; SSE-NEXT: movdqa 64(%rax), %xmm4
; SSE-NEXT: movdqa %xmm0, %xmm6
; SSE-NEXT: punpcklwd {{.*#+}} xmm6 = xmm6[0],xmm4[0],xmm6[1],xmm4[1],xmm6[2],xmm4[2],xmm6[3],xmm4[3]
; SSE-NEXT: movdqa 64(%r8), %xmm1
; SSE-NEXT: movdqa 64(%r9), %xmm5
; SSE-NEXT: movdqa %xmm1, %xmm7
; SSE-NEXT: punpcklwd {{.*#+}} xmm7 = xmm7[0],xmm5[0],xmm7[1],xmm5[1],xmm7[2],xmm5[2],xmm7[3],xmm5[3]
; SSE-NEXT: pshufd {{.*#+}} xmm2 = xmm6[0,0,0,0]
; SSE-NEXT: pshufd {{.*#+}} xmm3 = xmm7[0,0,0,0]
; SSE-NEXT: punpckhdq {{.*#+}} xmm3 = xmm3[2],xmm2[2],xmm3[3],xmm2[3]
; SSE-NEXT: movdqa %xmm3, %xmm13
; SSE-NEXT: movdqa 64(%rdx), %xmm2
; SSE-NEXT: movdqa 64(%rcx), %xmm8
; SSE-NEXT: movdqa %xmm2, %xmm10
; SSE-NEXT: punpcklwd {{.*#+}} xmm10 = xmm10[0],xmm8[0],xmm10[1],xmm8[1],xmm10[2],xmm8[2],xmm10[3],xmm8[3]
; SSE-NEXT: movdqa 64(%rdi), %xmm3
; SSE-NEXT: movdqa 64(%rsi), %xmm9
; SSE-NEXT: movdqa %xmm3, %xmm11
; SSE-NEXT: punpcklwd {{.*#+}} xmm11 = xmm11[0],xmm9[0],xmm11[1],xmm9[1],xmm11[2],xmm9[2],xmm11[3],xmm9[3]
; SSE-NEXT: movdqa %xmm11, %xmm12
; SSE-NEXT: punpckldq {{.*#+}} xmm12 = xmm12[0],xmm10[0],xmm12[1],xmm10[1]
; SSE-NEXT: movsd {{.*#+}} xmm13 = xmm12[0],xmm13[1]
; SSE-NEXT: movapd %xmm13, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
; SSE-NEXT: pshufd {{.*#+}} xmm12 = xmm10[1,1,1,1]
; SSE-NEXT: pshufd {{.*#+}} xmm13 = xmm11[1,1,1,1]
; SSE-NEXT: punpckldq {{.*#+}} xmm13 = xmm13[0],xmm12[0],xmm13[1],xmm12[1]
; SSE-NEXT: movdqa %xmm7, %xmm12
; SSE-NEXT: punpckldq {{.*#+}} xmm12 = xmm12[0],xmm6[0],xmm12[1],xmm6[1]
; SSE-NEXT: shufps {{.*#+}} xmm13 = xmm13[0,1],xmm12[2,3]
; SSE-NEXT: movaps %xmm13, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
; SSE-NEXT: pshufd {{.*#+}} xmm12 = xmm6[2,2,2,2]
; SSE-NEXT: pshufd {{.*#+}} xmm13 = xmm7[2,2,2,2]
; SSE-NEXT: punpckhdq {{.*#+}} xmm13 = xmm13[2],xmm12[2],xmm13[3],xmm12[3]
; SSE-NEXT: pshufd {{.*#+}} xmm12 = xmm11[3,3,3,3]
; SSE-NEXT: punpckhdq {{.*#+}} xmm11 = xmm11[2],xmm10[2],xmm11[3],xmm10[3]
; SSE-NEXT: movsd {{.*#+}} xmm13 = xmm11[0],xmm13[1]
; SSE-NEXT: movapd %xmm13, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
; SSE-NEXT: punpckhdq {{.*#+}} xmm7 = xmm7[2],xmm6[2],xmm7[3],xmm6[3]
; SSE-NEXT: pshufd {{.*#+}} xmm6 = xmm10[3,3,3,3]
; SSE-NEXT: punpckldq {{.*#+}} xmm12 = xmm12[0],xmm6[0],xmm12[1],xmm6[1]
; SSE-NEXT: shufps {{.*#+}} xmm12 = xmm12[0,1],xmm7[2,3]
; SSE-NEXT: movaps %xmm12, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
; SSE-NEXT: punpckhwd {{.*#+}} xmm2 = xmm2[4],xmm8[4],xmm2[5],xmm8[5],xmm2[6],xmm8[6],xmm2[7],xmm8[7]
; SSE-NEXT: punpckhwd {{.*#+}} xmm3 = xmm3[4],xmm9[4],xmm3[5],xmm9[5],xmm3[6],xmm9[6],xmm3[7],xmm9[7]
; SSE-NEXT: punpckhwd {{.*#+}} xmm0 = xmm0[4],xmm4[4],xmm0[5],xmm4[5],xmm0[6],xmm4[6],xmm0[7],xmm4[7]
; SSE-NEXT: punpckhwd {{.*#+}} xmm1 = xmm1[4],xmm5[4],xmm1[5],xmm5[5],xmm1[6],xmm5[6],xmm1[7],xmm5[7]
; SSE-NEXT: pshufd {{.*#+}} xmm4 = xmm0[0,0,0,0]
; SSE-NEXT: pshufd {{.*#+}} xmm5 = xmm1[0,0,0,0]
; SSE-NEXT: punpckhdq {{.*#+}} xmm5 = xmm5[2],xmm4[2],xmm5[3],xmm4[3]
; SSE-NEXT: movdqa %xmm3, %xmm4
; SSE-NEXT: punpckldq {{.*#+}} xmm4 = xmm4[0],xmm2[0],xmm4[1],xmm2[1]
; SSE-NEXT: movsd {{.*#+}} xmm5 = xmm4[0],xmm5[1]
; SSE-NEXT: movapd %xmm5, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
; SSE-NEXT: pshufd {{.*#+}} xmm4 = xmm2[1,1,1,1]
; SSE-NEXT: pshufd {{.*#+}} xmm5 = xmm3[1,1,1,1]
; SSE-NEXT: punpckldq {{.*#+}} xmm5 = xmm5[0],xmm4[0],xmm5[1],xmm4[1]
; SSE-NEXT: movdqa %xmm1, %xmm4
; SSE-NEXT: punpckldq {{.*#+}} xmm4 = xmm4[0],xmm0[0],xmm4[1],xmm0[1]
; SSE-NEXT: shufps {{.*#+}} xmm5 = xmm5[0,1],xmm4[2,3]
; SSE-NEXT: movaps %xmm5, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
; SSE-NEXT: pshufd {{.*#+}} xmm4 = xmm0[2,2,2,2]
; SSE-NEXT: pshufd {{.*#+}} xmm5 = xmm1[2,2,2,2]
; SSE-NEXT: punpckhdq {{.*#+}} xmm5 = xmm5[2],xmm4[2],xmm5[3],xmm4[3]
; SSE-NEXT: pshufd {{.*#+}} xmm4 = xmm3[3,3,3,3]
; SSE-NEXT: punpckhdq {{.*#+}} xmm3 = xmm3[2],xmm2[2],xmm3[3],xmm2[3]
; SSE-NEXT: movsd {{.*#+}} xmm5 = xmm3[0],xmm5[1]
; SSE-NEXT: movapd %xmm5, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
; SSE-NEXT: punpckhdq {{.*#+}} xmm1 = xmm1[2],xmm0[2],xmm1[3],xmm0[3]
; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm2[3,3,3,3]
; SSE-NEXT: punpckldq {{.*#+}} xmm4 = xmm4[0],xmm0[0],xmm4[1],xmm0[1]
; SSE-NEXT: shufps {{.*#+}} xmm4 = xmm4[0,1],xmm1[2,3]
; SSE-NEXT: movaps %xmm4, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
; SSE-NEXT: movdqa 80(%r10), %xmm0
; SSE-NEXT: movdqa 80(%rax), %xmm4
; SSE-NEXT: movdqa %xmm0, %xmm6
; SSE-NEXT: punpcklwd {{.*#+}} xmm6 = xmm6[0],xmm4[0],xmm6[1],xmm4[1],xmm6[2],xmm4[2],xmm6[3],xmm4[3]
; SSE-NEXT: movdqa 80(%r8), %xmm1
; SSE-NEXT: movdqa 80(%r9), %xmm5
; SSE-NEXT: movdqa %xmm1, %xmm7
; SSE-NEXT: punpcklwd {{.*#+}} xmm7 = xmm7[0],xmm5[0],xmm7[1],xmm5[1],xmm7[2],xmm5[2],xmm7[3],xmm5[3]
; SSE-NEXT: pshufd {{.*#+}} xmm2 = xmm6[0,0,0,0]
; SSE-NEXT: pshufd {{.*#+}} xmm3 = xmm7[0,0,0,0]
; SSE-NEXT: punpckhdq {{.*#+}} xmm3 = xmm3[2],xmm2[2],xmm3[3],xmm2[3]
; SSE-NEXT: movdqa %xmm3, %xmm13
; SSE-NEXT: movdqa 80(%rdx), %xmm2
; SSE-NEXT: movdqa 80(%rcx), %xmm8
; SSE-NEXT: movdqa %xmm2, %xmm10
; SSE-NEXT: punpcklwd {{.*#+}} xmm10 = xmm10[0],xmm8[0],xmm10[1],xmm8[1],xmm10[2],xmm8[2],xmm10[3],xmm8[3]
; SSE-NEXT: movdqa 80(%rdi), %xmm3
; SSE-NEXT: movdqa 80(%rsi), %xmm9
; SSE-NEXT: movdqa %xmm3, %xmm11
; SSE-NEXT: punpcklwd {{.*#+}} xmm11 = xmm11[0],xmm9[0],xmm11[1],xmm9[1],xmm11[2],xmm9[2],xmm11[3],xmm9[3]
; SSE-NEXT: movdqa %xmm11, %xmm12
; SSE-NEXT: punpckldq {{.*#+}} xmm12 = xmm12[0],xmm10[0],xmm12[1],xmm10[1]
; SSE-NEXT: movsd {{.*#+}} xmm13 = xmm12[0],xmm13[1]
; SSE-NEXT: movapd %xmm13, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
; SSE-NEXT: pshufd {{.*#+}} xmm12 = xmm10[1,1,1,1]
; SSE-NEXT: pshufd {{.*#+}} xmm13 = xmm11[1,1,1,1]
; SSE-NEXT: punpckldq {{.*#+}} xmm13 = xmm13[0],xmm12[0],xmm13[1],xmm12[1]
; SSE-NEXT: movdqa %xmm7, %xmm12
; SSE-NEXT: punpckldq {{.*#+}} xmm12 = xmm12[0],xmm6[0],xmm12[1],xmm6[1]
; SSE-NEXT: shufps {{.*#+}} xmm13 = xmm13[0,1],xmm12[2,3]
; SSE-NEXT: movaps %xmm13, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
; SSE-NEXT: pshufd {{.*#+}} xmm12 = xmm6[2,2,2,2]
; SSE-NEXT: pshufd {{.*#+}} xmm13 = xmm7[2,2,2,2]
; SSE-NEXT: punpckhdq {{.*#+}} xmm13 = xmm13[2],xmm12[2],xmm13[3],xmm12[3]
; SSE-NEXT: pshufd {{.*#+}} xmm12 = xmm11[3,3,3,3]
; SSE-NEXT: punpckhdq {{.*#+}} xmm11 = xmm11[2],xmm10[2],xmm11[3],xmm10[3]
; SSE-NEXT: movsd {{.*#+}} xmm13 = xmm11[0],xmm13[1]
; SSE-NEXT: movapd %xmm13, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
; SSE-NEXT: punpckhdq {{.*#+}} xmm7 = xmm7[2],xmm6[2],xmm7[3],xmm6[3]
; SSE-NEXT: pshufd {{.*#+}} xmm6 = xmm10[3,3,3,3]
; SSE-NEXT: punpckldq {{.*#+}} xmm12 = xmm12[0],xmm6[0],xmm12[1],xmm6[1]
; SSE-NEXT: shufps {{.*#+}} xmm12 = xmm12[0,1],xmm7[2,3]
; SSE-NEXT: movaps %xmm12, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
; SSE-NEXT: punpckhwd {{.*#+}} xmm2 = xmm2[4],xmm8[4],xmm2[5],xmm8[5],xmm2[6],xmm8[6],xmm2[7],xmm8[7]
; SSE-NEXT: punpckhwd {{.*#+}} xmm3 = xmm3[4],xmm9[4],xmm3[5],xmm9[5],xmm3[6],xmm9[6],xmm3[7],xmm9[7]
; SSE-NEXT: punpckhwd {{.*#+}} xmm0 = xmm0[4],xmm4[4],xmm0[5],xmm4[5],xmm0[6],xmm4[6],xmm0[7],xmm4[7]
; SSE-NEXT: punpckhwd {{.*#+}} xmm1 = xmm1[4],xmm5[4],xmm1[5],xmm5[5],xmm1[6],xmm5[6],xmm1[7],xmm5[7]
; SSE-NEXT: pshufd {{.*#+}} xmm4 = xmm0[0,0,0,0]
; SSE-NEXT: pshufd {{.*#+}} xmm5 = xmm1[0,0,0,0]
; SSE-NEXT: punpckhdq {{.*#+}} xmm5 = xmm5[2],xmm4[2],xmm5[3],xmm4[3]
; SSE-NEXT: movdqa %xmm3, %xmm4
; SSE-NEXT: punpckldq {{.*#+}} xmm4 = xmm4[0],xmm2[0],xmm4[1],xmm2[1]
; SSE-NEXT: movsd {{.*#+}} xmm5 = xmm4[0],xmm5[1]
; SSE-NEXT: movapd %xmm5, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
; SSE-NEXT: pshufd {{.*#+}} xmm4 = xmm2[1,1,1,1]
; SSE-NEXT: pshufd {{.*#+}} xmm5 = xmm3[1,1,1,1]
; SSE-NEXT: punpckldq {{.*#+}} xmm5 = xmm5[0],xmm4[0],xmm5[1],xmm4[1]
; SSE-NEXT: movdqa %xmm1, %xmm4
; SSE-NEXT: punpckldq {{.*#+}} xmm4 = xmm4[0],xmm0[0],xmm4[1],xmm0[1]
; SSE-NEXT: shufps {{.*#+}} xmm5 = xmm5[0,1],xmm4[2,3]
; SSE-NEXT: movaps %xmm5, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
; SSE-NEXT: pshufd {{.*#+}} xmm4 = xmm0[2,2,2,2]
; SSE-NEXT: pshufd {{.*#+}} xmm5 = xmm1[2,2,2,2]
; SSE-NEXT: punpckhdq {{.*#+}} xmm5 = xmm5[2],xmm4[2],xmm5[3],xmm4[3]
; SSE-NEXT: pshufd {{.*#+}} xmm4 = xmm3[3,3,3,3]
; SSE-NEXT: punpckhdq {{.*#+}} xmm3 = xmm3[2],xmm2[2],xmm3[3],xmm2[3]
; SSE-NEXT: movsd {{.*#+}} xmm5 = xmm3[0],xmm5[1]
; SSE-NEXT: movapd %xmm5, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
; SSE-NEXT: punpckhdq {{.*#+}} xmm1 = xmm1[2],xmm0[2],xmm1[3],xmm0[3]
; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm2[3,3,3,3]
; SSE-NEXT: punpckldq {{.*#+}} xmm4 = xmm4[0],xmm0[0],xmm4[1],xmm0[1]
; SSE-NEXT: shufps {{.*#+}} xmm4 = xmm4[0,1],xmm1[2,3]
; SSE-NEXT: movaps %xmm4, (%rsp) # 16-byte Spill
; SSE-NEXT: movdqa 96(%r10), %xmm0
; SSE-NEXT: movdqa 96(%rax), %xmm4
; SSE-NEXT: movdqa %xmm0, %xmm6
; SSE-NEXT: punpcklwd {{.*#+}} xmm6 = xmm6[0],xmm4[0],xmm6[1],xmm4[1],xmm6[2],xmm4[2],xmm6[3],xmm4[3]
; SSE-NEXT: movdqa 96(%r8), %xmm1
; SSE-NEXT: movdqa 96(%r9), %xmm5
; SSE-NEXT: movdqa %xmm1, %xmm7
; SSE-NEXT: punpcklwd {{.*#+}} xmm7 = xmm7[0],xmm5[0],xmm7[1],xmm5[1],xmm7[2],xmm5[2],xmm7[3],xmm5[3]
; SSE-NEXT: pshufd {{.*#+}} xmm2 = xmm6[0,0,0,0]
; SSE-NEXT: pshufd {{.*#+}} xmm3 = xmm7[0,0,0,0]
; SSE-NEXT: punpckhdq {{.*#+}} xmm3 = xmm3[2],xmm2[2],xmm3[3],xmm2[3]
; SSE-NEXT: movdqa %xmm3, %xmm13
; SSE-NEXT: movdqa 96(%rdx), %xmm2
; SSE-NEXT: movdqa 96(%rcx), %xmm8
; SSE-NEXT: movdqa %xmm2, %xmm10
; SSE-NEXT: punpcklwd {{.*#+}} xmm10 = xmm10[0],xmm8[0],xmm10[1],xmm8[1],xmm10[2],xmm8[2],xmm10[3],xmm8[3]
; SSE-NEXT: movdqa 96(%rdi), %xmm3
; SSE-NEXT: movdqa 96(%rsi), %xmm9
; SSE-NEXT: movdqa %xmm3, %xmm11
; SSE-NEXT: punpcklwd {{.*#+}} xmm11 = xmm11[0],xmm9[0],xmm11[1],xmm9[1],xmm11[2],xmm9[2],xmm11[3],xmm9[3]
; SSE-NEXT: movdqa %xmm11, %xmm12
; SSE-NEXT: punpckldq {{.*#+}} xmm12 = xmm12[0],xmm10[0],xmm12[1],xmm10[1]
; SSE-NEXT: movsd {{.*#+}} xmm13 = xmm12[0],xmm13[1]
; SSE-NEXT: movapd %xmm13, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
; SSE-NEXT: pshufd {{.*#+}} xmm12 = xmm10[1,1,1,1]
; SSE-NEXT: pshufd {{.*#+}} xmm13 = xmm11[1,1,1,1]
; SSE-NEXT: punpckldq {{.*#+}} xmm13 = xmm13[0],xmm12[0],xmm13[1],xmm12[1]
; SSE-NEXT: movdqa %xmm7, %xmm12
; SSE-NEXT: punpckldq {{.*#+}} xmm12 = xmm12[0],xmm6[0],xmm12[1],xmm6[1]
; SSE-NEXT: shufps {{.*#+}} xmm13 = xmm13[0,1],xmm12[2,3]
; SSE-NEXT: movaps %xmm13, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
; SSE-NEXT: pshufd {{.*#+}} xmm12 = xmm6[2,2,2,2]
; SSE-NEXT: pshufd {{.*#+}} xmm13 = xmm7[2,2,2,2]
; SSE-NEXT: punpckhdq {{.*#+}} xmm13 = xmm13[2],xmm12[2],xmm13[3],xmm12[3]
; SSE-NEXT: pshufd {{.*#+}} xmm12 = xmm11[3,3,3,3]
; SSE-NEXT: punpckhdq {{.*#+}} xmm11 = xmm11[2],xmm10[2],xmm11[3],xmm10[3]
; SSE-NEXT: movsd {{.*#+}} xmm13 = xmm11[0],xmm13[1]
; SSE-NEXT: movapd %xmm13, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
; SSE-NEXT: punpckhdq {{.*#+}} xmm7 = xmm7[2],xmm6[2],xmm7[3],xmm6[3]
; SSE-NEXT: pshufd {{.*#+}} xmm6 = xmm10[3,3,3,3]
; SSE-NEXT: punpckldq {{.*#+}} xmm12 = xmm12[0],xmm6[0],xmm12[1],xmm6[1]
; SSE-NEXT: shufps {{.*#+}} xmm12 = xmm12[0,1],xmm7[2,3]
; SSE-NEXT: movaps %xmm12, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
; SSE-NEXT: punpckhwd {{.*#+}} xmm2 = xmm2[4],xmm8[4],xmm2[5],xmm8[5],xmm2[6],xmm8[6],xmm2[7],xmm8[7]
; SSE-NEXT: punpckhwd {{.*#+}} xmm3 = xmm3[4],xmm9[4],xmm3[5],xmm9[5],xmm3[6],xmm9[6],xmm3[7],xmm9[7]
; SSE-NEXT: punpckhwd {{.*#+}} xmm0 = xmm0[4],xmm4[4],xmm0[5],xmm4[5],xmm0[6],xmm4[6],xmm0[7],xmm4[7]
; SSE-NEXT: punpckhwd {{.*#+}} xmm1 = xmm1[4],xmm5[4],xmm1[5],xmm5[5],xmm1[6],xmm5[6],xmm1[7],xmm5[7]
; SSE-NEXT: pshufd {{.*#+}} xmm4 = xmm0[0,0,0,0]
; SSE-NEXT: pshufd {{.*#+}} xmm5 = xmm1[0,0,0,0]
; SSE-NEXT: punpckhdq {{.*#+}} xmm5 = xmm5[2],xmm4[2],xmm5[3],xmm4[3]
; SSE-NEXT: movdqa %xmm3, %xmm4
; SSE-NEXT: punpckldq {{.*#+}} xmm4 = xmm4[0],xmm2[0],xmm4[1],xmm2[1]
; SSE-NEXT: movsd {{.*#+}} xmm5 = xmm4[0],xmm5[1]
; SSE-NEXT: movapd %xmm5, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
; SSE-NEXT: pshufd {{.*#+}} xmm4 = xmm2[1,1,1,1]
; SSE-NEXT: pshufd {{.*#+}} xmm5 = xmm3[1,1,1,1]
; SSE-NEXT: punpckldq {{.*#+}} xmm5 = xmm5[0],xmm4[0],xmm5[1],xmm4[1]
; SSE-NEXT: movdqa %xmm1, %xmm4
; SSE-NEXT: punpckldq {{.*#+}} xmm4 = xmm4[0],xmm0[0],xmm4[1],xmm0[1]
; SSE-NEXT: shufps {{.*#+}} xmm5 = xmm5[0,1],xmm4[2,3]
; SSE-NEXT: movaps %xmm5, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
; SSE-NEXT: pshufd {{.*#+}} xmm4 = xmm0[2,2,2,2]
; SSE-NEXT: pshufd {{.*#+}} xmm15 = xmm1[2,2,2,2]
; SSE-NEXT: punpckhdq {{.*#+}} xmm15 = xmm15[2],xmm4[2],xmm15[3],xmm4[3]
; SSE-NEXT: pshufd {{.*#+}} xmm14 = xmm3[3,3,3,3]
; SSE-NEXT: punpckhdq {{.*#+}} xmm3 = xmm3[2],xmm2[2],xmm3[3],xmm2[3]
; SSE-NEXT: movsd {{.*#+}} xmm15 = xmm3[0],xmm15[1]
; SSE-NEXT: punpckhdq {{.*#+}} xmm1 = xmm1[2],xmm0[2],xmm1[3],xmm0[3]
; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm2[3,3,3,3]
; SSE-NEXT: punpckldq {{.*#+}} xmm14 = xmm14[0],xmm0[0],xmm14[1],xmm0[1]
; SSE-NEXT: shufps {{.*#+}} xmm14 = xmm14[0,1],xmm1[2,3]
; SSE-NEXT: movdqa 112(%r10), %xmm9
; SSE-NEXT: movdqa 112(%rax), %xmm0
; SSE-NEXT: movdqa %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
; SSE-NEXT: movdqa %xmm9, %xmm5
; SSE-NEXT: punpcklwd {{.*#+}} xmm5 = xmm5[0],xmm0[0],xmm5[1],xmm0[1],xmm5[2],xmm0[2],xmm5[3],xmm0[3]
; SSE-NEXT: movdqa 112(%r8), %xmm4
; SSE-NEXT: movdqa 112(%r9), %xmm0
; SSE-NEXT: movdqa %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
; SSE-NEXT: movdqa %xmm4, %xmm1
; SSE-NEXT: punpcklwd {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1],xmm1[2],xmm0[2],xmm1[3],xmm0[3]
; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm5[0,0,0,0]
; SSE-NEXT: pshufd {{.*#+}} xmm11 = xmm1[0,0,0,0]
; SSE-NEXT: punpckhdq {{.*#+}} xmm11 = xmm11[2],xmm0[2],xmm11[3],xmm0[3]
; SSE-NEXT: movdqa 112(%rdx), %xmm6
; SSE-NEXT: movdqa 112(%rcx), %xmm13
; SSE-NEXT: movdqa %xmm6, %xmm3
; SSE-NEXT: punpcklwd {{.*#+}} xmm3 = xmm3[0],xmm13[0],xmm3[1],xmm13[1],xmm3[2],xmm13[2],xmm3[3],xmm13[3]
; SSE-NEXT: movdqa 112(%rdi), %xmm2
; SSE-NEXT: movdqa 112(%rsi), %xmm12
; SSE-NEXT: movdqa %xmm2, %xmm0
; SSE-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0],xmm12[0],xmm0[1],xmm12[1],xmm0[2],xmm12[2],xmm0[3],xmm12[3]
; SSE-NEXT: movdqa %xmm0, %xmm7
; SSE-NEXT: punpckldq {{.*#+}} xmm7 = xmm7[0],xmm3[0],xmm7[1],xmm3[1]
; SSE-NEXT: movsd {{.*#+}} xmm11 = xmm7[0],xmm11[1]
; SSE-NEXT: pshufd {{.*#+}} xmm7 = xmm3[1,1,1,1]
; SSE-NEXT: pshufd {{.*#+}} xmm10 = xmm0[1,1,1,1]
; SSE-NEXT: punpckldq {{.*#+}} xmm10 = xmm10[0],xmm7[0],xmm10[1],xmm7[1]
; SSE-NEXT: movdqa %xmm1, %xmm7
; SSE-NEXT: punpckldq {{.*#+}} xmm7 = xmm7[0],xmm5[0],xmm7[1],xmm5[1]
; SSE-NEXT: shufps {{.*#+}} xmm10 = xmm10[0,1],xmm7[2,3]
; SSE-NEXT: pshufd {{.*#+}} xmm7 = xmm5[2,2,2,2]
; SSE-NEXT: pshufd {{.*#+}} xmm8 = xmm1[2,2,2,2]
; SSE-NEXT: punpckhdq {{.*#+}} xmm8 = xmm8[2],xmm7[2],xmm8[3],xmm7[3]
; SSE-NEXT: pshufd {{.*#+}} xmm7 = xmm0[3,3,3,3]
; SSE-NEXT: punpckhdq {{.*#+}} xmm0 = xmm0[2],xmm3[2],xmm0[3],xmm3[3]
; SSE-NEXT: movsd {{.*#+}} xmm8 = xmm0[0],xmm8[1]
; SSE-NEXT: punpckhdq {{.*#+}} xmm1 = xmm1[2],xmm5[2],xmm1[3],xmm5[3]
; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm3[3,3,3,3]
; SSE-NEXT: punpckldq {{.*#+}} xmm7 = xmm7[0],xmm0[0],xmm7[1],xmm0[1]
; SSE-NEXT: shufps {{.*#+}} xmm7 = xmm7[0,1],xmm1[2,3]
; SSE-NEXT: punpckhwd {{.*#+}} xmm6 = xmm6[4],xmm13[4],xmm6[5],xmm13[5],xmm6[6],xmm13[6],xmm6[7],xmm13[7]
; SSE-NEXT: punpckhwd {{.*#+}} xmm2 = xmm2[4],xmm12[4],xmm2[5],xmm12[5],xmm2[6],xmm12[6],xmm2[7],xmm12[7]
; SSE-NEXT: punpckhwd {{[-0-9]+}}(%r{{[sb]}}p), %xmm9 # 16-byte Folded Reload
; SSE-NEXT: # xmm9 = xmm9[4],mem[4],xmm9[5],mem[5],xmm9[6],mem[6],xmm9[7],mem[7]
; SSE-NEXT: punpckhwd {{[-0-9]+}}(%r{{[sb]}}p), %xmm4 # 16-byte Folded Reload
; SSE-NEXT: # xmm4 = xmm4[4],mem[4],xmm4[5],mem[5],xmm4[6],mem[6],xmm4[7],mem[7]
; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm9[0,0,0,0]
; SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm4[0,0,0,0]
; SSE-NEXT: punpckhdq {{.*#+}} xmm1 = xmm1[2],xmm0[2],xmm1[3],xmm0[3]
; SSE-NEXT: movdqa %xmm2, %xmm0
; SSE-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm6[0],xmm0[1],xmm6[1]
; SSE-NEXT: movsd {{.*#+}} xmm1 = xmm0[0],xmm1[1]
; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm6[1,1,1,1]
; SSE-NEXT: pshufd {{.*#+}} xmm3 = xmm2[1,1,1,1]
; SSE-NEXT: punpckldq {{.*#+}} xmm3 = xmm3[0],xmm0[0],xmm3[1],xmm0[1]
; SSE-NEXT: movdqa %xmm4, %xmm0
; SSE-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm9[0],xmm0[1],xmm9[1]
; SSE-NEXT: shufps {{.*#+}} xmm3 = xmm3[0,1],xmm0[2,3]
; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm9[2,2,2,2]
; SSE-NEXT: pshufd {{.*#+}} xmm5 = xmm4[2,2,2,2]
; SSE-NEXT: punpckhdq {{.*#+}} xmm5 = xmm5[2],xmm0[2],xmm5[3],xmm0[3]
; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm2[3,3,3,3]
; SSE-NEXT: punpckhdq {{.*#+}} xmm2 = xmm2[2],xmm6[2],xmm2[3],xmm6[3]
; SSE-NEXT: movsd {{.*#+}} xmm5 = xmm2[0],xmm5[1]
; SSE-NEXT: punpckhdq {{.*#+}} xmm4 = xmm4[2],xmm9[2],xmm4[3],xmm9[3]
; SSE-NEXT: pshufd {{.*#+}} xmm2 = xmm6[3,3,3,3]
; SSE-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1]
; SSE-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,1],xmm4[2,3]
; SSE-NEXT: movq {{[0-9]+}}(%rsp), %rax
; SSE-NEXT: movaps %xmm0, 1008(%rax)
; SSE-NEXT: movapd %xmm5, 992(%rax)
; SSE-NEXT: movaps %xmm3, 976(%rax)
; SSE-NEXT: movapd %xmm1, 960(%rax)
; SSE-NEXT: movaps %xmm7, 944(%rax)
; SSE-NEXT: movapd %xmm8, 928(%rax)
; SSE-NEXT: movaps %xmm10, 912(%rax)
; SSE-NEXT: movapd %xmm11, 896(%rax)
; SSE-NEXT: movaps %xmm14, 880(%rax)
; SSE-NEXT: movapd %xmm15, 864(%rax)
; SSE-NEXT: movaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Reload
; SSE-NEXT: movaps %xmm0, 848(%rax)
; SSE-NEXT: movaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Reload
; SSE-NEXT: movaps %xmm0, 832(%rax)
; SSE-NEXT: movaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Reload
; SSE-NEXT: movaps %xmm0, 816(%rax)
; SSE-NEXT: movaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Reload
; SSE-NEXT: movaps %xmm0, 800(%rax)
; SSE-NEXT: movaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Reload
; SSE-NEXT: movaps %xmm0, 784(%rax)
; SSE-NEXT: movaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Reload
; SSE-NEXT: movaps %xmm0, 768(%rax)
; SSE-NEXT: movaps (%rsp), %xmm0 # 16-byte Reload
; SSE-NEXT: movaps %xmm0, 752(%rax)
; SSE-NEXT: movaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Reload
; SSE-NEXT: movaps %xmm0, 736(%rax)
; SSE-NEXT: movaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Reload
; SSE-NEXT: movaps %xmm0, 720(%rax)
; SSE-NEXT: movaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Reload
; SSE-NEXT: movaps %xmm0, 704(%rax)
; SSE-NEXT: movaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Reload
; SSE-NEXT: movaps %xmm0, 688(%rax)
; SSE-NEXT: movaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Reload
; SSE-NEXT: movaps %xmm0, 672(%rax)
; SSE-NEXT: movaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Reload
; SSE-NEXT: movaps %xmm0, 656(%rax)
; SSE-NEXT: movaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Reload
; SSE-NEXT: movaps %xmm0, 640(%rax)
; SSE-NEXT: movaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Reload
; SSE-NEXT: movaps %xmm0, 624(%rax)
; SSE-NEXT: movaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Reload
; SSE-NEXT: movaps %xmm0, 608(%rax)
; SSE-NEXT: movaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Reload
; SSE-NEXT: movaps %xmm0, 592(%rax)
; SSE-NEXT: movaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Reload
; SSE-NEXT: movaps %xmm0, 576(%rax)
; SSE-NEXT: movaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Reload
; SSE-NEXT: movaps %xmm0, 560(%rax)
; SSE-NEXT: movaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Reload
; SSE-NEXT: movaps %xmm0, 544(%rax)
; SSE-NEXT: movaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Reload
; SSE-NEXT: movaps %xmm0, 528(%rax)
; SSE-NEXT: movaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Reload
; SSE-NEXT: movaps %xmm0, 512(%rax)
; SSE-NEXT: movaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Reload
; SSE-NEXT: movaps %xmm0, 496(%rax)
; SSE-NEXT: movaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Reload
; SSE-NEXT: movaps %xmm0, 480(%rax)
; SSE-NEXT: movaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Reload
; SSE-NEXT: movaps %xmm0, 464(%rax)
; SSE-NEXT: movaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Reload
; SSE-NEXT: movaps %xmm0, 448(%rax)
; SSE-NEXT: movaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Reload
; SSE-NEXT: movaps %xmm0, 432(%rax)
; SSE-NEXT: movaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Reload
; SSE-NEXT: movaps %xmm0, 416(%rax)
; SSE-NEXT: movaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Reload
; SSE-NEXT: movaps %xmm0, 400(%rax)
; SSE-NEXT: movaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Reload
; SSE-NEXT: movaps %xmm0, 384(%rax)
; SSE-NEXT: movaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Reload
; SSE-NEXT: movaps %xmm0, 368(%rax)
; SSE-NEXT: movaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Reload
; SSE-NEXT: movaps %xmm0, 352(%rax)
; SSE-NEXT: movaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Reload
; SSE-NEXT: movaps %xmm0, 336(%rax)
; SSE-NEXT: movaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Reload
; SSE-NEXT: movaps %xmm0, 320(%rax)
; SSE-NEXT: movaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Reload
; SSE-NEXT: movaps %xmm0, 304(%rax)
; SSE-NEXT: movaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Reload
; SSE-NEXT: movaps %xmm0, 288(%rax)
; SSE-NEXT: movaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Reload
; SSE-NEXT: movaps %xmm0, 272(%rax)
; SSE-NEXT: movaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Reload
; SSE-NEXT: movaps %xmm0, 256(%rax)
; SSE-NEXT: movaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Reload
; SSE-NEXT: movaps %xmm0, 240(%rax)
; SSE-NEXT: movaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Reload
; SSE-NEXT: movaps %xmm0, 224(%rax)
; SSE-NEXT: movaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Reload
; SSE-NEXT: movaps %xmm0, 208(%rax)
; SSE-NEXT: movaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Reload
; SSE-NEXT: movaps %xmm0, 192(%rax)
; SSE-NEXT: movaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Reload
; SSE-NEXT: movaps %xmm0, 176(%rax)
; SSE-NEXT: movaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Reload
; SSE-NEXT: movaps %xmm0, 160(%rax)
; SSE-NEXT: movaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Reload
; SSE-NEXT: movaps %xmm0, 144(%rax)
; SSE-NEXT: movaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Reload
; SSE-NEXT: movaps %xmm0, 128(%rax)
; SSE-NEXT: movaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Reload
; SSE-NEXT: movaps %xmm0, 112(%rax)
; SSE-NEXT: movaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Reload
; SSE-NEXT: movaps %xmm0, 96(%rax)
; SSE-NEXT: movaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Reload
; SSE-NEXT: movaps %xmm0, 80(%rax)
; SSE-NEXT: movaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Reload
; SSE-NEXT: movaps %xmm0, 64(%rax)
; SSE-NEXT: movaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Reload
; SSE-NEXT: movaps %xmm0, 48(%rax)
; SSE-NEXT: movaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Reload
; SSE-NEXT: movaps %xmm0, 32(%rax)
; SSE-NEXT: movaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Reload
; SSE-NEXT: movaps %xmm0, 16(%rax)
; SSE-NEXT: movaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Reload
; SSE-NEXT: movaps %xmm0, (%rax)
; SSE-NEXT: addq $776, %rsp # imm = 0x308
; SSE-NEXT: retq
;
; AVX-LABEL: store_i16_stride8_vf64:
; AVX: # %bb.0:
; AVX-NEXT: subq $744, %rsp # imm = 0x2E8
; AVX-NEXT: movq {{[0-9]+}}(%rsp), %rax
; AVX-NEXT: movq {{[0-9]+}}(%rsp), %r10
; AVX-NEXT: vmovdqa (%r10), %xmm5
; AVX-NEXT: vmovdqa 16(%r10), %xmm0
; AVX-NEXT: vmovdqa (%rax), %xmm6
; AVX-NEXT: vpunpcklwd {{.*#+}} xmm2 = xmm6[0],xmm5[0],xmm6[1],xmm5[1],xmm6[2],xmm5[2],xmm6[3],xmm5[3]
; AVX-NEXT: vpshufd {{.*#+}} xmm1 = xmm2[0,0,0,0]
; AVX-NEXT: vpshufd {{.*#+}} xmm3 = xmm2[0,1,0,1]
; AVX-NEXT: vinsertf128 $1, %xmm3, %ymm1, %ymm1
; AVX-NEXT: vmovdqa (%r9), %xmm7
; AVX-NEXT: vmovdqa (%r8), %xmm8
; AVX-NEXT: vpunpcklwd {{.*#+}} xmm3 = xmm8[0],xmm7[0],xmm8[1],xmm7[1],xmm8[2],xmm7[2],xmm8[3],xmm7[3]
; AVX-NEXT: vpshufd {{.*#+}} xmm4 = xmm3[0,1,0,1]
; AVX-NEXT: vpmovzxdq {{.*#+}} xmm9 = xmm3[0],zero,xmm3[1],zero
; AVX-NEXT: vinsertf128 $1, %xmm9, %ymm4, %ymm4
; AVX-NEXT: vblendps {{.*#+}} ymm13 = ymm4[0,1,2],ymm1[3],ymm4[4,5,6],ymm1[7]
; AVX-NEXT: vmovdqa (%rsi), %xmm9
; AVX-NEXT: vmovdqa (%rdi), %xmm10
; AVX-NEXT: vpunpcklwd {{.*#+}} xmm4 = xmm10[0],xmm9[0],xmm10[1],xmm9[1],xmm10[2],xmm9[2],xmm10[3],xmm9[3]
; AVX-NEXT: vpshufd {{.*#+}} xmm1 = xmm4[1,1,1,1]
; AVX-NEXT: vinsertf128 $1, %xmm1, %ymm4, %ymm1
; AVX-NEXT: vmovdqa (%rcx), %xmm11
; AVX-NEXT: vmovdqa (%rdx), %xmm12
; AVX-NEXT: vpunpcklwd {{.*#+}} xmm14 = xmm12[0],xmm11[0],xmm12[1],xmm11[1],xmm12[2],xmm11[2],xmm12[3],xmm11[3]
; AVX-NEXT: vpshufd {{.*#+}} xmm15 = xmm14[0,0,1,1]
; AVX-NEXT: vinsertf128 $1, %xmm14, %ymm15, %ymm15
; AVX-NEXT: vblendps {{.*#+}} ymm15 = ymm1[0],ymm15[1],ymm1[2,3,4],ymm15[5],ymm1[6,7]
; AVX-NEXT: vmovdqa 16(%rax), %xmm1
; AVX-NEXT: vblendps {{.*#+}} ymm13 = ymm15[0,1],ymm13[2,3],ymm15[4,5],ymm13[6,7]
; AVX-NEXT: vmovups %ymm13, {{[-0-9]+}}(%r{{[sb]}}p) # 32-byte Spill
; AVX-NEXT: vpshufd {{.*#+}} xmm13 = xmm3[2,2,3,3]
; AVX-NEXT: vinsertf128 $1, %xmm13, %ymm3, %ymm3
; AVX-NEXT: vpshufd {{.*#+}} xmm13 = xmm2[2,2,2,2]
; AVX-NEXT: vinsertf128 $1, %xmm2, %ymm13, %ymm13
; AVX-NEXT: vmovdqa 16(%r9), %xmm2
; AVX-NEXT: vblendps {{.*#+}} ymm13 = ymm3[0,1,2],ymm13[3],ymm3[4,5,6],ymm13[7]
; AVX-NEXT: vpshufd {{.*#+}} xmm3 = xmm14[2,2,3,3]
; AVX-NEXT: vpshufd {{.*#+}} xmm14 = xmm14[2,3,2,3]
; AVX-NEXT: vinsertf128 $1, %xmm14, %ymm3, %ymm3
; AVX-NEXT: vpshufd {{.*#+}} xmm14 = xmm4[2,3,2,3]
; AVX-NEXT: vpshufd {{.*#+}} xmm4 = xmm4[3,3,3,3]
; AVX-NEXT: vinsertf128 $1, %xmm4, %ymm14, %ymm14
; AVX-NEXT: vmovdqa 16(%r8), %xmm4
; AVX-NEXT: vblendps {{.*#+}} ymm14 = ymm14[0],ymm3[1],ymm14[2,3,4],ymm3[5],ymm14[6,7]
; AVX-NEXT: vmovdqa 16(%rsi), %xmm3
; AVX-NEXT: vblendps {{.*#+}} ymm13 = ymm14[0,1],ymm13[2,3],ymm14[4,5],ymm13[6,7]
; AVX-NEXT: vmovups %ymm13, {{[-0-9]+}}(%r{{[sb]}}p) # 32-byte Spill
; AVX-NEXT: vpunpckhwd {{.*#+}} xmm5 = xmm6[4],xmm5[4],xmm6[5],xmm5[5],xmm6[6],xmm5[6],xmm6[7],xmm5[7]
; AVX-NEXT: vpshufd {{.*#+}} xmm6 = xmm5[0,0,0,0]
; AVX-NEXT: vpshufd {{.*#+}} xmm13 = xmm5[0,1,0,1]
; AVX-NEXT: vinsertf128 $1, %xmm13, %ymm6, %ymm6
; AVX-NEXT: vpunpckhwd {{.*#+}} xmm8 = xmm8[4],xmm7[4],xmm8[5],xmm7[5],xmm8[6],xmm7[6],xmm8[7],xmm7[7]
; AVX-NEXT: vpshufd {{.*#+}} xmm7 = xmm8[0,1,0,1]
; AVX-NEXT: vpmovzxdq {{.*#+}} xmm13 = xmm8[0],zero,xmm8[1],zero
; AVX-NEXT: vinsertf128 $1, %xmm13, %ymm7, %ymm13
; AVX-NEXT: vmovdqa 16(%rdi), %xmm7
; AVX-NEXT: vblendps {{.*#+}} ymm13 = ymm13[0,1,2],ymm6[3],ymm13[4,5,6],ymm6[7]
; AVX-NEXT: vmovdqa 16(%rcx), %xmm6
; AVX-NEXT: vpunpckhwd {{.*#+}} xmm9 = xmm10[4],xmm9[4],xmm10[5],xmm9[5],xmm10[6],xmm9[6],xmm10[7],xmm9[7]
; AVX-NEXT: vpshufd {{.*#+}} xmm10 = xmm9[1,1,1,1]
; AVX-NEXT: vinsertf128 $1, %xmm10, %ymm9, %ymm10
; AVX-NEXT: vpunpckhwd {{.*#+}} xmm11 = xmm12[4],xmm11[4],xmm12[5],xmm11[5],xmm12[6],xmm11[6],xmm12[7],xmm11[7]
; AVX-NEXT: vpshufd {{.*#+}} xmm12 = xmm11[0,0,1,1]
; AVX-NEXT: vinsertf128 $1, %xmm11, %ymm12, %ymm12
; AVX-NEXT: vblendps {{.*#+}} ymm10 = ymm10[0],ymm12[1],ymm10[2,3,4],ymm12[5],ymm10[6,7]
; AVX-NEXT: vblendps {{.*#+}} ymm10 = ymm10[0,1],ymm13[2,3],ymm10[4,5],ymm13[6,7]
; AVX-NEXT: vmovups %ymm10, {{[-0-9]+}}(%r{{[sb]}}p) # 32-byte Spill
; AVX-NEXT: vpshufd {{.*#+}} xmm10 = xmm8[2,2,3,3]
; AVX-NEXT: vinsertf128 $1, %xmm10, %ymm8, %ymm8
; AVX-NEXT: vpshufd {{.*#+}} xmm10 = xmm5[2,2,2,2]
; AVX-NEXT: vinsertf128 $1, %xmm5, %ymm10, %ymm5
; AVX-NEXT: vblendps {{.*#+}} ymm5 = ymm8[0,1,2],ymm5[3],ymm8[4,5,6],ymm5[7]
; AVX-NEXT: vpshufd {{.*#+}} xmm8 = xmm11[2,2,3,3]
; AVX-NEXT: vpshufd {{.*#+}} xmm10 = xmm11[2,3,2,3]
; AVX-NEXT: vinsertf128 $1, %xmm10, %ymm8, %ymm8
; AVX-NEXT: vpshufd {{.*#+}} xmm10 = xmm9[2,3,2,3]
; AVX-NEXT: vpshufd {{.*#+}} xmm9 = xmm9[3,3,3,3]
; AVX-NEXT: vinsertf128 $1, %xmm9, %ymm10, %ymm9
; AVX-NEXT: vblendps {{.*#+}} ymm8 = ymm9[0],ymm8[1],ymm9[2,3,4],ymm8[5],ymm9[6,7]
; AVX-NEXT: vblendps {{.*#+}} ymm5 = ymm8[0,1],ymm5[2,3],ymm8[4,5],ymm5[6,7]
; AVX-NEXT: vmovups %ymm5, {{[-0-9]+}}(%r{{[sb]}}p) # 32-byte Spill
; AVX-NEXT: vpunpcklwd {{.*#+}} xmm5 = xmm1[0],xmm0[0],xmm1[1],xmm0[1],xmm1[2],xmm0[2],xmm1[3],xmm0[3]
; AVX-NEXT: vpshufd {{.*#+}} xmm8 = xmm5[0,0,0,0]
; AVX-NEXT: vpshufd {{.*#+}} xmm9 = xmm5[0,1,0,1]
; AVX-NEXT: vinsertf128 $1, %xmm9, %ymm8, %ymm8
; AVX-NEXT: vpunpcklwd {{.*#+}} xmm9 = xmm4[0],xmm2[0],xmm4[1],xmm2[1],xmm4[2],xmm2[2],xmm4[3],xmm2[3]
; AVX-NEXT: vpshufd {{.*#+}} xmm10 = xmm9[0,1,0,1]
; AVX-NEXT: vpmovzxdq {{.*#+}} xmm11 = xmm9[0],zero,xmm9[1],zero
; AVX-NEXT: vinsertf128 $1, %xmm11, %ymm10, %ymm10
; AVX-NEXT: vblendps {{.*#+}} ymm10 = ymm10[0,1,2],ymm8[3],ymm10[4,5,6],ymm8[7]
; AVX-NEXT: vpunpcklwd {{.*#+}} xmm11 = xmm7[0],xmm3[0],xmm7[1],xmm3[1],xmm7[2],xmm3[2],xmm7[3],xmm3[3]
; AVX-NEXT: vpshufd {{.*#+}} xmm8 = xmm11[1,1,1,1]
; AVX-NEXT: vinsertf128 $1, %xmm8, %ymm11, %ymm12
; AVX-NEXT: vmovdqa 16(%rdx), %xmm8
; AVX-NEXT: vpunpcklwd {{.*#+}} xmm13 = xmm8[0],xmm6[0],xmm8[1],xmm6[1],xmm8[2],xmm6[2],xmm8[3],xmm6[3]
; AVX-NEXT: vpshufd {{.*#+}} xmm14 = xmm13[0,0,1,1]
; AVX-NEXT: vinsertf128 $1, %xmm13, %ymm14, %ymm14
; AVX-NEXT: vblendps {{.*#+}} ymm12 = ymm12[0],ymm14[1],ymm12[2,3,4],ymm14[5],ymm12[6,7]
; AVX-NEXT: vblendps {{.*#+}} ymm10 = ymm12[0,1],ymm10[2,3],ymm12[4,5],ymm10[6,7]
; AVX-NEXT: vmovups %ymm10, {{[-0-9]+}}(%r{{[sb]}}p) # 32-byte Spill
; AVX-NEXT: vpshufd {{.*#+}} xmm10 = xmm9[2,2,3,3]
; AVX-NEXT: vinsertf128 $1, %xmm10, %ymm9, %ymm9
; AVX-NEXT: vpshufd {{.*#+}} xmm10 = xmm5[2,2,2,2]
; AVX-NEXT: vinsertf128 $1, %xmm5, %ymm10, %ymm5
; AVX-NEXT: vblendps {{.*#+}} ymm9 = ymm9[0,1,2],ymm5[3],ymm9[4,5,6],ymm5[7]
; AVX-NEXT: vpshufd {{.*#+}} xmm5 = xmm13[2,2,3,3]
; AVX-NEXT: vpshufd {{.*#+}} xmm10 = xmm13[2,3,2,3]
; AVX-NEXT: vinsertf128 $1, %xmm10, %ymm5, %ymm5
; AVX-NEXT: vpshufd {{.*#+}} xmm10 = xmm11[2,3,2,3]
; AVX-NEXT: vpshufd {{.*#+}} xmm11 = xmm11[3,3,3,3]
; AVX-NEXT: vinsertf128 $1, %xmm11, %ymm10, %ymm10
; AVX-NEXT: vblendps {{.*#+}} ymm10 = ymm10[0],ymm5[1],ymm10[2,3,4],ymm5[5],ymm10[6,7]
; AVX-NEXT: vmovdqa 32(%r10), %xmm5
; AVX-NEXT: vblendps {{.*#+}} ymm9 = ymm10[0,1],ymm9[2,3],ymm10[4,5],ymm9[6,7]
; AVX-NEXT: vmovups %ymm9, {{[-0-9]+}}(%r{{[sb]}}p) # 32-byte Spill
; AVX-NEXT: vpunpckhwd {{.*#+}} xmm9 = xmm1[4],xmm0[4],xmm1[5],xmm0[5],xmm1[6],xmm0[6],xmm1[7],xmm0[7]
; AVX-NEXT: vpshufd {{.*#+}} xmm0 = xmm9[0,0,0,0]
; AVX-NEXT: vpshufd {{.*#+}} xmm1 = xmm9[0,1,0,1]
; AVX-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm0
; AVX-NEXT: vpunpckhwd {{.*#+}} xmm4 = xmm4[4],xmm2[4],xmm4[5],xmm2[5],xmm4[6],xmm2[6],xmm4[7],xmm2[7]
; AVX-NEXT: vpshufd {{.*#+}} xmm1 = xmm4[0,1,0,1]
; AVX-NEXT: vpmovzxdq {{.*#+}} xmm2 = xmm4[0],zero,xmm4[1],zero
; AVX-NEXT: vinsertf128 $1, %xmm2, %ymm1, %ymm2
; AVX-NEXT: vmovdqa 32(%rax), %xmm1
; AVX-NEXT: vblendps {{.*#+}} ymm10 = ymm2[0,1,2],ymm0[3],ymm2[4,5,6],ymm0[7]
; AVX-NEXT: vmovdqa 32(%r9), %xmm0
; AVX-NEXT: vpunpckhwd {{.*#+}} xmm3 = xmm7[4],xmm3[4],xmm7[5],xmm3[5],xmm7[6],xmm3[6],xmm7[7],xmm3[7]
; AVX-NEXT: vpshufd {{.*#+}} xmm2 = xmm3[1,1,1,1]
; AVX-NEXT: vinsertf128 $1, %xmm2, %ymm3, %ymm2
; AVX-NEXT: vpunpckhwd {{.*#+}} xmm6 = xmm8[4],xmm6[4],xmm8[5],xmm6[5],xmm8[6],xmm6[6],xmm8[7],xmm6[7]
; AVX-NEXT: vpshufd {{.*#+}} xmm7 = xmm6[0,0,1,1]
; AVX-NEXT: vinsertf128 $1, %xmm6, %ymm7, %ymm7
; AVX-NEXT: vblendps {{.*#+}} ymm7 = ymm2[0],ymm7[1],ymm2[2,3,4],ymm7[5],ymm2[6,7]
; AVX-NEXT: vmovdqa 32(%r8), %xmm2
; AVX-NEXT: vblendps {{.*#+}} ymm7 = ymm7[0,1],ymm10[2,3],ymm7[4,5],ymm10[6,7]
; AVX-NEXT: vmovups %ymm7, {{[-0-9]+}}(%r{{[sb]}}p) # 32-byte Spill
; AVX-NEXT: vpshufd {{.*#+}} xmm7 = xmm4[2,2,3,3]
; AVX-NEXT: vinsertf128 $1, %xmm7, %ymm4, %ymm4
; AVX-NEXT: vpshufd {{.*#+}} xmm7 = xmm9[2,2,2,2]
; AVX-NEXT: vinsertf128 $1, %xmm9, %ymm7, %ymm7
; AVX-NEXT: vblendps {{.*#+}} ymm4 = ymm4[0,1,2],ymm7[3],ymm4[4,5,6],ymm7[7]
; AVX-NEXT: vpshufd {{.*#+}} xmm7 = xmm6[2,2,3,3]
; AVX-NEXT: vpshufd {{.*#+}} xmm6 = xmm6[2,3,2,3]
; AVX-NEXT: vinsertf128 $1, %xmm6, %ymm7, %ymm6
; AVX-NEXT: vpshufd {{.*#+}} xmm7 = xmm3[2,3,2,3]
; AVX-NEXT: vpshufd {{.*#+}} xmm3 = xmm3[3,3,3,3]
; AVX-NEXT: vinsertf128 $1, %xmm3, %ymm7, %ymm3
; AVX-NEXT: vblendps {{.*#+}} ymm3 = ymm3[0],ymm6[1],ymm3[2,3,4],ymm6[5],ymm3[6,7]
; AVX-NEXT: vblendps {{.*#+}} ymm3 = ymm3[0,1],ymm4[2,3],ymm3[4,5],ymm4[6,7]
; AVX-NEXT: vmovups %ymm3, {{[-0-9]+}}(%r{{[sb]}}p) # 32-byte Spill
; AVX-NEXT: vpunpcklwd {{.*#+}} xmm8 = xmm1[0],xmm5[0],xmm1[1],xmm5[1],xmm1[2],xmm5[2],xmm1[3],xmm5[3]
; AVX-NEXT: vpshufd {{.*#+}} xmm3 = xmm8[0,0,0,0]
; AVX-NEXT: vpshufd {{.*#+}} xmm4 = xmm8[0,1,0,1]
; AVX-NEXT: vinsertf128 $1, %xmm4, %ymm3, %ymm3
; AVX-NEXT: vpunpcklwd {{.*#+}} xmm9 = xmm2[0],xmm0[0],xmm2[1],xmm0[1],xmm2[2],xmm0[2],xmm2[3],xmm0[3]
; AVX-NEXT: vpshufd {{.*#+}} xmm4 = xmm9[0,1,0,1]
; AVX-NEXT: vpmovzxdq {{.*#+}} xmm6 = xmm9[0],zero,xmm9[1],zero
; AVX-NEXT: vinsertf128 $1, %xmm6, %ymm4, %ymm4
; AVX-NEXT: vblendps {{.*#+}} ymm10 = ymm4[0,1,2],ymm3[3],ymm4[4,5,6],ymm3[7]
; AVX-NEXT: vmovdqa 32(%rsi), %xmm3
; AVX-NEXT: vmovdqa 32(%rdi), %xmm4
; AVX-NEXT: vpunpcklwd {{.*#+}} xmm11 = xmm4[0],xmm3[0],xmm4[1],xmm3[1],xmm4[2],xmm3[2],xmm4[3],xmm3[3]
; AVX-NEXT: vpshufd {{.*#+}} xmm6 = xmm11[1,1,1,1]
; AVX-NEXT: vinsertf128 $1, %xmm6, %ymm11, %ymm12
; AVX-NEXT: vmovdqa 32(%rcx), %xmm6
; AVX-NEXT: vmovdqa 32(%rdx), %xmm7
; AVX-NEXT: vpunpcklwd {{.*#+}} xmm13 = xmm7[0],xmm6[0],xmm7[1],xmm6[1],xmm7[2],xmm6[2],xmm7[3],xmm6[3]
; AVX-NEXT: vpshufd {{.*#+}} xmm14 = xmm13[0,0,1,1]
; AVX-NEXT: vinsertf128 $1, %xmm13, %ymm14, %ymm14
; AVX-NEXT: vblendps {{.*#+}} ymm12 = ymm12[0],ymm14[1],ymm12[2,3,4],ymm14[5],ymm12[6,7]
; AVX-NEXT: vblendps {{.*#+}} ymm10 = ymm12[0,1],ymm10[2,3],ymm12[4,5],ymm10[6,7]
; AVX-NEXT: vmovups %ymm10, {{[-0-9]+}}(%r{{[sb]}}p) # 32-byte Spill
; AVX-NEXT: vpshufd {{.*#+}} xmm10 = xmm9[2,2,3,3]
; AVX-NEXT: vinsertf128 $1, %xmm10, %ymm9, %ymm9
; AVX-NEXT: vpshufd {{.*#+}} xmm10 = xmm8[2,2,2,2]
; AVX-NEXT: vinsertf128 $1, %xmm8, %ymm10, %ymm8
; AVX-NEXT: vblendps {{.*#+}} ymm8 = ymm9[0,1,2],ymm8[3],ymm9[4,5,6],ymm8[7]
; AVX-NEXT: vpshufd {{.*#+}} xmm9 = xmm13[2,2,3,3]
; AVX-NEXT: vpshufd {{.*#+}} xmm10 = xmm13[2,3,2,3]
; AVX-NEXT: vinsertf128 $1, %xmm10, %ymm9, %ymm9
; AVX-NEXT: vpshufd {{.*#+}} xmm10 = xmm11[2,3,2,3]
; AVX-NEXT: vpshufd {{.*#+}} xmm11 = xmm11[3,3,3,3]
; AVX-NEXT: vinsertf128 $1, %xmm11, %ymm10, %ymm10
; AVX-NEXT: vblendps {{.*#+}} ymm9 = ymm10[0],ymm9[1],ymm10[2,3,4],ymm9[5],ymm10[6,7]
; AVX-NEXT: vblendps {{.*#+}} ymm8 = ymm9[0,1],ymm8[2,3],ymm9[4,5],ymm8[6,7]
; AVX-NEXT: vmovups %ymm8, {{[-0-9]+}}(%r{{[sb]}}p) # 32-byte Spill
; AVX-NEXT: vpunpckhwd {{.*#+}} xmm1 = xmm1[4],xmm5[4],xmm1[5],xmm5[5],xmm1[6],xmm5[6],xmm1[7],xmm5[7]
; AVX-NEXT: vpshufd {{.*#+}} xmm5 = xmm1[0,0,0,0]
; AVX-NEXT: vpshufd {{.*#+}} xmm8 = xmm1[0,1,0,1]
; AVX-NEXT: vinsertf128 $1, %xmm8, %ymm5, %ymm5
; AVX-NEXT: vpunpckhwd {{.*#+}} xmm0 = xmm2[4],xmm0[4],xmm2[5],xmm0[5],xmm2[6],xmm0[6],xmm2[7],xmm0[7]
; AVX-NEXT: vpshufd {{.*#+}} xmm2 = xmm0[0,1,0,1]
; AVX-NEXT: vpmovzxdq {{.*#+}} xmm8 = xmm0[0],zero,xmm0[1],zero
; AVX-NEXT: vinsertf128 $1, %xmm8, %ymm2, %ymm2
; AVX-NEXT: vblendps {{.*#+}} ymm2 = ymm2[0,1,2],ymm5[3],ymm2[4,5,6],ymm5[7]
; AVX-NEXT: vpunpckhwd {{.*#+}} xmm3 = xmm4[4],xmm3[4],xmm4[5],xmm3[5],xmm4[6],xmm3[6],xmm4[7],xmm3[7]
; AVX-NEXT: vpunpckhwd {{.*#+}} xmm4 = xmm7[4],xmm6[4],xmm7[5],xmm6[5],xmm7[6],xmm6[6],xmm7[7],xmm6[7]
; AVX-NEXT: vpshufd {{.*#+}} xmm5 = xmm3[1,1,1,1]
; AVX-NEXT: vinsertf128 $1, %xmm5, %ymm3, %ymm5
; AVX-NEXT: vpshufd {{.*#+}} xmm6 = xmm4[0,0,1,1]
; AVX-NEXT: vinsertf128 $1, %xmm4, %ymm6, %ymm6
; AVX-NEXT: vblendps {{.*#+}} ymm5 = ymm5[0],ymm6[1],ymm5[2,3,4],ymm6[5],ymm5[6,7]
; AVX-NEXT: vblendps {{.*#+}} ymm2 = ymm5[0,1],ymm2[2,3],ymm5[4,5],ymm2[6,7]
; AVX-NEXT: vmovups %ymm2, {{[-0-9]+}}(%r{{[sb]}}p) # 32-byte Spill
; AVX-NEXT: vpshufd {{.*#+}} xmm2 = xmm0[2,2,3,3]
; AVX-NEXT: vinsertf128 $1, %xmm2, %ymm0, %ymm2
; AVX-NEXT: vpshufd {{.*#+}} xmm0 = xmm1[2,2,2,2]
; AVX-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm1
; AVX-NEXT: vmovdqa 48(%r10), %xmm0
; AVX-NEXT: vblendps {{.*#+}} ymm2 = ymm2[0,1,2],ymm1[3],ymm2[4,5,6],ymm1[7]
; AVX-NEXT: vpshufd {{.*#+}} xmm1 = xmm4[2,2,3,3]
; AVX-NEXT: vpshufd {{.*#+}} xmm4 = xmm4[2,3,2,3]
; AVX-NEXT: vinsertf128 $1, %xmm4, %ymm1, %ymm4
; AVX-NEXT: vpshufd {{.*#+}} xmm1 = xmm3[2,3,2,3]
; AVX-NEXT: vpshufd {{.*#+}} xmm3 = xmm3[3,3,3,3]
; AVX-NEXT: vinsertf128 $1, %xmm3, %ymm1, %ymm3
; AVX-NEXT: vmovdqa 48(%rax), %xmm1
; AVX-NEXT: vblendps {{.*#+}} ymm3 = ymm3[0],ymm4[1],ymm3[2,3,4],ymm4[5],ymm3[6,7]
; AVX-NEXT: vblendps {{.*#+}} ymm2 = ymm3[0,1],ymm2[2,3],ymm3[4,5],ymm2[6,7]
; AVX-NEXT: vmovups %ymm2, {{[-0-9]+}}(%r{{[sb]}}p) # 32-byte Spill
; AVX-NEXT: vpunpcklwd {{.*#+}} xmm8 = xmm1[0],xmm0[0],xmm1[1],xmm0[1],xmm1[2],xmm0[2],xmm1[3],xmm0[3]
; AVX-NEXT: vpshufd {{.*#+}} xmm2 = xmm8[0,0,0,0]
; AVX-NEXT: vpshufd {{.*#+}} xmm3 = xmm8[0,1,0,1]
; AVX-NEXT: vinsertf128 $1, %xmm3, %ymm2, %ymm4
; AVX-NEXT: vmovdqa 48(%r9), %xmm2
; AVX-NEXT: vmovdqa 48(%r8), %xmm3
; AVX-NEXT: vpunpcklwd {{.*#+}} xmm9 = xmm3[0],xmm2[0],xmm3[1],xmm2[1],xmm3[2],xmm2[2],xmm3[3],xmm2[3]
; AVX-NEXT: vpshufd {{.*#+}} xmm5 = xmm9[0,1,0,1]
; AVX-NEXT: vpmovzxdq {{.*#+}} xmm6 = xmm9[0],zero,xmm9[1],zero
; AVX-NEXT: vinsertf128 $1, %xmm6, %ymm5, %ymm5
; AVX-NEXT: vblendps {{.*#+}} ymm10 = ymm5[0,1,2],ymm4[3],ymm5[4,5,6],ymm4[7]
; AVX-NEXT: vmovdqa 48(%rsi), %xmm4
; AVX-NEXT: vmovdqa 48(%rdi), %xmm5
; AVX-NEXT: vpunpcklwd {{.*#+}} xmm11 = xmm5[0],xmm4[0],xmm5[1],xmm4[1],xmm5[2],xmm4[2],xmm5[3],xmm4[3]
; AVX-NEXT: vpshufd {{.*#+}} xmm6 = xmm11[1,1,1,1]
; AVX-NEXT: vinsertf128 $1, %xmm6, %ymm11, %ymm12
; AVX-NEXT: vmovdqa 48(%rcx), %xmm6
; AVX-NEXT: vmovdqa 48(%rdx), %xmm7
; AVX-NEXT: vpunpcklwd {{.*#+}} xmm13 = xmm7[0],xmm6[0],xmm7[1],xmm6[1],xmm7[2],xmm6[2],xmm7[3],xmm6[3]
; AVX-NEXT: vpshufd {{.*#+}} xmm14 = xmm13[0,0,1,1]
; AVX-NEXT: vinsertf128 $1, %xmm13, %ymm14, %ymm14
; AVX-NEXT: vblendps {{.*#+}} ymm12 = ymm12[0],ymm14[1],ymm12[2,3,4],ymm14[5],ymm12[6,7]
; AVX-NEXT: vblendps {{.*#+}} ymm10 = ymm12[0,1],ymm10[2,3],ymm12[4,5],ymm10[6,7]
; AVX-NEXT: vmovups %ymm10, {{[-0-9]+}}(%r{{[sb]}}p) # 32-byte Spill
; AVX-NEXT: vpshufd {{.*#+}} xmm10 = xmm9[2,2,3,3]
; AVX-NEXT: vinsertf128 $1, %xmm10, %ymm9, %ymm9
; AVX-NEXT: vpshufd {{.*#+}} xmm10 = xmm8[2,2,2,2]
; AVX-NEXT: vinsertf128 $1, %xmm8, %ymm10, %ymm8
; AVX-NEXT: vblendps {{.*#+}} ymm8 = ymm9[0,1,2],ymm8[3],ymm9[4,5,6],ymm8[7]
; AVX-NEXT: vpshufd {{.*#+}} xmm9 = xmm13[2,2,3,3]
; AVX-NEXT: vpshufd {{.*#+}} xmm10 = xmm13[2,3,2,3]
; AVX-NEXT: vinsertf128 $1, %xmm10, %ymm9, %ymm9
; AVX-NEXT: vpshufd {{.*#+}} xmm10 = xmm11[2,3,2,3]
; AVX-NEXT: vpshufd {{.*#+}} xmm11 = xmm11[3,3,3,3]
; AVX-NEXT: vinsertf128 $1, %xmm11, %ymm10, %ymm10
; AVX-NEXT: vblendps {{.*#+}} ymm9 = ymm10[0],ymm9[1],ymm10[2,3,4],ymm9[5],ymm10[6,7]
; AVX-NEXT: vblendps {{.*#+}} ymm8 = ymm9[0,1],ymm8[2,3],ymm9[4,5],ymm8[6,7]
; AVX-NEXT: vmovups %ymm8, {{[-0-9]+}}(%r{{[sb]}}p) # 32-byte Spill
; AVX-NEXT: vpunpckhwd {{.*#+}} xmm0 = xmm1[4],xmm0[4],xmm1[5],xmm0[5],xmm1[6],xmm0[6],xmm1[7],xmm0[7]
; AVX-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[0,0,0,0]
; AVX-NEXT: vpshufd {{.*#+}} xmm8 = xmm0[0,1,0,1]
; AVX-NEXT: vinsertf128 $1, %xmm8, %ymm1, %ymm1
; AVX-NEXT: vpunpckhwd {{.*#+}} xmm2 = xmm3[4],xmm2[4],xmm3[5],xmm2[5],xmm3[6],xmm2[6],xmm3[7],xmm2[7]
; AVX-NEXT: vpshufd {{.*#+}} xmm3 = xmm2[0,1,0,1]
; AVX-NEXT: vpmovzxdq {{.*#+}} xmm8 = xmm2[0],zero,xmm2[1],zero
; AVX-NEXT: vinsertf128 $1, %xmm8, %ymm3, %ymm3
; AVX-NEXT: vblendps {{.*#+}} ymm1 = ymm3[0,1,2],ymm1[3],ymm3[4,5,6],ymm1[7]
; AVX-NEXT: vpunpckhwd {{.*#+}} xmm3 = xmm5[4],xmm4[4],xmm5[5],xmm4[5],xmm5[6],xmm4[6],xmm5[7],xmm4[7]
; AVX-NEXT: vpunpckhwd {{.*#+}} xmm4 = xmm7[4],xmm6[4],xmm7[5],xmm6[5],xmm7[6],xmm6[6],xmm7[7],xmm6[7]
; AVX-NEXT: vpshufd {{.*#+}} xmm5 = xmm3[1,1,1,1]
; AVX-NEXT: vinsertf128 $1, %xmm5, %ymm3, %ymm5
; AVX-NEXT: vpshufd {{.*#+}} xmm6 = xmm4[0,0,1,1]
; AVX-NEXT: vinsertf128 $1, %xmm4, %ymm6, %ymm6
; AVX-NEXT: vblendps {{.*#+}} ymm5 = ymm5[0],ymm6[1],ymm5[2,3,4],ymm6[5],ymm5[6,7]
; AVX-NEXT: vblendps {{.*#+}} ymm1 = ymm5[0,1],ymm1[2,3],ymm5[4,5],ymm1[6,7]
; AVX-NEXT: vmovups %ymm1, {{[-0-9]+}}(%r{{[sb]}}p) # 32-byte Spill
; AVX-NEXT: vpshufd {{.*#+}} xmm1 = xmm2[2,2,3,3]
; AVX-NEXT: vinsertf128 $1, %xmm1, %ymm2, %ymm1
; AVX-NEXT: vpshufd {{.*#+}} xmm2 = xmm0[2,2,2,2]
; AVX-NEXT: vinsertf128 $1, %xmm0, %ymm2, %ymm0
; AVX-NEXT: vblendps {{.*#+}} ymm0 = ymm1[0,1,2],ymm0[3],ymm1[4,5,6],ymm0[7]
; AVX-NEXT: vpshufd {{.*#+}} xmm1 = xmm4[2,2,3,3]
; AVX-NEXT: vpshufd {{.*#+}} xmm2 = xmm4[2,3,2,3]
; AVX-NEXT: vinsertf128 $1, %xmm2, %ymm1, %ymm1
; AVX-NEXT: vpshufd {{.*#+}} xmm2 = xmm3[2,3,2,3]
; AVX-NEXT: vpshufd {{.*#+}} xmm3 = xmm3[3,3,3,3]
; AVX-NEXT: vinsertf128 $1, %xmm3, %ymm2, %ymm2
; AVX-NEXT: vblendps {{.*#+}} ymm1 = ymm2[0],ymm1[1],ymm2[2,3,4],ymm1[5],ymm2[6,7]
; AVX-NEXT: vblendps {{.*#+}} ymm0 = ymm1[0,1],ymm0[2,3],ymm1[4,5],ymm0[6,7]
; AVX-NEXT: vmovups %ymm0, {{[-0-9]+}}(%r{{[sb]}}p) # 32-byte Spill
; AVX-NEXT: vmovdqa 64(%r10), %xmm0
; AVX-NEXT: vmovdqa 64(%rax), %xmm1
; AVX-NEXT: vpunpcklwd {{.*#+}} xmm8 = xmm1[0],xmm0[0],xmm1[1],xmm0[1],xmm1[2],xmm0[2],xmm1[3],xmm0[3]
; AVX-NEXT: vpshufd {{.*#+}} xmm2 = xmm8[0,0,0,0]
; AVX-NEXT: vpshufd {{.*#+}} xmm3 = xmm8[0,1,0,1]
; AVX-NEXT: vinsertf128 $1, %xmm3, %ymm2, %ymm4
; AVX-NEXT: vmovdqa 64(%r9), %xmm2
; AVX-NEXT: vmovdqa 64(%r8), %xmm3
; AVX-NEXT: vpunpcklwd {{.*#+}} xmm9 = xmm3[0],xmm2[0],xmm3[1],xmm2[1],xmm3[2],xmm2[2],xmm3[3],xmm2[3]
; AVX-NEXT: vpshufd {{.*#+}} xmm5 = xmm9[0,1,0,1]
; AVX-NEXT: vpmovzxdq {{.*#+}} xmm6 = xmm9[0],zero,xmm9[1],zero
; AVX-NEXT: vinsertf128 $1, %xmm6, %ymm5, %ymm5
; AVX-NEXT: vblendps {{.*#+}} ymm10 = ymm5[0,1,2],ymm4[3],ymm5[4,5,6],ymm4[7]
; AVX-NEXT: vmovdqa 64(%rsi), %xmm4
; AVX-NEXT: vmovdqa 64(%rdi), %xmm5
; AVX-NEXT: vpunpcklwd {{.*#+}} xmm11 = xmm5[0],xmm4[0],xmm5[1],xmm4[1],xmm5[2],xmm4[2],xmm5[3],xmm4[3]
; AVX-NEXT: vpshufd {{.*#+}} xmm6 = xmm11[1,1,1,1]
; AVX-NEXT: vinsertf128 $1, %xmm6, %ymm11, %ymm12
; AVX-NEXT: vmovdqa 64(%rcx), %xmm6
; AVX-NEXT: vmovdqa 64(%rdx), %xmm7
; AVX-NEXT: vpunpcklwd {{.*#+}} xmm13 = xmm7[0],xmm6[0],xmm7[1],xmm6[1],xmm7[2],xmm6[2],xmm7[3],xmm6[3]
; AVX-NEXT: vpshufd {{.*#+}} xmm14 = xmm13[0,0,1,1]
; AVX-NEXT: vinsertf128 $1, %xmm13, %ymm14, %ymm14
; AVX-NEXT: vblendps {{.*#+}} ymm12 = ymm12[0],ymm14[1],ymm12[2,3,4],ymm14[5],ymm12[6,7]
; AVX-NEXT: vblendps {{.*#+}} ymm10 = ymm12[0,1],ymm10[2,3],ymm12[4,5],ymm10[6,7]
; AVX-NEXT: vmovups %ymm10, {{[-0-9]+}}(%r{{[sb]}}p) # 32-byte Spill
; AVX-NEXT: vpshufd {{.*#+}} xmm10 = xmm9[2,2,3,3]
; AVX-NEXT: vinsertf128 $1, %xmm10, %ymm9, %ymm9
; AVX-NEXT: vpshufd {{.*#+}} xmm10 = xmm8[2,2,2,2]
; AVX-NEXT: vinsertf128 $1, %xmm8, %ymm10, %ymm8
; AVX-NEXT: vblendps {{.*#+}} ymm8 = ymm9[0,1,2],ymm8[3],ymm9[4,5,6],ymm8[7]
; AVX-NEXT: vpshufd {{.*#+}} xmm9 = xmm13[2,2,3,3]
; AVX-NEXT: vpshufd {{.*#+}} xmm10 = xmm13[2,3,2,3]
; AVX-NEXT: vinsertf128 $1, %xmm10, %ymm9, %ymm9
; AVX-NEXT: vpshufd {{.*#+}} xmm10 = xmm11[2,3,2,3]
; AVX-NEXT: vpshufd {{.*#+}} xmm11 = xmm11[3,3,3,3]
; AVX-NEXT: vinsertf128 $1, %xmm11, %ymm10, %ymm10
; AVX-NEXT: vblendps {{.*#+}} ymm9 = ymm10[0],ymm9[1],ymm10[2,3,4],ymm9[5],ymm10[6,7]
; AVX-NEXT: vblendps {{.*#+}} ymm8 = ymm9[0,1],ymm8[2,3],ymm9[4,5],ymm8[6,7]
; AVX-NEXT: vmovups %ymm8, {{[-0-9]+}}(%r{{[sb]}}p) # 32-byte Spill
; AVX-NEXT: vpunpckhwd {{.*#+}} xmm0 = xmm1[4],xmm0[4],xmm1[5],xmm0[5],xmm1[6],xmm0[6],xmm1[7],xmm0[7]
; AVX-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[0,0,0,0]
; AVX-NEXT: vpshufd {{.*#+}} xmm8 = xmm0[0,1,0,1]
; AVX-NEXT: vinsertf128 $1, %xmm8, %ymm1, %ymm1
; AVX-NEXT: vpunpckhwd {{.*#+}} xmm2 = xmm3[4],xmm2[4],xmm3[5],xmm2[5],xmm3[6],xmm2[6],xmm3[7],xmm2[7]
; AVX-NEXT: vpshufd {{.*#+}} xmm3 = xmm2[0,1,0,1]
; AVX-NEXT: vpmovzxdq {{.*#+}} xmm8 = xmm2[0],zero,xmm2[1],zero
; AVX-NEXT: vinsertf128 $1, %xmm8, %ymm3, %ymm3
; AVX-NEXT: vblendps {{.*#+}} ymm1 = ymm3[0,1,2],ymm1[3],ymm3[4,5,6],ymm1[7]
; AVX-NEXT: vpunpckhwd {{.*#+}} xmm3 = xmm5[4],xmm4[4],xmm5[5],xmm4[5],xmm5[6],xmm4[6],xmm5[7],xmm4[7]
; AVX-NEXT: vpunpckhwd {{.*#+}} xmm4 = xmm7[4],xmm6[4],xmm7[5],xmm6[5],xmm7[6],xmm6[6],xmm7[7],xmm6[7]
; AVX-NEXT: vpshufd {{.*#+}} xmm5 = xmm3[1,1,1,1]
; AVX-NEXT: vinsertf128 $1, %xmm5, %ymm3, %ymm5
; AVX-NEXT: vpshufd {{.*#+}} xmm6 = xmm4[0,0,1,1]
; AVX-NEXT: vinsertf128 $1, %xmm4, %ymm6, %ymm6
; AVX-NEXT: vblendps {{.*#+}} ymm5 = ymm5[0],ymm6[1],ymm5[2,3,4],ymm6[5],ymm5[6,7]
; AVX-NEXT: vblendps {{.*#+}} ymm1 = ymm5[0,1],ymm1[2,3],ymm5[4,5],ymm1[6,7]
; AVX-NEXT: vmovups %ymm1, {{[-0-9]+}}(%r{{[sb]}}p) # 32-byte Spill
; AVX-NEXT: vpshufd {{.*#+}} xmm1 = xmm2[2,2,3,3]
; AVX-NEXT: vinsertf128 $1, %xmm1, %ymm2, %ymm1
; AVX-NEXT: vpshufd {{.*#+}} xmm2 = xmm0[2,2,2,2]
; AVX-NEXT: vinsertf128 $1, %xmm0, %ymm2, %ymm0
; AVX-NEXT: vblendps {{.*#+}} ymm0 = ymm1[0,1,2],ymm0[3],ymm1[4,5,6],ymm0[7]
; AVX-NEXT: vpshufd {{.*#+}} xmm1 = xmm4[2,2,3,3]
; AVX-NEXT: vpshufd {{.*#+}} xmm2 = xmm4[2,3,2,3]
; AVX-NEXT: vinsertf128 $1, %xmm2, %ymm1, %ymm1
; AVX-NEXT: vpshufd {{.*#+}} xmm2 = xmm3[2,3,2,3]
; AVX-NEXT: vpshufd {{.*#+}} xmm3 = xmm3[3,3,3,3]
; AVX-NEXT: vinsertf128 $1, %xmm3, %ymm2, %ymm2
; AVX-NEXT: vblendps {{.*#+}} ymm1 = ymm2[0],ymm1[1],ymm2[2,3,4],ymm1[5],ymm2[6,7]
; AVX-NEXT: vblendps {{.*#+}} ymm0 = ymm1[0,1],ymm0[2,3],ymm1[4,5],ymm0[6,7]
; AVX-NEXT: vmovups %ymm0, {{[-0-9]+}}(%r{{[sb]}}p) # 32-byte Spill
; AVX-NEXT: vmovdqa 80(%r10), %xmm0
; AVX-NEXT: vmovdqa 80(%rax), %xmm1
; AVX-NEXT: vpunpcklwd {{.*#+}} xmm8 = xmm1[0],xmm0[0],xmm1[1],xmm0[1],xmm1[2],xmm0[2],xmm1[3],xmm0[3]
; AVX-NEXT: vpshufd {{.*#+}} xmm2 = xmm8[0,0,0,0]
; AVX-NEXT: vpshufd {{.*#+}} xmm3 = xmm8[0,1,0,1]
; AVX-NEXT: vinsertf128 $1, %xmm3, %ymm2, %ymm4
; AVX-NEXT: vmovdqa 80(%r9), %xmm2
; AVX-NEXT: vmovdqa 80(%r8), %xmm3
; AVX-NEXT: vpunpcklwd {{.*#+}} xmm9 = xmm3[0],xmm2[0],xmm3[1],xmm2[1],xmm3[2],xmm2[2],xmm3[3],xmm2[3]
; AVX-NEXT: vpshufd {{.*#+}} xmm5 = xmm9[0,1,0,1]
; AVX-NEXT: vpmovzxdq {{.*#+}} xmm6 = xmm9[0],zero,xmm9[1],zero
; AVX-NEXT: vinsertf128 $1, %xmm6, %ymm5, %ymm5
; AVX-NEXT: vblendps {{.*#+}} ymm10 = ymm5[0,1,2],ymm4[3],ymm5[4,5,6],ymm4[7]
; AVX-NEXT: vmovdqa 80(%rsi), %xmm4
; AVX-NEXT: vmovdqa 80(%rdi), %xmm5
; AVX-NEXT: vpunpcklwd {{.*#+}} xmm11 = xmm5[0],xmm4[0],xmm5[1],xmm4[1],xmm5[2],xmm4[2],xmm5[3],xmm4[3]
; AVX-NEXT: vpshufd {{.*#+}} xmm6 = xmm11[1,1,1,1]
; AVX-NEXT: vinsertf128 $1, %xmm6, %ymm11, %ymm12
; AVX-NEXT: vmovdqa 80(%rcx), %xmm6
; AVX-NEXT: vmovdqa 80(%rdx), %xmm7
; AVX-NEXT: vpunpcklwd {{.*#+}} xmm13 = xmm7[0],xmm6[0],xmm7[1],xmm6[1],xmm7[2],xmm6[2],xmm7[3],xmm6[3]
; AVX-NEXT: vpshufd {{.*#+}} xmm14 = xmm13[0,0,1,1]
; AVX-NEXT: vinsertf128 $1, %xmm13, %ymm14, %ymm14
; AVX-NEXT: vblendps {{.*#+}} ymm12 = ymm12[0],ymm14[1],ymm12[2,3,4],ymm14[5],ymm12[6,7]
; AVX-NEXT: vblendps {{.*#+}} ymm10 = ymm12[0,1],ymm10[2,3],ymm12[4,5],ymm10[6,7]
; AVX-NEXT: vmovups %ymm10, {{[-0-9]+}}(%r{{[sb]}}p) # 32-byte Spill
; AVX-NEXT: vpshufd {{.*#+}} xmm10 = xmm9[2,2,3,3]
; AVX-NEXT: vinsertf128 $1, %xmm10, %ymm9, %ymm9
; AVX-NEXT: vpshufd {{.*#+}} xmm10 = xmm8[2,2,2,2]
; AVX-NEXT: vinsertf128 $1, %xmm8, %ymm10, %ymm8
; AVX-NEXT: vblendps {{.*#+}} ymm8 = ymm9[0,1,2],ymm8[3],ymm9[4,5,6],ymm8[7]
; AVX-NEXT: vpshufd {{.*#+}} xmm9 = xmm13[2,2,3,3]
; AVX-NEXT: vpshufd {{.*#+}} xmm10 = xmm13[2,3,2,3]
; AVX-NEXT: vinsertf128 $1, %xmm10, %ymm9, %ymm9
; AVX-NEXT: vpshufd {{.*#+}} xmm10 = xmm11[2,3,2,3]
; AVX-NEXT: vpshufd {{.*#+}} xmm11 = xmm11[3,3,3,3]
; AVX-NEXT: vinsertf128 $1, %xmm11, %ymm10, %ymm10
; AVX-NEXT: vblendps {{.*#+}} ymm9 = ymm10[0],ymm9[1],ymm10[2,3,4],ymm9[5],ymm10[6,7]
; AVX-NEXT: vblendps {{.*#+}} ymm8 = ymm9[0,1],ymm8[2,3],ymm9[4,5],ymm8[6,7]
; AVX-NEXT: vmovups %ymm8, {{[-0-9]+}}(%r{{[sb]}}p) # 32-byte Spill
; AVX-NEXT: vpunpckhwd {{.*#+}} xmm0 = xmm1[4],xmm0[4],xmm1[5],xmm0[5],xmm1[6],xmm0[6],xmm1[7],xmm0[7]
; AVX-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[0,0,0,0]
; AVX-NEXT: vpshufd {{.*#+}} xmm8 = xmm0[0,1,0,1]
; AVX-NEXT: vinsertf128 $1, %xmm8, %ymm1, %ymm1
; AVX-NEXT: vpunpckhwd {{.*#+}} xmm2 = xmm3[4],xmm2[4],xmm3[5],xmm2[5],xmm3[6],xmm2[6],xmm3[7],xmm2[7]
; AVX-NEXT: vpshufd {{.*#+}} xmm3 = xmm2[0,1,0,1]
; AVX-NEXT: vpmovzxdq {{.*#+}} xmm8 = xmm2[0],zero,xmm2[1],zero
; AVX-NEXT: vinsertf128 $1, %xmm8, %ymm3, %ymm3
; AVX-NEXT: vblendps {{.*#+}} ymm1 = ymm3[0,1,2],ymm1[3],ymm3[4,5,6],ymm1[7]
; AVX-NEXT: vpunpckhwd {{.*#+}} xmm3 = xmm5[4],xmm4[4],xmm5[5],xmm4[5],xmm5[6],xmm4[6],xmm5[7],xmm4[7]
; AVX-NEXT: vpunpckhwd {{.*#+}} xmm4 = xmm7[4],xmm6[4],xmm7[5],xmm6[5],xmm7[6],xmm6[6],xmm7[7],xmm6[7]
; AVX-NEXT: vpshufd {{.*#+}} xmm5 = xmm3[1,1,1,1]
; AVX-NEXT: vinsertf128 $1, %xmm5, %ymm3, %ymm5
; AVX-NEXT: vpshufd {{.*#+}} xmm6 = xmm4[0,0,1,1]
; AVX-NEXT: vinsertf128 $1, %xmm4, %ymm6, %ymm6
; AVX-NEXT: vblendps {{.*#+}} ymm5 = ymm5[0],ymm6[1],ymm5[2,3,4],ymm6[5],ymm5[6,7]
; AVX-NEXT: vblendps {{.*#+}} ymm1 = ymm5[0,1],ymm1[2,3],ymm5[4,5],ymm1[6,7]
; AVX-NEXT: vmovups %ymm1, (%rsp) # 32-byte Spill
; AVX-NEXT: vpshufd {{.*#+}} xmm1 = xmm2[2,2,3,3]
; AVX-NEXT: vinsertf128 $1, %xmm1, %ymm2, %ymm1
; AVX-NEXT: vpshufd {{.*#+}} xmm2 = xmm0[2,2,2,2]
; AVX-NEXT: vinsertf128 $1, %xmm0, %ymm2, %ymm0
; AVX-NEXT: vblendps {{.*#+}} ymm0 = ymm1[0,1,2],ymm0[3],ymm1[4,5,6],ymm0[7]
; AVX-NEXT: vpshufd {{.*#+}} xmm1 = xmm4[2,2,3,3]
; AVX-NEXT: vpshufd {{.*#+}} xmm2 = xmm4[2,3,2,3]
; AVX-NEXT: vinsertf128 $1, %xmm2, %ymm1, %ymm1
; AVX-NEXT: vpshufd {{.*#+}} xmm2 = xmm3[2,3,2,3]
; AVX-NEXT: vpshufd {{.*#+}} xmm3 = xmm3[3,3,3,3]
; AVX-NEXT: vinsertf128 $1, %xmm3, %ymm2, %ymm2
; AVX-NEXT: vblendps {{.*#+}} ymm1 = ymm2[0],ymm1[1],ymm2[2,3,4],ymm1[5],ymm2[6,7]
; AVX-NEXT: vblendps {{.*#+}} ymm0 = ymm1[0,1],ymm0[2,3],ymm1[4,5],ymm0[6,7]
; AVX-NEXT: vmovups %ymm0, {{[-0-9]+}}(%r{{[sb]}}p) # 32-byte Spill
; AVX-NEXT: vmovdqa 96(%r10), %xmm13
; AVX-NEXT: vmovdqa 96(%rax), %xmm1
; AVX-NEXT: vpunpcklwd {{.*#+}} xmm8 = xmm1[0],xmm13[0],xmm1[1],xmm13[1],xmm1[2],xmm13[2],xmm1[3],xmm13[3]
; AVX-NEXT: vpshufd {{.*#+}} xmm2 = xmm8[0,0,0,0]
; AVX-NEXT: vpshufd {{.*#+}} xmm3 = xmm8[0,1,0,1]
; AVX-NEXT: vinsertf128 $1, %xmm3, %ymm2, %ymm4
; AVX-NEXT: vmovdqa 96(%r9), %xmm2
; AVX-NEXT: vmovdqa 96(%r8), %xmm3
; AVX-NEXT: vpunpcklwd {{.*#+}} xmm9 = xmm3[0],xmm2[0],xmm3[1],xmm2[1],xmm3[2],xmm2[2],xmm3[3],xmm2[3]
; AVX-NEXT: vpshufd {{.*#+}} xmm5 = xmm9[0,1,0,1]
; AVX-NEXT: vpmovzxdq {{.*#+}} xmm6 = xmm9[0],zero,xmm9[1],zero
; AVX-NEXT: vinsertf128 $1, %xmm6, %ymm5, %ymm5
; AVX-NEXT: vblendps {{.*#+}} ymm10 = ymm5[0,1,2],ymm4[3],ymm5[4,5,6],ymm4[7]
; AVX-NEXT: vmovdqa 96(%rsi), %xmm4
; AVX-NEXT: vmovdqa 96(%rdi), %xmm5
; AVX-NEXT: vpunpcklwd {{.*#+}} xmm11 = xmm5[0],xmm4[0],xmm5[1],xmm4[1],xmm5[2],xmm4[2],xmm5[3],xmm4[3]
; AVX-NEXT: vpshufd {{.*#+}} xmm6 = xmm11[1,1,1,1]
; AVX-NEXT: vinsertf128 $1, %xmm6, %ymm11, %ymm12
; AVX-NEXT: vmovdqa 96(%rcx), %xmm6
; AVX-NEXT: vmovdqa 96(%rdx), %xmm7
; AVX-NEXT: vpunpcklwd {{.*#+}} xmm0 = xmm7[0],xmm6[0],xmm7[1],xmm6[1],xmm7[2],xmm6[2],xmm7[3],xmm6[3]
; AVX-NEXT: vpshufd {{.*#+}} xmm14 = xmm0[0,0,1,1]
; AVX-NEXT: vinsertf128 $1, %xmm0, %ymm14, %ymm14
; AVX-NEXT: vblendps {{.*#+}} ymm12 = ymm12[0],ymm14[1],ymm12[2,3,4],ymm14[5],ymm12[6,7]
; AVX-NEXT: vblendps {{.*#+}} ymm10 = ymm12[0,1],ymm10[2,3],ymm12[4,5],ymm10[6,7]
; AVX-NEXT: vmovups %ymm10, {{[-0-9]+}}(%r{{[sb]}}p) # 32-byte Spill
; AVX-NEXT: vpshufd {{.*#+}} xmm10 = xmm9[2,2,3,3]
; AVX-NEXT: vinsertf128 $1, %xmm10, %ymm9, %ymm9
; AVX-NEXT: vpshufd {{.*#+}} xmm10 = xmm8[2,2,2,2]
; AVX-NEXT: vinsertf128 $1, %xmm8, %ymm10, %ymm8
; AVX-NEXT: vblendps {{.*#+}} ymm8 = ymm9[0,1,2],ymm8[3],ymm9[4,5,6],ymm8[7]
; AVX-NEXT: vpshufd {{.*#+}} xmm9 = xmm0[2,2,3,3]
; AVX-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[2,3,2,3]
; AVX-NEXT: vinsertf128 $1, %xmm0, %ymm9, %ymm0
; AVX-NEXT: vpshufd {{.*#+}} xmm9 = xmm11[2,3,2,3]
; AVX-NEXT: vpshufd {{.*#+}} xmm10 = xmm11[3,3,3,3]
; AVX-NEXT: vinsertf128 $1, %xmm10, %ymm9, %ymm9
; AVX-NEXT: vblendps {{.*#+}} ymm0 = ymm9[0],ymm0[1],ymm9[2,3,4],ymm0[5],ymm9[6,7]
; AVX-NEXT: vblendps {{.*#+}} ymm0 = ymm0[0,1],ymm8[2,3],ymm0[4,5],ymm8[6,7]
; AVX-NEXT: vmovups %ymm0, {{[-0-9]+}}(%r{{[sb]}}p) # 32-byte Spill
; AVX-NEXT: vpunpckhwd {{.*#+}} xmm0 = xmm1[4],xmm13[4],xmm1[5],xmm13[5],xmm1[6],xmm13[6],xmm1[7],xmm13[7]
; AVX-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[0,0,0,0]
; AVX-NEXT: vpshufd {{.*#+}} xmm8 = xmm0[0,1,0,1]
; AVX-NEXT: vinsertf128 $1, %xmm8, %ymm1, %ymm1
; AVX-NEXT: vpunpckhwd {{.*#+}} xmm2 = xmm3[4],xmm2[4],xmm3[5],xmm2[5],xmm3[6],xmm2[6],xmm3[7],xmm2[7]
; AVX-NEXT: vpshufd {{.*#+}} xmm3 = xmm2[0,1,0,1]
; AVX-NEXT: vpmovzxdq {{.*#+}} xmm8 = xmm2[0],zero,xmm2[1],zero
; AVX-NEXT: vinsertf128 $1, %xmm8, %ymm3, %ymm3
; AVX-NEXT: vblendps {{.*#+}} ymm1 = ymm3[0,1,2],ymm1[3],ymm3[4,5,6],ymm1[7]
; AVX-NEXT: vpunpckhwd {{.*#+}} xmm3 = xmm5[4],xmm4[4],xmm5[5],xmm4[5],xmm5[6],xmm4[6],xmm5[7],xmm4[7]
; AVX-NEXT: vpunpckhwd {{.*#+}} xmm4 = xmm7[4],xmm6[4],xmm7[5],xmm6[5],xmm7[6],xmm6[6],xmm7[7],xmm6[7]
; AVX-NEXT: vpshufd {{.*#+}} xmm5 = xmm3[1,1,1,1]
; AVX-NEXT: vinsertf128 $1, %xmm5, %ymm3, %ymm5
; AVX-NEXT: vpshufd {{.*#+}} xmm6 = xmm4[0,0,1,1]
; AVX-NEXT: vinsertf128 $1, %xmm4, %ymm6, %ymm6
; AVX-NEXT: vblendps {{.*#+}} ymm5 = ymm5[0],ymm6[1],ymm5[2,3,4],ymm6[5],ymm5[6,7]
; AVX-NEXT: vblendps {{.*#+}} ymm1 = ymm5[0,1],ymm1[2,3],ymm5[4,5],ymm1[6,7]
; AVX-NEXT: vmovups %ymm1, {{[-0-9]+}}(%r{{[sb]}}p) # 32-byte Spill
; AVX-NEXT: vpshufd {{.*#+}} xmm1 = xmm2[2,2,3,3]
; AVX-NEXT: vinsertf128 $1, %xmm1, %ymm2, %ymm1
; AVX-NEXT: vpshufd {{.*#+}} xmm2 = xmm0[2,2,2,2]
; AVX-NEXT: vinsertf128 $1, %xmm0, %ymm2, %ymm0
; AVX-NEXT: vblendps {{.*#+}} ymm0 = ymm1[0,1,2],ymm0[3],ymm1[4,5,6],ymm0[7]
; AVX-NEXT: vpshufd {{.*#+}} xmm1 = xmm4[2,2,3,3]
; AVX-NEXT: vpshufd {{.*#+}} xmm2 = xmm4[2,3,2,3]
; AVX-NEXT: vinsertf128 $1, %xmm2, %ymm1, %ymm1
; AVX-NEXT: vpshufd {{.*#+}} xmm2 = xmm3[2,3,2,3]
; AVX-NEXT: vpshufd {{.*#+}} xmm3 = xmm3[3,3,3,3]
; AVX-NEXT: vinsertf128 $1, %xmm3, %ymm2, %ymm2
; AVX-NEXT: vblendps {{.*#+}} ymm1 = ymm2[0],ymm1[1],ymm2[2,3,4],ymm1[5],ymm2[6,7]
; AVX-NEXT: vblendps {{.*#+}} ymm14 = ymm1[0,1],ymm0[2,3],ymm1[4,5],ymm0[6,7]
; AVX-NEXT: vmovdqa 112(%r10), %xmm12
; AVX-NEXT: vmovdqa 112(%rax), %xmm11
; AVX-NEXT: vpunpcklwd {{.*#+}} xmm8 = xmm11[0],xmm12[0],xmm11[1],xmm12[1],xmm11[2],xmm12[2],xmm11[3],xmm12[3]
; AVX-NEXT: vpshufd {{.*#+}} xmm0 = xmm8[0,0,0,0]
; AVX-NEXT: vpshufd {{.*#+}} xmm1 = xmm8[0,1,0,1]
; AVX-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm0
; AVX-NEXT: vmovdqa 112(%r9), %xmm10
; AVX-NEXT: vmovdqa 112(%r8), %xmm7
; AVX-NEXT: vpunpcklwd {{.*#+}} xmm13 = xmm7[0],xmm10[0],xmm7[1],xmm10[1],xmm7[2],xmm10[2],xmm7[3],xmm10[3]
; AVX-NEXT: vpshufd {{.*#+}} xmm1 = xmm13[0,1,0,1]
; AVX-NEXT: vpmovzxdq {{.*#+}} xmm2 = xmm13[0],zero,xmm13[1],zero
; AVX-NEXT: vinsertf128 $1, %xmm2, %ymm1, %ymm1
; AVX-NEXT: vblendps {{.*#+}} ymm9 = ymm1[0,1,2],ymm0[3],ymm1[4,5,6],ymm0[7]
; AVX-NEXT: vmovdqa 112(%rsi), %xmm6
; AVX-NEXT: vmovdqa 112(%rdi), %xmm5
; AVX-NEXT: vpunpcklwd {{.*#+}} xmm2 = xmm5[0],xmm6[0],xmm5[1],xmm6[1],xmm5[2],xmm6[2],xmm5[3],xmm6[3]
; AVX-NEXT: vpshufd {{.*#+}} xmm1 = xmm2[1,1,1,1]
; AVX-NEXT: vinsertf128 $1, %xmm1, %ymm2, %ymm1
; AVX-NEXT: vmovdqa 112(%rcx), %xmm4
; AVX-NEXT: vmovdqa 112(%rdx), %xmm3
; AVX-NEXT: vpunpcklwd {{.*#+}} xmm0 = xmm3[0],xmm4[0],xmm3[1],xmm4[1],xmm3[2],xmm4[2],xmm3[3],xmm4[3]
; AVX-NEXT: vpshufd {{.*#+}} xmm15 = xmm0[0,0,1,1]
; AVX-NEXT: vinsertf128 $1, %xmm0, %ymm15, %ymm15
; AVX-NEXT: vblendps {{.*#+}} ymm1 = ymm1[0],ymm15[1],ymm1[2,3,4],ymm15[5],ymm1[6,7]
; AVX-NEXT: vblendps {{.*#+}} ymm9 = ymm1[0,1],ymm9[2,3],ymm1[4,5],ymm9[6,7]
; AVX-NEXT: vpshufd {{.*#+}} xmm1 = xmm13[2,2,3,3]
; AVX-NEXT: vinsertf128 $1, %xmm1, %ymm13, %ymm1
; AVX-NEXT: vpshufd {{.*#+}} xmm13 = xmm8[2,2,2,2]
; AVX-NEXT: vinsertf128 $1, %xmm8, %ymm13, %ymm8
; AVX-NEXT: vblendps {{.*#+}} ymm1 = ymm1[0,1,2],ymm8[3],ymm1[4,5,6],ymm8[7]
; AVX-NEXT: vpshufd {{.*#+}} xmm8 = xmm0[2,2,3,3]
; AVX-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[2,3,2,3]
; AVX-NEXT: vinsertf128 $1, %xmm0, %ymm8, %ymm0
; AVX-NEXT: vpshufd {{.*#+}} xmm8 = xmm2[2,3,2,3]
; AVX-NEXT: vpshufd {{.*#+}} xmm2 = xmm2[3,3,3,3]
; AVX-NEXT: vinsertf128 $1, %xmm2, %ymm8, %ymm2
; AVX-NEXT: vblendps {{.*#+}} ymm0 = ymm2[0],ymm0[1],ymm2[2,3,4],ymm0[5],ymm2[6,7]
; AVX-NEXT: vblendps {{.*#+}} ymm8 = ymm0[0,1],ymm1[2,3],ymm0[4,5],ymm1[6,7]
; AVX-NEXT: vpunpckhwd {{.*#+}} xmm0 = xmm11[4],xmm12[4],xmm11[5],xmm12[5],xmm11[6],xmm12[6],xmm11[7],xmm12[7]
; AVX-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[0,0,0,0]
; AVX-NEXT: vpshufd {{.*#+}} xmm2 = xmm0[0,1,0,1]
; AVX-NEXT: vinsertf128 $1, %xmm2, %ymm1, %ymm1
; AVX-NEXT: vpunpckhwd {{.*#+}} xmm2 = xmm7[4],xmm10[4],xmm7[5],xmm10[5],xmm7[6],xmm10[6],xmm7[7],xmm10[7]
; AVX-NEXT: vpshufd {{.*#+}} xmm7 = xmm2[0,1,0,1]
; AVX-NEXT: vpmovzxdq {{.*#+}} xmm10 = xmm2[0],zero,xmm2[1],zero
; AVX-NEXT: vinsertf128 $1, %xmm10, %ymm7, %ymm7
; AVX-NEXT: vblendps {{.*#+}} ymm1 = ymm7[0,1,2],ymm1[3],ymm7[4,5,6],ymm1[7]
; AVX-NEXT: vpunpckhwd {{.*#+}} xmm5 = xmm5[4],xmm6[4],xmm5[5],xmm6[5],xmm5[6],xmm6[6],xmm5[7],xmm6[7]
; AVX-NEXT: vpunpckhwd {{.*#+}} xmm3 = xmm3[4],xmm4[4],xmm3[5],xmm4[5],xmm3[6],xmm4[6],xmm3[7],xmm4[7]
; AVX-NEXT: vpshufd {{.*#+}} xmm4 = xmm5[1,1,1,1]
; AVX-NEXT: vinsertf128 $1, %xmm4, %ymm5, %ymm4
; AVX-NEXT: vpshufd {{.*#+}} xmm6 = xmm3[0,0,1,1]
; AVX-NEXT: vinsertf128 $1, %xmm3, %ymm6, %ymm6
; AVX-NEXT: vblendps {{.*#+}} ymm4 = ymm4[0],ymm6[1],ymm4[2,3,4],ymm6[5],ymm4[6,7]
; AVX-NEXT: vblendps {{.*#+}} ymm1 = ymm4[0,1],ymm1[2,3],ymm4[4,5],ymm1[6,7]
; AVX-NEXT: vpshufd {{.*#+}} xmm4 = xmm2[2,2,3,3]
; AVX-NEXT: vinsertf128 $1, %xmm4, %ymm2, %ymm2
; AVX-NEXT: vpshufd {{.*#+}} xmm4 = xmm0[2,2,2,2]
; AVX-NEXT: vinsertf128 $1, %xmm0, %ymm4, %ymm0
; AVX-NEXT: vblendps {{.*#+}} ymm0 = ymm2[0,1,2],ymm0[3],ymm2[4,5,6],ymm0[7]
; AVX-NEXT: vpshufd {{.*#+}} xmm2 = xmm3[2,2,3,3]
; AVX-NEXT: vpshufd {{.*#+}} xmm3 = xmm3[2,3,2,3]
; AVX-NEXT: vinsertf128 $1, %xmm3, %ymm2, %ymm2
; AVX-NEXT: vpshufd {{.*#+}} xmm3 = xmm5[2,3,2,3]
; AVX-NEXT: vpshufd {{.*#+}} xmm4 = xmm5[3,3,3,3]
; AVX-NEXT: vinsertf128 $1, %xmm4, %ymm3, %ymm3
; AVX-NEXT: vblendps {{.*#+}} ymm2 = ymm3[0],ymm2[1],ymm3[2,3,4],ymm2[5],ymm3[6,7]
; AVX-NEXT: vblendps {{.*#+}} ymm0 = ymm2[0,1],ymm0[2,3],ymm2[4,5],ymm0[6,7]
; AVX-NEXT: movq {{[0-9]+}}(%rsp), %rax
; AVX-NEXT: vmovaps %ymm0, 992(%rax)
; AVX-NEXT: vmovaps %ymm1, 960(%rax)
; AVX-NEXT: vmovaps %ymm8, 928(%rax)
; AVX-NEXT: vmovaps %ymm9, 896(%rax)
; AVX-NEXT: vmovaps %ymm14, 864(%rax)
; AVX-NEXT: vmovups {{[-0-9]+}}(%r{{[sb]}}p), %ymm0 # 32-byte Reload
; AVX-NEXT: vmovaps %ymm0, 832(%rax)
; AVX-NEXT: vmovups {{[-0-9]+}}(%r{{[sb]}}p), %ymm0 # 32-byte Reload
; AVX-NEXT: vmovaps %ymm0, 800(%rax)
; AVX-NEXT: vmovups {{[-0-9]+}}(%r{{[sb]}}p), %ymm0 # 32-byte Reload
; AVX-NEXT: vmovaps %ymm0, 768(%rax)
; AVX-NEXT: vmovups {{[-0-9]+}}(%r{{[sb]}}p), %ymm0 # 32-byte Reload
; AVX-NEXT: vmovaps %ymm0, 736(%rax)
; AVX-NEXT: vmovups (%rsp), %ymm0 # 32-byte Reload
; AVX-NEXT: vmovaps %ymm0, 704(%rax)
; AVX-NEXT: vmovups {{[-0-9]+}}(%r{{[sb]}}p), %ymm0 # 32-byte Reload
; AVX-NEXT: vmovaps %ymm0, 672(%rax)
; AVX-NEXT: vmovups {{[-0-9]+}}(%r{{[sb]}}p), %ymm0 # 32-byte Reload
; AVX-NEXT: vmovaps %ymm0, 640(%rax)
; AVX-NEXT: vmovups {{[-0-9]+}}(%r{{[sb]}}p), %ymm0 # 32-byte Reload
; AVX-NEXT: vmovaps %ymm0, 608(%rax)
; AVX-NEXT: vmovups {{[-0-9]+}}(%r{{[sb]}}p), %ymm0 # 32-byte Reload
; AVX-NEXT: vmovaps %ymm0, 576(%rax)
; AVX-NEXT: vmovups {{[-0-9]+}}(%r{{[sb]}}p), %ymm0 # 32-byte Reload
; AVX-NEXT: vmovaps %ymm0, 544(%rax)
; AVX-NEXT: vmovups {{[-0-9]+}}(%r{{[sb]}}p), %ymm0 # 32-byte Reload
; AVX-NEXT: vmovaps %ymm0, 512(%rax)
; AVX-NEXT: vmovups {{[-0-9]+}}(%r{{[sb]}}p), %ymm0 # 32-byte Reload
; AVX-NEXT: vmovaps %ymm0, 480(%rax)
; AVX-NEXT: vmovups {{[-0-9]+}}(%r{{[sb]}}p), %ymm0 # 32-byte Reload
; AVX-NEXT: vmovaps %ymm0, 448(%rax)
; AVX-NEXT: vmovups {{[-0-9]+}}(%r{{[sb]}}p), %ymm0 # 32-byte Reload
; AVX-NEXT: vmovaps %ymm0, 416(%rax)
; AVX-NEXT: vmovups {{[-0-9]+}}(%r{{[sb]}}p), %ymm0 # 32-byte Reload
; AVX-NEXT: vmovaps %ymm0, 384(%rax)
; AVX-NEXT: vmovups {{[-0-9]+}}(%r{{[sb]}}p), %ymm0 # 32-byte Reload
; AVX-NEXT: vmovaps %ymm0, 352(%rax)
; AVX-NEXT: vmovups {{[-0-9]+}}(%r{{[sb]}}p), %ymm0 # 32-byte Reload
; AVX-NEXT: vmovaps %ymm0, 320(%rax)
; AVX-NEXT: vmovups {{[-0-9]+}}(%r{{[sb]}}p), %ymm0 # 32-byte Reload
; AVX-NEXT: vmovaps %ymm0, 288(%rax)
; AVX-NEXT: vmovups {{[-0-9]+}}(%r{{[sb]}}p), %ymm0 # 32-byte Reload
; AVX-NEXT: vmovaps %ymm0, 256(%rax)
; AVX-NEXT: vmovups {{[-0-9]+}}(%r{{[sb]}}p), %ymm0 # 32-byte Reload
; AVX-NEXT: vmovaps %ymm0, 224(%rax)
; AVX-NEXT: vmovups {{[-0-9]+}}(%r{{[sb]}}p), %ymm0 # 32-byte Reload
; AVX-NEXT: vmovaps %ymm0, 192(%rax)
; AVX-NEXT: vmovups {{[-0-9]+}}(%r{{[sb]}}p), %ymm0 # 32-byte Reload
; AVX-NEXT: vmovaps %ymm0, 160(%rax)
; AVX-NEXT: vmovups {{[-0-9]+}}(%r{{[sb]}}p), %ymm0 # 32-byte Reload
; AVX-NEXT: vmovaps %ymm0, 128(%rax)
; AVX-NEXT: vmovups {{[-0-9]+}}(%r{{[sb]}}p), %ymm0 # 32-byte Reload
; AVX-NEXT: vmovaps %ymm0, 96(%rax)
; AVX-NEXT: vmovups {{[-0-9]+}}(%r{{[sb]}}p), %ymm0 # 32-byte Reload
; AVX-NEXT: vmovaps %ymm0, 64(%rax)
; AVX-NEXT: vmovups {{[-0-9]+}}(%r{{[sb]}}p), %ymm0 # 32-byte Reload
; AVX-NEXT: vmovaps %ymm0, 32(%rax)
; AVX-NEXT: vmovups {{[-0-9]+}}(%r{{[sb]}}p), %ymm0 # 32-byte Reload
; AVX-NEXT: vmovaps %ymm0, (%rax)
; AVX-NEXT: addq $744, %rsp # imm = 0x2E8
; AVX-NEXT: vzeroupper
; AVX-NEXT: retq
;
; AVX2-LABEL: store_i16_stride8_vf64:
; AVX2: # %bb.0:
; AVX2-NEXT: subq $712, %rsp # imm = 0x2C8
; AVX2-NEXT: movq {{[0-9]+}}(%rsp), %rax
; AVX2-NEXT: movq {{[0-9]+}}(%rsp), %r10
; AVX2-NEXT: vmovdqa (%rax), %xmm5
; AVX2-NEXT: vmovdqa 32(%rax), %xmm0
; AVX2-NEXT: vmovdqa (%r10), %xmm6
; AVX2-NEXT: vmovdqa 32(%r10), %xmm1
; AVX2-NEXT: vpunpcklwd {{.*#+}} xmm3 = xmm6[0],xmm5[0],xmm6[1],xmm5[1],xmm6[2],xmm5[2],xmm6[3],xmm5[3]
; AVX2-NEXT: vmovdqa (%r9), %xmm8
; AVX2-NEXT: vmovdqa (%r8), %xmm9
; AVX2-NEXT: vpunpcklwd {{.*#+}} xmm4 = xmm9[0],xmm8[0],xmm9[1],xmm8[1],xmm9[2],xmm8[2],xmm9[3],xmm8[3]
; AVX2-NEXT: vpunpckldq {{.*#+}} xmm2 = xmm4[0],xmm3[0],xmm4[1],xmm3[1]
; AVX2-NEXT: vpermq {{.*#+}} ymm2 = ymm2[0,0,2,1]
; AVX2-NEXT: vmovdqa (%rcx), %xmm10
; AVX2-NEXT: vmovdqa (%rdx), %xmm11
; AVX2-NEXT: vpunpcklwd {{.*#+}} xmm7 = xmm11[0],xmm10[0],xmm11[1],xmm10[1],xmm11[2],xmm10[2],xmm11[3],xmm10[3]
; AVX2-NEXT: vmovdqa (%rsi), %xmm12
; AVX2-NEXT: vmovdqa (%rdi), %xmm13
; AVX2-NEXT: vpunpcklwd {{.*#+}} xmm14 = xmm13[0],xmm12[0],xmm13[1],xmm12[1],xmm13[2],xmm12[2],xmm13[3],xmm12[3]
; AVX2-NEXT: vpunpckldq {{.*#+}} xmm15 = xmm14[0],xmm7[0],xmm14[1],xmm7[1]
; AVX2-NEXT: vpermq {{.*#+}} ymm15 = ymm15[0,1,1,3]
; AVX2-NEXT: vpblendd {{.*#+}} ymm2 = ymm15[0,1],ymm2[2,3],ymm15[4,5],ymm2[6,7]
; AVX2-NEXT: vmovdqu %ymm2, {{[-0-9]+}}(%r{{[sb]}}p) # 32-byte Spill
; AVX2-NEXT: vmovdqa 32(%r9), %xmm2
; AVX2-NEXT: vpunpckhdq {{.*#+}} xmm15 = xmm4[2],xmm3[2],xmm4[3],xmm3[3]
; AVX2-NEXT: vmovdqa 32(%r8), %xmm4
; AVX2-NEXT: vpunpckhdq {{.*#+}} xmm7 = xmm14[2],xmm7[2],xmm14[3],xmm7[3]
; AVX2-NEXT: vmovdqa 32(%rcx), %xmm3
; AVX2-NEXT: vpermq {{.*#+}} ymm14 = ymm15[0,0,2,1]
; AVX2-NEXT: vpermq {{.*#+}} ymm7 = ymm7[0,1,1,3]
; AVX2-NEXT: vpblendd {{.*#+}} ymm7 = ymm7[0,1],ymm14[2,3],ymm7[4,5],ymm14[6,7]
; AVX2-NEXT: vmovdqu %ymm7, {{[-0-9]+}}(%r{{[sb]}}p) # 32-byte Spill
; AVX2-NEXT: vmovdqa 32(%rdx), %xmm7
; AVX2-NEXT: vpunpckhwd {{.*#+}} xmm6 = xmm6[4],xmm5[4],xmm6[5],xmm5[5],xmm6[6],xmm5[6],xmm6[7],xmm5[7]
; AVX2-NEXT: vmovdqa 32(%rsi), %xmm5
; AVX2-NEXT: vpunpckhwd {{.*#+}} xmm9 = xmm9[4],xmm8[4],xmm9[5],xmm8[5],xmm9[6],xmm8[6],xmm9[7],xmm8[7]
; AVX2-NEXT: vmovdqa 32(%rdi), %xmm8
; AVX2-NEXT: vpunpckhwd {{.*#+}} xmm10 = xmm11[4],xmm10[4],xmm11[5],xmm10[5],xmm11[6],xmm10[6],xmm11[7],xmm10[7]
; AVX2-NEXT: vpunpckldq {{.*#+}} xmm11 = xmm9[0],xmm6[0],xmm9[1],xmm6[1]
; AVX2-NEXT: vpermq {{.*#+}} ymm11 = ymm11[0,0,2,1]
; AVX2-NEXT: vpunpckhwd {{.*#+}} xmm12 = xmm13[4],xmm12[4],xmm13[5],xmm12[5],xmm13[6],xmm12[6],xmm13[7],xmm12[7]
; AVX2-NEXT: vpunpckldq {{.*#+}} xmm13 = xmm12[0],xmm10[0],xmm12[1],xmm10[1]
; AVX2-NEXT: vpermq {{.*#+}} ymm13 = ymm13[0,1,1,3]
; AVX2-NEXT: vpblendd {{.*#+}} ymm11 = ymm13[0,1],ymm11[2,3],ymm13[4,5],ymm11[6,7]
; AVX2-NEXT: vmovdqu %ymm11, {{[-0-9]+}}(%r{{[sb]}}p) # 32-byte Spill
; AVX2-NEXT: vpunpckhdq {{.*#+}} xmm6 = xmm9[2],xmm6[2],xmm9[3],xmm6[3]
; AVX2-NEXT: vpermq {{.*#+}} ymm6 = ymm6[0,0,2,1]
; AVX2-NEXT: vpunpckhdq {{.*#+}} xmm9 = xmm12[2],xmm10[2],xmm12[3],xmm10[3]
; AVX2-NEXT: vpermq {{.*#+}} ymm9 = ymm9[0,1,1,3]
; AVX2-NEXT: vpblendd {{.*#+}} ymm6 = ymm9[0,1],ymm6[2,3],ymm9[4,5],ymm6[6,7]
; AVX2-NEXT: vmovdqu %ymm6, {{[-0-9]+}}(%r{{[sb]}}p) # 32-byte Spill
; AVX2-NEXT: vpunpcklwd {{.*#+}} xmm6 = xmm1[0],xmm0[0],xmm1[1],xmm0[1],xmm1[2],xmm0[2],xmm1[3],xmm0[3]
; AVX2-NEXT: vpunpcklwd {{.*#+}} xmm9 = xmm4[0],xmm2[0],xmm4[1],xmm2[1],xmm4[2],xmm2[2],xmm4[3],xmm2[3]
; AVX2-NEXT: vpunpckldq {{.*#+}} xmm10 = xmm9[0],xmm6[0],xmm9[1],xmm6[1]
; AVX2-NEXT: vpermq {{.*#+}} ymm10 = ymm10[0,0,2,1]
; AVX2-NEXT: vpunpcklwd {{.*#+}} xmm11 = xmm7[0],xmm3[0],xmm7[1],xmm3[1],xmm7[2],xmm3[2],xmm7[3],xmm3[3]
; AVX2-NEXT: vpunpcklwd {{.*#+}} xmm12 = xmm8[0],xmm5[0],xmm8[1],xmm5[1],xmm8[2],xmm5[2],xmm8[3],xmm5[3]
; AVX2-NEXT: vpunpckldq {{.*#+}} xmm13 = xmm12[0],xmm11[0],xmm12[1],xmm11[1]
; AVX2-NEXT: vpermq {{.*#+}} ymm13 = ymm13[0,1,1,3]
; AVX2-NEXT: vpblendd {{.*#+}} ymm10 = ymm13[0,1],ymm10[2,3],ymm13[4,5],ymm10[6,7]
; AVX2-NEXT: vmovdqu %ymm10, {{[-0-9]+}}(%r{{[sb]}}p) # 32-byte Spill
; AVX2-NEXT: vpunpckhdq {{.*#+}} xmm9 = xmm9[2],xmm6[2],xmm9[3],xmm6[3]
; AVX2-NEXT: vpunpckhdq {{.*#+}} xmm10 = xmm12[2],xmm11[2],xmm12[3],xmm11[3]
; AVX2-NEXT: vmovdqa 64(%rax), %xmm6
; AVX2-NEXT: vpermq {{.*#+}} ymm9 = ymm9[0,0,2,1]
; AVX2-NEXT: vpermq {{.*#+}} ymm10 = ymm10[0,1,1,3]
; AVX2-NEXT: vpblendd {{.*#+}} ymm9 = ymm10[0,1],ymm9[2,3],ymm10[4,5],ymm9[6,7]
; AVX2-NEXT: vmovdqu %ymm9, {{[-0-9]+}}(%r{{[sb]}}p) # 32-byte Spill
; AVX2-NEXT: vmovdqa 64(%r10), %xmm9
; AVX2-NEXT: vpunpckhwd {{.*#+}} xmm10 = xmm1[4],xmm0[4],xmm1[5],xmm0[5],xmm1[6],xmm0[6],xmm1[7],xmm0[7]
; AVX2-NEXT: vmovdqa 64(%r9), %xmm0
; AVX2-NEXT: vpunpckhwd {{.*#+}} xmm4 = xmm4[4],xmm2[4],xmm4[5],xmm2[5],xmm4[6],xmm2[6],xmm4[7],xmm2[7]
; AVX2-NEXT: vmovdqa 64(%r8), %xmm1
; AVX2-NEXT: vpunpckhwd {{.*#+}} xmm3 = xmm7[4],xmm3[4],xmm7[5],xmm3[5],xmm7[6],xmm3[6],xmm7[7],xmm3[7]
; AVX2-NEXT: vpunpckldq {{.*#+}} xmm2 = xmm4[0],xmm10[0],xmm4[1],xmm10[1]
; AVX2-NEXT: vpermq {{.*#+}} ymm2 = ymm2[0,0,2,1]
; AVX2-NEXT: vpunpckhwd {{.*#+}} xmm5 = xmm8[4],xmm5[4],xmm8[5],xmm5[5],xmm8[6],xmm5[6],xmm8[7],xmm5[7]
; AVX2-NEXT: vpunpckldq {{.*#+}} xmm7 = xmm5[0],xmm3[0],xmm5[1],xmm3[1]
; AVX2-NEXT: vpermq {{.*#+}} ymm7 = ymm7[0,1,1,3]
; AVX2-NEXT: vpblendd {{.*#+}} ymm2 = ymm7[0,1],ymm2[2,3],ymm7[4,5],ymm2[6,7]
; AVX2-NEXT: vmovdqu %ymm2, {{[-0-9]+}}(%r{{[sb]}}p) # 32-byte Spill
; AVX2-NEXT: vmovdqa 64(%rcx), %xmm2
; AVX2-NEXT: vpunpckhdq {{.*#+}} xmm4 = xmm4[2],xmm10[2],xmm4[3],xmm10[3]
; AVX2-NEXT: vpermq {{.*#+}} ymm4 = ymm4[0,0,2,1]
; AVX2-NEXT: vpunpckhdq {{.*#+}} xmm3 = xmm5[2],xmm3[2],xmm5[3],xmm3[3]
; AVX2-NEXT: vpermq {{.*#+}} ymm3 = ymm3[0,1,1,3]
; AVX2-NEXT: vpblendd {{.*#+}} ymm3 = ymm3[0,1],ymm4[2,3],ymm3[4,5],ymm4[6,7]
; AVX2-NEXT: vmovdqu %ymm3, {{[-0-9]+}}(%r{{[sb]}}p) # 32-byte Spill
; AVX2-NEXT: vpunpcklwd {{.*#+}} xmm3 = xmm9[0],xmm6[0],xmm9[1],xmm6[1],xmm9[2],xmm6[2],xmm9[3],xmm6[3]
; AVX2-NEXT: vpunpcklwd {{.*#+}} xmm4 = xmm1[0],xmm0[0],xmm1[1],xmm0[1],xmm1[2],xmm0[2],xmm1[3],xmm0[3]
; AVX2-NEXT: vpunpckldq {{.*#+}} xmm5 = xmm4[0],xmm3[0],xmm4[1],xmm3[1]
; AVX2-NEXT: vpermq {{.*#+}} ymm5 = ymm5[0,0,2,1]
; AVX2-NEXT: vmovdqa 64(%rdx), %xmm7
; AVX2-NEXT: vmovdqa 64(%rsi), %xmm8
; AVX2-NEXT: vmovdqa 64(%rdi), %xmm10
; AVX2-NEXT: vpunpcklwd {{.*#+}} xmm11 = xmm7[0],xmm2[0],xmm7[1],xmm2[1],xmm7[2],xmm2[2],xmm7[3],xmm2[3]
; AVX2-NEXT: vpunpcklwd {{.*#+}} xmm12 = xmm10[0],xmm8[0],xmm10[1],xmm8[1],xmm10[2],xmm8[2],xmm10[3],xmm8[3]
; AVX2-NEXT: vpunpckldq {{.*#+}} xmm13 = xmm12[0],xmm11[0],xmm12[1],xmm11[1]
; AVX2-NEXT: vpermq {{.*#+}} ymm13 = ymm13[0,1,1,3]
; AVX2-NEXT: vpblendd {{.*#+}} ymm5 = ymm13[0,1],ymm5[2,3],ymm13[4,5],ymm5[6,7]
; AVX2-NEXT: vmovdqu %ymm5, {{[-0-9]+}}(%r{{[sb]}}p) # 32-byte Spill
; AVX2-NEXT: vpunpckhdq {{.*#+}} xmm3 = xmm4[2],xmm3[2],xmm4[3],xmm3[3]
; AVX2-NEXT: vpunpckhdq {{.*#+}} xmm4 = xmm12[2],xmm11[2],xmm12[3],xmm11[3]
; AVX2-NEXT: vpermq {{.*#+}} ymm3 = ymm3[0,0,2,1]
; AVX2-NEXT: vpermq {{.*#+}} ymm4 = ymm4[0,1,1,3]
; AVX2-NEXT: vpblendd {{.*#+}} ymm3 = ymm4[0,1],ymm3[2,3],ymm4[4,5],ymm3[6,7]
; AVX2-NEXT: vmovdqu %ymm3, {{[-0-9]+}}(%r{{[sb]}}p) # 32-byte Spill
; AVX2-NEXT: vpunpckhwd {{.*#+}} xmm3 = xmm9[4],xmm6[4],xmm9[5],xmm6[5],xmm9[6],xmm6[6],xmm9[7],xmm6[7]
; AVX2-NEXT: vpunpckhwd {{.*#+}} xmm0 = xmm1[4],xmm0[4],xmm1[5],xmm0[5],xmm1[6],xmm0[6],xmm1[7],xmm0[7]
; AVX2-NEXT: vpunpckhwd {{.*#+}} xmm1 = xmm7[4],xmm2[4],xmm7[5],xmm2[5],xmm7[6],xmm2[6],xmm7[7],xmm2[7]
; AVX2-NEXT: vpunpckldq {{.*#+}} xmm2 = xmm0[0],xmm3[0],xmm0[1],xmm3[1]
; AVX2-NEXT: vpermq {{.*#+}} ymm2 = ymm2[0,0,2,1]
; AVX2-NEXT: vpunpckhwd {{.*#+}} xmm4 = xmm10[4],xmm8[4],xmm10[5],xmm8[5],xmm10[6],xmm8[6],xmm10[7],xmm8[7]
; AVX2-NEXT: vpunpckldq {{.*#+}} xmm5 = xmm4[0],xmm1[0],xmm4[1],xmm1[1]
; AVX2-NEXT: vpermq {{.*#+}} ymm5 = ymm5[0,1,1,3]
; AVX2-NEXT: vpblendd {{.*#+}} ymm2 = ymm5[0,1],ymm2[2,3],ymm5[4,5],ymm2[6,7]
; AVX2-NEXT: vmovdqu %ymm2, {{[-0-9]+}}(%r{{[sb]}}p) # 32-byte Spill
; AVX2-NEXT: vpunpckhdq {{.*#+}} xmm0 = xmm0[2],xmm3[2],xmm0[3],xmm3[3]
; AVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,0,2,1]
; AVX2-NEXT: vpunpckhdq {{.*#+}} xmm1 = xmm4[2],xmm1[2],xmm4[3],xmm1[3]
; AVX2-NEXT: vpermq {{.*#+}} ymm1 = ymm1[0,1,1,3]
; AVX2-NEXT: vpblendd {{.*#+}} ymm0 = ymm1[0,1],ymm0[2,3],ymm1[4,5],ymm0[6,7]
; AVX2-NEXT: vmovdqu %ymm0, {{[-0-9]+}}(%r{{[sb]}}p) # 32-byte Spill
; AVX2-NEXT: vmovdqa 96(%rax), %xmm0
; AVX2-NEXT: vmovdqa 96(%r10), %xmm1
; AVX2-NEXT: vpunpcklwd {{.*#+}} xmm2 = xmm1[0],xmm0[0],xmm1[1],xmm0[1],xmm1[2],xmm0[2],xmm1[3],xmm0[3]
; AVX2-NEXT: vmovdqa 96(%r9), %xmm3
; AVX2-NEXT: vmovdqa 96(%r8), %xmm4
; AVX2-NEXT: vpunpcklwd {{.*#+}} xmm5 = xmm4[0],xmm3[0],xmm4[1],xmm3[1],xmm4[2],xmm3[2],xmm4[3],xmm3[3]
; AVX2-NEXT: vpunpckldq {{.*#+}} xmm6 = xmm5[0],xmm2[0],xmm5[1],xmm2[1]
; AVX2-NEXT: vpermq {{.*#+}} ymm6 = ymm6[0,0,2,1]
; AVX2-NEXT: vmovdqa 96(%rcx), %xmm7
; AVX2-NEXT: vmovdqa 96(%rdx), %xmm8
; AVX2-NEXT: vpunpcklwd {{.*#+}} xmm9 = xmm8[0],xmm7[0],xmm8[1],xmm7[1],xmm8[2],xmm7[2],xmm8[3],xmm7[3]
; AVX2-NEXT: vmovdqa 96(%rsi), %xmm10
; AVX2-NEXT: vmovdqa 96(%rdi), %xmm11
; AVX2-NEXT: vpunpcklwd {{.*#+}} xmm13 = xmm11[0],xmm10[0],xmm11[1],xmm10[1],xmm11[2],xmm10[2],xmm11[3],xmm10[3]
; AVX2-NEXT: vpunpckldq {{.*#+}} xmm12 = xmm13[0],xmm9[0],xmm13[1],xmm9[1]
; AVX2-NEXT: vpermq {{.*#+}} ymm12 = ymm12[0,1,1,3]
; AVX2-NEXT: vpblendd {{.*#+}} ymm6 = ymm12[0,1],ymm6[2,3],ymm12[4,5],ymm6[6,7]
; AVX2-NEXT: vmovdqu %ymm6, {{[-0-9]+}}(%r{{[sb]}}p) # 32-byte Spill
; AVX2-NEXT: vpunpckhdq {{.*#+}} xmm2 = xmm5[2],xmm2[2],xmm5[3],xmm2[3]
; AVX2-NEXT: vpunpckhdq {{.*#+}} xmm5 = xmm13[2],xmm9[2],xmm13[3],xmm9[3]
; AVX2-NEXT: vpermq {{.*#+}} ymm2 = ymm2[0,0,2,1]
; AVX2-NEXT: vpermq {{.*#+}} ymm5 = ymm5[0,1,1,3]
; AVX2-NEXT: vpblendd {{.*#+}} ymm2 = ymm5[0,1],ymm2[2,3],ymm5[4,5],ymm2[6,7]
; AVX2-NEXT: vmovdqu %ymm2, {{[-0-9]+}}(%r{{[sb]}}p) # 32-byte Spill
; AVX2-NEXT: vpunpckhwd {{.*#+}} xmm0 = xmm1[4],xmm0[4],xmm1[5],xmm0[5],xmm1[6],xmm0[6],xmm1[7],xmm0[7]
; AVX2-NEXT: vpunpckhwd {{.*#+}} xmm1 = xmm4[4],xmm3[4],xmm4[5],xmm3[5],xmm4[6],xmm3[6],xmm4[7],xmm3[7]
; AVX2-NEXT: vpunpckhwd {{.*#+}} xmm2 = xmm8[4],xmm7[4],xmm8[5],xmm7[5],xmm8[6],xmm7[6],xmm8[7],xmm7[7]
; AVX2-NEXT: vpunpckhwd {{.*#+}} xmm3 = xmm11[4],xmm10[4],xmm11[5],xmm10[5],xmm11[6],xmm10[6],xmm11[7],xmm10[7]
; AVX2-NEXT: vpunpckldq {{.*#+}} xmm4 = xmm1[0],xmm0[0],xmm1[1],xmm0[1]
; AVX2-NEXT: vpermq {{.*#+}} ymm4 = ymm4[0,0,2,1]
; AVX2-NEXT: vpunpckldq {{.*#+}} xmm5 = xmm3[0],xmm2[0],xmm3[1],xmm2[1]
; AVX2-NEXT: vpermq {{.*#+}} ymm5 = ymm5[0,1,1,3]
; AVX2-NEXT: vpblendd {{.*#+}} ymm4 = ymm5[0,1],ymm4[2,3],ymm5[4,5],ymm4[6,7]
; AVX2-NEXT: vmovdqu %ymm4, {{[-0-9]+}}(%r{{[sb]}}p) # 32-byte Spill
; AVX2-NEXT: vpunpckhdq {{.*#+}} xmm0 = xmm1[2],xmm0[2],xmm1[3],xmm0[3]
; AVX2-NEXT: vpunpckhdq {{.*#+}} xmm1 = xmm3[2],xmm2[2],xmm3[3],xmm2[3]
; AVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,0,2,1]
; AVX2-NEXT: vpermq {{.*#+}} ymm1 = ymm1[0,1,1,3]
; AVX2-NEXT: vpblendd {{.*#+}} ymm0 = ymm1[0,1],ymm0[2,3],ymm1[4,5],ymm0[6,7]
; AVX2-NEXT: vmovdqu %ymm0, {{[-0-9]+}}(%r{{[sb]}}p) # 32-byte Spill
; AVX2-NEXT: vmovdqa (%r8), %ymm11
; AVX2-NEXT: vmovdqa (%r9), %ymm1
; AVX2-NEXT: vmovdqa (%r10), %ymm2
; AVX2-NEXT: vmovdqa (%rax), %ymm3
; AVX2-NEXT: vpunpcklwd {{.*#+}} ymm4 = ymm2[0],ymm3[0],ymm2[1],ymm3[1],ymm2[2],ymm3[2],ymm2[3],ymm3[3],ymm2[8],ymm3[8],ymm2[9],ymm3[9],ymm2[10],ymm3[10],ymm2[11],ymm3[11]
; AVX2-NEXT: vpunpcklwd {{.*#+}} ymm5 = ymm11[0],ymm1[0],ymm11[1],ymm1[1],ymm11[2],ymm1[2],ymm11[3],ymm1[3],ymm11[8],ymm1[8],ymm11[9],ymm1[9],ymm11[10],ymm1[10],ymm11[11],ymm1[11]
; AVX2-NEXT: vpunpckldq {{.*#+}} ymm6 = ymm5[0],ymm4[0],ymm5[1],ymm4[1],ymm5[4],ymm4[4],ymm5[5],ymm4[5]
; AVX2-NEXT: vpermq {{.*#+}} ymm12 = ymm6[0,2,2,3]
; AVX2-NEXT: vmovdqa (%rdi), %ymm7
; AVX2-NEXT: vmovdqa (%rsi), %ymm8
; AVX2-NEXT: vmovdqa (%rdx), %ymm9
; AVX2-NEXT: vmovdqa (%rcx), %ymm6
; AVX2-NEXT: vpunpcklwd {{.*#+}} ymm10 = ymm9[0],ymm6[0],ymm9[1],ymm6[1],ymm9[2],ymm6[2],ymm9[3],ymm6[3],ymm9[8],ymm6[8],ymm9[9],ymm6[9],ymm9[10],ymm6[10],ymm9[11],ymm6[11]
; AVX2-NEXT: vpunpcklwd {{.*#+}} ymm0 = ymm7[0],ymm8[0],ymm7[1],ymm8[1],ymm7[2],ymm8[2],ymm7[3],ymm8[3],ymm7[8],ymm8[8],ymm7[9],ymm8[9],ymm7[10],ymm8[10],ymm7[11],ymm8[11]
; AVX2-NEXT: vpunpckldq {{.*#+}} ymm13 = ymm0[0],ymm10[0],ymm0[1],ymm10[1],ymm0[4],ymm10[4],ymm0[5],ymm10[5]
; AVX2-NEXT: vpermq {{.*#+}} ymm13 = ymm13[2,1,3,3]
; AVX2-NEXT: vpblendd {{.*#+}} ymm12 = ymm13[0,1],ymm12[2,3],ymm13[4,5],ymm12[6,7]
; AVX2-NEXT: vmovdqu %ymm12, {{[-0-9]+}}(%r{{[sb]}}p) # 32-byte Spill
; AVX2-NEXT: vpunpckhdq {{.*#+}} ymm4 = ymm5[2],ymm4[2],ymm5[3],ymm4[3],ymm5[6],ymm4[6],ymm5[7],ymm4[7]
; AVX2-NEXT: vpunpckhdq {{.*#+}} ymm0 = ymm0[2],ymm10[2],ymm0[3],ymm10[3],ymm0[6],ymm10[6],ymm0[7],ymm10[7]
; AVX2-NEXT: vpermq {{.*#+}} ymm4 = ymm4[0,2,2,3]
; AVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm0[2,1,3,3]
; AVX2-NEXT: vpblendd {{.*#+}} ymm0 = ymm0[0,1],ymm4[2,3],ymm0[4,5],ymm4[6,7]
; AVX2-NEXT: vmovdqu %ymm0, {{[-0-9]+}}(%r{{[sb]}}p) # 32-byte Spill
; AVX2-NEXT: vpunpckhwd {{.*#+}} ymm0 = ymm2[4],ymm3[4],ymm2[5],ymm3[5],ymm2[6],ymm3[6],ymm2[7],ymm3[7],ymm2[12],ymm3[12],ymm2[13],ymm3[13],ymm2[14],ymm3[14],ymm2[15],ymm3[15]
; AVX2-NEXT: vpunpckhwd {{.*#+}} ymm1 = ymm11[4],ymm1[4],ymm11[5],ymm1[5],ymm11[6],ymm1[6],ymm11[7],ymm1[7],ymm11[12],ymm1[12],ymm11[13],ymm1[13],ymm11[14],ymm1[14],ymm11[15],ymm1[15]
; AVX2-NEXT: vpunpckhwd {{.*#+}} ymm2 = ymm9[4],ymm6[4],ymm9[5],ymm6[5],ymm9[6],ymm6[6],ymm9[7],ymm6[7],ymm9[12],ymm6[12],ymm9[13],ymm6[13],ymm9[14],ymm6[14],ymm9[15],ymm6[15]
; AVX2-NEXT: vpunpckhwd {{.*#+}} ymm3 = ymm7[4],ymm8[4],ymm7[5],ymm8[5],ymm7[6],ymm8[6],ymm7[7],ymm8[7],ymm7[12],ymm8[12],ymm7[13],ymm8[13],ymm7[14],ymm8[14],ymm7[15],ymm8[15]
; AVX2-NEXT: vpunpckldq {{.*#+}} ymm4 = ymm1[0],ymm0[0],ymm1[1],ymm0[1],ymm1[4],ymm0[4],ymm1[5],ymm0[5]
; AVX2-NEXT: vpermq {{.*#+}} ymm4 = ymm4[0,2,2,3]
; AVX2-NEXT: vpunpckldq {{.*#+}} ymm5 = ymm3[0],ymm2[0],ymm3[1],ymm2[1],ymm3[4],ymm2[4],ymm3[5],ymm2[5]
; AVX2-NEXT: vpermq {{.*#+}} ymm5 = ymm5[2,1,3,3]
; AVX2-NEXT: vpblendd {{.*#+}} ymm4 = ymm5[0,1],ymm4[2,3],ymm5[4,5],ymm4[6,7]
; AVX2-NEXT: vmovdqu %ymm4, {{[-0-9]+}}(%r{{[sb]}}p) # 32-byte Spill
; AVX2-NEXT: vpunpckhdq {{.*#+}} ymm0 = ymm1[2],ymm0[2],ymm1[3],ymm0[3],ymm1[6],ymm0[6],ymm1[7],ymm0[7]
; AVX2-NEXT: vpunpckhdq {{.*#+}} ymm1 = ymm3[2],ymm2[2],ymm3[3],ymm2[3],ymm3[6],ymm2[6],ymm3[7],ymm2[7]
; AVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,2,2,3]
; AVX2-NEXT: vpermq {{.*#+}} ymm1 = ymm1[2,1,3,3]
; AVX2-NEXT: vpblendd {{.*#+}} ymm0 = ymm1[0,1],ymm0[2,3],ymm1[4,5],ymm0[6,7]
; AVX2-NEXT: vmovdqu %ymm0, {{[-0-9]+}}(%r{{[sb]}}p) # 32-byte Spill
; AVX2-NEXT: vmovdqa 32(%r8), %ymm9
; AVX2-NEXT: vmovdqa 32(%r9), %ymm8
; AVX2-NEXT: vmovdqa 32(%r10), %ymm7
; AVX2-NEXT: vmovdqa 32(%rax), %ymm3
; AVX2-NEXT: vpunpcklwd {{.*#+}} ymm4 = ymm7[0],ymm3[0],ymm7[1],ymm3[1],ymm7[2],ymm3[2],ymm7[3],ymm3[3],ymm7[8],ymm3[8],ymm7[9],ymm3[9],ymm7[10],ymm3[10],ymm7[11],ymm3[11]
; AVX2-NEXT: vpunpcklwd {{.*#+}} ymm5 = ymm9[0],ymm8[0],ymm9[1],ymm8[1],ymm9[2],ymm8[2],ymm9[3],ymm8[3],ymm9[8],ymm8[8],ymm9[9],ymm8[9],ymm9[10],ymm8[10],ymm9[11],ymm8[11]
; AVX2-NEXT: vpunpckldq {{.*#+}} ymm6 = ymm5[0],ymm4[0],ymm5[1],ymm4[1],ymm5[4],ymm4[4],ymm5[5],ymm4[5]
; AVX2-NEXT: vpermq {{.*#+}} ymm10 = ymm6[0,2,2,3]
; AVX2-NEXT: vmovdqa 32(%rdi), %ymm11
; AVX2-NEXT: vmovdqa 32(%rsi), %ymm13
; AVX2-NEXT: vmovdqa 32(%rdx), %ymm2
; AVX2-NEXT: vmovdqa 32(%rcx), %ymm1
; AVX2-NEXT: vpunpcklwd {{.*#+}} ymm6 = ymm2[0],ymm1[0],ymm2[1],ymm1[1],ymm2[2],ymm1[2],ymm2[3],ymm1[3],ymm2[8],ymm1[8],ymm2[9],ymm1[9],ymm2[10],ymm1[10],ymm2[11],ymm1[11]
; AVX2-NEXT: vpunpcklwd {{.*#+}} ymm0 = ymm11[0],ymm13[0],ymm11[1],ymm13[1],ymm11[2],ymm13[2],ymm11[3],ymm13[3],ymm11[8],ymm13[8],ymm11[9],ymm13[9],ymm11[10],ymm13[10],ymm11[11],ymm13[11]
; AVX2-NEXT: vpunpckldq {{.*#+}} ymm15 = ymm0[0],ymm6[0],ymm0[1],ymm6[1],ymm0[4],ymm6[4],ymm0[5],ymm6[5]
; AVX2-NEXT: vpermq {{.*#+}} ymm15 = ymm15[2,1,3,3]
; AVX2-NEXT: vpblendd {{.*#+}} ymm10 = ymm15[0,1],ymm10[2,3],ymm15[4,5],ymm10[6,7]
; AVX2-NEXT: vmovdqu %ymm10, {{[-0-9]+}}(%r{{[sb]}}p) # 32-byte Spill
; AVX2-NEXT: vpunpckhdq {{.*#+}} ymm4 = ymm5[2],ymm4[2],ymm5[3],ymm4[3],ymm5[6],ymm4[6],ymm5[7],ymm4[7]
; AVX2-NEXT: vpunpckhdq {{.*#+}} ymm0 = ymm0[2],ymm6[2],ymm0[3],ymm6[3],ymm0[6],ymm6[6],ymm0[7],ymm6[7]
; AVX2-NEXT: vpermq {{.*#+}} ymm4 = ymm4[0,2,2,3]
; AVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm0[2,1,3,3]
; AVX2-NEXT: vpblendd {{.*#+}} ymm0 = ymm0[0,1],ymm4[2,3],ymm0[4,5],ymm4[6,7]
; AVX2-NEXT: vmovdqu %ymm0, (%rsp) # 32-byte Spill
; AVX2-NEXT: vpunpckhwd {{.*#+}} ymm0 = ymm7[4],ymm3[4],ymm7[5],ymm3[5],ymm7[6],ymm3[6],ymm7[7],ymm3[7],ymm7[12],ymm3[12],ymm7[13],ymm3[13],ymm7[14],ymm3[14],ymm7[15],ymm3[15]
; AVX2-NEXT: vpunpckhwd {{.*#+}} ymm3 = ymm9[4],ymm8[4],ymm9[5],ymm8[5],ymm9[6],ymm8[6],ymm9[7],ymm8[7],ymm9[12],ymm8[12],ymm9[13],ymm8[13],ymm9[14],ymm8[14],ymm9[15],ymm8[15]
; AVX2-NEXT: vpunpckhwd {{.*#+}} ymm1 = ymm2[4],ymm1[4],ymm2[5],ymm1[5],ymm2[6],ymm1[6],ymm2[7],ymm1[7],ymm2[12],ymm1[12],ymm2[13],ymm1[13],ymm2[14],ymm1[14],ymm2[15],ymm1[15]
; AVX2-NEXT: vpunpckhwd {{.*#+}} ymm2 = ymm11[4],ymm13[4],ymm11[5],ymm13[5],ymm11[6],ymm13[6],ymm11[7],ymm13[7],ymm11[12],ymm13[12],ymm11[13],ymm13[13],ymm11[14],ymm13[14],ymm11[15],ymm13[15]
; AVX2-NEXT: vpunpckldq {{.*#+}} ymm4 = ymm3[0],ymm0[0],ymm3[1],ymm0[1],ymm3[4],ymm0[4],ymm3[5],ymm0[5]
; AVX2-NEXT: vpermq {{.*#+}} ymm4 = ymm4[0,2,2,3]
; AVX2-NEXT: vpunpckldq {{.*#+}} ymm5 = ymm2[0],ymm1[0],ymm2[1],ymm1[1],ymm2[4],ymm1[4],ymm2[5],ymm1[5]
; AVX2-NEXT: vpermq {{.*#+}} ymm5 = ymm5[2,1,3,3]
; AVX2-NEXT: vpblendd {{.*#+}} ymm4 = ymm5[0,1],ymm4[2,3],ymm5[4,5],ymm4[6,7]
; AVX2-NEXT: vmovdqu %ymm4, {{[-0-9]+}}(%r{{[sb]}}p) # 32-byte Spill
; AVX2-NEXT: vpunpckhdq {{.*#+}} ymm0 = ymm3[2],ymm0[2],ymm3[3],ymm0[3],ymm3[6],ymm0[6],ymm3[7],ymm0[7]
; AVX2-NEXT: vpunpckhdq {{.*#+}} ymm1 = ymm2[2],ymm1[2],ymm2[3],ymm1[3],ymm2[6],ymm1[6],ymm2[7],ymm1[7]
; AVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,2,2,3]
; AVX2-NEXT: vpermq {{.*#+}} ymm1 = ymm1[2,1,3,3]
; AVX2-NEXT: vpblendd {{.*#+}} ymm0 = ymm1[0,1],ymm0[2,3],ymm1[4,5],ymm0[6,7]
; AVX2-NEXT: vmovdqu %ymm0, {{[-0-9]+}}(%r{{[sb]}}p) # 32-byte Spill
; AVX2-NEXT: vmovdqa 64(%r8), %ymm5
; AVX2-NEXT: vmovdqa 64(%r9), %ymm4
; AVX2-NEXT: vmovdqa 64(%r10), %ymm7
; AVX2-NEXT: vmovdqa 64(%rax), %ymm8
; AVX2-NEXT: vpunpcklwd {{.*#+}} ymm2 = ymm7[0],ymm8[0],ymm7[1],ymm8[1],ymm7[2],ymm8[2],ymm7[3],ymm8[3],ymm7[8],ymm8[8],ymm7[9],ymm8[9],ymm7[10],ymm8[10],ymm7[11],ymm8[11]
; AVX2-NEXT: vpunpcklwd {{.*#+}} ymm9 = ymm5[0],ymm4[0],ymm5[1],ymm4[1],ymm5[2],ymm4[2],ymm5[3],ymm4[3],ymm5[8],ymm4[8],ymm5[9],ymm4[9],ymm5[10],ymm4[10],ymm5[11],ymm4[11]
; AVX2-NEXT: vpunpckldq {{.*#+}} ymm3 = ymm9[0],ymm2[0],ymm9[1],ymm2[1],ymm9[4],ymm2[4],ymm9[5],ymm2[5]
; AVX2-NEXT: vpermq {{.*#+}} ymm6 = ymm3[0,2,2,3]
; AVX2-NEXT: vmovdqa 64(%rdi), %ymm11
; AVX2-NEXT: vmovdqa 64(%rsi), %ymm13
; AVX2-NEXT: vmovdqa 64(%rdx), %ymm15
; AVX2-NEXT: vmovdqa 64(%rcx), %ymm3
; AVX2-NEXT: vpunpcklwd {{.*#+}} ymm1 = ymm15[0],ymm3[0],ymm15[1],ymm3[1],ymm15[2],ymm3[2],ymm15[3],ymm3[3],ymm15[8],ymm3[8],ymm15[9],ymm3[9],ymm15[10],ymm3[10],ymm15[11],ymm3[11]
; AVX2-NEXT: vpunpcklwd {{.*#+}} ymm0 = ymm11[0],ymm13[0],ymm11[1],ymm13[1],ymm11[2],ymm13[2],ymm11[3],ymm13[3],ymm11[8],ymm13[8],ymm11[9],ymm13[9],ymm11[10],ymm13[10],ymm11[11],ymm13[11]
; AVX2-NEXT: vpunpckldq {{.*#+}} ymm14 = ymm0[0],ymm1[0],ymm0[1],ymm1[1],ymm0[4],ymm1[4],ymm0[5],ymm1[5]
; AVX2-NEXT: vpermq {{.*#+}} ymm14 = ymm14[2,1,3,3]
; AVX2-NEXT: vpblendd {{.*#+}} ymm6 = ymm14[0,1],ymm6[2,3],ymm14[4,5],ymm6[6,7]
; AVX2-NEXT: vmovdqu %ymm6, {{[-0-9]+}}(%r{{[sb]}}p) # 32-byte Spill
; AVX2-NEXT: vpunpckhdq {{.*#+}} ymm2 = ymm9[2],ymm2[2],ymm9[3],ymm2[3],ymm9[6],ymm2[6],ymm9[7],ymm2[7]
; AVX2-NEXT: vpunpckhdq {{.*#+}} ymm0 = ymm0[2],ymm1[2],ymm0[3],ymm1[3],ymm0[6],ymm1[6],ymm0[7],ymm1[7]
; AVX2-NEXT: vpermq {{.*#+}} ymm1 = ymm2[0,2,2,3]
; AVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm0[2,1,3,3]
; AVX2-NEXT: vpblendd {{.*#+}} ymm0 = ymm0[0,1],ymm1[2,3],ymm0[4,5],ymm1[6,7]
; AVX2-NEXT: vmovdqu %ymm0, {{[-0-9]+}}(%r{{[sb]}}p) # 32-byte Spill
; AVX2-NEXT: vpunpckhwd {{.*#+}} ymm0 = ymm7[4],ymm8[4],ymm7[5],ymm8[5],ymm7[6],ymm8[6],ymm7[7],ymm8[7],ymm7[12],ymm8[12],ymm7[13],ymm8[13],ymm7[14],ymm8[14],ymm7[15],ymm8[15]
; AVX2-NEXT: vpunpckhwd {{.*#+}} ymm4 = ymm5[4],ymm4[4],ymm5[5],ymm4[5],ymm5[6],ymm4[6],ymm5[7],ymm4[7],ymm5[12],ymm4[12],ymm5[13],ymm4[13],ymm5[14],ymm4[14],ymm5[15],ymm4[15]
; AVX2-NEXT: vpunpckhwd {{.*#+}} ymm3 = ymm15[4],ymm3[4],ymm15[5],ymm3[5],ymm15[6],ymm3[6],ymm15[7],ymm3[7],ymm15[12],ymm3[12],ymm15[13],ymm3[13],ymm15[14],ymm3[14],ymm15[15],ymm3[15]
; AVX2-NEXT: vpunpckhwd {{.*#+}} ymm5 = ymm11[4],ymm13[4],ymm11[5],ymm13[5],ymm11[6],ymm13[6],ymm11[7],ymm13[7],ymm11[12],ymm13[12],ymm11[13],ymm13[13],ymm11[14],ymm13[14],ymm11[15],ymm13[15]
; AVX2-NEXT: vpunpckldq {{.*#+}} ymm1 = ymm4[0],ymm0[0],ymm4[1],ymm0[1],ymm4[4],ymm0[4],ymm4[5],ymm0[5]
; AVX2-NEXT: vpermq {{.*#+}} ymm1 = ymm1[0,2,2,3]
; AVX2-NEXT: vpunpckldq {{.*#+}} ymm7 = ymm5[0],ymm3[0],ymm5[1],ymm3[1],ymm5[4],ymm3[4],ymm5[5],ymm3[5]
; AVX2-NEXT: vpermq {{.*#+}} ymm7 = ymm7[2,1,3,3]
; AVX2-NEXT: vpblendd {{.*#+}} ymm10 = ymm7[0,1],ymm1[2,3],ymm7[4,5],ymm1[6,7]
; AVX2-NEXT: vpunpckhdq {{.*#+}} ymm0 = ymm4[2],ymm0[2],ymm4[3],ymm0[3],ymm4[6],ymm0[6],ymm4[7],ymm0[7]
; AVX2-NEXT: vpunpckhdq {{.*#+}} ymm3 = ymm5[2],ymm3[2],ymm5[3],ymm3[3],ymm5[6],ymm3[6],ymm5[7],ymm3[7]
; AVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,2,2,3]
; AVX2-NEXT: vpermq {{.*#+}} ymm3 = ymm3[2,1,3,3]
; AVX2-NEXT: vpblendd {{.*#+}} ymm6 = ymm3[0,1],ymm0[2,3],ymm3[4,5],ymm0[6,7]
; AVX2-NEXT: vmovdqa 96(%r8), %ymm3
; AVX2-NEXT: vmovdqa 96(%r9), %ymm4
; AVX2-NEXT: vmovdqa 96(%r10), %ymm5
; AVX2-NEXT: vmovdqa 96(%rax), %ymm7
; AVX2-NEXT: vpunpcklwd {{.*#+}} ymm8 = ymm5[0],ymm7[0],ymm5[1],ymm7[1],ymm5[2],ymm7[2],ymm5[3],ymm7[3],ymm5[8],ymm7[8],ymm5[9],ymm7[9],ymm5[10],ymm7[10],ymm5[11],ymm7[11]
; AVX2-NEXT: vpunpcklwd {{.*#+}} ymm9 = ymm3[0],ymm4[0],ymm3[1],ymm4[1],ymm3[2],ymm4[2],ymm3[3],ymm4[3],ymm3[8],ymm4[8],ymm3[9],ymm4[9],ymm3[10],ymm4[10],ymm3[11],ymm4[11]
; AVX2-NEXT: vpunpckldq {{.*#+}} ymm11 = ymm9[0],ymm8[0],ymm9[1],ymm8[1],ymm9[4],ymm8[4],ymm9[5],ymm8[5]
; AVX2-NEXT: vpermq {{.*#+}} ymm11 = ymm11[0,2,2,3]
; AVX2-NEXT: vmovdqa 96(%rdi), %ymm13
; AVX2-NEXT: vmovdqa 96(%rsi), %ymm14
; AVX2-NEXT: vmovdqa 96(%rdx), %ymm15
; AVX2-NEXT: vmovdqa 96(%rcx), %ymm2
; AVX2-NEXT: vpunpcklwd {{.*#+}} ymm1 = ymm15[0],ymm2[0],ymm15[1],ymm2[1],ymm15[2],ymm2[2],ymm15[3],ymm2[3],ymm15[8],ymm2[8],ymm15[9],ymm2[9],ymm15[10],ymm2[10],ymm15[11],ymm2[11]
; AVX2-NEXT: vpunpcklwd {{.*#+}} ymm0 = ymm13[0],ymm14[0],ymm13[1],ymm14[1],ymm13[2],ymm14[2],ymm13[3],ymm14[3],ymm13[8],ymm14[8],ymm13[9],ymm14[9],ymm13[10],ymm14[10],ymm13[11],ymm14[11]
; AVX2-NEXT: vpunpckldq {{.*#+}} ymm12 = ymm0[0],ymm1[0],ymm0[1],ymm1[1],ymm0[4],ymm1[4],ymm0[5],ymm1[5]
; AVX2-NEXT: vpermq {{.*#+}} ymm12 = ymm12[2,1,3,3]
; AVX2-NEXT: vpblendd {{.*#+}} ymm11 = ymm12[0,1],ymm11[2,3],ymm12[4,5],ymm11[6,7]
; AVX2-NEXT: vpunpckhdq {{.*#+}} ymm8 = ymm9[2],ymm8[2],ymm9[3],ymm8[3],ymm9[6],ymm8[6],ymm9[7],ymm8[7]
; AVX2-NEXT: vpunpckhdq {{.*#+}} ymm0 = ymm0[2],ymm1[2],ymm0[3],ymm1[3],ymm0[6],ymm1[6],ymm0[7],ymm1[7]
; AVX2-NEXT: vpermq {{.*#+}} ymm1 = ymm8[0,2,2,3]
; AVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm0[2,1,3,3]
; AVX2-NEXT: vpblendd {{.*#+}} ymm0 = ymm0[0,1],ymm1[2,3],ymm0[4,5],ymm1[6,7]
; AVX2-NEXT: vpunpckhwd {{.*#+}} ymm1 = ymm5[4],ymm7[4],ymm5[5],ymm7[5],ymm5[6],ymm7[6],ymm5[7],ymm7[7],ymm5[12],ymm7[12],ymm5[13],ymm7[13],ymm5[14],ymm7[14],ymm5[15],ymm7[15]
; AVX2-NEXT: vpunpckhwd {{.*#+}} ymm3 = ymm3[4],ymm4[4],ymm3[5],ymm4[5],ymm3[6],ymm4[6],ymm3[7],ymm4[7],ymm3[12],ymm4[12],ymm3[13],ymm4[13],ymm3[14],ymm4[14],ymm3[15],ymm4[15]
; AVX2-NEXT: vpunpckhwd {{.*#+}} ymm2 = ymm15[4],ymm2[4],ymm15[5],ymm2[5],ymm15[6],ymm2[6],ymm15[7],ymm2[7],ymm15[12],ymm2[12],ymm15[13],ymm2[13],ymm15[14],ymm2[14],ymm15[15],ymm2[15]
; AVX2-NEXT: vpunpckhwd {{.*#+}} ymm4 = ymm13[4],ymm14[4],ymm13[5],ymm14[5],ymm13[6],ymm14[6],ymm13[7],ymm14[7],ymm13[12],ymm14[12],ymm13[13],ymm14[13],ymm13[14],ymm14[14],ymm13[15],ymm14[15]
; AVX2-NEXT: vpunpckldq {{.*#+}} ymm5 = ymm3[0],ymm1[0],ymm3[1],ymm1[1],ymm3[4],ymm1[4],ymm3[5],ymm1[5]
; AVX2-NEXT: vpermq {{.*#+}} ymm5 = ymm5[0,2,2,3]
; AVX2-NEXT: vpunpckldq {{.*#+}} ymm7 = ymm4[0],ymm2[0],ymm4[1],ymm2[1],ymm4[4],ymm2[4],ymm4[5],ymm2[5]
; AVX2-NEXT: vpermq {{.*#+}} ymm7 = ymm7[2,1,3,3]
; AVX2-NEXT: vpblendd {{.*#+}} ymm5 = ymm7[0,1],ymm5[2,3],ymm7[4,5],ymm5[6,7]
; AVX2-NEXT: vpunpckhdq {{.*#+}} ymm1 = ymm3[2],ymm1[2],ymm3[3],ymm1[3],ymm3[6],ymm1[6],ymm3[7],ymm1[7]
; AVX2-NEXT: vpunpckhdq {{.*#+}} ymm2 = ymm4[2],ymm2[2],ymm4[3],ymm2[3],ymm4[6],ymm2[6],ymm4[7],ymm2[7]
; AVX2-NEXT: vpermq {{.*#+}} ymm1 = ymm1[0,2,2,3]
; AVX2-NEXT: vpermq {{.*#+}} ymm2 = ymm2[2,1,3,3]
; AVX2-NEXT: vpblendd {{.*#+}} ymm1 = ymm2[0,1],ymm1[2,3],ymm2[4,5],ymm1[6,7]
; AVX2-NEXT: movq {{[0-9]+}}(%rsp), %rax
; AVX2-NEXT: vmovdqa %ymm1, 992(%rax)
; AVX2-NEXT: vmovdqa %ymm5, 960(%rax)
; AVX2-NEXT: vmovdqa %ymm0, 928(%rax)
; AVX2-NEXT: vmovdqa %ymm11, 896(%rax)
; AVX2-NEXT: vmovdqa %ymm6, 736(%rax)
; AVX2-NEXT: vmovdqa %ymm10, 704(%rax)
; AVX2-NEXT: vmovups {{[-0-9]+}}(%r{{[sb]}}p), %ymm0 # 32-byte Reload
; AVX2-NEXT: vmovaps %ymm0, 672(%rax)
; AVX2-NEXT: vmovups {{[-0-9]+}}(%r{{[sb]}}p), %ymm0 # 32-byte Reload
; AVX2-NEXT: vmovaps %ymm0, 640(%rax)
; AVX2-NEXT: vmovups {{[-0-9]+}}(%r{{[sb]}}p), %ymm0 # 32-byte Reload
; AVX2-NEXT: vmovaps %ymm0, 480(%rax)
; AVX2-NEXT: vmovups {{[-0-9]+}}(%r{{[sb]}}p), %ymm0 # 32-byte Reload
; AVX2-NEXT: vmovaps %ymm0, 448(%rax)
; AVX2-NEXT: vmovups (%rsp), %ymm0 # 32-byte Reload
; AVX2-NEXT: vmovaps %ymm0, 416(%rax)
; AVX2-NEXT: vmovups {{[-0-9]+}}(%r{{[sb]}}p), %ymm0 # 32-byte Reload
; AVX2-NEXT: vmovaps %ymm0, 384(%rax)
; AVX2-NEXT: vmovups {{[-0-9]+}}(%r{{[sb]}}p), %ymm0 # 32-byte Reload
; AVX2-NEXT: vmovaps %ymm0, 224(%rax)
; AVX2-NEXT: vmovups {{[-0-9]+}}(%r{{[sb]}}p), %ymm0 # 32-byte Reload
; AVX2-NEXT: vmovaps %ymm0, 192(%rax)
; AVX2-NEXT: vmovups {{[-0-9]+}}(%r{{[sb]}}p), %ymm0 # 32-byte Reload
; AVX2-NEXT: vmovaps %ymm0, 160(%rax)
; AVX2-NEXT: vmovups {{[-0-9]+}}(%r{{[sb]}}p), %ymm0 # 32-byte Reload
; AVX2-NEXT: vmovaps %ymm0, 128(%rax)
; AVX2-NEXT: vmovups {{[-0-9]+}}(%r{{[sb]}}p), %ymm0 # 32-byte Reload
; AVX2-NEXT: vmovaps %ymm0, 864(%rax)
; AVX2-NEXT: vmovups {{[-0-9]+}}(%r{{[sb]}}p), %ymm0 # 32-byte Reload
; AVX2-NEXT: vmovaps %ymm0, 832(%rax)
; AVX2-NEXT: vmovups {{[-0-9]+}}(%r{{[sb]}}p), %ymm0 # 32-byte Reload
; AVX2-NEXT: vmovaps %ymm0, 800(%rax)
; AVX2-NEXT: vmovups {{[-0-9]+}}(%r{{[sb]}}p), %ymm0 # 32-byte Reload
; AVX2-NEXT: vmovaps %ymm0, 768(%rax)
; AVX2-NEXT: vmovups {{[-0-9]+}}(%r{{[sb]}}p), %ymm0 # 32-byte Reload
; AVX2-NEXT: vmovaps %ymm0, 608(%rax)
; AVX2-NEXT: vmovups {{[-0-9]+}}(%r{{[sb]}}p), %ymm0 # 32-byte Reload
; AVX2-NEXT: vmovaps %ymm0, 576(%rax)
; AVX2-NEXT: vmovups {{[-0-9]+}}(%r{{[sb]}}p), %ymm0 # 32-byte Reload
; AVX2-NEXT: vmovaps %ymm0, 544(%rax)
; AVX2-NEXT: vmovups {{[-0-9]+}}(%r{{[sb]}}p), %ymm0 # 32-byte Reload
; AVX2-NEXT: vmovaps %ymm0, 512(%rax)
; AVX2-NEXT: vmovups {{[-0-9]+}}(%r{{[sb]}}p), %ymm0 # 32-byte Reload
; AVX2-NEXT: vmovaps %ymm0, 352(%rax)
; AVX2-NEXT: vmovups {{[-0-9]+}}(%r{{[sb]}}p), %ymm0 # 32-byte Reload
; AVX2-NEXT: vmovaps %ymm0, 320(%rax)
; AVX2-NEXT: vmovups {{[-0-9]+}}(%r{{[sb]}}p), %ymm0 # 32-byte Reload
; AVX2-NEXT: vmovaps %ymm0, 288(%rax)
; AVX2-NEXT: vmovups {{[-0-9]+}}(%r{{[sb]}}p), %ymm0 # 32-byte Reload
; AVX2-NEXT: vmovaps %ymm0, 256(%rax)
; AVX2-NEXT: vmovups {{[-0-9]+}}(%r{{[sb]}}p), %ymm0 # 32-byte Reload
; AVX2-NEXT: vmovaps %ymm0, 96(%rax)
; AVX2-NEXT: vmovups {{[-0-9]+}}(%r{{[sb]}}p), %ymm0 # 32-byte Reload
; AVX2-NEXT: vmovaps %ymm0, 64(%rax)
; AVX2-NEXT: vmovups {{[-0-9]+}}(%r{{[sb]}}p), %ymm0 # 32-byte Reload
; AVX2-NEXT: vmovaps %ymm0, 32(%rax)
; AVX2-NEXT: vmovups {{[-0-9]+}}(%r{{[sb]}}p), %ymm0 # 32-byte Reload
; AVX2-NEXT: vmovaps %ymm0, (%rax)
; AVX2-NEXT: addq $712, %rsp # imm = 0x2C8
; AVX2-NEXT: vzeroupper
; AVX2-NEXT: retq
;
; AVX2-FP-LABEL: store_i16_stride8_vf64:
; AVX2-FP: # %bb.0:
; AVX2-FP-NEXT: subq $712, %rsp # imm = 0x2C8
; AVX2-FP-NEXT: movq {{[0-9]+}}(%rsp), %rax
; AVX2-FP-NEXT: movq {{[0-9]+}}(%rsp), %r10
; AVX2-FP-NEXT: vmovdqa (%rax), %xmm5
; AVX2-FP-NEXT: vmovdqa 32(%rax), %xmm0
; AVX2-FP-NEXT: vmovdqa (%r10), %xmm6
; AVX2-FP-NEXT: vmovdqa 32(%r10), %xmm1
; AVX2-FP-NEXT: vpunpcklwd {{.*#+}} xmm3 = xmm6[0],xmm5[0],xmm6[1],xmm5[1],xmm6[2],xmm5[2],xmm6[3],xmm5[3]
; AVX2-FP-NEXT: vmovdqa (%r9), %xmm8
; AVX2-FP-NEXT: vmovdqa (%r8), %xmm9
; AVX2-FP-NEXT: vpunpcklwd {{.*#+}} xmm4 = xmm9[0],xmm8[0],xmm9[1],xmm8[1],xmm9[2],xmm8[2],xmm9[3],xmm8[3]
; AVX2-FP-NEXT: vpunpckldq {{.*#+}} xmm2 = xmm4[0],xmm3[0],xmm4[1],xmm3[1]
; AVX2-FP-NEXT: vpermq {{.*#+}} ymm2 = ymm2[0,0,2,1]
; AVX2-FP-NEXT: vmovdqa (%rcx), %xmm10
; AVX2-FP-NEXT: vmovdqa (%rdx), %xmm11
; AVX2-FP-NEXT: vpunpcklwd {{.*#+}} xmm7 = xmm11[0],xmm10[0],xmm11[1],xmm10[1],xmm11[2],xmm10[2],xmm11[3],xmm10[3]
; AVX2-FP-NEXT: vmovdqa (%rsi), %xmm12
; AVX2-FP-NEXT: vmovdqa (%rdi), %xmm13
; AVX2-FP-NEXT: vpunpcklwd {{.*#+}} xmm14 = xmm13[0],xmm12[0],xmm13[1],xmm12[1],xmm13[2],xmm12[2],xmm13[3],xmm12[3]
; AVX2-FP-NEXT: vpunpckldq {{.*#+}} xmm15 = xmm14[0],xmm7[0],xmm14[1],xmm7[1]
; AVX2-FP-NEXT: vpermq {{.*#+}} ymm15 = ymm15[0,1,1,3]
; AVX2-FP-NEXT: vpblendd {{.*#+}} ymm2 = ymm15[0,1],ymm2[2,3],ymm15[4,5],ymm2[6,7]
; AVX2-FP-NEXT: vmovdqu %ymm2, {{[-0-9]+}}(%r{{[sb]}}p) # 32-byte Spill
; AVX2-FP-NEXT: vmovdqa 32(%r9), %xmm2
; AVX2-FP-NEXT: vpunpckhdq {{.*#+}} xmm15 = xmm4[2],xmm3[2],xmm4[3],xmm3[3]
; AVX2-FP-NEXT: vmovdqa 32(%r8), %xmm4
; AVX2-FP-NEXT: vpunpckhdq {{.*#+}} xmm7 = xmm14[2],xmm7[2],xmm14[3],xmm7[3]
; AVX2-FP-NEXT: vmovdqa 32(%rcx), %xmm3
; AVX2-FP-NEXT: vpermq {{.*#+}} ymm14 = ymm15[0,0,2,1]
; AVX2-FP-NEXT: vpermq {{.*#+}} ymm7 = ymm7[0,1,1,3]
; AVX2-FP-NEXT: vpblendd {{.*#+}} ymm7 = ymm7[0,1],ymm14[2,3],ymm7[4,5],ymm14[6,7]
; AVX2-FP-NEXT: vmovdqu %ymm7, {{[-0-9]+}}(%r{{[sb]}}p) # 32-byte Spill
; AVX2-FP-NEXT: vmovdqa 32(%rdx), %xmm7
; AVX2-FP-NEXT: vpunpckhwd {{.*#+}} xmm6 = xmm6[4],xmm5[4],xmm6[5],xmm5[5],xmm6[6],xmm5[6],xmm6[7],xmm5[7]
; AVX2-FP-NEXT: vmovdqa 32(%rsi), %xmm5
; AVX2-FP-NEXT: vpunpckhwd {{.*#+}} xmm9 = xmm9[4],xmm8[4],xmm9[5],xmm8[5],xmm9[6],xmm8[6],xmm9[7],xmm8[7]
; AVX2-FP-NEXT: vmovdqa 32(%rdi), %xmm8
; AVX2-FP-NEXT: vpunpckhwd {{.*#+}} xmm10 = xmm11[4],xmm10[4],xmm11[5],xmm10[5],xmm11[6],xmm10[6],xmm11[7],xmm10[7]
; AVX2-FP-NEXT: vpunpckldq {{.*#+}} xmm11 = xmm9[0],xmm6[0],xmm9[1],xmm6[1]
; AVX2-FP-NEXT: vpermq {{.*#+}} ymm11 = ymm11[0,0,2,1]
; AVX2-FP-NEXT: vpunpckhwd {{.*#+}} xmm12 = xmm13[4],xmm12[4],xmm13[5],xmm12[5],xmm13[6],xmm12[6],xmm13[7],xmm12[7]
; AVX2-FP-NEXT: vpunpckldq {{.*#+}} xmm13 = xmm12[0],xmm10[0],xmm12[1],xmm10[1]
; AVX2-FP-NEXT: vpermq {{.*#+}} ymm13 = ymm13[0,1,1,3]
; AVX2-FP-NEXT: vpblendd {{.*#+}} ymm11 = ymm13[0,1],ymm11[2,3],ymm13[4,5],ymm11[6,7]
; AVX2-FP-NEXT: vmovdqu %ymm11, {{[-0-9]+}}(%r{{[sb]}}p) # 32-byte Spill
; AVX2-FP-NEXT: vpunpckhdq {{.*#+}} xmm6 = xmm9[2],xmm6[2],xmm9[3],xmm6[3]
; AVX2-FP-NEXT: vpermq {{.*#+}} ymm6 = ymm6[0,0,2,1]
; AVX2-FP-NEXT: vpunpckhdq {{.*#+}} xmm9 = xmm12[2],xmm10[2],xmm12[3],xmm10[3]
; AVX2-FP-NEXT: vpermq {{.*#+}} ymm9 = ymm9[0,1,1,3]
; AVX2-FP-NEXT: vpblendd {{.*#+}} ymm6 = ymm9[0,1],ymm6[2,3],ymm9[4,5],ymm6[6,7]
; AVX2-FP-NEXT: vmovdqu %ymm6, {{[-0-9]+}}(%r{{[sb]}}p) # 32-byte Spill
; AVX2-FP-NEXT: vpunpcklwd {{.*#+}} xmm6 = xmm1[0],xmm0[0],xmm1[1],xmm0[1],xmm1[2],xmm0[2],xmm1[3],xmm0[3]
; AVX2-FP-NEXT: vpunpcklwd {{.*#+}} xmm9 = xmm4[0],xmm2[0],xmm4[1],xmm2[1],xmm4[2],xmm2[2],xmm4[3],xmm2[3]
; AVX2-FP-NEXT: vpunpckldq {{.*#+}} xmm10 = xmm9[0],xmm6[0],xmm9[1],xmm6[1]
; AVX2-FP-NEXT: vpermq {{.*#+}} ymm10 = ymm10[0,0,2,1]
; AVX2-FP-NEXT: vpunpcklwd {{.*#+}} xmm11 = xmm7[0],xmm3[0],xmm7[1],xmm3[1],xmm7[2],xmm3[2],xmm7[3],xmm3[3]
; AVX2-FP-NEXT: vpunpcklwd {{.*#+}} xmm12 = xmm8[0],xmm5[0],xmm8[1],xmm5[1],xmm8[2],xmm5[2],xmm8[3],xmm5[3]
; AVX2-FP-NEXT: vpunpckldq {{.*#+}} xmm13 = xmm12[0],xmm11[0],xmm12[1],xmm11[1]
; AVX2-FP-NEXT: vpermq {{.*#+}} ymm13 = ymm13[0,1,1,3]
; AVX2-FP-NEXT: vpblendd {{.*#+}} ymm10 = ymm13[0,1],ymm10[2,3],ymm13[4,5],ymm10[6,7]
; AVX2-FP-NEXT: vmovdqu %ymm10, {{[-0-9]+}}(%r{{[sb]}}p) # 32-byte Spill
; AVX2-FP-NEXT: vpunpckhdq {{.*#+}} xmm9 = xmm9[2],xmm6[2],xmm9[3],xmm6[3]
; AVX2-FP-NEXT: vpunpckhdq {{.*#+}} xmm10 = xmm12[2],xmm11[2],xmm12[3],xmm11[3]
; AVX2-FP-NEXT: vmovdqa 64(%rax), %xmm6
; AVX2-FP-NEXT: vpermq {{.*#+}} ymm9 = ymm9[0,0,2,1]
; AVX2-FP-NEXT: vpermq {{.*#+}} ymm10 = ymm10[0,1,1,3]
; AVX2-FP-NEXT: vpblendd {{.*#+}} ymm9 = ymm10[0,1],ymm9[2,3],ymm10[4,5],ymm9[6,7]
; AVX2-FP-NEXT: vmovdqu %ymm9, {{[-0-9]+}}(%r{{[sb]}}p) # 32-byte Spill
; AVX2-FP-NEXT: vmovdqa 64(%r10), %xmm9
; AVX2-FP-NEXT: vpunpckhwd {{.*#+}} xmm10 = xmm1[4],xmm0[4],xmm1[5],xmm0[5],xmm1[6],xmm0[6],xmm1[7],xmm0[7]
; AVX2-FP-NEXT: vmovdqa 64(%r9), %xmm0
; AVX2-FP-NEXT: vpunpckhwd {{.*#+}} xmm4 = xmm4[4],xmm2[4],xmm4[5],xmm2[5],xmm4[6],xmm2[6],xmm4[7],xmm2[7]
; AVX2-FP-NEXT: vmovdqa 64(%r8), %xmm1
; AVX2-FP-NEXT: vpunpckhwd {{.*#+}} xmm3 = xmm7[4],xmm3[4],xmm7[5],xmm3[5],xmm7[6],xmm3[6],xmm7[7],xmm3[7]
; AVX2-FP-NEXT: vpunpckldq {{.*#+}} xmm2 = xmm4[0],xmm10[0],xmm4[1],xmm10[1]
; AVX2-FP-NEXT: vpermq {{.*#+}} ymm2 = ymm2[0,0,2,1]
; AVX2-FP-NEXT: vpunpckhwd {{.*#+}} xmm5 = xmm8[4],xmm5[4],xmm8[5],xmm5[5],xmm8[6],xmm5[6],xmm8[7],xmm5[7]
; AVX2-FP-NEXT: vpunpckldq {{.*#+}} xmm7 = xmm5[0],xmm3[0],xmm5[1],xmm3[1]
; AVX2-FP-NEXT: vpermq {{.*#+}} ymm7 = ymm7[0,1,1,3]
; AVX2-FP-NEXT: vpblendd {{.*#+}} ymm2 = ymm7[0,1],ymm2[2,3],ymm7[4,5],ymm2[6,7]
; AVX2-FP-NEXT: vmovdqu %ymm2, {{[-0-9]+}}(%r{{[sb]}}p) # 32-byte Spill
; AVX2-FP-NEXT: vmovdqa 64(%rcx), %xmm2
; AVX2-FP-NEXT: vpunpckhdq {{.*#+}} xmm4 = xmm4[2],xmm10[2],xmm4[3],xmm10[3]
; AVX2-FP-NEXT: vpermq {{.*#+}} ymm4 = ymm4[0,0,2,1]
; AVX2-FP-NEXT: vpunpckhdq {{.*#+}} xmm3 = xmm5[2],xmm3[2],xmm5[3],xmm3[3]
; AVX2-FP-NEXT: vpermq {{.*#+}} ymm3 = ymm3[0,1,1,3]
; AVX2-FP-NEXT: vpblendd {{.*#+}} ymm3 = ymm3[0,1],ymm4[2,3],ymm3[4,5],ymm4[6,7]
; AVX2-FP-NEXT: vmovdqu %ymm3, {{[-0-9]+}}(%r{{[sb]}}p) # 32-byte Spill
; AVX2-FP-NEXT: vpunpcklwd {{.*#+}} xmm3 = xmm9[0],xmm6[0],xmm9[1],xmm6[1],xmm9[2],xmm6[2],xmm9[3],xmm6[3]
; AVX2-FP-NEXT: vpunpcklwd {{.*#+}} xmm4 = xmm1[0],xmm0[0],xmm1[1],xmm0[1],xmm1[2],xmm0[2],xmm1[3],xmm0[3]
; AVX2-FP-NEXT: vpunpckldq {{.*#+}} xmm5 = xmm4[0],xmm3[0],xmm4[1],xmm3[1]
; AVX2-FP-NEXT: vpermq {{.*#+}} ymm5 = ymm5[0,0,2,1]
; AVX2-FP-NEXT: vmovdqa 64(%rdx), %xmm7
; AVX2-FP-NEXT: vmovdqa 64(%rsi), %xmm8
; AVX2-FP-NEXT: vmovdqa 64(%rdi), %xmm10
; AVX2-FP-NEXT: vpunpcklwd {{.*#+}} xmm11 = xmm7[0],xmm2[0],xmm7[1],xmm2[1],xmm7[2],xmm2[2],xmm7[3],xmm2[3]
; AVX2-FP-NEXT: vpunpcklwd {{.*#+}} xmm12 = xmm10[0],xmm8[0],xmm10[1],xmm8[1],xmm10[2],xmm8[2],xmm10[3],xmm8[3]
; AVX2-FP-NEXT: vpunpckldq {{.*#+}} xmm13 = xmm12[0],xmm11[0],xmm12[1],xmm11[1]
; AVX2-FP-NEXT: vpermq {{.*#+}} ymm13 = ymm13[0,1,1,3]
; AVX2-FP-NEXT: vpblendd {{.*#+}} ymm5 = ymm13[0,1],ymm5[2,3],ymm13[4,5],ymm5[6,7]
; AVX2-FP-NEXT: vmovdqu %ymm5, {{[-0-9]+}}(%r{{[sb]}}p) # 32-byte Spill
; AVX2-FP-NEXT: vpunpckhdq {{.*#+}} xmm3 = xmm4[2],xmm3[2],xmm4[3],xmm3[3]
; AVX2-FP-NEXT: vpunpckhdq {{.*#+}} xmm4 = xmm12[2],xmm11[2],xmm12[3],xmm11[3]
; AVX2-FP-NEXT: vpermq {{.*#+}} ymm3 = ymm3[0,0,2,1]
; AVX2-FP-NEXT: vpermq {{.*#+}} ymm4 = ymm4[0,1,1,3]
; AVX2-FP-NEXT: vpblendd {{.*#+}} ymm3 = ymm4[0,1],ymm3[2,3],ymm4[4,5],ymm3[6,7]
; AVX2-FP-NEXT: vmovdqu %ymm3, {{[-0-9]+}}(%r{{[sb]}}p) # 32-byte Spill
; AVX2-FP-NEXT: vpunpckhwd {{.*#+}} xmm3 = xmm9[4],xmm6[4],xmm9[5],xmm6[5],xmm9[6],xmm6[6],xmm9[7],xmm6[7]
; AVX2-FP-NEXT: vpunpckhwd {{.*#+}} xmm0 = xmm1[4],xmm0[4],xmm1[5],xmm0[5],xmm1[6],xmm0[6],xmm1[7],xmm0[7]
; AVX2-FP-NEXT: vpunpckhwd {{.*#+}} xmm1 = xmm7[4],xmm2[4],xmm7[5],xmm2[5],xmm7[6],xmm2[6],xmm7[7],xmm2[7]
; AVX2-FP-NEXT: vpunpckldq {{.*#+}} xmm2 = xmm0[0],xmm3[0],xmm0[1],xmm3[1]
; AVX2-FP-NEXT: vpermq {{.*#+}} ymm2 = ymm2[0,0,2,1]
; AVX2-FP-NEXT: vpunpckhwd {{.*#+}} xmm4 = xmm10[4],xmm8[4],xmm10[5],xmm8[5],xmm10[6],xmm8[6],xmm10[7],xmm8[7]
; AVX2-FP-NEXT: vpunpckldq {{.*#+}} xmm5 = xmm4[0],xmm1[0],xmm4[1],xmm1[1]
; AVX2-FP-NEXT: vpermq {{.*#+}} ymm5 = ymm5[0,1,1,3]
; AVX2-FP-NEXT: vpblendd {{.*#+}} ymm2 = ymm5[0,1],ymm2[2,3],ymm5[4,5],ymm2[6,7]
; AVX2-FP-NEXT: vmovdqu %ymm2, {{[-0-9]+}}(%r{{[sb]}}p) # 32-byte Spill
; AVX2-FP-NEXT: vpunpckhdq {{.*#+}} xmm0 = xmm0[2],xmm3[2],xmm0[3],xmm3[3]
; AVX2-FP-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,0,2,1]
; AVX2-FP-NEXT: vpunpckhdq {{.*#+}} xmm1 = xmm4[2],xmm1[2],xmm4[3],xmm1[3]
; AVX2-FP-NEXT: vpermq {{.*#+}} ymm1 = ymm1[0,1,1,3]
; AVX2-FP-NEXT: vpblendd {{.*#+}} ymm0 = ymm1[0,1],ymm0[2,3],ymm1[4,5],ymm0[6,7]
; AVX2-FP-NEXT: vmovdqu %ymm0, {{[-0-9]+}}(%r{{[sb]}}p) # 32-byte Spill
; AVX2-FP-NEXT: vmovdqa 96(%rax), %xmm0
; AVX2-FP-NEXT: vmovdqa 96(%r10), %xmm1
; AVX2-FP-NEXT: vpunpcklwd {{.*#+}} xmm2 = xmm1[0],xmm0[0],xmm1[1],xmm0[1],xmm1[2],xmm0[2],xmm1[3],xmm0[3]
; AVX2-FP-NEXT: vmovdqa 96(%r9), %xmm3
; AVX2-FP-NEXT: vmovdqa 96(%r8), %xmm4
; AVX2-FP-NEXT: vpunpcklwd {{.*#+}} xmm5 = xmm4[0],xmm3[0],xmm4[1],xmm3[1],xmm4[2],xmm3[2],xmm4[3],xmm3[3]
; AVX2-FP-NEXT: vpunpckldq {{.*#+}} xmm6 = xmm5[0],xmm2[0],xmm5[1],xmm2[1]
; AVX2-FP-NEXT: vpermq {{.*#+}} ymm6 = ymm6[0,0,2,1]
; AVX2-FP-NEXT: vmovdqa 96(%rcx), %xmm7
; AVX2-FP-NEXT: vmovdqa 96(%rdx), %xmm8
; AVX2-FP-NEXT: vpunpcklwd {{.*#+}} xmm9 = xmm8[0],xmm7[0],xmm8[1],xmm7[1],xmm8[2],xmm7[2],xmm8[3],xmm7[3]
; AVX2-FP-NEXT: vmovdqa 96(%rsi), %xmm10
; AVX2-FP-NEXT: vmovdqa 96(%rdi), %xmm11
; AVX2-FP-NEXT: vpunpcklwd {{.*#+}} xmm13 = xmm11[0],xmm10[0],xmm11[1],xmm10[1],xmm11[2],xmm10[2],xmm11[3],xmm10[3]
; AVX2-FP-NEXT: vpunpckldq {{.*#+}} xmm12 = xmm13[0],xmm9[0],xmm13[1],xmm9[1]
; AVX2-FP-NEXT: vpermq {{.*#+}} ymm12 = ymm12[0,1,1,3]
; AVX2-FP-NEXT: vpblendd {{.*#+}} ymm6 = ymm12[0,1],ymm6[2,3],ymm12[4,5],ymm6[6,7]
; AVX2-FP-NEXT: vmovdqu %ymm6, {{[-0-9]+}}(%r{{[sb]}}p) # 32-byte Spill
; AVX2-FP-NEXT: vpunpckhdq {{.*#+}} xmm2 = xmm5[2],xmm2[2],xmm5[3],xmm2[3]
; AVX2-FP-NEXT: vpunpckhdq {{.*#+}} xmm5 = xmm13[2],xmm9[2],xmm13[3],xmm9[3]
; AVX2-FP-NEXT: vpermq {{.*#+}} ymm2 = ymm2[0,0,2,1]
; AVX2-FP-NEXT: vpermq {{.*#+}} ymm5 = ymm5[0,1,1,3]
; AVX2-FP-NEXT: vpblendd {{.*#+}} ymm2 = ymm5[0,1],ymm2[2,3],ymm5[4,5],ymm2[6,7]
; AVX2-FP-NEXT: vmovdqu %ymm2, {{[-0-9]+}}(%r{{[sb]}}p) # 32-byte Spill
; AVX2-FP-NEXT: vpunpckhwd {{.*#+}} xmm0 = xmm1[4],xmm0[4],xmm1[5],xmm0[5],xmm1[6],xmm0[6],xmm1[7],xmm0[7]
; AVX2-FP-NEXT: vpunpckhwd {{.*#+}} xmm1 = xmm4[4],xmm3[4],xmm4[5],xmm3[5],xmm4[6],xmm3[6],xmm4[7],xmm3[7]
; AVX2-FP-NEXT: vpunpckhwd {{.*#+}} xmm2 = xmm8[4],xmm7[4],xmm8[5],xmm7[5],xmm8[6],xmm7[6],xmm8[7],xmm7[7]
; AVX2-FP-NEXT: vpunpckhwd {{.*#+}} xmm3 = xmm11[4],xmm10[4],xmm11[5],xmm10[5],xmm11[6],xmm10[6],xmm11[7],xmm10[7]
; AVX2-FP-NEXT: vpunpckldq {{.*#+}} xmm4 = xmm1[0],xmm0[0],xmm1[1],xmm0[1]
; AVX2-FP-NEXT: vpermq {{.*#+}} ymm4 = ymm4[0,0,2,1]
; AVX2-FP-NEXT: vpunpckldq {{.*#+}} xmm5 = xmm3[0],xmm2[0],xmm3[1],xmm2[1]
; AVX2-FP-NEXT: vpermq {{.*#+}} ymm5 = ymm5[0,1,1,3]
; AVX2-FP-NEXT: vpblendd {{.*#+}} ymm4 = ymm5[0,1],ymm4[2,3],ymm5[4,5],ymm4[6,7]
; AVX2-FP-NEXT: vmovdqu %ymm4, {{[-0-9]+}}(%r{{[sb]}}p) # 32-byte Spill
; AVX2-FP-NEXT: vpunpckhdq {{.*#+}} xmm0 = xmm1[2],xmm0[2],xmm1[3],xmm0[3]
; AVX2-FP-NEXT: vpunpckhdq {{.*#+}} xmm1 = xmm3[2],xmm2[2],xmm3[3],xmm2[3]
; AVX2-FP-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,0,2,1]
; AVX2-FP-NEXT: vpermq {{.*#+}} ymm1 = ymm1[0,1,1,3]
; AVX2-FP-NEXT: vpblendd {{.*#+}} ymm0 = ymm1[0,1],ymm0[2,3],ymm1[4,5],ymm0[6,7]
; AVX2-FP-NEXT: vmovdqu %ymm0, {{[-0-9]+}}(%r{{[sb]}}p) # 32-byte Spill
; AVX2-FP-NEXT: vmovdqa (%r8), %ymm11
; AVX2-FP-NEXT: vmovdqa (%r9), %ymm1
; AVX2-FP-NEXT: vmovdqa (%r10), %ymm2
; AVX2-FP-NEXT: vmovdqa (%rax), %ymm3
; AVX2-FP-NEXT: vpunpcklwd {{.*#+}} ymm4 = ymm2[0],ymm3[0],ymm2[1],ymm3[1],ymm2[2],ymm3[2],ymm2[3],ymm3[3],ymm2[8],ymm3[8],ymm2[9],ymm3[9],ymm2[10],ymm3[10],ymm2[11],ymm3[11]
; AVX2-FP-NEXT: vpunpcklwd {{.*#+}} ymm5 = ymm11[0],ymm1[0],ymm11[1],ymm1[1],ymm11[2],ymm1[2],ymm11[3],ymm1[3],ymm11[8],ymm1[8],ymm11[9],ymm1[9],ymm11[10],ymm1[10],ymm11[11],ymm1[11]
; AVX2-FP-NEXT: vpunpckldq {{.*#+}} ymm6 = ymm5[0],ymm4[0],ymm5[1],ymm4[1],ymm5[4],ymm4[4],ymm5[5],ymm4[5]
; AVX2-FP-NEXT: vpermq {{.*#+}} ymm12 = ymm6[0,2,2,3]
; AVX2-FP-NEXT: vmovdqa (%rdi), %ymm7
; AVX2-FP-NEXT: vmovdqa (%rsi), %ymm8
; AVX2-FP-NEXT: vmovdqa (%rdx), %ymm9
; AVX2-FP-NEXT: vmovdqa (%rcx), %ymm6
; AVX2-FP-NEXT: vpunpcklwd {{.*#+}} ymm10 = ymm9[0],ymm6[0],ymm9[1],ymm6[1],ymm9[2],ymm6[2],ymm9[3],ymm6[3],ymm9[8],ymm6[8],ymm9[9],ymm6[9],ymm9[10],ymm6[10],ymm9[11],ymm6[11]
; AVX2-FP-NEXT: vpunpcklwd {{.*#+}} ymm0 = ymm7[0],ymm8[0],ymm7[1],ymm8[1],ymm7[2],ymm8[2],ymm7[3],ymm8[3],ymm7[8],ymm8[8],ymm7[9],ymm8[9],ymm7[10],ymm8[10],ymm7[11],ymm8[11]
; AVX2-FP-NEXT: vpunpckldq {{.*#+}} ymm13 = ymm0[0],ymm10[0],ymm0[1],ymm10[1],ymm0[4],ymm10[4],ymm0[5],ymm10[5]
; AVX2-FP-NEXT: vpermq {{.*#+}} ymm13 = ymm13[2,1,3,3]
; AVX2-FP-NEXT: vpblendd {{.*#+}} ymm12 = ymm13[0,1],ymm12[2,3],ymm13[4,5],ymm12[6,7]
; AVX2-FP-NEXT: vmovdqu %ymm12, {{[-0-9]+}}(%r{{[sb]}}p) # 32-byte Spill
; AVX2-FP-NEXT: vpunpckhdq {{.*#+}} ymm4 = ymm5[2],ymm4[2],ymm5[3],ymm4[3],ymm5[6],ymm4[6],ymm5[7],ymm4[7]
; AVX2-FP-NEXT: vpunpckhdq {{.*#+}} ymm0 = ymm0[2],ymm10[2],ymm0[3],ymm10[3],ymm0[6],ymm10[6],ymm0[7],ymm10[7]
; AVX2-FP-NEXT: vpermq {{.*#+}} ymm4 = ymm4[0,2,2,3]
; AVX2-FP-NEXT: vpermq {{.*#+}} ymm0 = ymm0[2,1,3,3]
; AVX2-FP-NEXT: vpblendd {{.*#+}} ymm0 = ymm0[0,1],ymm4[2,3],ymm0[4,5],ymm4[6,7]
; AVX2-FP-NEXT: vmovdqu %ymm0, {{[-0-9]+}}(%r{{[sb]}}p) # 32-byte Spill
; AVX2-FP-NEXT: vpunpckhwd {{.*#+}} ymm0 = ymm2[4],ymm3[4],ymm2[5],ymm3[5],ymm2[6],ymm3[6],ymm2[7],ymm3[7],ymm2[12],ymm3[12],ymm2[13],ymm3[13],ymm2[14],ymm3[14],ymm2[15],ymm3[15]
; AVX2-FP-NEXT: vpunpckhwd {{.*#+}} ymm1 = ymm11[4],ymm1[4],ymm11[5],ymm1[5],ymm11[6],ymm1[6],ymm11[7],ymm1[7],ymm11[12],ymm1[12],ymm11[13],ymm1[13],ymm11[14],ymm1[14],ymm11[15],ymm1[15]
; AVX2-FP-NEXT: vpunpckhwd {{.*#+}} ymm2 = ymm9[4],ymm6[4],ymm9[5],ymm6[5],ymm9[6],ymm6[6],ymm9[7],ymm6[7],ymm9[12],ymm6[12],ymm9[13],ymm6[13],ymm9[14],ymm6[14],ymm9[15],ymm6[15]
; AVX2-FP-NEXT: vpunpckhwd {{.*#+}} ymm3 = ymm7[4],ymm8[4],ymm7[5],ymm8[5],ymm7[6],ymm8[6],ymm7[7],ymm8[7],ymm7[12],ymm8[12],ymm7[13],ymm8[13],ymm7[14],ymm8[14],ymm7[15],ymm8[15]
; AVX2-FP-NEXT: vpunpckldq {{.*#+}} ymm4 = ymm1[0],ymm0[0],ymm1[1],ymm0[1],ymm1[4],ymm0[4],ymm1[5],ymm0[5]
; AVX2-FP-NEXT: vpermq {{.*#+}} ymm4 = ymm4[0,2,2,3]
; AVX2-FP-NEXT: vpunpckldq {{.*#+}} ymm5 = ymm3[0],ymm2[0],ymm3[1],ymm2[1],ymm3[4],ymm2[4],ymm3[5],ymm2[5]
; AVX2-FP-NEXT: vpermq {{.*#+}} ymm5 = ymm5[2,1,3,3]
; AVX2-FP-NEXT: vpblendd {{.*#+}} ymm4 = ymm5[0,1],ymm4[2,3],ymm5[4,5],ymm4[6,7]
; AVX2-FP-NEXT: vmovdqu %ymm4, {{[-0-9]+}}(%r{{[sb]}}p) # 32-byte Spill
; AVX2-FP-NEXT: vpunpckhdq {{.*#+}} ymm0 = ymm1[2],ymm0[2],ymm1[3],ymm0[3],ymm1[6],ymm0[6],ymm1[7],ymm0[7]
; AVX2-FP-NEXT: vpunpckhdq {{.*#+}} ymm1 = ymm3[2],ymm2[2],ymm3[3],ymm2[3],ymm3[6],ymm2[6],ymm3[7],ymm2[7]
; AVX2-FP-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,2,2,3]
; AVX2-FP-NEXT: vpermq {{.*#+}} ymm1 = ymm1[2,1,3,3]
; AVX2-FP-NEXT: vpblendd {{.*#+}} ymm0 = ymm1[0,1],ymm0[2,3],ymm1[4,5],ymm0[6,7]
; AVX2-FP-NEXT: vmovdqu %ymm0, {{[-0-9]+}}(%r{{[sb]}}p) # 32-byte Spill
; AVX2-FP-NEXT: vmovdqa 32(%r8), %ymm9
; AVX2-FP-NEXT: vmovdqa 32(%r9), %ymm8
; AVX2-FP-NEXT: vmovdqa 32(%r10), %ymm7
; AVX2-FP-NEXT: vmovdqa 32(%rax), %ymm3
; AVX2-FP-NEXT: vpunpcklwd {{.*#+}} ymm4 = ymm7[0],ymm3[0],ymm7[1],ymm3[1],ymm7[2],ymm3[2],ymm7[3],ymm3[3],ymm7[8],ymm3[8],ymm7[9],ymm3[9],ymm7[10],ymm3[10],ymm7[11],ymm3[11]
; AVX2-FP-NEXT: vpunpcklwd {{.*#+}} ymm5 = ymm9[0],ymm8[0],ymm9[1],ymm8[1],ymm9[2],ymm8[2],ymm9[3],ymm8[3],ymm9[8],ymm8[8],ymm9[9],ymm8[9],ymm9[10],ymm8[10],ymm9[11],ymm8[11]
; AVX2-FP-NEXT: vpunpckldq {{.*#+}} ymm6 = ymm5[0],ymm4[0],ymm5[1],ymm4[1],ymm5[4],ymm4[4],ymm5[5],ymm4[5]
; AVX2-FP-NEXT: vpermq {{.*#+}} ymm10 = ymm6[0,2,2,3]
; AVX2-FP-NEXT: vmovdqa 32(%rdi), %ymm11
; AVX2-FP-NEXT: vmovdqa 32(%rsi), %ymm13
; AVX2-FP-NEXT: vmovdqa 32(%rdx), %ymm2
; AVX2-FP-NEXT: vmovdqa 32(%rcx), %ymm1
; AVX2-FP-NEXT: vpunpcklwd {{.*#+}} ymm6 = ymm2[0],ymm1[0],ymm2[1],ymm1[1],ymm2[2],ymm1[2],ymm2[3],ymm1[3],ymm2[8],ymm1[8],ymm2[9],ymm1[9],ymm2[10],ymm1[10],ymm2[11],ymm1[11]
; AVX2-FP-NEXT: vpunpcklwd {{.*#+}} ymm0 = ymm11[0],ymm13[0],ymm11[1],ymm13[1],ymm11[2],ymm13[2],ymm11[3],ymm13[3],ymm11[8],ymm13[8],ymm11[9],ymm13[9],ymm11[10],ymm13[10],ymm11[11],ymm13[11]
; AVX2-FP-NEXT: vpunpckldq {{.*#+}} ymm15 = ymm0[0],ymm6[0],ymm0[1],ymm6[1],ymm0[4],ymm6[4],ymm0[5],ymm6[5]
; AVX2-FP-NEXT: vpermq {{.*#+}} ymm15 = ymm15[2,1,3,3]
; AVX2-FP-NEXT: vpblendd {{.*#+}} ymm10 = ymm15[0,1],ymm10[2,3],ymm15[4,5],ymm10[6,7]
; AVX2-FP-NEXT: vmovdqu %ymm10, {{[-0-9]+}}(%r{{[sb]}}p) # 32-byte Spill
; AVX2-FP-NEXT: vpunpckhdq {{.*#+}} ymm4 = ymm5[2],ymm4[2],ymm5[3],ymm4[3],ymm5[6],ymm4[6],ymm5[7],ymm4[7]
; AVX2-FP-NEXT: vpunpckhdq {{.*#+}} ymm0 = ymm0[2],ymm6[2],ymm0[3],ymm6[3],ymm0[6],ymm6[6],ymm0[7],ymm6[7]
; AVX2-FP-NEXT: vpermq {{.*#+}} ymm4 = ymm4[0,2,2,3]
; AVX2-FP-NEXT: vpermq {{.*#+}} ymm0 = ymm0[2,1,3,3]
; AVX2-FP-NEXT: vpblendd {{.*#+}} ymm0 = ymm0[0,1],ymm4[2,3],ymm0[4,5],ymm4[6,7]
; AVX2-FP-NEXT: vmovdqu %ymm0, (%rsp) # 32-byte Spill
; AVX2-FP-NEXT: vpunpckhwd {{.*#+}} ymm0 = ymm7[4],ymm3[4],ymm7[5],ymm3[5],ymm7[6],ymm3[6],ymm7[7],ymm3[7],ymm7[12],ymm3[12],ymm7[13],ymm3[13],ymm7[14],ymm3[14],ymm7[15],ymm3[15]
; AVX2-FP-NEXT: vpunpckhwd {{.*#+}} ymm3 = ymm9[4],ymm8[4],ymm9[5],ymm8[5],ymm9[6],ymm8[6],ymm9[7],ymm8[7],ymm9[12],ymm8[12],ymm9[13],ymm8[13],ymm9[14],ymm8[14],ymm9[15],ymm8[15]
; AVX2-FP-NEXT: vpunpckhwd {{.*#+}} ymm1 = ymm2[4],ymm1[4],ymm2[5],ymm1[5],ymm2[6],ymm1[6],ymm2[7],ymm1[7],ymm2[12],ymm1[12],ymm2[13],ymm1[13],ymm2[14],ymm1[14],ymm2[15],ymm1[15]
; AVX2-FP-NEXT: vpunpckhwd {{.*#+}} ymm2 = ymm11[4],ymm13[4],ymm11[5],ymm13[5],ymm11[6],ymm13[6],ymm11[7],ymm13[7],ymm11[12],ymm13[12],ymm11[13],ymm13[13],ymm11[14],ymm13[14],ymm11[15],ymm13[15]
; AVX2-FP-NEXT: vpunpckldq {{.*#+}} ymm4 = ymm3[0],ymm0[0],ymm3[1],ymm0[1],ymm3[4],ymm0[4],ymm3[5],ymm0[5]
; AVX2-FP-NEXT: vpermq {{.*#+}} ymm4 = ymm4[0,2,2,3]
; AVX2-FP-NEXT: vpunpckldq {{.*#+}} ymm5 = ymm2[0],ymm1[0],ymm2[1],ymm1[1],ymm2[4],ymm1[4],ymm2[5],ymm1[5]
; AVX2-FP-NEXT: vpermq {{.*#+}} ymm5 = ymm5[2,1,3,3]
; AVX2-FP-NEXT: vpblendd {{.*#+}} ymm4 = ymm5[0,1],ymm4[2,3],ymm5[4,5],ymm4[6,7]
; AVX2-FP-NEXT: vmovdqu %ymm4, {{[-0-9]+}}(%r{{[sb]}}p) # 32-byte Spill
; AVX2-FP-NEXT: vpunpckhdq {{.*#+}} ymm0 = ymm3[2],ymm0[2],ymm3[3],ymm0[3],ymm3[6],ymm0[6],ymm3[7],ymm0[7]
; AVX2-FP-NEXT: vpunpckhdq {{.*#+}} ymm1 = ymm2[2],ymm1[2],ymm2[3],ymm1[3],ymm2[6],ymm1[6],ymm2[7],ymm1[7]
; AVX2-FP-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,2,2,3]
; AVX2-FP-NEXT: vpermq {{.*#+}} ymm1 = ymm1[2,1,3,3]
; AVX2-FP-NEXT: vpblendd {{.*#+}} ymm0 = ymm1[0,1],ymm0[2,3],ymm1[4,5],ymm0[6,7]
; AVX2-FP-NEXT: vmovdqu %ymm0, {{[-0-9]+}}(%r{{[sb]}}p) # 32-byte Spill
; AVX2-FP-NEXT: vmovdqa 64(%r8), %ymm5
; AVX2-FP-NEXT: vmovdqa 64(%r9), %ymm4
; AVX2-FP-NEXT: vmovdqa 64(%r10), %ymm7
; AVX2-FP-NEXT: vmovdqa 64(%rax), %ymm8
; AVX2-FP-NEXT: vpunpcklwd {{.*#+}} ymm2 = ymm7[0],ymm8[0],ymm7[1],ymm8[1],ymm7[2],ymm8[2],ymm7[3],ymm8[3],ymm7[8],ymm8[8],ymm7[9],ymm8[9],ymm7[10],ymm8[10],ymm7[11],ymm8[11]
; AVX2-FP-NEXT: vpunpcklwd {{.*#+}} ymm9 = ymm5[0],ymm4[0],ymm5[1],ymm4[1],ymm5[2],ymm4[2],ymm5[3],ymm4[3],ymm5[8],ymm4[8],ymm5[9],ymm4[9],ymm5[10],ymm4[10],ymm5[11],ymm4[11]
; AVX2-FP-NEXT: vpunpckldq {{.*#+}} ymm3 = ymm9[0],ymm2[0],ymm9[1],ymm2[1],ymm9[4],ymm2[4],ymm9[5],ymm2[5]
; AVX2-FP-NEXT: vpermq {{.*#+}} ymm6 = ymm3[0,2,2,3]
; AVX2-FP-NEXT: vmovdqa 64(%rdi), %ymm11
; AVX2-FP-NEXT: vmovdqa 64(%rsi), %ymm13
; AVX2-FP-NEXT: vmovdqa 64(%rdx), %ymm15
; AVX2-FP-NEXT: vmovdqa 64(%rcx), %ymm3
; AVX2-FP-NEXT: vpunpcklwd {{.*#+}} ymm1 = ymm15[0],ymm3[0],ymm15[1],ymm3[1],ymm15[2],ymm3[2],ymm15[3],ymm3[3],ymm15[8],ymm3[8],ymm15[9],ymm3[9],ymm15[10],ymm3[10],ymm15[11],ymm3[11]
; AVX2-FP-NEXT: vpunpcklwd {{.*#+}} ymm0 = ymm11[0],ymm13[0],ymm11[1],ymm13[1],ymm11[2],ymm13[2],ymm11[3],ymm13[3],ymm11[8],ymm13[8],ymm11[9],ymm13[9],ymm11[10],ymm13[10],ymm11[11],ymm13[11]
; AVX2-FP-NEXT: vpunpckldq {{.*#+}} ymm14 = ymm0[0],ymm1[0],ymm0[1],ymm1[1],ymm0[4],ymm1[4],ymm0[5],ymm1[5]
; AVX2-FP-NEXT: vpermq {{.*#+}} ymm14 = ymm14[2,1,3,3]
; AVX2-FP-NEXT: vpblendd {{.*#+}} ymm6 = ymm14[0,1],ymm6[2,3],ymm14[4,5],ymm6[6,7]
; AVX2-FP-NEXT: vmovdqu %ymm6, {{[-0-9]+}}(%r{{[sb]}}p) # 32-byte Spill
; AVX2-FP-NEXT: vpunpckhdq {{.*#+}} ymm2 = ymm9[2],ymm2[2],ymm9[3],ymm2[3],ymm9[6],ymm2[6],ymm9[7],ymm2[7]
; AVX2-FP-NEXT: vpunpckhdq {{.*#+}} ymm0 = ymm0[2],ymm1[2],ymm0[3],ymm1[3],ymm0[6],ymm1[6],ymm0[7],ymm1[7]
; AVX2-FP-NEXT: vpermq {{.*#+}} ymm1 = ymm2[0,2,2,3]
; AVX2-FP-NEXT: vpermq {{.*#+}} ymm0 = ymm0[2,1,3,3]
; AVX2-FP-NEXT: vpblendd {{.*#+}} ymm0 = ymm0[0,1],ymm1[2,3],ymm0[4,5],ymm1[6,7]
; AVX2-FP-NEXT: vmovdqu %ymm0, {{[-0-9]+}}(%r{{[sb]}}p) # 32-byte Spill
; AVX2-FP-NEXT: vpunpckhwd {{.*#+}} ymm0 = ymm7[4],ymm8[4],ymm7[5],ymm8[5],ymm7[6],ymm8[6],ymm7[7],ymm8[7],ymm7[12],ymm8[12],ymm7[13],ymm8[13],ymm7[14],ymm8[14],ymm7[15],ymm8[15]
; AVX2-FP-NEXT: vpunpckhwd {{.*#+}} ymm4 = ymm5[4],ymm4[4],ymm5[5],ymm4[5],ymm5[6],ymm4[6],ymm5[7],ymm4[7],ymm5[12],ymm4[12],ymm5[13],ymm4[13],ymm5[14],ymm4[14],ymm5[15],ymm4[15]
; AVX2-FP-NEXT: vpunpckhwd {{.*#+}} ymm3 = ymm15[4],ymm3[4],ymm15[5],ymm3[5],ymm15[6],ymm3[6],ymm15[7],ymm3[7],ymm15[12],ymm3[12],ymm15[13],ymm3[13],ymm15[14],ymm3[14],ymm15[15],ymm3[15]
; AVX2-FP-NEXT: vpunpckhwd {{.*#+}} ymm5 = ymm11[4],ymm13[4],ymm11[5],ymm13[5],ymm11[6],ymm13[6],ymm11[7],ymm13[7],ymm11[12],ymm13[12],ymm11[13],ymm13[13],ymm11[14],ymm13[14],ymm11[15],ymm13[15]
; AVX2-FP-NEXT: vpunpckldq {{.*#+}} ymm1 = ymm4[0],ymm0[0],ymm4[1],ymm0[1],ymm4[4],ymm0[4],ymm4[5],ymm0[5]
; AVX2-FP-NEXT: vpermq {{.*#+}} ymm1 = ymm1[0,2,2,3]
; AVX2-FP-NEXT: vpunpckldq {{.*#+}} ymm7 = ymm5[0],ymm3[0],ymm5[1],ymm3[1],ymm5[4],ymm3[4],ymm5[5],ymm3[5]
; AVX2-FP-NEXT: vpermq {{.*#+}} ymm7 = ymm7[2,1,3,3]
; AVX2-FP-NEXT: vpblendd {{.*#+}} ymm10 = ymm7[0,1],ymm1[2,3],ymm7[4,5],ymm1[6,7]
; AVX2-FP-NEXT: vpunpckhdq {{.*#+}} ymm0 = ymm4[2],ymm0[2],ymm4[3],ymm0[3],ymm4[6],ymm0[6],ymm4[7],ymm0[7]
; AVX2-FP-NEXT: vpunpckhdq {{.*#+}} ymm3 = ymm5[2],ymm3[2],ymm5[3],ymm3[3],ymm5[6],ymm3[6],ymm5[7],ymm3[7]
; AVX2-FP-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,2,2,3]
; AVX2-FP-NEXT: vpermq {{.*#+}} ymm3 = ymm3[2,1,3,3]
; AVX2-FP-NEXT: vpblendd {{.*#+}} ymm6 = ymm3[0,1],ymm0[2,3],ymm3[4,5],ymm0[6,7]
; AVX2-FP-NEXT: vmovdqa 96(%r8), %ymm3
; AVX2-FP-NEXT: vmovdqa 96(%r9), %ymm4
; AVX2-FP-NEXT: vmovdqa 96(%r10), %ymm5
; AVX2-FP-NEXT: vmovdqa 96(%rax), %ymm7
; AVX2-FP-NEXT: vpunpcklwd {{.*#+}} ymm8 = ymm5[0],ymm7[0],ymm5[1],ymm7[1],ymm5[2],ymm7[2],ymm5[3],ymm7[3],ymm5[8],ymm7[8],ymm5[9],ymm7[9],ymm5[10],ymm7[10],ymm5[11],ymm7[11]
; AVX2-FP-NEXT: vpunpcklwd {{.*#+}} ymm9 = ymm3[0],ymm4[0],ymm3[1],ymm4[1],ymm3[2],ymm4[2],ymm3[3],ymm4[3],ymm3[8],ymm4[8],ymm3[9],ymm4[9],ymm3[10],ymm4[10],ymm3[11],ymm4[11]
; AVX2-FP-NEXT: vpunpckldq {{.*#+}} ymm11 = ymm9[0],ymm8[0],ymm9[1],ymm8[1],ymm9[4],ymm8[4],ymm9[5],ymm8[5]
; AVX2-FP-NEXT: vpermq {{.*#+}} ymm11 = ymm11[0,2,2,3]
; AVX2-FP-NEXT: vmovdqa 96(%rdi), %ymm13
; AVX2-FP-NEXT: vmovdqa 96(%rsi), %ymm14
; AVX2-FP-NEXT: vmovdqa 96(%rdx), %ymm15
; AVX2-FP-NEXT: vmovdqa 96(%rcx), %ymm2
; AVX2-FP-NEXT: vpunpcklwd {{.*#+}} ymm1 = ymm15[0],ymm2[0],ymm15[1],ymm2[1],ymm15[2],ymm2[2],ymm15[3],ymm2[3],ymm15[8],ymm2[8],ymm15[9],ymm2[9],ymm15[10],ymm2[10],ymm15[11],ymm2[11]
; AVX2-FP-NEXT: vpunpcklwd {{.*#+}} ymm0 = ymm13[0],ymm14[0],ymm13[1],ymm14[1],ymm13[2],ymm14[2],ymm13[3],ymm14[3],ymm13[8],ymm14[8],ymm13[9],ymm14[9],ymm13[10],ymm14[10],ymm13[11],ymm14[11]
; AVX2-FP-NEXT: vpunpckldq {{.*#+}} ymm12 = ymm0[0],ymm1[0],ymm0[1],ymm1[1],ymm0[4],ymm1[4],ymm0[5],ymm1[5]
; AVX2-FP-NEXT: vpermq {{.*#+}} ymm12 = ymm12[2,1,3,3]
; AVX2-FP-NEXT: vpblendd {{.*#+}} ymm11 = ymm12[0,1],ymm11[2,3],ymm12[4,5],ymm11[6,7]
; AVX2-FP-NEXT: vpunpckhdq {{.*#+}} ymm8 = ymm9[2],ymm8[2],ymm9[3],ymm8[3],ymm9[6],ymm8[6],ymm9[7],ymm8[7]
; AVX2-FP-NEXT: vpunpckhdq {{.*#+}} ymm0 = ymm0[2],ymm1[2],ymm0[3],ymm1[3],ymm0[6],ymm1[6],ymm0[7],ymm1[7]
; AVX2-FP-NEXT: vpermq {{.*#+}} ymm1 = ymm8[0,2,2,3]
; AVX2-FP-NEXT: vpermq {{.*#+}} ymm0 = ymm0[2,1,3,3]
; AVX2-FP-NEXT: vpblendd {{.*#+}} ymm0 = ymm0[0,1],ymm1[2,3],ymm0[4,5],ymm1[6,7]
; AVX2-FP-NEXT: vpunpckhwd {{.*#+}} ymm1 = ymm5[4],ymm7[4],ymm5[5],ymm7[5],ymm5[6],ymm7[6],ymm5[7],ymm7[7],ymm5[12],ymm7[12],ymm5[13],ymm7[13],ymm5[14],ymm7[14],ymm5[15],ymm7[15]
; AVX2-FP-NEXT: vpunpckhwd {{.*#+}} ymm3 = ymm3[4],ymm4[4],ymm3[5],ymm4[5],ymm3[6],ymm4[6],ymm3[7],ymm4[7],ymm3[12],ymm4[12],ymm3[13],ymm4[13],ymm3[14],ymm4[14],ymm3[15],ymm4[15]
; AVX2-FP-NEXT: vpunpckhwd {{.*#+}} ymm2 = ymm15[4],ymm2[4],ymm15[5],ymm2[5],ymm15[6],ymm2[6],ymm15[7],ymm2[7],ymm15[12],ymm2[12],ymm15[13],ymm2[13],ymm15[14],ymm2[14],ymm15[15],ymm2[15]
; AVX2-FP-NEXT: vpunpckhwd {{.*#+}} ymm4 = ymm13[4],ymm14[4],ymm13[5],ymm14[5],ymm13[6],ymm14[6],ymm13[7],ymm14[7],ymm13[12],ymm14[12],ymm13[13],ymm14[13],ymm13[14],ymm14[14],ymm13[15],ymm14[15]
; AVX2-FP-NEXT: vpunpckldq {{.*#+}} ymm5 = ymm3[0],ymm1[0],ymm3[1],ymm1[1],ymm3[4],ymm1[4],ymm3[5],ymm1[5]
; AVX2-FP-NEXT: vpermq {{.*#+}} ymm5 = ymm5[0,2,2,3]
; AVX2-FP-NEXT: vpunpckldq {{.*#+}} ymm7 = ymm4[0],ymm2[0],ymm4[1],ymm2[1],ymm4[4],ymm2[4],ymm4[5],ymm2[5]
; AVX2-FP-NEXT: vpermq {{.*#+}} ymm7 = ymm7[2,1,3,3]
; AVX2-FP-NEXT: vpblendd {{.*#+}} ymm5 = ymm7[0,1],ymm5[2,3],ymm7[4,5],ymm5[6,7]
; AVX2-FP-NEXT: vpunpckhdq {{.*#+}} ymm1 = ymm3[2],ymm1[2],ymm3[3],ymm1[3],ymm3[6],ymm1[6],ymm3[7],ymm1[7]
; AVX2-FP-NEXT: vpunpckhdq {{.*#+}} ymm2 = ymm4[2],ymm2[2],ymm4[3],ymm2[3],ymm4[6],ymm2[6],ymm4[7],ymm2[7]
; AVX2-FP-NEXT: vpermq {{.*#+}} ymm1 = ymm1[0,2,2,3]
; AVX2-FP-NEXT: vpermq {{.*#+}} ymm2 = ymm2[2,1,3,3]
; AVX2-FP-NEXT: vpblendd {{.*#+}} ymm1 = ymm2[0,1],ymm1[2,3],ymm2[4,5],ymm1[6,7]
; AVX2-FP-NEXT: movq {{[0-9]+}}(%rsp), %rax
; AVX2-FP-NEXT: vmovdqa %ymm1, 992(%rax)
; AVX2-FP-NEXT: vmovdqa %ymm5, 960(%rax)
; AVX2-FP-NEXT: vmovdqa %ymm0, 928(%rax)
; AVX2-FP-NEXT: vmovdqa %ymm11, 896(%rax)
; AVX2-FP-NEXT: vmovdqa %ymm6, 736(%rax)
; AVX2-FP-NEXT: vmovdqa %ymm10, 704(%rax)
; AVX2-FP-NEXT: vmovups {{[-0-9]+}}(%r{{[sb]}}p), %ymm0 # 32-byte Reload
; AVX2-FP-NEXT: vmovaps %ymm0, 672(%rax)
; AVX2-FP-NEXT: vmovups {{[-0-9]+}}(%r{{[sb]}}p), %ymm0 # 32-byte Reload
; AVX2-FP-NEXT: vmovaps %ymm0, 640(%rax)
; AVX2-FP-NEXT: vmovups {{[-0-9]+}}(%r{{[sb]}}p), %ymm0 # 32-byte Reload
; AVX2-FP-NEXT: vmovaps %ymm0, 480(%rax)
; AVX2-FP-NEXT: vmovups {{[-0-9]+}}(%r{{[sb]}}p), %ymm0 # 32-byte Reload
; AVX2-FP-NEXT: vmovaps %ymm0, 448(%rax)
; AVX2-FP-NEXT: vmovups (%rsp), %ymm0 # 32-byte Reload
; AVX2-FP-NEXT: vmovaps %ymm0, 416(%rax)
; AVX2-FP-NEXT: vmovups {{[-0-9]+}}(%r{{[sb]}}p), %ymm0 # 32-byte Reload
; AVX2-FP-NEXT: vmovaps %ymm0, 384(%rax)
; AVX2-FP-NEXT: vmovups {{[-0-9]+}}(%r{{[sb]}}p), %ymm0 # 32-byte Reload
; AVX2-FP-NEXT: vmovaps %ymm0, 224(%rax)
; AVX2-FP-NEXT: vmovups {{[-0-9]+}}(%r{{[sb]}}p), %ymm0 # 32-byte Reload
; AVX2-FP-NEXT: vmovaps %ymm0, 192(%rax)
; AVX2-FP-NEXT: vmovups {{[-0-9]+}}(%r{{[sb]}}p), %ymm0 # 32-byte Reload
; AVX2-FP-NEXT: vmovaps %ymm0, 160(%rax)
; AVX2-FP-NEXT: vmovups {{[-0-9]+}}(%r{{[sb]}}p), %ymm0 # 32-byte Reload
; AVX2-FP-NEXT: vmovaps %ymm0, 128(%rax)
; AVX2-FP-NEXT: vmovups {{[-0-9]+}}(%r{{[sb]}}p), %ymm0 # 32-byte Reload
; AVX2-FP-NEXT: vmovaps %ymm0, 864(%rax)
; AVX2-FP-NEXT: vmovups {{[-0-9]+}}(%r{{[sb]}}p), %ymm0 # 32-byte Reload
; AVX2-FP-NEXT: vmovaps %ymm0, 832(%rax)
; AVX2-FP-NEXT: vmovups {{[-0-9]+}}(%r{{[sb]}}p), %ymm0 # 32-byte Reload
; AVX2-FP-NEXT: vmovaps %ymm0, 800(%rax)
; AVX2-FP-NEXT: vmovups {{[-0-9]+}}(%r{{[sb]}}p), %ymm0 # 32-byte Reload
; AVX2-FP-NEXT: vmovaps %ymm0, 768(%rax)
; AVX2-FP-NEXT: vmovups {{[-0-9]+}}(%r{{[sb]}}p), %ymm0 # 32-byte Reload
; AVX2-FP-NEXT: vmovaps %ymm0, 608(%rax)
; AVX2-FP-NEXT: vmovups {{[-0-9]+}}(%r{{[sb]}}p), %ymm0 # 32-byte Reload
; AVX2-FP-NEXT: vmovaps %ymm0, 576(%rax)
; AVX2-FP-NEXT: vmovups {{[-0-9]+}}(%r{{[sb]}}p), %ymm0 # 32-byte Reload
; AVX2-FP-NEXT: vmovaps %ymm0, 544(%rax)
; AVX2-FP-NEXT: vmovups {{[-0-9]+}}(%r{{[sb]}}p), %ymm0 # 32-byte Reload
; AVX2-FP-NEXT: vmovaps %ymm0, 512(%rax)
; AVX2-FP-NEXT: vmovups {{[-0-9]+}}(%r{{[sb]}}p), %ymm0 # 32-byte Reload
; AVX2-FP-NEXT: vmovaps %ymm0, 352(%rax)
; AVX2-FP-NEXT: vmovups {{[-0-9]+}}(%r{{[sb]}}p), %ymm0 # 32-byte Reload
; AVX2-FP-NEXT: vmovaps %ymm0, 320(%rax)
; AVX2-FP-NEXT: vmovups {{[-0-9]+}}(%r{{[sb]}}p), %ymm0 # 32-byte Reload
; AVX2-FP-NEXT: vmovaps %ymm0, 288(%rax)
; AVX2-FP-NEXT: vmovups {{[-0-9]+}}(%r{{[sb]}}p), %ymm0 # 32-byte Reload
; AVX2-FP-NEXT: vmovaps %ymm0, 256(%rax)
; AVX2-FP-NEXT: vmovups {{[-0-9]+}}(%r{{[sb]}}p), %ymm0 # 32-byte Reload
; AVX2-FP-NEXT: vmovaps %ymm0, 96(%rax)
; AVX2-FP-NEXT: vmovups {{[-0-9]+}}(%r{{[sb]}}p), %ymm0 # 32-byte Reload
; AVX2-FP-NEXT: vmovaps %ymm0, 64(%rax)
; AVX2-FP-NEXT: vmovups {{[-0-9]+}}(%r{{[sb]}}p), %ymm0 # 32-byte Reload
; AVX2-FP-NEXT: vmovaps %ymm0, 32(%rax)
; AVX2-FP-NEXT: vmovups {{[-0-9]+}}(%r{{[sb]}}p), %ymm0 # 32-byte Reload
; AVX2-FP-NEXT: vmovaps %ymm0, (%rax)
; AVX2-FP-NEXT: addq $712, %rsp # imm = 0x2C8
; AVX2-FP-NEXT: vzeroupper
; AVX2-FP-NEXT: retq
;
; AVX2-FCP-LABEL: store_i16_stride8_vf64:
; AVX2-FCP: # %bb.0:
; AVX2-FCP-NEXT: subq $776, %rsp # imm = 0x308
; AVX2-FCP-NEXT: movq {{[0-9]+}}(%rsp), %rax
; AVX2-FCP-NEXT: movq {{[0-9]+}}(%rsp), %r10
; AVX2-FCP-NEXT: vmovdqa (%rax), %xmm4
; AVX2-FCP-NEXT: vmovdqa (%r10), %xmm5
; AVX2-FCP-NEXT: vpunpcklwd {{.*#+}} xmm3 = xmm5[0],xmm4[0],xmm5[1],xmm4[1],xmm5[2],xmm4[2],xmm5[3],xmm4[3]
; AVX2-FCP-NEXT: vpmovsxbd {{.*#+}} ymm0 = [0,0,0,0,0,0,1,1]
; AVX2-FCP-NEXT: vpermd %ymm3, %ymm0, %ymm1
; AVX2-FCP-NEXT: vmovdqa (%r9), %xmm6
; AVX2-FCP-NEXT: vmovdqa (%r8), %xmm7
; AVX2-FCP-NEXT: vpunpcklwd {{.*#+}} xmm10 = xmm7[0],xmm6[0],xmm7[1],xmm6[1],xmm7[2],xmm6[2],xmm7[3],xmm6[3]
; AVX2-FCP-NEXT: vpmovsxbq {{.*#+}} ymm0 = [0,0,0,1]
; AVX2-FCP-NEXT: vpermd %ymm10, %ymm0, %ymm2
; AVX2-FCP-NEXT: vpblendd {{.*#+}} ymm2 = ymm2[0,1,2],ymm1[3],ymm2[4,5,6],ymm1[7]
; AVX2-FCP-NEXT: vmovdqa (%rcx), %xmm8
; AVX2-FCP-NEXT: vmovdqa (%rdx), %xmm9
; AVX2-FCP-NEXT: vpunpcklwd {{.*#+}} xmm11 = xmm9[0],xmm8[0],xmm9[1],xmm8[1],xmm9[2],xmm8[2],xmm9[3],xmm8[3]
; AVX2-FCP-NEXT: vpmovsxbd {{.*#+}} ymm0 = [0,0,1,1,1,1,0,0]
; AVX2-FCP-NEXT: vpermd %ymm11, %ymm0, %ymm12
; AVX2-FCP-NEXT: vmovdqa (%rsi), %xmm13
; AVX2-FCP-NEXT: vmovdqa (%rdi), %xmm1
; AVX2-FCP-NEXT: vpunpcklwd {{.*#+}} xmm0 = xmm1[0],xmm13[0],xmm1[1],xmm13[1],xmm1[2],xmm13[2],xmm1[3],xmm13[3]
; AVX2-FCP-NEXT: vpmovsxbq {{.*#+}} ymm14 = [0,1,1,0]
; AVX2-FCP-NEXT: vpermd %ymm0, %ymm14, %ymm15
; AVX2-FCP-NEXT: vpblendd {{.*#+}} ymm12 = ymm15[0],ymm12[1],ymm15[2,3,4],ymm12[5],ymm15[6,7]
; AVX2-FCP-NEXT: vpblendd {{.*#+}} ymm2 = ymm12[0,1],ymm2[2,3],ymm12[4,5],ymm2[6,7]
; AVX2-FCP-NEXT: vmovdqu %ymm2, {{[-0-9]+}}(%r{{[sb]}}p) # 32-byte Spill
; AVX2-FCP-NEXT: vpmovsxbd {{.*#+}} ymm12 = [2,2,2,2,0,0,3,3]
; AVX2-FCP-NEXT: vpermd %ymm3, %ymm12, %ymm2
; AVX2-FCP-NEXT: vpermd %ymm10, %ymm12, %ymm3
; AVX2-FCP-NEXT: vmovdqa %ymm12, %ymm15
; AVX2-FCP-NEXT: vpblendd {{.*#+}} ymm2 = ymm3[0,1,2],ymm2[3],ymm3[4,5,6],ymm2[7]
; AVX2-FCP-NEXT: vpmovsxbd {{.*#+}} ymm10 = [2,2,3,3,3,3,0,0]
; AVX2-FCP-NEXT: vpermd %ymm11, %ymm10, %ymm3
; AVX2-FCP-NEXT: vpermd %ymm0, %ymm10, %ymm0
; AVX2-FCP-NEXT: vpblendd {{.*#+}} ymm0 = ymm0[0],ymm3[1],ymm0[2,3,4],ymm3[5],ymm0[6,7]
; AVX2-FCP-NEXT: vpblendd {{.*#+}} ymm0 = ymm0[0,1],ymm2[2,3],ymm0[4,5],ymm2[6,7]
; AVX2-FCP-NEXT: vmovdqu %ymm0, {{[-0-9]+}}(%r{{[sb]}}p) # 32-byte Spill
; AVX2-FCP-NEXT: vpunpckhwd {{.*#+}} xmm0 = xmm5[4],xmm4[4],xmm5[5],xmm4[5],xmm5[6],xmm4[6],xmm5[7],xmm4[7]
; AVX2-FCP-NEXT: vpmovsxbd {{.*#+}} ymm11 = [0,0,0,0,0,0,1,1]
; AVX2-FCP-NEXT: vpermd %ymm0, %ymm11, %ymm2
; AVX2-FCP-NEXT: vpunpckhwd {{.*#+}} xmm3 = xmm7[4],xmm6[4],xmm7[5],xmm6[5],xmm7[6],xmm6[6],xmm7[7],xmm6[7]
; AVX2-FCP-NEXT: vpmovsxbq {{.*#+}} ymm12 = [0,0,0,1]
; AVX2-FCP-NEXT: vpermd %ymm3, %ymm12, %ymm4
; AVX2-FCP-NEXT: vpblendd {{.*#+}} ymm2 = ymm4[0,1,2],ymm2[3],ymm4[4,5,6],ymm2[7]
; AVX2-FCP-NEXT: vmovdqa 32(%rax), %xmm10
; AVX2-FCP-NEXT: vpunpckhwd {{.*#+}} xmm8 = xmm9[4],xmm8[4],xmm9[5],xmm8[5],xmm9[6],xmm8[6],xmm9[7],xmm8[7]
; AVX2-FCP-NEXT: vpmovsxbd {{.*#+}} ymm14 = [0,0,1,1,1,1,0,0]
; AVX2-FCP-NEXT: vpermd %ymm8, %ymm14, %ymm5
; AVX2-FCP-NEXT: vpunpckhwd {{.*#+}} xmm1 = xmm1[4],xmm13[4],xmm1[5],xmm13[5],xmm1[6],xmm13[6],xmm1[7],xmm13[7]
; AVX2-FCP-NEXT: vpmovsxbq {{.*#+}} ymm4 = [0,1,1,0]
; AVX2-FCP-NEXT: vpermd %ymm1, %ymm4, %ymm6
; AVX2-FCP-NEXT: vpblendd {{.*#+}} ymm5 = ymm6[0],ymm5[1],ymm6[2,3,4],ymm5[5],ymm6[6,7]
; AVX2-FCP-NEXT: vmovdqa 32(%r10), %xmm6
; AVX2-FCP-NEXT: vpblendd {{.*#+}} ymm2 = ymm5[0,1],ymm2[2,3],ymm5[4,5],ymm2[6,7]
; AVX2-FCP-NEXT: vmovdqu %ymm2, {{[-0-9]+}}(%r{{[sb]}}p) # 32-byte Spill
; AVX2-FCP-NEXT: vmovdqa 32(%r9), %xmm5
; AVX2-FCP-NEXT: vpermd %ymm0, %ymm15, %ymm0
; AVX2-FCP-NEXT: vpermd %ymm3, %ymm15, %ymm2
; AVX2-FCP-NEXT: vpblendd {{.*#+}} ymm0 = ymm2[0,1,2],ymm0[3],ymm2[4,5,6],ymm0[7]
; AVX2-FCP-NEXT: vmovdqa 32(%r8), %xmm7
; AVX2-FCP-NEXT: vpmovsxbd {{.*#+}} ymm3 = [2,2,3,3,3,3,0,0]
; AVX2-FCP-NEXT: vpermd %ymm8, %ymm3, %ymm2
; AVX2-FCP-NEXT: vpermd %ymm1, %ymm3, %ymm1
; AVX2-FCP-NEXT: vpblendd {{.*#+}} ymm1 = ymm1[0],ymm2[1],ymm1[2,3,4],ymm2[5],ymm1[6,7]
; AVX2-FCP-NEXT: vpblendd {{.*#+}} ymm0 = ymm1[0,1],ymm0[2,3],ymm1[4,5],ymm0[6,7]
; AVX2-FCP-NEXT: vmovdqu %ymm0, {{[-0-9]+}}(%r{{[sb]}}p) # 32-byte Spill
; AVX2-FCP-NEXT: vpunpcklwd {{.*#+}} xmm4 = xmm6[0],xmm10[0],xmm6[1],xmm10[1],xmm6[2],xmm10[2],xmm6[3],xmm10[3]
; AVX2-FCP-NEXT: vpermd %ymm4, %ymm11, %ymm1
; AVX2-FCP-NEXT: vpunpcklwd {{.*#+}} xmm2 = xmm7[0],xmm5[0],xmm7[1],xmm5[1],xmm7[2],xmm5[2],xmm7[3],xmm5[3]
; AVX2-FCP-NEXT: vpermd %ymm2, %ymm12, %ymm3
; AVX2-FCP-NEXT: vpblendd {{.*#+}} ymm1 = ymm3[0,1,2],ymm1[3],ymm3[4,5,6],ymm1[7]
; AVX2-FCP-NEXT: vmovdqa 32(%rcx), %xmm3
; AVX2-FCP-NEXT: vmovdqa 32(%rdx), %xmm8
; AVX2-FCP-NEXT: vmovdqa 32(%rsi), %xmm9
; AVX2-FCP-NEXT: vmovdqa 32(%rdi), %xmm11
; AVX2-FCP-NEXT: vpunpcklwd {{.*#+}} xmm13 = xmm8[0],xmm3[0],xmm8[1],xmm3[1],xmm8[2],xmm3[2],xmm8[3],xmm3[3]
; AVX2-FCP-NEXT: vpermd %ymm13, %ymm14, %ymm15
; AVX2-FCP-NEXT: vpunpcklwd {{.*#+}} xmm0 = xmm11[0],xmm9[0],xmm11[1],xmm9[1],xmm11[2],xmm9[2],xmm11[3],xmm9[3]
; AVX2-FCP-NEXT: vpmovsxbq {{.*#+}} ymm12 = [0,1,1,0]
; AVX2-FCP-NEXT: vpermd %ymm0, %ymm12, %ymm14
; AVX2-FCP-NEXT: vpblendd {{.*#+}} ymm14 = ymm14[0],ymm15[1],ymm14[2,3,4],ymm15[5],ymm14[6,7]
; AVX2-FCP-NEXT: vpblendd {{.*#+}} ymm1 = ymm14[0,1],ymm1[2,3],ymm14[4,5],ymm1[6,7]
; AVX2-FCP-NEXT: vmovdqu %ymm1, {{[-0-9]+}}(%r{{[sb]}}p) # 32-byte Spill
; AVX2-FCP-NEXT: vpmovsxbd {{.*#+}} ymm14 = [2,2,2,2,0,0,3,3]
; AVX2-FCP-NEXT: vpermd %ymm4, %ymm14, %ymm1
; AVX2-FCP-NEXT: vpermd %ymm2, %ymm14, %ymm2
; AVX2-FCP-NEXT: vmovdqa %ymm14, %ymm15
; AVX2-FCP-NEXT: vpblendd {{.*#+}} ymm1 = ymm2[0,1,2],ymm1[3],ymm2[4,5,6],ymm1[7]
; AVX2-FCP-NEXT: vpmovsxbd {{.*#+}} ymm4 = [2,2,3,3,3,3,0,0]
; AVX2-FCP-NEXT: vpermd %ymm13, %ymm4, %ymm2
; AVX2-FCP-NEXT: vpermd %ymm0, %ymm4, %ymm0
; AVX2-FCP-NEXT: vmovdqa %ymm4, %ymm13
; AVX2-FCP-NEXT: vpblendd {{.*#+}} ymm0 = ymm0[0],ymm2[1],ymm0[2,3,4],ymm2[5],ymm0[6,7]
; AVX2-FCP-NEXT: vpblendd {{.*#+}} ymm0 = ymm0[0,1],ymm1[2,3],ymm0[4,5],ymm1[6,7]
; AVX2-FCP-NEXT: vmovdqu %ymm0, {{[-0-9]+}}(%r{{[sb]}}p) # 32-byte Spill
; AVX2-FCP-NEXT: vpunpckhwd {{.*#+}} xmm0 = xmm6[4],xmm10[4],xmm6[5],xmm10[5],xmm6[6],xmm10[6],xmm6[7],xmm10[7]
; AVX2-FCP-NEXT: vpunpckhwd {{.*#+}} xmm1 = xmm7[4],xmm5[4],xmm7[5],xmm5[5],xmm7[6],xmm5[6],xmm7[7],xmm5[7]
; AVX2-FCP-NEXT: vpmovsxbd {{.*#+}} ymm7 = [0,0,0,0,0,0,1,1]
; AVX2-FCP-NEXT: vpermd %ymm0, %ymm7, %ymm2
; AVX2-FCP-NEXT: vpmovsxbq {{.*#+}} ymm10 = [0,0,0,1]
; AVX2-FCP-NEXT: vpermd %ymm1, %ymm10, %ymm4
; AVX2-FCP-NEXT: vpblendd {{.*#+}} ymm2 = ymm4[0,1,2],ymm2[3],ymm4[4,5,6],ymm2[7]
; AVX2-FCP-NEXT: vpunpckhwd {{.*#+}} xmm3 = xmm8[4],xmm3[4],xmm8[5],xmm3[5],xmm8[6],xmm3[6],xmm8[7],xmm3[7]
; AVX2-FCP-NEXT: vpunpckhwd {{.*#+}} xmm4 = xmm11[4],xmm9[4],xmm11[5],xmm9[5],xmm11[6],xmm9[6],xmm11[7],xmm9[7]
; AVX2-FCP-NEXT: vpmovsxbd {{.*#+}} ymm14 = [0,0,1,1,1,1,0,0]
; AVX2-FCP-NEXT: vpermd %ymm3, %ymm14, %ymm5
; AVX2-FCP-NEXT: vpermd %ymm4, %ymm12, %ymm6
; AVX2-FCP-NEXT: vpblendd {{.*#+}} ymm5 = ymm6[0],ymm5[1],ymm6[2,3,4],ymm5[5],ymm6[6,7]
; AVX2-FCP-NEXT: vpblendd {{.*#+}} ymm2 = ymm5[0,1],ymm2[2,3],ymm5[4,5],ymm2[6,7]
; AVX2-FCP-NEXT: vmovdqu %ymm2, {{[-0-9]+}}(%r{{[sb]}}p) # 32-byte Spill
; AVX2-FCP-NEXT: vpermd %ymm0, %ymm15, %ymm0
; AVX2-FCP-NEXT: vpermd %ymm1, %ymm15, %ymm1
; AVX2-FCP-NEXT: vpblendd {{.*#+}} ymm0 = ymm1[0,1,2],ymm0[3],ymm1[4,5,6],ymm0[7]
; AVX2-FCP-NEXT: vpermd %ymm3, %ymm13, %ymm1
; AVX2-FCP-NEXT: vpermd %ymm4, %ymm13, %ymm2
; AVX2-FCP-NEXT: vpblendd {{.*#+}} ymm1 = ymm2[0],ymm1[1],ymm2[2,3,4],ymm1[5],ymm2[6,7]
; AVX2-FCP-NEXT: vmovdqa 64(%rax), %xmm2
; AVX2-FCP-NEXT: vpblendd {{.*#+}} ymm0 = ymm1[0,1],ymm0[2,3],ymm1[4,5],ymm0[6,7]
; AVX2-FCP-NEXT: vmovdqu %ymm0, {{[-0-9]+}}(%r{{[sb]}}p) # 32-byte Spill
; AVX2-FCP-NEXT: vmovdqa 64(%r10), %xmm0
; AVX2-FCP-NEXT: vmovdqa 64(%r9), %xmm1
; AVX2-FCP-NEXT: vmovdqa 64(%r8), %xmm3
; AVX2-FCP-NEXT: vpunpcklwd {{.*#+}} xmm4 = xmm0[0],xmm2[0],xmm0[1],xmm2[1],xmm0[2],xmm2[2],xmm0[3],xmm2[3]
; AVX2-FCP-NEXT: vpermd %ymm4, %ymm7, %ymm5
; AVX2-FCP-NEXT: vpunpcklwd {{.*#+}} xmm6 = xmm3[0],xmm1[0],xmm3[1],xmm1[1],xmm3[2],xmm1[2],xmm3[3],xmm1[3]
; AVX2-FCP-NEXT: vpermd %ymm6, %ymm10, %ymm7
; AVX2-FCP-NEXT: vpblendd {{.*#+}} ymm5 = ymm7[0,1,2],ymm5[3],ymm7[4,5,6],ymm5[7]
; AVX2-FCP-NEXT: vmovdqa 64(%rcx), %xmm7
; AVX2-FCP-NEXT: vmovdqa 64(%rdx), %xmm8
; AVX2-FCP-NEXT: vmovdqa 64(%rsi), %xmm9
; AVX2-FCP-NEXT: vmovdqa 64(%rdi), %xmm10
; AVX2-FCP-NEXT: vpunpcklwd {{.*#+}} xmm11 = xmm8[0],xmm7[0],xmm8[1],xmm7[1],xmm8[2],xmm7[2],xmm8[3],xmm7[3]
; AVX2-FCP-NEXT: vpermd %ymm11, %ymm14, %ymm13
; AVX2-FCP-NEXT: vpunpcklwd {{.*#+}} xmm14 = xmm10[0],xmm9[0],xmm10[1],xmm9[1],xmm10[2],xmm9[2],xmm10[3],xmm9[3]
; AVX2-FCP-NEXT: vpermd %ymm14, %ymm12, %ymm15
; AVX2-FCP-NEXT: vpblendd {{.*#+}} ymm13 = ymm15[0],ymm13[1],ymm15[2,3,4],ymm13[5],ymm15[6,7]
; AVX2-FCP-NEXT: vpblendd {{.*#+}} ymm5 = ymm13[0,1],ymm5[2,3],ymm13[4,5],ymm5[6,7]
; AVX2-FCP-NEXT: vmovdqu %ymm5, {{[-0-9]+}}(%r{{[sb]}}p) # 32-byte Spill
; AVX2-FCP-NEXT: vpmovsxbd {{.*#+}} ymm13 = [2,2,2,2,0,0,3,3]
; AVX2-FCP-NEXT: vpermd %ymm4, %ymm13, %ymm4
; AVX2-FCP-NEXT: vpermd %ymm6, %ymm13, %ymm5
; AVX2-FCP-NEXT: vmovdqa %ymm13, %ymm15
; AVX2-FCP-NEXT: vpblendd {{.*#+}} ymm4 = ymm5[0,1,2],ymm4[3],ymm5[4,5,6],ymm4[7]
; AVX2-FCP-NEXT: vpmovsxbd {{.*#+}} ymm12 = [2,2,3,3,3,3,0,0]
; AVX2-FCP-NEXT: vpermd %ymm11, %ymm12, %ymm5
; AVX2-FCP-NEXT: vpermd %ymm14, %ymm12, %ymm6
; AVX2-FCP-NEXT: vmovdqa %ymm12, %ymm14
; AVX2-FCP-NEXT: vpblendd {{.*#+}} ymm5 = ymm6[0],ymm5[1],ymm6[2,3,4],ymm5[5],ymm6[6,7]
; AVX2-FCP-NEXT: vpblendd {{.*#+}} ymm4 = ymm5[0,1],ymm4[2,3],ymm5[4,5],ymm4[6,7]
; AVX2-FCP-NEXT: vmovdqu %ymm4, {{[-0-9]+}}(%r{{[sb]}}p) # 32-byte Spill
; AVX2-FCP-NEXT: vpunpckhwd {{.*#+}} xmm0 = xmm0[4],xmm2[4],xmm0[5],xmm2[5],xmm0[6],xmm2[6],xmm0[7],xmm2[7]
; AVX2-FCP-NEXT: vpunpckhwd {{.*#+}} xmm1 = xmm3[4],xmm1[4],xmm3[5],xmm1[5],xmm3[6],xmm1[6],xmm3[7],xmm1[7]
; AVX2-FCP-NEXT: vpmovsxbd {{.*#+}} ymm11 = [0,0,0,0,0,0,1,1]
; AVX2-FCP-NEXT: vpermd %ymm0, %ymm11, %ymm2
; AVX2-FCP-NEXT: vpmovsxbq {{.*#+}} ymm13 = [0,0,0,1]
; AVX2-FCP-NEXT: vpermd %ymm1, %ymm13, %ymm3
; AVX2-FCP-NEXT: vpblendd {{.*#+}} ymm2 = ymm3[0,1,2],ymm2[3],ymm3[4,5,6],ymm2[7]
; AVX2-FCP-NEXT: vpunpckhwd {{.*#+}} xmm3 = xmm8[4],xmm7[4],xmm8[5],xmm7[5],xmm8[6],xmm7[6],xmm8[7],xmm7[7]
; AVX2-FCP-NEXT: vpunpckhwd {{.*#+}} xmm4 = xmm10[4],xmm9[4],xmm10[5],xmm9[5],xmm10[6],xmm9[6],xmm10[7],xmm9[7]
; AVX2-FCP-NEXT: vpmovsxbd {{.*#+}} ymm10 = [0,0,1,1,1,1,0,0]
; AVX2-FCP-NEXT: vpermd %ymm3, %ymm10, %ymm5
; AVX2-FCP-NEXT: vpmovsxbq {{.*#+}} ymm12 = [0,1,1,0]
; AVX2-FCP-NEXT: vpermd %ymm4, %ymm12, %ymm6
; AVX2-FCP-NEXT: vpblendd {{.*#+}} ymm5 = ymm6[0],ymm5[1],ymm6[2,3,4],ymm5[5],ymm6[6,7]
; AVX2-FCP-NEXT: vpblendd {{.*#+}} ymm2 = ymm5[0,1],ymm2[2,3],ymm5[4,5],ymm2[6,7]
; AVX2-FCP-NEXT: vmovdqu %ymm2, {{[-0-9]+}}(%r{{[sb]}}p) # 32-byte Spill
; AVX2-FCP-NEXT: vpermd %ymm0, %ymm15, %ymm0
; AVX2-FCP-NEXT: vpermd %ymm1, %ymm15, %ymm1
; AVX2-FCP-NEXT: vpblendd {{.*#+}} ymm0 = ymm1[0,1,2],ymm0[3],ymm1[4,5,6],ymm0[7]
; AVX2-FCP-NEXT: vpermd %ymm3, %ymm14, %ymm1
; AVX2-FCP-NEXT: vpermd %ymm4, %ymm14, %ymm2
; AVX2-FCP-NEXT: vpblendd {{.*#+}} ymm1 = ymm2[0],ymm1[1],ymm2[2,3,4],ymm1[5],ymm2[6,7]
; AVX2-FCP-NEXT: vpblendd {{.*#+}} ymm0 = ymm1[0,1],ymm0[2,3],ymm1[4,5],ymm0[6,7]
; AVX2-FCP-NEXT: vmovdqu %ymm0, {{[-0-9]+}}(%r{{[sb]}}p) # 32-byte Spill
; AVX2-FCP-NEXT: vmovdqa 96(%rax), %xmm0
; AVX2-FCP-NEXT: vmovdqa 96(%r10), %xmm1
; AVX2-FCP-NEXT: vpunpcklwd {{.*#+}} xmm2 = xmm1[0],xmm0[0],xmm1[1],xmm0[1],xmm1[2],xmm0[2],xmm1[3],xmm0[3]
; AVX2-FCP-NEXT: vpermd %ymm2, %ymm11, %ymm3
; AVX2-FCP-NEXT: vmovdqa 96(%r9), %xmm4
; AVX2-FCP-NEXT: vmovdqa 96(%r8), %xmm5
; AVX2-FCP-NEXT: vpunpcklwd {{.*#+}} xmm6 = xmm5[0],xmm4[0],xmm5[1],xmm4[1],xmm5[2],xmm4[2],xmm5[3],xmm4[3]
; AVX2-FCP-NEXT: vpermd %ymm6, %ymm13, %ymm7
; AVX2-FCP-NEXT: vpblendd {{.*#+}} ymm3 = ymm7[0,1,2],ymm3[3],ymm7[4,5,6],ymm3[7]
; AVX2-FCP-NEXT: vmovdqa 96(%rcx), %xmm7
; AVX2-FCP-NEXT: vmovdqa 96(%rdx), %xmm8
; AVX2-FCP-NEXT: vpunpcklwd {{.*#+}} xmm9 = xmm8[0],xmm7[0],xmm8[1],xmm7[1],xmm8[2],xmm7[2],xmm8[3],xmm7[3]
; AVX2-FCP-NEXT: vpermd %ymm9, %ymm10, %ymm10
; AVX2-FCP-NEXT: vmovdqa 96(%rsi), %xmm11
; AVX2-FCP-NEXT: vmovdqa 96(%rdi), %xmm13
; AVX2-FCP-NEXT: vpunpcklwd {{.*#+}} xmm14 = xmm13[0],xmm11[0],xmm13[1],xmm11[1],xmm13[2],xmm11[2],xmm13[3],xmm11[3]
; AVX2-FCP-NEXT: vpermd %ymm14, %ymm12, %ymm15
; AVX2-FCP-NEXT: vpblendd {{.*#+}} ymm10 = ymm15[0],ymm10[1],ymm15[2,3,4],ymm10[5],ymm15[6,7]
; AVX2-FCP-NEXT: vpblendd {{.*#+}} ymm3 = ymm10[0,1],ymm3[2,3],ymm10[4,5],ymm3[6,7]
; AVX2-FCP-NEXT: vmovdqu %ymm3, {{[-0-9]+}}(%r{{[sb]}}p) # 32-byte Spill
; AVX2-FCP-NEXT: vpmovsxbd {{.*#+}} ymm10 = [2,2,2,2,0,0,3,3]
; AVX2-FCP-NEXT: vpermd %ymm2, %ymm10, %ymm2
; AVX2-FCP-NEXT: vpermd %ymm6, %ymm10, %ymm3
; AVX2-FCP-NEXT: vpblendd {{.*#+}} ymm2 = ymm3[0,1,2],ymm2[3],ymm3[4,5,6],ymm2[7]
; AVX2-FCP-NEXT: vpmovsxbd {{.*#+}} ymm12 = [2,2,3,3,3,3,0,0]
; AVX2-FCP-NEXT: vpermd %ymm9, %ymm12, %ymm3
; AVX2-FCP-NEXT: vpermd %ymm14, %ymm12, %ymm6
; AVX2-FCP-NEXT: vpblendd {{.*#+}} ymm3 = ymm6[0],ymm3[1],ymm6[2,3,4],ymm3[5],ymm6[6,7]
; AVX2-FCP-NEXT: vpblendd {{.*#+}} ymm2 = ymm3[0,1],ymm2[2,3],ymm3[4,5],ymm2[6,7]
; AVX2-FCP-NEXT: vmovdqu %ymm2, {{[-0-9]+}}(%r{{[sb]}}p) # 32-byte Spill
; AVX2-FCP-NEXT: vpunpckhwd {{.*#+}} xmm0 = xmm1[4],xmm0[4],xmm1[5],xmm0[5],xmm1[6],xmm0[6],xmm1[7],xmm0[7]
; AVX2-FCP-NEXT: vpunpckhwd {{.*#+}} xmm1 = xmm5[4],xmm4[4],xmm5[5],xmm4[5],xmm5[6],xmm4[6],xmm5[7],xmm4[7]
; AVX2-FCP-NEXT: vpmovsxbd {{.*#+}} ymm2 = [0,0,0,0,0,0,1,1]
; AVX2-FCP-NEXT: vpermd %ymm0, %ymm2, %ymm2
; AVX2-FCP-NEXT: vpmovsxbq {{.*#+}} ymm3 = [0,0,0,1]
; AVX2-FCP-NEXT: vpermd %ymm1, %ymm3, %ymm3
; AVX2-FCP-NEXT: vpblendd {{.*#+}} ymm2 = ymm3[0,1,2],ymm2[3],ymm3[4,5,6],ymm2[7]
; AVX2-FCP-NEXT: vpunpckhwd {{.*#+}} xmm3 = xmm8[4],xmm7[4],xmm8[5],xmm7[5],xmm8[6],xmm7[6],xmm8[7],xmm7[7]
; AVX2-FCP-NEXT: vpunpckhwd {{.*#+}} xmm4 = xmm13[4],xmm11[4],xmm13[5],xmm11[5],xmm13[6],xmm11[6],xmm13[7],xmm11[7]
; AVX2-FCP-NEXT: vpmovsxbd {{.*#+}} ymm5 = [0,0,1,1,1,1,0,0]
; AVX2-FCP-NEXT: vpermd %ymm3, %ymm5, %ymm5
; AVX2-FCP-NEXT: vpmovsxbq {{.*#+}} ymm6 = [0,1,1,0]
; AVX2-FCP-NEXT: vpermd %ymm4, %ymm6, %ymm6
; AVX2-FCP-NEXT: vpblendd {{.*#+}} ymm5 = ymm6[0],ymm5[1],ymm6[2,3,4],ymm5[5],ymm6[6,7]
; AVX2-FCP-NEXT: vpblendd {{.*#+}} ymm2 = ymm5[0,1],ymm2[2,3],ymm5[4,5],ymm2[6,7]
; AVX2-FCP-NEXT: vmovdqu %ymm2, {{[-0-9]+}}(%r{{[sb]}}p) # 32-byte Spill
; AVX2-FCP-NEXT: vpermd %ymm0, %ymm10, %ymm0
; AVX2-FCP-NEXT: vpermd %ymm1, %ymm10, %ymm1
; AVX2-FCP-NEXT: vpblendd {{.*#+}} ymm0 = ymm1[0,1,2],ymm0[3],ymm1[4,5,6],ymm0[7]
; AVX2-FCP-NEXT: vpermd %ymm3, %ymm12, %ymm1
; AVX2-FCP-NEXT: vpermd %ymm4, %ymm12, %ymm2
; AVX2-FCP-NEXT: vpblendd {{.*#+}} ymm1 = ymm2[0],ymm1[1],ymm2[2,3,4],ymm1[5],ymm2[6,7]
; AVX2-FCP-NEXT: vpblendd {{.*#+}} ymm0 = ymm1[0,1],ymm0[2,3],ymm1[4,5],ymm0[6,7]
; AVX2-FCP-NEXT: vmovdqu %ymm0, {{[-0-9]+}}(%r{{[sb]}}p) # 32-byte Spill
; AVX2-FCP-NEXT: vmovdqa (%r8), %ymm8
; AVX2-FCP-NEXT: vmovdqa (%r9), %ymm7
; AVX2-FCP-NEXT: vmovdqa (%r10), %ymm10
; AVX2-FCP-NEXT: vmovdqa (%rax), %ymm11
; AVX2-FCP-NEXT: vpunpcklwd {{.*#+}} ymm4 = ymm10[0],ymm11[0],ymm10[1],ymm11[1],ymm10[2],ymm11[2],ymm10[3],ymm11[3],ymm10[8],ymm11[8],ymm10[9],ymm11[9],ymm10[10],ymm11[10],ymm10[11],ymm11[11]
; AVX2-FCP-NEXT: vpmovsxbd {{.*#+}} ymm0 = [0,0,4,4,4,4,6,5]
; AVX2-FCP-NEXT: vpermd %ymm4, %ymm0, %ymm2
; AVX2-FCP-NEXT: vpunpcklwd {{.*#+}} ymm12 = ymm8[0],ymm7[0],ymm8[1],ymm7[1],ymm8[2],ymm7[2],ymm8[3],ymm7[3],ymm8[8],ymm7[8],ymm8[9],ymm7[9],ymm8[10],ymm7[10],ymm8[11],ymm7[11]
; AVX2-FCP-NEXT: vpmovsxbd {{.*#+}} ymm0 = [0,1,4,5,4,5,5,7]
; AVX2-FCP-NEXT: vpermd %ymm12, %ymm0, %ymm3
; AVX2-FCP-NEXT: vpblendd {{.*#+}} ymm6 = ymm3[0,1,2],ymm2[3],ymm3[4,5,6],ymm2[7]
; AVX2-FCP-NEXT: vmovdqa (%rdi), %ymm13
; AVX2-FCP-NEXT: vmovdqa (%rsi), %ymm14
; AVX2-FCP-NEXT: vmovdqa (%rdx), %ymm15
; AVX2-FCP-NEXT: vmovdqa (%rcx), %ymm2
; AVX2-FCP-NEXT: vpunpcklwd {{.*#+}} ymm1 = ymm15[0],ymm2[0],ymm15[1],ymm2[1],ymm15[2],ymm2[2],ymm15[3],ymm2[3],ymm15[8],ymm2[8],ymm15[9],ymm2[9],ymm15[10],ymm2[10],ymm15[11],ymm2[11]
; AVX2-FCP-NEXT: vpmovsxbd {{.*#+}} ymm0 = [4,4,2,1,6,5,6,5]
; AVX2-FCP-NEXT: vpermd %ymm1, %ymm0, %ymm5
; AVX2-FCP-NEXT: vpunpcklwd {{.*#+}} ymm0 = ymm13[0],ymm14[0],ymm13[1],ymm14[1],ymm13[2],ymm14[2],ymm13[3],ymm14[3],ymm13[8],ymm14[8],ymm13[9],ymm14[9],ymm13[10],ymm14[10],ymm13[11],ymm14[11]
; AVX2-FCP-NEXT: vpmovsxbd {{.*#+}} ymm3 = [4,5,1,3,5,7,5,7]
; AVX2-FCP-NEXT: vpermd %ymm0, %ymm3, %ymm9
; AVX2-FCP-NEXT: vpblendd {{.*#+}} ymm5 = ymm9[0],ymm5[1],ymm9[2,3,4],ymm5[5],ymm9[6,7]
; AVX2-FCP-NEXT: vpblendd {{.*#+}} ymm3 = ymm5[0,1],ymm6[2,3],ymm5[4,5],ymm6[6,7]
; AVX2-FCP-NEXT: vmovdqu %ymm3, {{[-0-9]+}}(%r{{[sb]}}p) # 32-byte Spill
; AVX2-FCP-NEXT: vpmovsxbd {{.*#+}} ymm3 = [0,2,4,6,4,6,6,7]
; AVX2-FCP-NEXT: vpermd %ymm4, %ymm3, %ymm4
; AVX2-FCP-NEXT: vpmovsxbd {{.*#+}} ymm3 = [2,1,6,5,6,5,7,7]
; AVX2-FCP-NEXT: vpermd %ymm12, %ymm3, %ymm9
; AVX2-FCP-NEXT: vpblendd {{.*#+}} ymm4 = ymm9[0,1,2],ymm4[3],ymm9[4,5,6],ymm4[7]
; AVX2-FCP-NEXT: vpmovsxbd {{.*#+}} ymm5 = [4,6,2,3,6,7,6,7]
; AVX2-FCP-NEXT: vpermd %ymm1, %ymm5, %ymm9
; AVX2-FCP-NEXT: vpmovsxbd {{.*#+}} ymm3 = [6,5,3,3,7,7,7,7]
; AVX2-FCP-NEXT: vpermd %ymm0, %ymm3, %ymm0
; AVX2-FCP-NEXT: vpblendd {{.*#+}} ymm0 = ymm0[0],ymm9[1],ymm0[2,3,4],ymm9[5],ymm0[6,7]
; AVX2-FCP-NEXT: vpblendd {{.*#+}} ymm0 = ymm0[0,1],ymm4[2,3],ymm0[4,5],ymm4[6,7]
; AVX2-FCP-NEXT: vmovdqu %ymm0, {{[-0-9]+}}(%r{{[sb]}}p) # 32-byte Spill
; AVX2-FCP-NEXT: vpunpckhwd {{.*#+}} ymm0 = ymm10[4],ymm11[4],ymm10[5],ymm11[5],ymm10[6],ymm11[6],ymm10[7],ymm11[7],ymm10[12],ymm11[12],ymm10[13],ymm11[13],ymm10[14],ymm11[14],ymm10[15],ymm11[15]
; AVX2-FCP-NEXT: vpunpckhwd {{.*#+}} ymm4 = ymm8[4],ymm7[4],ymm8[5],ymm7[5],ymm8[6],ymm7[6],ymm8[7],ymm7[7],ymm8[12],ymm7[12],ymm8[13],ymm7[13],ymm8[14],ymm7[14],ymm8[15],ymm7[15]
; AVX2-FCP-NEXT: vpmovsxbd {{.*#+}} ymm11 = [0,0,4,4,4,4,6,5]
; AVX2-FCP-NEXT: vpermd %ymm0, %ymm11, %ymm6
; AVX2-FCP-NEXT: vpmovsxbd {{.*#+}} ymm8 = [0,1,4,5,4,5,5,7]
; AVX2-FCP-NEXT: vpermd %ymm4, %ymm8, %ymm7
; AVX2-FCP-NEXT: vpblendd {{.*#+}} ymm6 = ymm7[0,1,2],ymm6[3],ymm7[4,5,6],ymm6[7]
; AVX2-FCP-NEXT: vpunpckhwd {{.*#+}} ymm2 = ymm15[4],ymm2[4],ymm15[5],ymm2[5],ymm15[6],ymm2[6],ymm15[7],ymm2[7],ymm15[12],ymm2[12],ymm15[13],ymm2[13],ymm15[14],ymm2[14],ymm15[15],ymm2[15]
; AVX2-FCP-NEXT: vpunpckhwd {{.*#+}} ymm7 = ymm13[4],ymm14[4],ymm13[5],ymm14[5],ymm13[6],ymm14[6],ymm13[7],ymm14[7],ymm13[12],ymm14[12],ymm13[13],ymm14[13],ymm13[14],ymm14[14],ymm13[15],ymm14[15]
; AVX2-FCP-NEXT: vpmovsxbd {{.*#+}} ymm12 = [4,4,2,1,6,5,6,5]
; AVX2-FCP-NEXT: vpermd %ymm2, %ymm12, %ymm9
; AVX2-FCP-NEXT: vpmovsxbd {{.*#+}} ymm1 = [4,5,1,3,5,7,5,7]
; AVX2-FCP-NEXT: vpermd %ymm7, %ymm1, %ymm10
; AVX2-FCP-NEXT: vpblendd {{.*#+}} ymm9 = ymm10[0],ymm9[1],ymm10[2,3,4],ymm9[5],ymm10[6,7]
; AVX2-FCP-NEXT: vpblendd {{.*#+}} ymm1 = ymm9[0,1],ymm6[2,3],ymm9[4,5],ymm6[6,7]
; AVX2-FCP-NEXT: vmovdqu %ymm1, {{[-0-9]+}}(%r{{[sb]}}p) # 32-byte Spill
; AVX2-FCP-NEXT: vpmovsxbd {{.*#+}} ymm1 = [0,2,4,6,4,6,6,7]
; AVX2-FCP-NEXT: vpermd %ymm0, %ymm1, %ymm0
; AVX2-FCP-NEXT: vpmovsxbd {{.*#+}} ymm1 = [2,1,6,5,6,5,7,7]
; AVX2-FCP-NEXT: vpermd %ymm4, %ymm1, %ymm4
; AVX2-FCP-NEXT: vpblendd {{.*#+}} ymm0 = ymm4[0,1,2],ymm0[3],ymm4[4,5,6],ymm0[7]
; AVX2-FCP-NEXT: vpermd %ymm2, %ymm5, %ymm2
; AVX2-FCP-NEXT: vpermd %ymm7, %ymm3, %ymm4
; AVX2-FCP-NEXT: vpblendd {{.*#+}} ymm2 = ymm4[0],ymm2[1],ymm4[2,3,4],ymm2[5],ymm4[6,7]
; AVX2-FCP-NEXT: vpblendd {{.*#+}} ymm0 = ymm2[0,1],ymm0[2,3],ymm2[4,5],ymm0[6,7]
; AVX2-FCP-NEXT: vmovdqu %ymm0, {{[-0-9]+}}(%r{{[sb]}}p) # 32-byte Spill
; AVX2-FCP-NEXT: vmovdqa 32(%r8), %ymm5
; AVX2-FCP-NEXT: vmovdqa 32(%r9), %ymm3
; AVX2-FCP-NEXT: vmovdqa 32(%r10), %ymm4
; AVX2-FCP-NEXT: vmovdqa 32(%rax), %ymm6
; AVX2-FCP-NEXT: vpunpcklwd {{.*#+}} ymm7 = ymm4[0],ymm6[0],ymm4[1],ymm6[1],ymm4[2],ymm6[2],ymm4[3],ymm6[3],ymm4[8],ymm6[8],ymm4[9],ymm6[9],ymm4[10],ymm6[10],ymm4[11],ymm6[11]
; AVX2-FCP-NEXT: vpermd %ymm7, %ymm11, %ymm9
; AVX2-FCP-NEXT: vpunpcklwd {{.*#+}} ymm10 = ymm5[0],ymm3[0],ymm5[1],ymm3[1],ymm5[2],ymm3[2],ymm5[3],ymm3[3],ymm5[8],ymm3[8],ymm5[9],ymm3[9],ymm5[10],ymm3[10],ymm5[11],ymm3[11]
; AVX2-FCP-NEXT: vpermd %ymm10, %ymm8, %ymm11
; AVX2-FCP-NEXT: vpblendd {{.*#+}} ymm9 = ymm11[0,1,2],ymm9[3],ymm11[4,5,6],ymm9[7]
; AVX2-FCP-NEXT: vmovdqa 32(%rdi), %ymm11
; AVX2-FCP-NEXT: vmovdqa 32(%rsi), %ymm13
; AVX2-FCP-NEXT: vmovdqa 32(%rdx), %ymm15
; AVX2-FCP-NEXT: vmovdqa 32(%rcx), %ymm2
; AVX2-FCP-NEXT: vpunpcklwd {{.*#+}} ymm14 = ymm15[0],ymm2[0],ymm15[1],ymm2[1],ymm15[2],ymm2[2],ymm15[3],ymm2[3],ymm15[8],ymm2[8],ymm15[9],ymm2[9],ymm15[10],ymm2[10],ymm15[11],ymm2[11]
; AVX2-FCP-NEXT: vpermd %ymm14, %ymm12, %ymm1
; AVX2-FCP-NEXT: vpunpcklwd {{.*#+}} ymm0 = ymm11[0],ymm13[0],ymm11[1],ymm13[1],ymm11[2],ymm13[2],ymm11[3],ymm13[3],ymm11[8],ymm13[8],ymm11[9],ymm13[9],ymm11[10],ymm13[10],ymm11[11],ymm13[11]
; AVX2-FCP-NEXT: vpmovsxbd {{.*#+}} ymm8 = [4,5,1,3,5,7,5,7]
; AVX2-FCP-NEXT: vpermd %ymm0, %ymm8, %ymm12
; AVX2-FCP-NEXT: vpblendd {{.*#+}} ymm1 = ymm12[0],ymm1[1],ymm12[2,3,4],ymm1[5],ymm12[6,7]
; AVX2-FCP-NEXT: vpblendd {{.*#+}} ymm1 = ymm1[0,1],ymm9[2,3],ymm1[4,5],ymm9[6,7]
; AVX2-FCP-NEXT: vmovdqu %ymm1, {{[-0-9]+}}(%r{{[sb]}}p) # 32-byte Spill
; AVX2-FCP-NEXT: vpmovsxbd {{.*#+}} ymm8 = [0,2,4,6,4,6,6,7]
; AVX2-FCP-NEXT: vpermd %ymm7, %ymm8, %ymm1
; AVX2-FCP-NEXT: vpmovsxbd {{.*#+}} ymm9 = [2,1,6,5,6,5,7,7]
; AVX2-FCP-NEXT: vpermd %ymm10, %ymm9, %ymm7
; AVX2-FCP-NEXT: vpblendd {{.*#+}} ymm1 = ymm7[0,1,2],ymm1[3],ymm7[4,5,6],ymm1[7]
; AVX2-FCP-NEXT: vpmovsxbd {{.*#+}} ymm10 = [4,6,2,3,6,7,6,7]
; AVX2-FCP-NEXT: vpermd %ymm14, %ymm10, %ymm7
; AVX2-FCP-NEXT: vpmovsxbd {{.*#+}} ymm12 = [6,5,3,3,7,7,7,7]
; AVX2-FCP-NEXT: vpermd %ymm0, %ymm12, %ymm0
; AVX2-FCP-NEXT: vpblendd {{.*#+}} ymm0 = ymm0[0],ymm7[1],ymm0[2,3,4],ymm7[5],ymm0[6,7]
; AVX2-FCP-NEXT: vpblendd {{.*#+}} ymm0 = ymm0[0,1],ymm1[2,3],ymm0[4,5],ymm1[6,7]
; AVX2-FCP-NEXT: vmovdqu %ymm0, {{[-0-9]+}}(%r{{[sb]}}p) # 32-byte Spill
; AVX2-FCP-NEXT: vpunpckhwd {{.*#+}} ymm0 = ymm4[4],ymm6[4],ymm4[5],ymm6[5],ymm4[6],ymm6[6],ymm4[7],ymm6[7],ymm4[12],ymm6[12],ymm4[13],ymm6[13],ymm4[14],ymm6[14],ymm4[15],ymm6[15]
; AVX2-FCP-NEXT: vpunpckhwd {{.*#+}} ymm1 = ymm5[4],ymm3[4],ymm5[5],ymm3[5],ymm5[6],ymm3[6],ymm5[7],ymm3[7],ymm5[12],ymm3[12],ymm5[13],ymm3[13],ymm5[14],ymm3[14],ymm5[15],ymm3[15]
; AVX2-FCP-NEXT: vpmovsxbd {{.*#+}} ymm7 = [0,0,4,4,4,4,6,5]
; AVX2-FCP-NEXT: vpermd %ymm0, %ymm7, %ymm3
; AVX2-FCP-NEXT: vpmovsxbd {{.*#+}} ymm14 = [0,1,4,5,4,5,5,7]
; AVX2-FCP-NEXT: vpermd %ymm1, %ymm14, %ymm4
; AVX2-FCP-NEXT: vpblendd {{.*#+}} ymm3 = ymm4[0,1,2],ymm3[3],ymm4[4,5,6],ymm3[7]
; AVX2-FCP-NEXT: vpunpckhwd {{.*#+}} ymm2 = ymm15[4],ymm2[4],ymm15[5],ymm2[5],ymm15[6],ymm2[6],ymm15[7],ymm2[7],ymm15[12],ymm2[12],ymm15[13],ymm2[13],ymm15[14],ymm2[14],ymm15[15],ymm2[15]
; AVX2-FCP-NEXT: vpunpckhwd {{.*#+}} ymm4 = ymm11[4],ymm13[4],ymm11[5],ymm13[5],ymm11[6],ymm13[6],ymm11[7],ymm13[7],ymm11[12],ymm13[12],ymm11[13],ymm13[13],ymm11[14],ymm13[14],ymm11[15],ymm13[15]
; AVX2-FCP-NEXT: vpmovsxbd {{.*#+}} ymm13 = [4,4,2,1,6,5,6,5]
; AVX2-FCP-NEXT: vpermd %ymm2, %ymm13, %ymm5
; AVX2-FCP-NEXT: vpmovsxbd {{.*#+}} ymm6 = [4,5,1,3,5,7,5,7]
; AVX2-FCP-NEXT: vpermd %ymm4, %ymm6, %ymm6
; AVX2-FCP-NEXT: vpblendd {{.*#+}} ymm5 = ymm6[0],ymm5[1],ymm6[2,3,4],ymm5[5],ymm6[6,7]
; AVX2-FCP-NEXT: vpblendd {{.*#+}} ymm3 = ymm5[0,1],ymm3[2,3],ymm5[4,5],ymm3[6,7]
; AVX2-FCP-NEXT: vmovdqu %ymm3, {{[-0-9]+}}(%r{{[sb]}}p) # 32-byte Spill
; AVX2-FCP-NEXT: vpermd %ymm0, %ymm8, %ymm0
; AVX2-FCP-NEXT: vpermd %ymm1, %ymm9, %ymm1
; AVX2-FCP-NEXT: vpblendd {{.*#+}} ymm0 = ymm1[0,1,2],ymm0[3],ymm1[4,5,6],ymm0[7]
; AVX2-FCP-NEXT: vpermd %ymm2, %ymm10, %ymm1
; AVX2-FCP-NEXT: vpermd %ymm4, %ymm12, %ymm2
; AVX2-FCP-NEXT: vpblendd {{.*#+}} ymm1 = ymm2[0],ymm1[1],ymm2[2,3,4],ymm1[5],ymm2[6,7]
; AVX2-FCP-NEXT: vpblendd {{.*#+}} ymm0 = ymm1[0,1],ymm0[2,3],ymm1[4,5],ymm0[6,7]
; AVX2-FCP-NEXT: vmovdqu %ymm0, (%rsp) # 32-byte Spill
; AVX2-FCP-NEXT: vmovdqa 64(%r8), %ymm9
; AVX2-FCP-NEXT: vmovdqa 64(%r9), %ymm8
; AVX2-FCP-NEXT: vmovdqa 64(%r10), %ymm3
; AVX2-FCP-NEXT: vmovdqa 64(%rax), %ymm4
; AVX2-FCP-NEXT: vpunpcklwd {{.*#+}} ymm5 = ymm3[0],ymm4[0],ymm3[1],ymm4[1],ymm3[2],ymm4[2],ymm3[3],ymm4[3],ymm3[8],ymm4[8],ymm3[9],ymm4[9],ymm3[10],ymm4[10],ymm3[11],ymm4[11]
; AVX2-FCP-NEXT: vpermd %ymm5, %ymm7, %ymm6
; AVX2-FCP-NEXT: vpunpcklwd {{.*#+}} ymm7 = ymm9[0],ymm8[0],ymm9[1],ymm8[1],ymm9[2],ymm8[2],ymm9[3],ymm8[3],ymm9[8],ymm8[8],ymm9[9],ymm8[9],ymm9[10],ymm8[10],ymm9[11],ymm8[11]
; AVX2-FCP-NEXT: vpermd %ymm7, %ymm14, %ymm10
; AVX2-FCP-NEXT: vpblendd {{.*#+}} ymm6 = ymm10[0,1,2],ymm6[3],ymm10[4,5,6],ymm6[7]
; AVX2-FCP-NEXT: vmovdqa 64(%rdi), %ymm12
; AVX2-FCP-NEXT: vmovdqa 64(%rsi), %ymm15
; AVX2-FCP-NEXT: vmovdqa 64(%rdx), %ymm11
; AVX2-FCP-NEXT: vmovdqa 64(%rcx), %ymm10
; AVX2-FCP-NEXT: vpunpcklwd {{.*#+}} ymm1 = ymm11[0],ymm10[0],ymm11[1],ymm10[1],ymm11[2],ymm10[2],ymm11[3],ymm10[3],ymm11[8],ymm10[8],ymm11[9],ymm10[9],ymm11[10],ymm10[10],ymm11[11],ymm10[11]
; AVX2-FCP-NEXT: vpermd %ymm1, %ymm13, %ymm2
; AVX2-FCP-NEXT: vpunpcklwd {{.*#+}} ymm0 = ymm12[0],ymm15[0],ymm12[1],ymm15[1],ymm12[2],ymm15[2],ymm12[3],ymm15[3],ymm12[8],ymm15[8],ymm12[9],ymm15[9],ymm12[10],ymm15[10],ymm12[11],ymm15[11]
; AVX2-FCP-NEXT: vpmovsxbd {{.*#+}} ymm13 = [4,5,1,3,5,7,5,7]
; AVX2-FCP-NEXT: vpermd %ymm0, %ymm13, %ymm14
; AVX2-FCP-NEXT: vpblendd {{.*#+}} ymm2 = ymm14[0],ymm2[1],ymm14[2,3,4],ymm2[5],ymm14[6,7]
; AVX2-FCP-NEXT: vpblendd {{.*#+}} ymm2 = ymm2[0,1],ymm6[2,3],ymm2[4,5],ymm6[6,7]
; AVX2-FCP-NEXT: vmovdqu %ymm2, {{[-0-9]+}}(%r{{[sb]}}p) # 32-byte Spill
; AVX2-FCP-NEXT: vpmovsxbd {{.*#+}} ymm6 = [0,2,4,6,4,6,6,7]
; AVX2-FCP-NEXT: vpermd %ymm5, %ymm6, %ymm2
; AVX2-FCP-NEXT: vpmovsxbd {{.*#+}} ymm14 = [2,1,6,5,6,5,7,7]
; AVX2-FCP-NEXT: vpermd %ymm7, %ymm14, %ymm5
; AVX2-FCP-NEXT: vpblendd {{.*#+}} ymm2 = ymm5[0,1,2],ymm2[3],ymm5[4,5,6],ymm2[7]
; AVX2-FCP-NEXT: vpmovsxbd {{.*#+}} ymm5 = [4,6,2,3,6,7,6,7]
; AVX2-FCP-NEXT: vpermd %ymm1, %ymm5, %ymm1
; AVX2-FCP-NEXT: vpmovsxbd {{.*#+}} ymm7 = [6,5,3,3,7,7,7,7]
; AVX2-FCP-NEXT: vpermd %ymm0, %ymm7, %ymm0
; AVX2-FCP-NEXT: vpblendd {{.*#+}} ymm0 = ymm0[0],ymm1[1],ymm0[2,3,4],ymm1[5],ymm0[6,7]
; AVX2-FCP-NEXT: vpblendd {{.*#+}} ymm0 = ymm0[0,1],ymm2[2,3],ymm0[4,5],ymm2[6,7]
; AVX2-FCP-NEXT: vmovdqu %ymm0, {{[-0-9]+}}(%r{{[sb]}}p) # 32-byte Spill
; AVX2-FCP-NEXT: vpunpckhwd {{.*#+}} ymm0 = ymm3[4],ymm4[4],ymm3[5],ymm4[5],ymm3[6],ymm4[6],ymm3[7],ymm4[7],ymm3[12],ymm4[12],ymm3[13],ymm4[13],ymm3[14],ymm4[14],ymm3[15],ymm4[15]
; AVX2-FCP-NEXT: vpunpckhwd {{.*#+}} ymm1 = ymm9[4],ymm8[4],ymm9[5],ymm8[5],ymm9[6],ymm8[6],ymm9[7],ymm8[7],ymm9[12],ymm8[12],ymm9[13],ymm8[13],ymm9[14],ymm8[14],ymm9[15],ymm8[15]
; AVX2-FCP-NEXT: vpmovsxbd {{.*#+}} ymm9 = [0,0,4,4,4,4,6,5]
; AVX2-FCP-NEXT: vpermd %ymm0, %ymm9, %ymm2
; AVX2-FCP-NEXT: vpmovsxbd {{.*#+}} ymm3 = [0,1,4,5,4,5,5,7]
; AVX2-FCP-NEXT: vpermd %ymm1, %ymm3, %ymm3
; AVX2-FCP-NEXT: vpblendd {{.*#+}} ymm2 = ymm3[0,1,2],ymm2[3],ymm3[4,5,6],ymm2[7]
; AVX2-FCP-NEXT: vpunpckhwd {{.*#+}} ymm3 = ymm11[4],ymm10[4],ymm11[5],ymm10[5],ymm11[6],ymm10[6],ymm11[7],ymm10[7],ymm11[12],ymm10[12],ymm11[13],ymm10[13],ymm11[14],ymm10[14],ymm11[15],ymm10[15]
; AVX2-FCP-NEXT: vpunpckhwd {{.*#+}} ymm4 = ymm12[4],ymm15[4],ymm12[5],ymm15[5],ymm12[6],ymm15[6],ymm12[7],ymm15[7],ymm12[12],ymm15[12],ymm12[13],ymm15[13],ymm12[14],ymm15[14],ymm12[15],ymm15[15]
; AVX2-FCP-NEXT: vpmovsxbd {{.*#+}} ymm7 = [4,4,2,1,6,5,6,5]
; AVX2-FCP-NEXT: vpermd %ymm3, %ymm7, %ymm7
; AVX2-FCP-NEXT: vpermd %ymm4, %ymm13, %ymm8
; AVX2-FCP-NEXT: vpblendd {{.*#+}} ymm7 = ymm8[0],ymm7[1],ymm8[2,3,4],ymm7[5],ymm8[6,7]
; AVX2-FCP-NEXT: vpblendd {{.*#+}} ymm2 = ymm7[0,1],ymm2[2,3],ymm7[4,5],ymm2[6,7]
; AVX2-FCP-NEXT: vmovdqu %ymm2, {{[-0-9]+}}(%r{{[sb]}}p) # 32-byte Spill
; AVX2-FCP-NEXT: vpermd %ymm0, %ymm6, %ymm0
; AVX2-FCP-NEXT: vpermd %ymm1, %ymm14, %ymm1
; AVX2-FCP-NEXT: vpblendd {{.*#+}} ymm0 = ymm1[0,1,2],ymm0[3],ymm1[4,5,6],ymm0[7]
; AVX2-FCP-NEXT: vpermd %ymm3, %ymm5, %ymm1
; AVX2-FCP-NEXT: vpmovsxbd {{.*#+}} ymm2 = [6,5,3,3,7,7,7,7]
; AVX2-FCP-NEXT: vpermd %ymm4, %ymm2, %ymm2
; AVX2-FCP-NEXT: vpblendd {{.*#+}} ymm1 = ymm2[0],ymm1[1],ymm2[2,3,4],ymm1[5],ymm2[6,7]
; AVX2-FCP-NEXT: vpblendd {{.*#+}} ymm0 = ymm1[0,1],ymm0[2,3],ymm1[4,5],ymm0[6,7]
; AVX2-FCP-NEXT: vmovdqu %ymm0, {{[-0-9]+}}(%r{{[sb]}}p) # 32-byte Spill
; AVX2-FCP-NEXT: vmovdqa 96(%r8), %ymm6
; AVX2-FCP-NEXT: vmovdqa 96(%r9), %ymm5
; AVX2-FCP-NEXT: vmovdqa 96(%r10), %ymm3
; AVX2-FCP-NEXT: vmovdqa 96(%rax), %ymm4
; AVX2-FCP-NEXT: vpunpcklwd {{.*#+}} ymm8 = ymm3[0],ymm4[0],ymm3[1],ymm4[1],ymm3[2],ymm4[2],ymm3[3],ymm4[3],ymm3[8],ymm4[8],ymm3[9],ymm4[9],ymm3[10],ymm4[10],ymm3[11],ymm4[11]
; AVX2-FCP-NEXT: vpermd %ymm8, %ymm9, %ymm9
; AVX2-FCP-NEXT: vpunpcklwd {{.*#+}} ymm10 = ymm6[0],ymm5[0],ymm6[1],ymm5[1],ymm6[2],ymm5[2],ymm6[3],ymm5[3],ymm6[8],ymm5[8],ymm6[9],ymm5[9],ymm6[10],ymm5[10],ymm6[11],ymm5[11]
; AVX2-FCP-NEXT: vpmovsxbd {{.*#+}} ymm0 = [0,1,4,5,4,5,5,7]
; AVX2-FCP-NEXT: vpermd %ymm10, %ymm0, %ymm11
; AVX2-FCP-NEXT: vpblendd {{.*#+}} ymm9 = ymm11[0,1,2],ymm9[3],ymm11[4,5,6],ymm9[7]
; AVX2-FCP-NEXT: vmovdqa 96(%rdi), %ymm11
; AVX2-FCP-NEXT: vmovdqa 96(%rsi), %ymm12
; AVX2-FCP-NEXT: vmovdqa 96(%rdx), %ymm14
; AVX2-FCP-NEXT: vmovdqa 96(%rcx), %ymm15
; AVX2-FCP-NEXT: vpunpcklwd {{.*#+}} ymm1 = ymm14[0],ymm15[0],ymm14[1],ymm15[1],ymm14[2],ymm15[2],ymm14[3],ymm15[3],ymm14[8],ymm15[8],ymm14[9],ymm15[9],ymm14[10],ymm15[10],ymm14[11],ymm15[11]
; AVX2-FCP-NEXT: vpmovsxbd {{.*#+}} ymm0 = [4,4,2,1,6,5,6,5]
; AVX2-FCP-NEXT: vpermd %ymm1, %ymm0, %ymm2
; AVX2-FCP-NEXT: vpunpcklwd {{.*#+}} ymm0 = ymm11[0],ymm12[0],ymm11[1],ymm12[1],ymm11[2],ymm12[2],ymm11[3],ymm12[3],ymm11[8],ymm12[8],ymm11[9],ymm12[9],ymm11[10],ymm12[10],ymm11[11],ymm12[11]
; AVX2-FCP-NEXT: vmovdqa %ymm13, %ymm7
; AVX2-FCP-NEXT: vpermd %ymm0, %ymm13, %ymm13
; AVX2-FCP-NEXT: vpblendd {{.*#+}} ymm2 = ymm13[0],ymm2[1],ymm13[2,3,4],ymm2[5],ymm13[6,7]
; AVX2-FCP-NEXT: vpblendd {{.*#+}} ymm2 = ymm2[0,1],ymm9[2,3],ymm2[4,5],ymm9[6,7]
; AVX2-FCP-NEXT: vpmovsxbd {{.*#+}} ymm9 = [0,2,4,6,4,6,6,7]
; AVX2-FCP-NEXT: vpermd %ymm8, %ymm9, %ymm8
; AVX2-FCP-NEXT: vpmovsxbd {{.*#+}} ymm13 = [2,1,6,5,6,5,7,7]
; AVX2-FCP-NEXT: vpermd %ymm10, %ymm13, %ymm9
; AVX2-FCP-NEXT: vpblendd {{.*#+}} ymm8 = ymm9[0,1,2],ymm8[3],ymm9[4,5,6],ymm8[7]
; AVX2-FCP-NEXT: vpmovsxbd {{.*#+}} ymm9 = [4,6,2,3,6,7,6,7]
; AVX2-FCP-NEXT: vpermd %ymm1, %ymm9, %ymm1
; AVX2-FCP-NEXT: vpmovsxbd {{.*#+}} ymm10 = [6,5,3,3,7,7,7,7]
; AVX2-FCP-NEXT: vpermd %ymm0, %ymm10, %ymm0
; AVX2-FCP-NEXT: vpblendd {{.*#+}} ymm0 = ymm0[0],ymm1[1],ymm0[2,3,4],ymm1[5],ymm0[6,7]
; AVX2-FCP-NEXT: vpblendd {{.*#+}} ymm0 = ymm0[0,1],ymm8[2,3],ymm0[4,5],ymm8[6,7]
; AVX2-FCP-NEXT: vpunpckhwd {{.*#+}} ymm1 = ymm3[4],ymm4[4],ymm3[5],ymm4[5],ymm3[6],ymm4[6],ymm3[7],ymm4[7],ymm3[12],ymm4[12],ymm3[13],ymm4[13],ymm3[14],ymm4[14],ymm3[15],ymm4[15]
; AVX2-FCP-NEXT: vpunpckhwd {{.*#+}} ymm3 = ymm6[4],ymm5[4],ymm6[5],ymm5[5],ymm6[6],ymm5[6],ymm6[7],ymm5[7],ymm6[12],ymm5[12],ymm6[13],ymm5[13],ymm6[14],ymm5[14],ymm6[15],ymm5[15]
; AVX2-FCP-NEXT: vpmovsxbd {{.*#+}} ymm4 = [0,0,4,4,4,4,6,5]
; AVX2-FCP-NEXT: vpermd %ymm1, %ymm4, %ymm4
; AVX2-FCP-NEXT: vpmovsxbd {{.*#+}} ymm5 = [0,1,4,5,4,5,5,7]
; AVX2-FCP-NEXT: vpermd %ymm3, %ymm5, %ymm5
; AVX2-FCP-NEXT: vpblendd {{.*#+}} ymm4 = ymm5[0,1,2],ymm4[3],ymm5[4,5,6],ymm4[7]
; AVX2-FCP-NEXT: vpunpckhwd {{.*#+}} ymm5 = ymm14[4],ymm15[4],ymm14[5],ymm15[5],ymm14[6],ymm15[6],ymm14[7],ymm15[7],ymm14[12],ymm15[12],ymm14[13],ymm15[13],ymm14[14],ymm15[14],ymm14[15],ymm15[15]
; AVX2-FCP-NEXT: vpunpckhwd {{.*#+}} ymm6 = ymm11[4],ymm12[4],ymm11[5],ymm12[5],ymm11[6],ymm12[6],ymm11[7],ymm12[7],ymm11[12],ymm12[12],ymm11[13],ymm12[13],ymm11[14],ymm12[14],ymm11[15],ymm12[15]
; AVX2-FCP-NEXT: vpmovsxbd {{.*#+}} ymm8 = [4,4,2,1,6,5,6,5]
; AVX2-FCP-NEXT: vpermd %ymm5, %ymm8, %ymm8
; AVX2-FCP-NEXT: vpermd %ymm6, %ymm7, %ymm9
; AVX2-FCP-NEXT: vpblendd {{.*#+}} ymm8 = ymm9[0],ymm8[1],ymm9[2,3,4],ymm8[5],ymm9[6,7]
; AVX2-FCP-NEXT: vpblendd {{.*#+}} ymm4 = ymm8[0,1],ymm4[2,3],ymm8[4,5],ymm4[6,7]
; AVX2-FCP-NEXT: vpmovsxbd {{.*#+}} ymm7 = [0,2,4,6,4,6,6,7]
; AVX2-FCP-NEXT: vpermd %ymm1, %ymm7, %ymm1
; AVX2-FCP-NEXT: vpermd %ymm3, %ymm13, %ymm3
; AVX2-FCP-NEXT: vpblendd {{.*#+}} ymm1 = ymm3[0,1,2],ymm1[3],ymm3[4,5,6],ymm1[7]
; AVX2-FCP-NEXT: vpmovsxbd {{.*#+}} ymm3 = [4,6,2,3,6,7,6,7]
; AVX2-FCP-NEXT: vpermd %ymm5, %ymm3, %ymm3
; AVX2-FCP-NEXT: vpermd %ymm6, %ymm10, %ymm5
; AVX2-FCP-NEXT: vpblendd {{.*#+}} ymm3 = ymm5[0],ymm3[1],ymm5[2,3,4],ymm3[5],ymm5[6,7]
; AVX2-FCP-NEXT: vpblendd {{.*#+}} ymm1 = ymm3[0,1],ymm1[2,3],ymm3[4,5],ymm1[6,7]
; AVX2-FCP-NEXT: movq {{[0-9]+}}(%rsp), %rax
; AVX2-FCP-NEXT: vmovdqa %ymm1, 992(%rax)
; AVX2-FCP-NEXT: vmovdqa %ymm4, 960(%rax)
; AVX2-FCP-NEXT: vmovdqa %ymm0, 928(%rax)
; AVX2-FCP-NEXT: vmovdqa %ymm2, 896(%rax)
; AVX2-FCP-NEXT: vmovups {{[-0-9]+}}(%r{{[sb]}}p), %ymm0 # 32-byte Reload
; AVX2-FCP-NEXT: vmovaps %ymm0, 736(%rax)
; AVX2-FCP-NEXT: vmovups {{[-0-9]+}}(%r{{[sb]}}p), %ymm0 # 32-byte Reload
; AVX2-FCP-NEXT: vmovaps %ymm0, 704(%rax)
; AVX2-FCP-NEXT: vmovups {{[-0-9]+}}(%r{{[sb]}}p), %ymm0 # 32-byte Reload
; AVX2-FCP-NEXT: vmovaps %ymm0, 672(%rax)
; AVX2-FCP-NEXT: vmovups {{[-0-9]+}}(%r{{[sb]}}p), %ymm0 # 32-byte Reload
; AVX2-FCP-NEXT: vmovaps %ymm0, 640(%rax)
; AVX2-FCP-NEXT: vmovups (%rsp), %ymm0 # 32-byte Reload
; AVX2-FCP-NEXT: vmovaps %ymm0, 480(%rax)
; AVX2-FCP-NEXT: vmovups {{[-0-9]+}}(%r{{[sb]}}p), %ymm0 # 32-byte Reload
; AVX2-FCP-NEXT: vmovaps %ymm0, 448(%rax)
; AVX2-FCP-NEXT: vmovups {{[-0-9]+}}(%r{{[sb]}}p), %ymm0 # 32-byte Reload
; AVX2-FCP-NEXT: vmovaps %ymm0, 416(%rax)
; AVX2-FCP-NEXT: vmovups {{[-0-9]+}}(%r{{[sb]}}p), %ymm0 # 32-byte Reload
; AVX2-FCP-NEXT: vmovaps %ymm0, 384(%rax)
; AVX2-FCP-NEXT: vmovups {{[-0-9]+}}(%r{{[sb]}}p), %ymm0 # 32-byte Reload
; AVX2-FCP-NEXT: vmovaps %ymm0, 224(%rax)
; AVX2-FCP-NEXT: vmovups {{[-0-9]+}}(%r{{[sb]}}p), %ymm0 # 32-byte Reload
; AVX2-FCP-NEXT: vmovaps %ymm0, 192(%rax)
; AVX2-FCP-NEXT: vmovups {{[-0-9]+}}(%r{{[sb]}}p), %ymm0 # 32-byte Reload
; AVX2-FCP-NEXT: vmovaps %ymm0, 160(%rax)
; AVX2-FCP-NEXT: vmovups {{[-0-9]+}}(%r{{[sb]}}p), %ymm0 # 32-byte Reload
; AVX2-FCP-NEXT: vmovaps %ymm0, 128(%rax)
; AVX2-FCP-NEXT: vmovups {{[-0-9]+}}(%r{{[sb]}}p), %ymm0 # 32-byte Reload
; AVX2-FCP-NEXT: vmovaps %ymm0, 864(%rax)
; AVX2-FCP-NEXT: vmovups {{[-0-9]+}}(%r{{[sb]}}p), %ymm0 # 32-byte Reload
; AVX2-FCP-NEXT: vmovaps %ymm0, 832(%rax)
; AVX2-FCP-NEXT: vmovups {{[-0-9]+}}(%r{{[sb]}}p), %ymm0 # 32-byte Reload
; AVX2-FCP-NEXT: vmovaps %ymm0, 800(%rax)
; AVX2-FCP-NEXT: vmovups {{[-0-9]+}}(%r{{[sb]}}p), %ymm0 # 32-byte Reload
; AVX2-FCP-NEXT: vmovaps %ymm0, 768(%rax)
; AVX2-FCP-NEXT: vmovups {{[-0-9]+}}(%r{{[sb]}}p), %ymm0 # 32-byte Reload
; AVX2-FCP-NEXT: vmovaps %ymm0, 608(%rax)
; AVX2-FCP-NEXT: vmovups {{[-0-9]+}}(%r{{[sb]}}p), %ymm0 # 32-byte Reload
; AVX2-FCP-NEXT: vmovaps %ymm0, 576(%rax)
; AVX2-FCP-NEXT: vmovups {{[-0-9]+}}(%r{{[sb]}}p), %ymm0 # 32-byte Reload
; AVX2-FCP-NEXT: vmovaps %ymm0, 544(%rax)
; AVX2-FCP-NEXT: vmovups {{[-0-9]+}}(%r{{[sb]}}p), %ymm0 # 32-byte Reload
; AVX2-FCP-NEXT: vmovaps %ymm0, 512(%rax)
; AVX2-FCP-NEXT: vmovups {{[-0-9]+}}(%r{{[sb]}}p), %ymm0 # 32-byte Reload
; AVX2-FCP-NEXT: vmovaps %ymm0, 352(%rax)
; AVX2-FCP-NEXT: vmovups {{[-0-9]+}}(%r{{[sb]}}p), %ymm0 # 32-byte Reload
; AVX2-FCP-NEXT: vmovaps %ymm0, 320(%rax)
; AVX2-FCP-NEXT: vmovups {{[-0-9]+}}(%r{{[sb]}}p), %ymm0 # 32-byte Reload
; AVX2-FCP-NEXT: vmovaps %ymm0, 288(%rax)
; AVX2-FCP-NEXT: vmovups {{[-0-9]+}}(%r{{[sb]}}p), %ymm0 # 32-byte Reload
; AVX2-FCP-NEXT: vmovaps %ymm0, 256(%rax)
; AVX2-FCP-NEXT: vmovups {{[-0-9]+}}(%r{{[sb]}}p), %ymm0 # 32-byte Reload
; AVX2-FCP-NEXT: vmovaps %ymm0, 96(%rax)
; AVX2-FCP-NEXT: vmovups {{[-0-9]+}}(%r{{[sb]}}p), %ymm0 # 32-byte Reload
; AVX2-FCP-NEXT: vmovaps %ymm0, 64(%rax)
; AVX2-FCP-NEXT: vmovups {{[-0-9]+}}(%r{{[sb]}}p), %ymm0 # 32-byte Reload
; AVX2-FCP-NEXT: vmovaps %ymm0, 32(%rax)
; AVX2-FCP-NEXT: vmovups {{[-0-9]+}}(%r{{[sb]}}p), %ymm0 # 32-byte Reload
; AVX2-FCP-NEXT: vmovaps %ymm0, (%rax)
; AVX2-FCP-NEXT: addq $776, %rsp # imm = 0x308
; AVX2-FCP-NEXT: vzeroupper
; AVX2-FCP-NEXT: retq
;
; AVX512-LABEL: store_i16_stride8_vf64:
; AVX512: # %bb.0:
; AVX512-NEXT: subq $504, %rsp # imm = 0x1F8
; AVX512-NEXT: movq {{[0-9]+}}(%rsp), %rax
; AVX512-NEXT: movq {{[0-9]+}}(%rsp), %r10
; AVX512-NEXT: vmovdqa (%r10), %xmm0
; AVX512-NEXT: vmovdqa %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
; AVX512-NEXT: vmovdqa 64(%r10), %xmm4
; AVX512-NEXT: vmovdqa (%rax), %xmm1
; AVX512-NEXT: vmovdqa %xmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
; AVX512-NEXT: vmovdqa 64(%rax), %xmm3
; AVX512-NEXT: vpunpckhwd {{.*#+}} xmm1 = xmm1[4],xmm0[4],xmm1[5],xmm0[5],xmm1[6],xmm0[6],xmm1[7],xmm0[7]
; AVX512-NEXT: vmovdqa (%r9), %xmm0
; AVX512-NEXT: vmovdqa %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
; AVX512-NEXT: vmovdqa (%r8), %xmm7
; AVX512-NEXT: vpunpckhwd {{.*#+}} xmm2 = xmm7[4],xmm0[4],xmm7[5],xmm0[5],xmm7[6],xmm0[6],xmm7[7],xmm0[7]
; AVX512-NEXT: vpmovsxbd {{.*#+}} zmm30 = [0,0,0,0,0,0,1,0,2,2,2,2,0,0,3,3]
; AVX512-NEXT: vpermd %zmm2, %zmm30, %zmm0
; AVX512-NEXT: vpmovsxbd {{.*#+}} zmm29 = [0,0,0,0,0,0,1,1,2,2,2,2,0,0,3,3]
; AVX512-NEXT: movw $-30584, %r11w # imm = 0x8888
; AVX512-NEXT: kmovw %r11d, %k2
; AVX512-NEXT: vpermd %zmm1, %zmm29, %zmm0 {%k2}
; AVX512-NEXT: vmovdqu64 %zmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 64-byte Spill
; AVX512-NEXT: movw $8738, %r11w # imm = 0x2222
; AVX512-NEXT: kmovw %r11d, %k1
; AVX512-NEXT: vmovdqa 96(%r10), %ymm2
; AVX512-NEXT: vmovdqa 96(%rax), %ymm5
; AVX512-NEXT: vpunpcklwd {{.*#+}} ymm1 = ymm5[0],ymm2[0],ymm5[1],ymm2[1],ymm5[2],ymm2[2],ymm5[3],ymm2[3],ymm5[8],ymm2[8],ymm5[9],ymm2[9],ymm5[10],ymm2[10],ymm5[11],ymm2[11]
; AVX512-NEXT: vmovdqa 96(%r9), %ymm8
; AVX512-NEXT: vmovdqa 96(%r8), %ymm9
; AVX512-NEXT: vpunpcklwd {{.*#+}} ymm10 = ymm9[0],ymm8[0],ymm9[1],ymm8[1],ymm9[2],ymm8[2],ymm9[3],ymm8[3],ymm9[8],ymm8[8],ymm9[9],ymm8[9],ymm9[10],ymm8[10],ymm9[11],ymm8[11]
; AVX512-NEXT: vpmovsxbd {{.*#+}} zmm19 = [0,1,4,5,4,5,5,7,2,1,6,5,6,5,7,7]
; AVX512-NEXT: vpermd %zmm10, %zmm19, %zmm0
; AVX512-NEXT: vpmovsxbd {{.*#+}} zmm18 = [0,0,4,4,4,4,6,5,0,2,4,6,4,6,6,7]
; AVX512-NEXT: vpermd %zmm1, %zmm18, %zmm0 {%k2}
; AVX512-NEXT: vmovdqu64 %zmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 64-byte Spill
; AVX512-NEXT: vmovdqa 96(%rcx), %ymm10
; AVX512-NEXT: vmovdqa 96(%rdx), %ymm11
; AVX512-NEXT: vmovdqa 96(%rsi), %ymm12
; AVX512-NEXT: vmovdqa 96(%rdi), %ymm13
; AVX512-NEXT: vpunpcklwd {{.*#+}} ymm1 = ymm13[0],ymm12[0],ymm13[1],ymm12[1],ymm13[2],ymm12[2],ymm13[3],ymm12[3],ymm13[8],ymm12[8],ymm13[9],ymm12[9],ymm13[10],ymm12[10],ymm13[11],ymm12[11]
; AVX512-NEXT: vpmovsxbd {{.*#+}} zmm16 = [4,5,1,3,5,7,5,7,6,5,3,3,7,7,7,7]
; AVX512-NEXT: vpermd %zmm1, %zmm16, %zmm0
; AVX512-NEXT: vpunpcklwd {{.*#+}} ymm14 = ymm11[0],ymm10[0],ymm11[1],ymm10[1],ymm11[2],ymm10[2],ymm11[3],ymm10[3],ymm11[8],ymm10[8],ymm11[9],ymm10[9],ymm11[10],ymm10[10],ymm11[11],ymm10[11]
; AVX512-NEXT: vpmovsxbd {{.*#+}} zmm17 = [4,4,2,1,6,5,6,5,4,6,2,3,6,7,6,7]
; AVX512-NEXT: vpermd %zmm14, %zmm17, %zmm0 {%k1}
; AVX512-NEXT: vmovdqu64 %zmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 64-byte Spill
; AVX512-NEXT: vpunpckhwd {{.*#+}} ymm2 = ymm5[4],ymm2[4],ymm5[5],ymm2[5],ymm5[6],ymm2[6],ymm5[7],ymm2[7],ymm5[12],ymm2[12],ymm5[13],ymm2[13],ymm5[14],ymm2[14],ymm5[15],ymm2[15]
; AVX512-NEXT: vpunpckhwd {{.*#+}} ymm5 = ymm9[4],ymm8[4],ymm9[5],ymm8[5],ymm9[6],ymm8[6],ymm9[7],ymm8[7],ymm9[12],ymm8[12],ymm9[13],ymm8[13],ymm9[14],ymm8[14],ymm9[15],ymm8[15]
; AVX512-NEXT: vpermd %zmm5, %zmm19, %zmm0
; AVX512-NEXT: vpermd %zmm2, %zmm18, %zmm0 {%k2}
; AVX512-NEXT: vmovdqu64 %zmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 64-byte Spill
; AVX512-NEXT: vpunpckhwd {{.*#+}} ymm2 = ymm11[4],ymm10[4],ymm11[5],ymm10[5],ymm11[6],ymm10[6],ymm11[7],ymm10[7],ymm11[12],ymm10[12],ymm11[13],ymm10[13],ymm11[14],ymm10[14],ymm11[15],ymm10[15]
; AVX512-NEXT: vpunpckhwd {{.*#+}} ymm5 = ymm13[4],ymm12[4],ymm13[5],ymm12[5],ymm13[6],ymm12[6],ymm13[7],ymm12[7],ymm13[12],ymm12[12],ymm13[13],ymm12[13],ymm13[14],ymm12[14],ymm13[15],ymm12[15]
; AVX512-NEXT: vpermd %zmm5, %zmm16, %zmm31
; AVX512-NEXT: vpermd %zmm2, %zmm17, %zmm31 {%k1}
; AVX512-NEXT: vmovdqa 96(%r10), %xmm2
; AVX512-NEXT: vmovdqa 96(%rax), %xmm8
; AVX512-NEXT: vpunpcklwd {{.*#+}} xmm9 = xmm8[0],xmm2[0],xmm8[1],xmm2[1],xmm8[2],xmm2[2],xmm8[3],xmm2[3]
; AVX512-NEXT: vmovdqa 96(%r9), %xmm10
; AVX512-NEXT: vmovdqa 96(%r8), %xmm11
; AVX512-NEXT: vpunpcklwd {{.*#+}} xmm12 = xmm11[0],xmm10[0],xmm11[1],xmm10[1],xmm11[2],xmm10[2],xmm11[3],xmm10[3]
; AVX512-NEXT: vpermd %zmm12, %zmm30, %zmm0
; AVX512-NEXT: vpermd %zmm9, %zmm29, %zmm0 {%k2}
; AVX512-NEXT: vmovdqu64 %zmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 64-byte Spill
; AVX512-NEXT: vpunpckhwd {{.*#+}} xmm2 = xmm8[4],xmm2[4],xmm8[5],xmm2[5],xmm8[6],xmm2[6],xmm8[7],xmm2[7]
; AVX512-NEXT: vpunpckhwd {{.*#+}} xmm8 = xmm11[4],xmm10[4],xmm11[5],xmm10[5],xmm11[6],xmm10[6],xmm11[7],xmm10[7]
; AVX512-NEXT: vpermd %zmm8, %zmm30, %zmm0
; AVX512-NEXT: vpermd %zmm2, %zmm29, %zmm0 {%k2}
; AVX512-NEXT: vmovdqu64 %zmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 64-byte Spill
; AVX512-NEXT: vmovdqa 64(%r10), %ymm2
; AVX512-NEXT: vmovdqa 64(%rax), %ymm9
; AVX512-NEXT: vpunpcklwd {{.*#+}} ymm8 = ymm9[0],ymm2[0],ymm9[1],ymm2[1],ymm9[2],ymm2[2],ymm9[3],ymm2[3],ymm9[8],ymm2[8],ymm9[9],ymm2[9],ymm9[10],ymm2[10],ymm9[11],ymm2[11]
; AVX512-NEXT: vmovdqa 64(%r9), %ymm10
; AVX512-NEXT: vmovdqa 64(%r8), %ymm11
; AVX512-NEXT: vpunpcklwd {{.*#+}} ymm12 = ymm11[0],ymm10[0],ymm11[1],ymm10[1],ymm11[2],ymm10[2],ymm11[3],ymm10[3],ymm11[8],ymm10[8],ymm11[9],ymm10[9],ymm11[10],ymm10[10],ymm11[11],ymm10[11]
; AVX512-NEXT: vpermd %zmm12, %zmm19, %zmm0
; AVX512-NEXT: vpermd %zmm8, %zmm18, %zmm0 {%k2}
; AVX512-NEXT: vmovdqu64 %zmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 64-byte Spill
; AVX512-NEXT: vmovdqa 64(%rcx), %ymm12
; AVX512-NEXT: vmovdqa 64(%rdx), %ymm15
; AVX512-NEXT: vmovdqa 64(%rsi), %ymm1
; AVX512-NEXT: vmovdqa 64(%rdi), %ymm0
; AVX512-NEXT: vpunpcklwd {{.*#+}} ymm8 = ymm0[0],ymm1[0],ymm0[1],ymm1[1],ymm0[2],ymm1[2],ymm0[3],ymm1[3],ymm0[8],ymm1[8],ymm0[9],ymm1[9],ymm0[10],ymm1[10],ymm0[11],ymm1[11]
; AVX512-NEXT: vpermd %zmm8, %zmm16, %zmm26
; AVX512-NEXT: vpunpcklwd {{.*#+}} ymm8 = ymm15[0],ymm12[0],ymm15[1],ymm12[1],ymm15[2],ymm12[2],ymm15[3],ymm12[3],ymm15[8],ymm12[8],ymm15[9],ymm12[9],ymm15[10],ymm12[10],ymm15[11],ymm12[11]
; AVX512-NEXT: vpermd %zmm8, %zmm17, %zmm26 {%k1}
; AVX512-NEXT: vmovdqa 64(%r9), %xmm8
; AVX512-NEXT: vpunpckhwd {{.*#+}} ymm2 = ymm9[4],ymm2[4],ymm9[5],ymm2[5],ymm9[6],ymm2[6],ymm9[7],ymm2[7],ymm9[12],ymm2[12],ymm9[13],ymm2[13],ymm9[14],ymm2[14],ymm9[15],ymm2[15]
; AVX512-NEXT: vmovdqa 64(%r8), %xmm9
; AVX512-NEXT: vpunpckhwd {{.*#+}} ymm10 = ymm11[4],ymm10[4],ymm11[5],ymm10[5],ymm11[6],ymm10[6],ymm11[7],ymm10[7],ymm11[12],ymm10[12],ymm11[13],ymm10[13],ymm11[14],ymm10[14],ymm11[15],ymm10[15]
; AVX512-NEXT: vpermd %zmm10, %zmm19, %zmm5
; AVX512-NEXT: vpermd %zmm2, %zmm18, %zmm5 {%k2}
; AVX512-NEXT: vmovdqu64 %zmm5, {{[-0-9]+}}(%r{{[sb]}}p) # 64-byte Spill
; AVX512-NEXT: vpunpckhwd {{.*#+}} ymm2 = ymm15[4],ymm12[4],ymm15[5],ymm12[5],ymm15[6],ymm12[6],ymm15[7],ymm12[7],ymm15[12],ymm12[12],ymm15[13],ymm12[13],ymm15[14],ymm12[14],ymm15[15],ymm12[15]
; AVX512-NEXT: vpunpckhwd {{.*#+}} ymm0 = ymm0[4],ymm1[4],ymm0[5],ymm1[5],ymm0[6],ymm1[6],ymm0[7],ymm1[7],ymm0[12],ymm1[12],ymm0[13],ymm1[13],ymm0[14],ymm1[14],ymm0[15],ymm1[15]
; AVX512-NEXT: vpermd %zmm0, %zmm16, %zmm24
; AVX512-NEXT: vpermd %zmm2, %zmm17, %zmm24 {%k1}
; AVX512-NEXT: vpunpcklwd {{.*#+}} xmm0 = xmm3[0],xmm4[0],xmm3[1],xmm4[1],xmm3[2],xmm4[2],xmm3[3],xmm4[3]
; AVX512-NEXT: vpunpcklwd {{.*#+}} xmm1 = xmm9[0],xmm8[0],xmm9[1],xmm8[1],xmm9[2],xmm8[2],xmm9[3],xmm8[3]
; AVX512-NEXT: vpermd %zmm1, %zmm30, %zmm1
; AVX512-NEXT: vpermd %zmm0, %zmm29, %zmm1 {%k2}
; AVX512-NEXT: vmovdqu64 %zmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 64-byte Spill
; AVX512-NEXT: vpunpckhwd {{.*#+}} xmm2 = xmm3[4],xmm4[4],xmm3[5],xmm4[5],xmm3[6],xmm4[6],xmm3[7],xmm4[7]
; AVX512-NEXT: vpunpckhwd {{.*#+}} xmm10 = xmm9[4],xmm8[4],xmm9[5],xmm8[5],xmm9[6],xmm8[6],xmm9[7],xmm8[7]
; AVX512-NEXT: vmovdqa 32(%r10), %ymm0
; AVX512-NEXT: vmovdqa 32(%rax), %ymm1
; AVX512-NEXT: vpunpcklwd {{.*#+}} ymm3 = ymm1[0],ymm0[0],ymm1[1],ymm0[1],ymm1[2],ymm0[2],ymm1[3],ymm0[3],ymm1[8],ymm0[8],ymm1[9],ymm0[9],ymm1[10],ymm0[10],ymm1[11],ymm0[11]
; AVX512-NEXT: vmovdqa 32(%r9), %ymm4
; AVX512-NEXT: vmovdqa 32(%r8), %ymm8
; AVX512-NEXT: vpunpcklwd {{.*#+}} ymm9 = ymm8[0],ymm4[0],ymm8[1],ymm4[1],ymm8[2],ymm4[2],ymm8[3],ymm4[3],ymm8[8],ymm4[8],ymm8[9],ymm4[9],ymm8[10],ymm4[10],ymm8[11],ymm4[11]
; AVX512-NEXT: vpermd %zmm9, %zmm19, %zmm28
; AVX512-NEXT: vpermd %zmm3, %zmm18, %zmm28 {%k2}
; AVX512-NEXT: vmovdqa 32(%rsi), %ymm9
; AVX512-NEXT: vmovdqa 32(%rdi), %ymm11
; AVX512-NEXT: vpunpcklwd {{.*#+}} ymm3 = ymm11[0],ymm9[0],ymm11[1],ymm9[1],ymm11[2],ymm9[2],ymm11[3],ymm9[3],ymm11[8],ymm9[8],ymm11[9],ymm9[9],ymm11[10],ymm9[10],ymm11[11],ymm9[11]
; AVX512-NEXT: vpermd %zmm3, %zmm16, %zmm23
; AVX512-NEXT: vmovdqa 32(%rcx), %ymm12
; AVX512-NEXT: vmovdqa 32(%rdx), %ymm3
; AVX512-NEXT: vpunpcklwd {{.*#+}} ymm6 = ymm3[0],ymm12[0],ymm3[1],ymm12[1],ymm3[2],ymm12[2],ymm3[3],ymm12[3],ymm3[8],ymm12[8],ymm3[9],ymm12[9],ymm3[10],ymm12[10],ymm3[11],ymm12[11]
; AVX512-NEXT: vpermd %zmm6, %zmm17, %zmm23 {%k1}
; AVX512-NEXT: vpunpckhwd {{.*#+}} ymm0 = ymm1[4],ymm0[4],ymm1[5],ymm0[5],ymm1[6],ymm0[6],ymm1[7],ymm0[7],ymm1[12],ymm0[12],ymm1[13],ymm0[13],ymm1[14],ymm0[14],ymm1[15],ymm0[15]
; AVX512-NEXT: vpunpckhwd {{.*#+}} ymm1 = ymm8[4],ymm4[4],ymm8[5],ymm4[5],ymm8[6],ymm4[6],ymm8[7],ymm4[7],ymm8[12],ymm4[12],ymm8[13],ymm4[13],ymm8[14],ymm4[14],ymm8[15],ymm4[15]
; AVX512-NEXT: vpermd %zmm1, %zmm19, %zmm25
; AVX512-NEXT: vpermd %zmm0, %zmm18, %zmm25 {%k2}
; AVX512-NEXT: vpunpckhwd {{.*#+}} ymm3 = ymm3[4],ymm12[4],ymm3[5],ymm12[5],ymm3[6],ymm12[6],ymm3[7],ymm12[7],ymm3[12],ymm12[12],ymm3[13],ymm12[13],ymm3[14],ymm12[14],ymm3[15],ymm12[15]
; AVX512-NEXT: vpunpckhwd {{.*#+}} ymm0 = ymm11[4],ymm9[4],ymm11[5],ymm9[5],ymm11[6],ymm9[6],ymm11[7],ymm9[7],ymm11[12],ymm9[12],ymm11[13],ymm9[13],ymm11[14],ymm9[14],ymm11[15],ymm9[15]
; AVX512-NEXT: vpermd %zmm0, %zmm16, %zmm21
; AVX512-NEXT: vpermd %zmm3, %zmm17, %zmm21 {%k1}
; AVX512-NEXT: vmovdqa (%r10), %ymm3
; AVX512-NEXT: vmovdqa (%r9), %ymm4
; AVX512-NEXT: vmovdqa (%r8), %ymm6
; AVX512-NEXT: vpunpcklwd {{.*#+}} ymm8 = ymm6[0],ymm4[0],ymm6[1],ymm4[1],ymm6[2],ymm4[2],ymm6[3],ymm4[3],ymm6[8],ymm4[8],ymm6[9],ymm4[9],ymm6[10],ymm4[10],ymm6[11],ymm4[11]
; AVX512-NEXT: vpermd %zmm8, %zmm19, %zmm27
; AVX512-NEXT: vmovdqa (%rax), %ymm8
; AVX512-NEXT: vpunpcklwd {{.*#+}} ymm9 = ymm8[0],ymm3[0],ymm8[1],ymm3[1],ymm8[2],ymm3[2],ymm8[3],ymm3[3],ymm8[8],ymm3[8],ymm8[9],ymm3[9],ymm8[10],ymm3[10],ymm8[11],ymm3[11]
; AVX512-NEXT: vpermd %zmm9, %zmm18, %zmm27 {%k2}
; AVX512-NEXT: vpunpckhwd {{.*#+}} ymm3 = ymm8[4],ymm3[4],ymm8[5],ymm3[5],ymm8[6],ymm3[6],ymm8[7],ymm3[7],ymm8[12],ymm3[12],ymm8[13],ymm3[13],ymm8[14],ymm3[14],ymm8[15],ymm3[15]
; AVX512-NEXT: vpunpckhwd {{.*#+}} ymm4 = ymm6[4],ymm4[4],ymm6[5],ymm4[5],ymm6[6],ymm4[6],ymm6[7],ymm4[7],ymm6[12],ymm4[12],ymm6[13],ymm4[13],ymm6[14],ymm4[14],ymm6[15],ymm4[15]
; AVX512-NEXT: vmovdqa (%rcx), %ymm6
; AVX512-NEXT: vpermd %zmm4, %zmm19, %zmm20
; AVX512-NEXT: vmovdqa (%rsi), %ymm4
; AVX512-NEXT: vpermd %zmm3, %zmm18, %zmm20 {%k2}
; AVX512-NEXT: vmovdqa (%rdi), %ymm3
; AVX512-NEXT: vpunpcklwd {{.*#+}} ymm8 = ymm3[0],ymm4[0],ymm3[1],ymm4[1],ymm3[2],ymm4[2],ymm3[3],ymm4[3],ymm3[8],ymm4[8],ymm3[9],ymm4[9],ymm3[10],ymm4[10],ymm3[11],ymm4[11]
; AVX512-NEXT: vpermd %zmm8, %zmm16, %zmm18
; AVX512-NEXT: vmovdqa (%rdx), %ymm8
; AVX512-NEXT: vpunpcklwd {{.*#+}} ymm9 = ymm8[0],ymm6[0],ymm8[1],ymm6[1],ymm8[2],ymm6[2],ymm8[3],ymm6[3],ymm8[8],ymm6[8],ymm8[9],ymm6[9],ymm8[10],ymm6[10],ymm8[11],ymm6[11]
; AVX512-NEXT: vpermd %zmm9, %zmm17, %zmm18 {%k1}
; AVX512-NEXT: vpunpckhwd {{.*#+}} ymm6 = ymm8[4],ymm6[4],ymm8[5],ymm6[5],ymm8[6],ymm6[6],ymm8[7],ymm6[7],ymm8[12],ymm6[12],ymm8[13],ymm6[13],ymm8[14],ymm6[14],ymm8[15],ymm6[15]
; AVX512-NEXT: vpunpckhwd {{.*#+}} ymm3 = ymm3[4],ymm4[4],ymm3[5],ymm4[5],ymm3[6],ymm4[6],ymm3[7],ymm4[7],ymm3[12],ymm4[12],ymm3[13],ymm4[13],ymm3[14],ymm4[14],ymm3[15],ymm4[15]
; AVX512-NEXT: vmovdqa 32(%r10), %xmm4
; AVX512-NEXT: vpermd %zmm3, %zmm16, %zmm16
; AVX512-NEXT: vmovdqa 32(%rax), %xmm3
; AVX512-NEXT: vpermd %zmm6, %zmm17, %zmm16 {%k1}
; AVX512-NEXT: vmovdqa 32(%r9), %xmm6
; AVX512-NEXT: vpermd %zmm10, %zmm30, %zmm19
; AVX512-NEXT: vmovdqa 32(%r8), %xmm8
; AVX512-NEXT: vpermd %zmm2, %zmm29, %zmm19 {%k2}
; AVX512-NEXT: vpunpcklwd {{.*#+}} xmm2 = xmm8[0],xmm6[0],xmm8[1],xmm6[1],xmm8[2],xmm6[2],xmm8[3],xmm6[3]
; AVX512-NEXT: vpermd %zmm2, %zmm30, %zmm10
; AVX512-NEXT: vpunpcklwd {{.*#+}} xmm9 = xmm3[0],xmm4[0],xmm3[1],xmm4[1],xmm3[2],xmm4[2],xmm3[3],xmm4[3]
; AVX512-NEXT: vpermd %zmm9, %zmm29, %zmm10 {%k2}
; AVX512-NEXT: vpunpckhwd {{.*#+}} xmm3 = xmm3[4],xmm4[4],xmm3[5],xmm4[5],xmm3[6],xmm4[6],xmm3[7],xmm4[7]
; AVX512-NEXT: vmovdqa (%rcx), %xmm0
; AVX512-NEXT: vpunpckhwd {{.*#+}} xmm4 = xmm8[4],xmm6[4],xmm8[5],xmm6[5],xmm8[6],xmm6[6],xmm8[7],xmm6[7]
; AVX512-NEXT: vmovdqa (%rdx), %xmm13
; AVX512-NEXT: vpermd %zmm4, %zmm30, %zmm17
; AVX512-NEXT: vpermd %zmm3, %zmm29, %zmm17 {%k2}
; AVX512-NEXT: vpunpckhwd {{.*#+}} xmm3 = xmm13[4],xmm0[4],xmm13[5],xmm0[5],xmm13[6],xmm0[6],xmm13[7],xmm0[7]
; AVX512-NEXT: vmovdqa64 %xmm0, %xmm22
; AVX512-NEXT: vmovdqa {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Reload
; AVX512-NEXT: vpunpcklwd {{[-0-9]+}}(%r{{[sb]}}p), %xmm0, %xmm4 # 16-byte Folded Reload
; AVX512-NEXT: # xmm4 = xmm0[0],mem[0],xmm0[1],mem[1],xmm0[2],mem[2],xmm0[3],mem[3]
; AVX512-NEXT: vmovdqa (%rsi), %xmm9
; AVX512-NEXT: vpunpcklwd {{[-0-9]+}}(%r{{[sb]}}p), %xmm7, %xmm6 # 16-byte Folded Reload
; AVX512-NEXT: # xmm6 = xmm7[0],mem[0],xmm7[1],mem[1],xmm7[2],mem[2],xmm7[3],mem[3]
; AVX512-NEXT: vmovdqa (%rdi), %xmm12
; AVX512-NEXT: vpermd %zmm6, %zmm30, %zmm8
; AVX512-NEXT: vpunpckhwd {{.*#+}} xmm6 = xmm12[4],xmm9[4],xmm12[5],xmm9[5],xmm12[6],xmm9[6],xmm12[7],xmm9[7]
; AVX512-NEXT: vpermd %zmm4, %zmm29, %zmm8 {%k2}
; AVX512-NEXT: vpmovsxbd {{.*#+}} zmm29 = [0,0,1,0,1,0,0,0,2,2,3,3,3,3,0,0]
; AVX512-NEXT: vpermd %zmm6, %zmm29, %zmm7
; AVX512-NEXT: vpmovsxbd {{.*#+}} zmm30 = [0,0,1,1,1,1,0,0,2,2,3,3,3,3,0,0]
; AVX512-NEXT: vpermd %zmm3, %zmm30, %zmm7 {%k1}
; AVX512-NEXT: vmovdqa 96(%rsi), %xmm3
; AVX512-NEXT: vmovdqa 96(%rdi), %xmm2
; AVX512-NEXT: vpunpcklwd {{.*#+}} xmm6 = xmm2[0],xmm3[0],xmm2[1],xmm3[1],xmm2[2],xmm3[2],xmm2[3],xmm3[3]
; AVX512-NEXT: vpermd %zmm6, %zmm29, %zmm6
; AVX512-NEXT: vmovdqa 96(%rcx), %xmm1
; AVX512-NEXT: vmovdqa 96(%rdx), %xmm0
; AVX512-NEXT: vpunpcklwd {{.*#+}} xmm14 = xmm0[0],xmm1[0],xmm0[1],xmm1[1],xmm0[2],xmm1[2],xmm0[3],xmm1[3]
; AVX512-NEXT: vpermd %zmm14, %zmm30, %zmm6 {%k1}
; AVX512-NEXT: vpunpckhwd {{.*#+}} xmm0 = xmm0[4],xmm1[4],xmm0[5],xmm1[5],xmm0[6],xmm1[6],xmm0[7],xmm1[7]
; AVX512-NEXT: vpunpckhwd {{.*#+}} xmm1 = xmm2[4],xmm3[4],xmm2[5],xmm3[5],xmm2[6],xmm3[6],xmm2[7],xmm3[7]
; AVX512-NEXT: vpermd %zmm1, %zmm29, %zmm5
; AVX512-NEXT: vpermd %zmm0, %zmm30, %zmm5 {%k1}
; AVX512-NEXT: vmovdqa 64(%rsi), %xmm1
; AVX512-NEXT: vmovdqa 64(%rdi), %xmm2
; AVX512-NEXT: vpunpcklwd {{.*#+}} xmm3 = xmm2[0],xmm1[0],xmm2[1],xmm1[1],xmm2[2],xmm1[2],xmm2[3],xmm1[3]
; AVX512-NEXT: vpermd %zmm3, %zmm29, %zmm4
; AVX512-NEXT: vmovdqa 64(%rcx), %xmm14
; AVX512-NEXT: vmovdqa 64(%rdx), %xmm0
; AVX512-NEXT: vpunpcklwd {{.*#+}} xmm15 = xmm0[0],xmm14[0],xmm0[1],xmm14[1],xmm0[2],xmm14[2],xmm0[3],xmm14[3]
; AVX512-NEXT: vpermd %zmm15, %zmm30, %zmm4 {%k1}
; AVX512-NEXT: vpunpckhwd {{.*#+}} xmm0 = xmm0[4],xmm14[4],xmm0[5],xmm14[5],xmm0[6],xmm14[6],xmm0[7],xmm14[7]
; AVX512-NEXT: vpunpckhwd {{.*#+}} xmm1 = xmm2[4],xmm1[4],xmm2[5],xmm1[5],xmm2[6],xmm1[6],xmm2[7],xmm1[7]
; AVX512-NEXT: vpermd %zmm1, %zmm29, %zmm3
; AVX512-NEXT: vpermd %zmm0, %zmm30, %zmm3 {%k1}
; AVX512-NEXT: vmovdqa 32(%rsi), %xmm1
; AVX512-NEXT: vmovdqa 32(%rdi), %xmm2
; AVX512-NEXT: vpunpcklwd {{.*#+}} xmm14 = xmm2[0],xmm1[0],xmm2[1],xmm1[1],xmm2[2],xmm1[2],xmm2[3],xmm1[3]
; AVX512-NEXT: vpermd %zmm14, %zmm29, %zmm14
; AVX512-NEXT: vmovdqa 32(%rcx), %xmm15
; AVX512-NEXT: vmovdqa 32(%rdx), %xmm0
; AVX512-NEXT: vpunpcklwd {{.*#+}} xmm11 = xmm0[0],xmm15[0],xmm0[1],xmm15[1],xmm0[2],xmm15[2],xmm0[3],xmm15[3]
; AVX512-NEXT: vpermd %zmm11, %zmm30, %zmm14 {%k1}
; AVX512-NEXT: vpunpckhwd {{.*#+}} xmm0 = xmm0[4],xmm15[4],xmm0[5],xmm15[5],xmm0[6],xmm15[6],xmm0[7],xmm15[7]
; AVX512-NEXT: vpunpckhwd {{.*#+}} xmm1 = xmm2[4],xmm1[4],xmm2[5],xmm1[5],xmm2[6],xmm1[6],xmm2[7],xmm1[7]
; AVX512-NEXT: vpermd %zmm1, %zmm29, %zmm1
; AVX512-NEXT: vpermd %zmm0, %zmm30, %zmm1 {%k1}
; AVX512-NEXT: vmovdqa64 %xmm22, %xmm0
; AVX512-NEXT: vpunpcklwd {{.*#+}} xmm0 = xmm13[0],xmm0[0],xmm13[1],xmm0[1],xmm13[2],xmm0[2],xmm13[3],xmm0[3]
; AVX512-NEXT: vpunpcklwd {{.*#+}} xmm2 = xmm12[0],xmm9[0],xmm12[1],xmm9[1],xmm12[2],xmm9[2],xmm12[3],xmm9[3]
; AVX512-NEXT: vpermd %zmm2, %zmm29, %zmm2
; AVX512-NEXT: vpermd %zmm0, %zmm30, %zmm2 {%k1}
; AVX512-NEXT: movb $-86, %al
; AVX512-NEXT: kmovw %eax, %k1
; AVX512-NEXT: vmovdqu64 {{[-0-9]+}}(%r{{[sb]}}p), %zmm0 # 64-byte Reload
; AVX512-NEXT: vmovdqa64 %zmm0, %zmm7 {%k1}
; AVX512-NEXT: vmovdqu64 {{[-0-9]+}}(%r{{[sb]}}p), %zmm0 # 64-byte Reload
; AVX512-NEXT: vmovdqu64 {{[-0-9]+}}(%r{{[sb]}}p), %zmm9 # 64-byte Reload
; AVX512-NEXT: vmovdqa64 %zmm9, %zmm0 {%k1}
; AVX512-NEXT: vmovdqu64 {{[-0-9]+}}(%r{{[sb]}}p), %zmm9 # 64-byte Reload
; AVX512-NEXT: vmovdqa64 %zmm9, %zmm31 {%k1}
; AVX512-NEXT: vmovdqu64 {{[-0-9]+}}(%r{{[sb]}}p), %zmm9 # 64-byte Reload
; AVX512-NEXT: vmovdqa64 %zmm9, %zmm6 {%k1}
; AVX512-NEXT: vmovdqu64 {{[-0-9]+}}(%r{{[sb]}}p), %zmm9 # 64-byte Reload
; AVX512-NEXT: vmovdqa64 %zmm9, %zmm5 {%k1}
; AVX512-NEXT: vmovdqu64 {{[-0-9]+}}(%r{{[sb]}}p), %zmm9 # 64-byte Reload
; AVX512-NEXT: vmovdqa64 %zmm9, %zmm26 {%k1}
; AVX512-NEXT: vmovdqu64 {{[-0-9]+}}(%r{{[sb]}}p), %zmm9 # 64-byte Reload
; AVX512-NEXT: vmovdqa64 %zmm9, %zmm24 {%k1}
; AVX512-NEXT: vmovdqu64 {{[-0-9]+}}(%r{{[sb]}}p), %zmm9 # 64-byte Reload
; AVX512-NEXT: vmovdqa64 %zmm9, %zmm4 {%k1}
; AVX512-NEXT: vmovdqa64 %zmm19, %zmm3 {%k1}
; AVX512-NEXT: vmovdqa64 %zmm28, %zmm23 {%k1}
; AVX512-NEXT: vmovdqa64 %zmm25, %zmm21 {%k1}
; AVX512-NEXT: vmovdqa64 %zmm10, %zmm14 {%k1}
; AVX512-NEXT: vmovdqa64 %zmm17, %zmm1 {%k1}
; AVX512-NEXT: vmovdqa64 %zmm27, %zmm18 {%k1}
; AVX512-NEXT: vmovdqa64 %zmm20, %zmm16 {%k1}
; AVX512-NEXT: vmovdqa64 %zmm8, %zmm2 {%k1}
; AVX512-NEXT: movq {{[0-9]+}}(%rsp), %rax
; AVX512-NEXT: vmovdqa64 %zmm2, (%rax)
; AVX512-NEXT: vmovdqa64 %zmm16, 192(%rax)
; AVX512-NEXT: vmovdqa64 %zmm18, 128(%rax)
; AVX512-NEXT: vmovdqa64 %zmm1, 320(%rax)
; AVX512-NEXT: vmovdqa64 %zmm14, 256(%rax)
; AVX512-NEXT: vmovdqa64 %zmm21, 448(%rax)
; AVX512-NEXT: vmovdqa64 %zmm23, 384(%rax)
; AVX512-NEXT: vmovdqa64 %zmm3, 576(%rax)
; AVX512-NEXT: vmovdqa64 %zmm4, 512(%rax)
; AVX512-NEXT: vmovdqa64 %zmm24, 704(%rax)
; AVX512-NEXT: vmovdqa64 %zmm26, 640(%rax)
; AVX512-NEXT: vmovdqa64 %zmm5, 832(%rax)
; AVX512-NEXT: vmovdqa64 %zmm6, 768(%rax)
; AVX512-NEXT: vmovdqa64 %zmm31, 960(%rax)
; AVX512-NEXT: vmovdqa64 %zmm0, 896(%rax)
; AVX512-NEXT: vmovdqa64 %zmm7, 64(%rax)
; AVX512-NEXT: addq $504, %rsp # imm = 0x1F8
; AVX512-NEXT: vzeroupper
; AVX512-NEXT: retq
;
; AVX512-FCP-LABEL: store_i16_stride8_vf64:
; AVX512-FCP: # %bb.0:
; AVX512-FCP-NEXT: subq $2312, %rsp # imm = 0x908
; AVX512-FCP-NEXT: movq {{[0-9]+}}(%rsp), %rax
; AVX512-FCP-NEXT: movq {{[0-9]+}}(%rsp), %r10
; AVX512-FCP-NEXT: vmovdqa (%r10), %xmm12
; AVX512-FCP-NEXT: vmovdqa 64(%r10), %xmm0
; AVX512-FCP-NEXT: vmovdqa (%rax), %xmm1
; AVX512-FCP-NEXT: vmovdqa %xmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
; AVX512-FCP-NEXT: vpunpckhwd {{.*#+}} xmm1 = xmm1[4],xmm12[4],xmm1[5],xmm12[5],xmm1[6],xmm12[6],xmm1[7],xmm12[7]
; AVX512-FCP-NEXT: vinserti32x4 $2, %xmm1, %zmm1, %zmm1
; AVX512-FCP-NEXT: vmovdqu64 %zmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 64-byte Spill
; AVX512-FCP-NEXT: vmovdqa (%r9), %xmm2
; AVX512-FCP-NEXT: vmovdqa %xmm2, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
; AVX512-FCP-NEXT: vmovdqa (%r8), %xmm1
; AVX512-FCP-NEXT: vmovdqa %xmm1, (%rsp) # 16-byte Spill
; AVX512-FCP-NEXT: vpunpckhwd {{.*#+}} xmm1 = xmm1[4],xmm2[4],xmm1[5],xmm2[5],xmm1[6],xmm2[6],xmm1[7],xmm2[7]
; AVX512-FCP-NEXT: vinserti32x4 $2, %xmm1, %zmm1, %zmm1
; AVX512-FCP-NEXT: vmovdqu64 %zmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 64-byte Spill
; AVX512-FCP-NEXT: vmovdqa 96(%r10), %ymm1
; AVX512-FCP-NEXT: vmovdqa 96(%rax), %ymm2
; AVX512-FCP-NEXT: vpunpcklwd {{.*#+}} ymm3 = ymm2[0],ymm1[0],ymm2[1],ymm1[1],ymm2[2],ymm1[2],ymm2[3],ymm1[3],ymm2[8],ymm1[8],ymm2[9],ymm1[9],ymm2[10],ymm1[10],ymm2[11],ymm1[11]
; AVX512-FCP-NEXT: vinserti64x4 $1, %ymm3, %zmm3, %zmm3
; AVX512-FCP-NEXT: vmovdqu64 %zmm3, {{[-0-9]+}}(%r{{[sb]}}p) # 64-byte Spill
; AVX512-FCP-NEXT: vmovdqa 96(%r9), %ymm3
; AVX512-FCP-NEXT: vmovdqa 96(%r8), %ymm4
; AVX512-FCP-NEXT: vpunpcklwd {{.*#+}} ymm5 = ymm4[0],ymm3[0],ymm4[1],ymm3[1],ymm4[2],ymm3[2],ymm4[3],ymm3[3],ymm4[8],ymm3[8],ymm4[9],ymm3[9],ymm4[10],ymm3[10],ymm4[11],ymm3[11]
; AVX512-FCP-NEXT: vinserti64x4 $1, %ymm5, %zmm5, %zmm5
; AVX512-FCP-NEXT: vmovdqu64 %zmm5, {{[-0-9]+}}(%r{{[sb]}}p) # 64-byte Spill
; AVX512-FCP-NEXT: vmovdqa 96(%rcx), %ymm5
; AVX512-FCP-NEXT: vmovdqa 96(%rdx), %ymm6
; AVX512-FCP-NEXT: vpunpcklwd {{.*#+}} ymm7 = ymm6[0],ymm5[0],ymm6[1],ymm5[1],ymm6[2],ymm5[2],ymm6[3],ymm5[3],ymm6[8],ymm5[8],ymm6[9],ymm5[9],ymm6[10],ymm5[10],ymm6[11],ymm5[11]
; AVX512-FCP-NEXT: vinserti64x4 $1, %ymm7, %zmm7, %zmm7
; AVX512-FCP-NEXT: vmovdqu64 %zmm7, {{[-0-9]+}}(%r{{[sb]}}p) # 64-byte Spill
; AVX512-FCP-NEXT: vmovdqa 96(%rsi), %ymm7
; AVX512-FCP-NEXT: vmovdqa 96(%rdi), %ymm8
; AVX512-FCP-NEXT: vpunpcklwd {{.*#+}} ymm9 = ymm8[0],ymm7[0],ymm8[1],ymm7[1],ymm8[2],ymm7[2],ymm8[3],ymm7[3],ymm8[8],ymm7[8],ymm8[9],ymm7[9],ymm8[10],ymm7[10],ymm8[11],ymm7[11]
; AVX512-FCP-NEXT: vinserti64x4 $1, %ymm9, %zmm9, %zmm9
; AVX512-FCP-NEXT: vmovdqu64 %zmm9, {{[-0-9]+}}(%r{{[sb]}}p) # 64-byte Spill
; AVX512-FCP-NEXT: vpunpckhwd {{.*#+}} ymm1 = ymm2[4],ymm1[4],ymm2[5],ymm1[5],ymm2[6],ymm1[6],ymm2[7],ymm1[7],ymm2[12],ymm1[12],ymm2[13],ymm1[13],ymm2[14],ymm1[14],ymm2[15],ymm1[15]
; AVX512-FCP-NEXT: vinserti64x4 $1, %ymm1, %zmm1, %zmm1
; AVX512-FCP-NEXT: vmovdqu64 %zmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 64-byte Spill
; AVX512-FCP-NEXT: vpunpckhwd {{.*#+}} ymm1 = ymm4[4],ymm3[4],ymm4[5],ymm3[5],ymm4[6],ymm3[6],ymm4[7],ymm3[7],ymm4[12],ymm3[12],ymm4[13],ymm3[13],ymm4[14],ymm3[14],ymm4[15],ymm3[15]
; AVX512-FCP-NEXT: vinserti64x4 $1, %ymm1, %zmm1, %zmm1
; AVX512-FCP-NEXT: vmovdqu64 %zmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 64-byte Spill
; AVX512-FCP-NEXT: vpunpckhwd {{.*#+}} ymm1 = ymm6[4],ymm5[4],ymm6[5],ymm5[5],ymm6[6],ymm5[6],ymm6[7],ymm5[7],ymm6[12],ymm5[12],ymm6[13],ymm5[13],ymm6[14],ymm5[14],ymm6[15],ymm5[15]
; AVX512-FCP-NEXT: vinserti64x4 $1, %ymm1, %zmm1, %zmm1
; AVX512-FCP-NEXT: vmovdqu64 %zmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 64-byte Spill
; AVX512-FCP-NEXT: vpunpckhwd {{.*#+}} ymm1 = ymm8[4],ymm7[4],ymm8[5],ymm7[5],ymm8[6],ymm7[6],ymm8[7],ymm7[7],ymm8[12],ymm7[12],ymm8[13],ymm7[13],ymm8[14],ymm7[14],ymm8[15],ymm7[15]
; AVX512-FCP-NEXT: vinserti64x4 $1, %ymm1, %zmm1, %zmm1
; AVX512-FCP-NEXT: vmovdqu64 %zmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 64-byte Spill
; AVX512-FCP-NEXT: vmovdqa 96(%r10), %xmm1
; AVX512-FCP-NEXT: vmovdqa 96(%rax), %xmm2
; AVX512-FCP-NEXT: vpunpcklwd {{.*#+}} xmm3 = xmm2[0],xmm1[0],xmm2[1],xmm1[1],xmm2[2],xmm1[2],xmm2[3],xmm1[3]
; AVX512-FCP-NEXT: vinserti32x4 $2, %xmm3, %zmm3, %zmm3
; AVX512-FCP-NEXT: vmovdqu64 %zmm3, {{[-0-9]+}}(%r{{[sb]}}p) # 64-byte Spill
; AVX512-FCP-NEXT: vmovdqa 96(%r9), %xmm3
; AVX512-FCP-NEXT: vmovdqa 96(%r8), %xmm4
; AVX512-FCP-NEXT: vpunpcklwd {{.*#+}} xmm5 = xmm4[0],xmm3[0],xmm4[1],xmm3[1],xmm4[2],xmm3[2],xmm4[3],xmm3[3]
; AVX512-FCP-NEXT: vinserti32x4 $2, %xmm5, %zmm5, %zmm5
; AVX512-FCP-NEXT: vmovdqu64 %zmm5, {{[-0-9]+}}(%r{{[sb]}}p) # 64-byte Spill
; AVX512-FCP-NEXT: vmovdqa 96(%rcx), %xmm5
; AVX512-FCP-NEXT: vmovdqa 96(%rdx), %xmm6
; AVX512-FCP-NEXT: vpunpcklwd {{.*#+}} xmm7 = xmm6[0],xmm5[0],xmm6[1],xmm5[1],xmm6[2],xmm5[2],xmm6[3],xmm5[3]
; AVX512-FCP-NEXT: vmovdqu64 %zmm7, {{[-0-9]+}}(%r{{[sb]}}p) # 64-byte Spill
; AVX512-FCP-NEXT: vmovdqa 96(%rsi), %xmm7
; AVX512-FCP-NEXT: vmovdqa 96(%rdi), %xmm8
; AVX512-FCP-NEXT: vpunpcklwd {{.*#+}} xmm9 = xmm8[0],xmm7[0],xmm8[1],xmm7[1],xmm8[2],xmm7[2],xmm8[3],xmm7[3]
; AVX512-FCP-NEXT: vmovdqu64 %zmm9, {{[-0-9]+}}(%r{{[sb]}}p) # 64-byte Spill
; AVX512-FCP-NEXT: vpunpckhwd {{.*#+}} xmm1 = xmm2[4],xmm1[4],xmm2[5],xmm1[5],xmm2[6],xmm1[6],xmm2[7],xmm1[7]
; AVX512-FCP-NEXT: vinserti32x4 $2, %xmm1, %zmm1, %zmm1
; AVX512-FCP-NEXT: vmovdqu64 %zmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 64-byte Spill
; AVX512-FCP-NEXT: vpunpckhwd {{.*#+}} xmm1 = xmm4[4],xmm3[4],xmm4[5],xmm3[5],xmm4[6],xmm3[6],xmm4[7],xmm3[7]
; AVX512-FCP-NEXT: vinserti32x4 $2, %xmm1, %zmm1, %zmm1
; AVX512-FCP-NEXT: vmovdqu64 %zmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 64-byte Spill
; AVX512-FCP-NEXT: vpunpckhwd {{.*#+}} xmm1 = xmm6[4],xmm5[4],xmm6[5],xmm5[5],xmm6[6],xmm5[6],xmm6[7],xmm5[7]
; AVX512-FCP-NEXT: vmovdqu64 %zmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 64-byte Spill
; AVX512-FCP-NEXT: vpunpckhwd {{.*#+}} xmm1 = xmm8[4],xmm7[4],xmm8[5],xmm7[5],xmm8[6],xmm7[6],xmm8[7],xmm7[7]
; AVX512-FCP-NEXT: vmovdqu64 %zmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 64-byte Spill
; AVX512-FCP-NEXT: vmovdqa 64(%r10), %ymm2
; AVX512-FCP-NEXT: vmovdqa 64(%rax), %ymm3
; AVX512-FCP-NEXT: vpunpcklwd {{.*#+}} ymm1 = ymm3[0],ymm2[0],ymm3[1],ymm2[1],ymm3[2],ymm2[2],ymm3[3],ymm2[3],ymm3[8],ymm2[8],ymm3[9],ymm2[9],ymm3[10],ymm2[10],ymm3[11],ymm2[11]
; AVX512-FCP-NEXT: vinserti64x4 $1, %ymm1, %zmm1, %zmm25
; AVX512-FCP-NEXT: vmovdqa 64(%r9), %ymm4
; AVX512-FCP-NEXT: vmovdqa 64(%r8), %ymm5
; AVX512-FCP-NEXT: vpunpcklwd {{.*#+}} ymm1 = ymm5[0],ymm4[0],ymm5[1],ymm4[1],ymm5[2],ymm4[2],ymm5[3],ymm4[3],ymm5[8],ymm4[8],ymm5[9],ymm4[9],ymm5[10],ymm4[10],ymm5[11],ymm4[11]
; AVX512-FCP-NEXT: vinserti64x4 $1, %ymm1, %zmm1, %zmm24
; AVX512-FCP-NEXT: vmovdqa 64(%rcx), %ymm6
; AVX512-FCP-NEXT: vmovdqa 64(%rdx), %ymm7
; AVX512-FCP-NEXT: vpunpcklwd {{.*#+}} ymm1 = ymm7[0],ymm6[0],ymm7[1],ymm6[1],ymm7[2],ymm6[2],ymm7[3],ymm6[3],ymm7[8],ymm6[8],ymm7[9],ymm6[9],ymm7[10],ymm6[10],ymm7[11],ymm6[11]
; AVX512-FCP-NEXT: vpunpckhwd {{.*#+}} ymm2 = ymm3[4],ymm2[4],ymm3[5],ymm2[5],ymm3[6],ymm2[6],ymm3[7],ymm2[7],ymm3[12],ymm2[12],ymm3[13],ymm2[13],ymm3[14],ymm2[14],ymm3[15],ymm2[15]
; AVX512-FCP-NEXT: vmovdqa 64(%rsi), %ymm8
; AVX512-FCP-NEXT: vpunpckhwd {{.*#+}} ymm4 = ymm5[4],ymm4[4],ymm5[5],ymm4[5],ymm5[6],ymm4[6],ymm5[7],ymm4[7],ymm5[12],ymm4[12],ymm5[13],ymm4[13],ymm5[14],ymm4[14],ymm5[15],ymm4[15]
; AVX512-FCP-NEXT: vmovdqa 64(%rdi), %ymm5
; AVX512-FCP-NEXT: vpunpckhwd {{.*#+}} ymm3 = ymm7[4],ymm6[4],ymm7[5],ymm6[5],ymm7[6],ymm6[6],ymm7[7],ymm6[7],ymm7[12],ymm6[12],ymm7[13],ymm6[13],ymm7[14],ymm6[14],ymm7[15],ymm6[15]
; AVX512-FCP-NEXT: vpunpcklwd {{.*#+}} ymm7 = ymm5[0],ymm8[0],ymm5[1],ymm8[1],ymm5[2],ymm8[2],ymm5[3],ymm8[3],ymm5[8],ymm8[8],ymm5[9],ymm8[9],ymm5[10],ymm8[10],ymm5[11],ymm8[11]
; AVX512-FCP-NEXT: vpunpckhwd {{.*#+}} ymm5 = ymm5[4],ymm8[4],ymm5[5],ymm8[5],ymm5[6],ymm8[6],ymm5[7],ymm8[7],ymm5[12],ymm8[12],ymm5[13],ymm8[13],ymm5[14],ymm8[14],ymm5[15],ymm8[15]
; AVX512-FCP-NEXT: vmovdqa 64(%rax), %xmm8
; AVX512-FCP-NEXT: vpunpcklwd {{.*#+}} xmm6 = xmm8[0],xmm0[0],xmm8[1],xmm0[1],xmm8[2],xmm0[2],xmm8[3],xmm0[3]
; AVX512-FCP-NEXT: vpunpckhwd {{.*#+}} xmm0 = xmm8[4],xmm0[4],xmm8[5],xmm0[5],xmm8[6],xmm0[6],xmm8[7],xmm0[7]
; AVX512-FCP-NEXT: vinserti64x4 $1, %ymm1, %zmm1, %zmm1
; AVX512-FCP-NEXT: vmovdqu64 %zmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 64-byte Spill
; AVX512-FCP-NEXT: vinserti64x4 $1, %ymm7, %zmm7, %zmm1
; AVX512-FCP-NEXT: vmovdqu64 %zmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 64-byte Spill
; AVX512-FCP-NEXT: vmovdqa 64(%r9), %xmm1
; AVX512-FCP-NEXT: vmovdqa 64(%r8), %xmm7
; AVX512-FCP-NEXT: vpunpcklwd {{.*#+}} xmm8 = xmm7[0],xmm1[0],xmm7[1],xmm1[1],xmm7[2],xmm1[2],xmm7[3],xmm1[3]
; AVX512-FCP-NEXT: vpunpckhwd {{.*#+}} xmm7 = xmm7[4],xmm1[4],xmm7[5],xmm1[5],xmm7[6],xmm1[6],xmm7[7],xmm1[7]
; AVX512-FCP-NEXT: vinserti64x4 $1, %ymm2, %zmm2, %zmm30
; AVX512-FCP-NEXT: vinserti64x4 $1, %ymm4, %zmm4, %zmm18
; AVX512-FCP-NEXT: vmovdqa 64(%rcx), %xmm2
; AVX512-FCP-NEXT: vmovdqa 64(%rdx), %xmm4
; AVX512-FCP-NEXT: vpunpcklwd {{.*#+}} xmm1 = xmm4[0],xmm2[0],xmm4[1],xmm2[1],xmm4[2],xmm2[2],xmm4[3],xmm2[3]
; AVX512-FCP-NEXT: vmovdqu64 %zmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 64-byte Spill
; AVX512-FCP-NEXT: vpunpckhwd {{.*#+}} xmm1 = xmm4[4],xmm2[4],xmm4[5],xmm2[5],xmm4[6],xmm2[6],xmm4[7],xmm2[7]
; AVX512-FCP-NEXT: vmovdqu64 %zmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 64-byte Spill
; AVX512-FCP-NEXT: vinserti64x4 $1, %ymm3, %zmm3, %zmm1
; AVX512-FCP-NEXT: vmovdqu64 %zmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 64-byte Spill
; AVX512-FCP-NEXT: vinserti64x4 $1, %ymm5, %zmm5, %zmm31
; AVX512-FCP-NEXT: vmovdqa 64(%rsi), %xmm2
; AVX512-FCP-NEXT: vmovdqa 64(%rdi), %xmm3
; AVX512-FCP-NEXT: vpunpcklwd {{.*#+}} xmm1 = xmm3[0],xmm2[0],xmm3[1],xmm2[1],xmm3[2],xmm2[2],xmm3[3],xmm2[3]
; AVX512-FCP-NEXT: vmovdqu64 %zmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 64-byte Spill
; AVX512-FCP-NEXT: vpunpckhwd {{.*#+}} xmm1 = xmm3[4],xmm2[4],xmm3[5],xmm2[5],xmm3[6],xmm2[6],xmm3[7],xmm2[7]
; AVX512-FCP-NEXT: vmovdqu64 %zmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 64-byte Spill
; AVX512-FCP-NEXT: vinserti32x4 $2, %xmm6, %zmm6, %zmm1
; AVX512-FCP-NEXT: vmovdqu64 %zmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 64-byte Spill
; AVX512-FCP-NEXT: vinserti32x4 $2, %xmm8, %zmm8, %zmm1
; AVX512-FCP-NEXT: vmovdqu64 %zmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 64-byte Spill
; AVX512-FCP-NEXT: vinserti32x4 $2, %xmm0, %zmm0, %zmm0
; AVX512-FCP-NEXT: vmovdqu64 %zmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 64-byte Spill
; AVX512-FCP-NEXT: vinserti32x4 $2, %xmm7, %zmm7, %zmm0
; AVX512-FCP-NEXT: vmovdqu64 %zmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 64-byte Spill
; AVX512-FCP-NEXT: vmovdqa 32(%r10), %ymm0
; AVX512-FCP-NEXT: vmovdqa 32(%rax), %ymm2
; AVX512-FCP-NEXT: vpunpcklwd {{.*#+}} ymm3 = ymm2[0],ymm0[0],ymm2[1],ymm0[1],ymm2[2],ymm0[2],ymm2[3],ymm0[3],ymm2[8],ymm0[8],ymm2[9],ymm0[9],ymm2[10],ymm0[10],ymm2[11],ymm0[11]
; AVX512-FCP-NEXT: vinserti64x4 $1, %ymm3, %zmm3, %zmm17
; AVX512-FCP-NEXT: vmovdqa 32(%r9), %ymm3
; AVX512-FCP-NEXT: vmovdqa 32(%r8), %ymm4
; AVX512-FCP-NEXT: vpunpcklwd {{.*#+}} ymm5 = ymm4[0],ymm3[0],ymm4[1],ymm3[1],ymm4[2],ymm3[2],ymm4[3],ymm3[3],ymm4[8],ymm3[8],ymm4[9],ymm3[9],ymm4[10],ymm3[10],ymm4[11],ymm3[11]
; AVX512-FCP-NEXT: vinserti64x4 $1, %ymm5, %zmm5, %zmm15
; AVX512-FCP-NEXT: vmovdqa 32(%rcx), %ymm5
; AVX512-FCP-NEXT: vmovdqa 32(%rdx), %ymm6
; AVX512-FCP-NEXT: vpunpcklwd {{.*#+}} ymm7 = ymm6[0],ymm5[0],ymm6[1],ymm5[1],ymm6[2],ymm5[2],ymm6[3],ymm5[3],ymm6[8],ymm5[8],ymm6[9],ymm5[9],ymm6[10],ymm5[10],ymm6[11],ymm5[11]
; AVX512-FCP-NEXT: vinserti64x4 $1, %ymm7, %zmm7, %zmm29
; AVX512-FCP-NEXT: vmovdqa 32(%rsi), %ymm7
; AVX512-FCP-NEXT: vmovdqa 32(%rdi), %ymm8
; AVX512-FCP-NEXT: vpunpcklwd {{.*#+}} ymm9 = ymm8[0],ymm7[0],ymm8[1],ymm7[1],ymm8[2],ymm7[2],ymm8[3],ymm7[3],ymm8[8],ymm7[8],ymm8[9],ymm7[9],ymm8[10],ymm7[10],ymm8[11],ymm7[11]
; AVX512-FCP-NEXT: vinserti64x4 $1, %ymm9, %zmm9, %zmm28
; AVX512-FCP-NEXT: vpunpckhwd {{.*#+}} ymm9 = ymm2[4],ymm0[4],ymm2[5],ymm0[5],ymm2[6],ymm0[6],ymm2[7],ymm0[7],ymm2[12],ymm0[12],ymm2[13],ymm0[13],ymm2[14],ymm0[14],ymm2[15],ymm0[15]
; AVX512-FCP-NEXT: vpunpckhwd {{.*#+}} ymm3 = ymm4[4],ymm3[4],ymm4[5],ymm3[5],ymm4[6],ymm3[6],ymm4[7],ymm3[7],ymm4[12],ymm3[12],ymm4[13],ymm3[13],ymm4[14],ymm3[14],ymm4[15],ymm3[15]
; AVX512-FCP-NEXT: vpunpckhwd {{.*#+}} ymm0 = ymm6[4],ymm5[4],ymm6[5],ymm5[5],ymm6[6],ymm5[6],ymm6[7],ymm5[7],ymm6[12],ymm5[12],ymm6[13],ymm5[13],ymm6[14],ymm5[14],ymm6[15],ymm5[15]
; AVX512-FCP-NEXT: vpunpckhwd {{.*#+}} ymm2 = ymm8[4],ymm7[4],ymm8[5],ymm7[5],ymm8[6],ymm7[6],ymm8[7],ymm7[7],ymm8[12],ymm7[12],ymm8[13],ymm7[13],ymm8[14],ymm7[14],ymm8[15],ymm7[15]
; AVX512-FCP-NEXT: vinserti64x4 $1, %ymm9, %zmm9, %zmm13
; AVX512-FCP-NEXT: vinserti64x4 $1, %ymm3, %zmm3, %zmm7
; AVX512-FCP-NEXT: vmovdqa 32(%r10), %xmm3
; AVX512-FCP-NEXT: vmovdqa 32(%rax), %xmm4
; AVX512-FCP-NEXT: vpunpcklwd {{.*#+}} xmm5 = xmm4[0],xmm3[0],xmm4[1],xmm3[1],xmm4[2],xmm3[2],xmm4[3],xmm3[3]
; AVX512-FCP-NEXT: vpunpckhwd {{.*#+}} xmm3 = xmm4[4],xmm3[4],xmm4[5],xmm3[5],xmm4[6],xmm3[6],xmm4[7],xmm3[7]
; AVX512-FCP-NEXT: vinserti64x4 $1, %ymm0, %zmm0, %zmm22
; AVX512-FCP-NEXT: vinserti64x4 $1, %ymm2, %zmm2, %zmm9
; AVX512-FCP-NEXT: vmovdqa 32(%r9), %xmm0
; AVX512-FCP-NEXT: vmovdqa 32(%r8), %xmm2
; AVX512-FCP-NEXT: vpunpcklwd {{.*#+}} xmm4 = xmm2[0],xmm0[0],xmm2[1],xmm0[1],xmm2[2],xmm0[2],xmm2[3],xmm0[3]
; AVX512-FCP-NEXT: vpunpckhwd {{.*#+}} xmm0 = xmm2[4],xmm0[4],xmm2[5],xmm0[5],xmm2[6],xmm0[6],xmm2[7],xmm0[7]
; AVX512-FCP-NEXT: vinserti32x4 $2, %xmm5, %zmm5, %zmm27
; AVX512-FCP-NEXT: vinserti32x4 $2, %xmm4, %zmm4, %zmm26
; AVX512-FCP-NEXT: vmovdqa 32(%rcx), %xmm2
; AVX512-FCP-NEXT: vmovdqa 32(%rdx), %xmm4
; AVX512-FCP-NEXT: vpunpcklwd {{.*#+}} xmm1 = xmm4[0],xmm2[0],xmm4[1],xmm2[1],xmm4[2],xmm2[2],xmm4[3],xmm2[3]
; AVX512-FCP-NEXT: vmovdqu64 %zmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 64-byte Spill
; AVX512-FCP-NEXT: vpunpckhwd {{.*#+}} xmm1 = xmm4[4],xmm2[4],xmm4[5],xmm2[5],xmm4[6],xmm2[6],xmm4[7],xmm2[7]
; AVX512-FCP-NEXT: vmovdqu64 %zmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 64-byte Spill
; AVX512-FCP-NEXT: vinserti32x4 $2, %xmm3, %zmm3, %zmm23
; AVX512-FCP-NEXT: vinserti32x4 $2, %xmm0, %zmm0, %zmm21
; AVX512-FCP-NEXT: vmovdqa 32(%rsi), %xmm0
; AVX512-FCP-NEXT: vmovdqa 32(%rdi), %xmm2
; AVX512-FCP-NEXT: vpunpcklwd {{.*#+}} xmm1 = xmm2[0],xmm0[0],xmm2[1],xmm0[1],xmm2[2],xmm0[2],xmm2[3],xmm0[3]
; AVX512-FCP-NEXT: vmovdqu64 %zmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 64-byte Spill
; AVX512-FCP-NEXT: vpunpckhwd {{.*#+}} xmm0 = xmm2[4],xmm0[4],xmm2[5],xmm0[5],xmm2[6],xmm0[6],xmm2[7],xmm0[7]
; AVX512-FCP-NEXT: vmovdqu64 %zmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 64-byte Spill
; AVX512-FCP-NEXT: vmovdqa (%r10), %ymm5
; AVX512-FCP-NEXT: vmovdqa (%rax), %ymm3
; AVX512-FCP-NEXT: vpunpcklwd {{.*#+}} ymm2 = ymm3[0],ymm5[0],ymm3[1],ymm5[1],ymm3[2],ymm5[2],ymm3[3],ymm5[3],ymm3[8],ymm5[8],ymm3[9],ymm5[9],ymm3[10],ymm5[10],ymm3[11],ymm5[11]
; AVX512-FCP-NEXT: vinserti64x4 $1, %ymm2, %zmm2, %zmm6
; AVX512-FCP-NEXT: vmovdqa (%r9), %ymm8
; AVX512-FCP-NEXT: vmovdqa (%r8), %ymm10
; AVX512-FCP-NEXT: vpunpcklwd {{.*#+}} ymm4 = ymm10[0],ymm8[0],ymm10[1],ymm8[1],ymm10[2],ymm8[2],ymm10[3],ymm8[3],ymm10[8],ymm8[8],ymm10[9],ymm8[9],ymm10[10],ymm8[10],ymm10[11],ymm8[11]
; AVX512-FCP-NEXT: vinserti64x4 $1, %ymm4, %zmm4, %zmm19
; AVX512-FCP-NEXT: vmovdqa (%rcx), %ymm11
; AVX512-FCP-NEXT: vmovdqa (%rdx), %ymm14
; AVX512-FCP-NEXT: vpunpcklwd {{.*#+}} ymm4 = ymm14[0],ymm11[0],ymm14[1],ymm11[1],ymm14[2],ymm11[2],ymm14[3],ymm11[3],ymm14[8],ymm11[8],ymm14[9],ymm11[9],ymm14[10],ymm11[10],ymm14[11],ymm11[11]
; AVX512-FCP-NEXT: vinserti64x4 $1, %ymm4, %zmm4, %zmm20
; AVX512-FCP-NEXT: vmovdqa (%rsi), %ymm1
; AVX512-FCP-NEXT: vmovdqa (%rdi), %ymm0
; AVX512-FCP-NEXT: vpunpcklwd {{.*#+}} ymm4 = ymm0[0],ymm1[0],ymm0[1],ymm1[1],ymm0[2],ymm1[2],ymm0[3],ymm1[3],ymm0[8],ymm1[8],ymm0[9],ymm1[9],ymm0[10],ymm1[10],ymm0[11],ymm1[11]
; AVX512-FCP-NEXT: vinserti64x4 $1, %ymm4, %zmm4, %zmm16
; AVX512-FCP-NEXT: vpunpckhwd {{.*#+}} ymm3 = ymm3[4],ymm5[4],ymm3[5],ymm5[5],ymm3[6],ymm5[6],ymm3[7],ymm5[7],ymm3[12],ymm5[12],ymm3[13],ymm5[13],ymm3[14],ymm5[14],ymm3[15],ymm5[15]
; AVX512-FCP-NEXT: vinserti64x4 $1, %ymm3, %zmm3, %zmm4
; AVX512-FCP-NEXT: vpunpckhwd {{.*#+}} ymm3 = ymm10[4],ymm8[4],ymm10[5],ymm8[5],ymm10[6],ymm8[6],ymm10[7],ymm8[7],ymm10[12],ymm8[12],ymm10[13],ymm8[13],ymm10[14],ymm8[14],ymm10[15],ymm8[15]
; AVX512-FCP-NEXT: vinserti64x4 $1, %ymm3, %zmm3, %zmm2
; AVX512-FCP-NEXT: vpunpckhwd {{.*#+}} ymm3 = ymm14[4],ymm11[4],ymm14[5],ymm11[5],ymm14[6],ymm11[6],ymm14[7],ymm11[7],ymm14[12],ymm11[12],ymm14[13],ymm11[13],ymm14[14],ymm11[14],ymm14[15],ymm11[15]
; AVX512-FCP-NEXT: vpunpckhwd {{.*#+}} ymm0 = ymm0[4],ymm1[4],ymm0[5],ymm1[5],ymm0[6],ymm1[6],ymm0[7],ymm1[7],ymm0[12],ymm1[12],ymm0[13],ymm1[13],ymm0[14],ymm1[14],ymm0[15],ymm1[15]
; AVX512-FCP-NEXT: vmovdqa {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 # 16-byte Reload
; AVX512-FCP-NEXT: vpunpcklwd {{.*#+}} xmm1 = xmm1[0],xmm12[0],xmm1[1],xmm12[1],xmm1[2],xmm12[2],xmm1[3],xmm12[3]
; AVX512-FCP-NEXT: vmovdqa (%rsp), %xmm5 # 16-byte Reload
; AVX512-FCP-NEXT: vpunpcklwd {{[-0-9]+}}(%r{{[sb]}}p), %xmm5, %xmm8 # 16-byte Folded Reload
; AVX512-FCP-NEXT: # xmm8 = xmm5[0],mem[0],xmm5[1],mem[1],xmm5[2],mem[2],xmm5[3],mem[3]
; AVX512-FCP-NEXT: vinserti64x4 $1, %ymm3, %zmm3, %zmm10
; AVX512-FCP-NEXT: vinserti64x4 $1, %ymm0, %zmm0, %zmm5
; AVX512-FCP-NEXT: vmovdqa (%rcx), %xmm0
; AVX512-FCP-NEXT: vmovdqa (%rdx), %xmm3
; AVX512-FCP-NEXT: vpunpckhwd {{.*#+}} xmm11 = xmm3[4],xmm0[4],xmm3[5],xmm0[5],xmm3[6],xmm0[6],xmm3[7],xmm0[7]
; AVX512-FCP-NEXT: vmovdqu64 %zmm11, {{[-0-9]+}}(%r{{[sb]}}p) # 64-byte Spill
; AVX512-FCP-NEXT: vpunpcklwd {{.*#+}} xmm0 = xmm3[0],xmm0[0],xmm3[1],xmm0[1],xmm3[2],xmm0[2],xmm3[3],xmm0[3]
; AVX512-FCP-NEXT: vmovdqu64 %zmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 64-byte Spill
; AVX512-FCP-NEXT: vinserti32x4 $2, %xmm1, %zmm1, %zmm14
; AVX512-FCP-NEXT: vinserti32x4 $2, %xmm8, %zmm8, %zmm12
; AVX512-FCP-NEXT: vmovdqa (%rsi), %xmm0
; AVX512-FCP-NEXT: vmovdqa (%rdi), %xmm1
; AVX512-FCP-NEXT: vpunpckhwd {{.*#+}} xmm11 = xmm1[4],xmm0[4],xmm1[5],xmm0[5],xmm1[6],xmm0[6],xmm1[7],xmm0[7]
; AVX512-FCP-NEXT: vpunpcklwd {{.*#+}} xmm0 = xmm1[0],xmm0[0],xmm1[1],xmm0[1],xmm1[2],xmm0[2],xmm1[3],xmm0[3]
; AVX512-FCP-NEXT: vmovdqu64 %zmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 64-byte Spill
; AVX512-FCP-NEXT: movw $-30584, %ax # imm = 0x8888
; AVX512-FCP-NEXT: kmovw %eax, %k2
; AVX512-FCP-NEXT: vpmovsxbd {{.*#+}} zmm0 = [0,1,4,5,4,5,5,7,10,9,14,13,14,13,15,15]
; AVX512-FCP-NEXT: vpermd {{[-0-9]+}}(%r{{[sb]}}p), %zmm0, %zmm3 # 64-byte Folded Reload
; AVX512-FCP-NEXT: vpmovsxbd {{.*#+}} zmm1 = [0,0,4,4,4,4,6,5,8,10,12,14,12,14,14,15]
; AVX512-FCP-NEXT: vpermd {{[-0-9]+}}(%r{{[sb]}}p), %zmm1, %zmm3 {%k2} # 64-byte Folded Reload
; AVX512-FCP-NEXT: vmovdqu64 %zmm3, (%rsp) # 64-byte Spill
; AVX512-FCP-NEXT: vpermd {{[-0-9]+}}(%r{{[sb]}}p), %zmm0, %zmm3 # 64-byte Folded Reload
; AVX512-FCP-NEXT: vpermd {{[-0-9]+}}(%r{{[sb]}}p), %zmm1, %zmm3 {%k2} # 64-byte Folded Reload
; AVX512-FCP-NEXT: vpermd %zmm24, %zmm0, %zmm24
; AVX512-FCP-NEXT: vpermd %zmm25, %zmm1, %zmm24 {%k2}
; AVX512-FCP-NEXT: vpermd %zmm18, %zmm0, %zmm25
; AVX512-FCP-NEXT: vpermd %zmm30, %zmm1, %zmm25 {%k2}
; AVX512-FCP-NEXT: vpermd %zmm15, %zmm0, %zmm8
; AVX512-FCP-NEXT: vpermd %zmm17, %zmm1, %zmm8 {%k2}
; AVX512-FCP-NEXT: vmovdqu64 %zmm8, {{[-0-9]+}}(%r{{[sb]}}p) # 64-byte Spill
; AVX512-FCP-NEXT: vpermd %zmm7, %zmm0, %zmm30
; AVX512-FCP-NEXT: vpermd %zmm13, %zmm1, %zmm30 {%k2}
; AVX512-FCP-NEXT: vpermd %zmm19, %zmm0, %zmm7
; AVX512-FCP-NEXT: vpermd %zmm6, %zmm1, %zmm7 {%k2}
; AVX512-FCP-NEXT: vmovdqu64 %zmm7, {{[-0-9]+}}(%r{{[sb]}}p) # 64-byte Spill
; AVX512-FCP-NEXT: vpermd %zmm2, %zmm0, %zmm19
; AVX512-FCP-NEXT: vpermd %zmm4, %zmm1, %zmm19 {%k2}
; AVX512-FCP-NEXT: movw $8738, %ax # imm = 0x2222
; AVX512-FCP-NEXT: kmovw %eax, %k1
; AVX512-FCP-NEXT: vpmovsxbd {{.*#+}} zmm0 = [4,5,1,3,5,7,5,7,14,13,11,11,15,15,15,15]
; AVX512-FCP-NEXT: vpermd {{[-0-9]+}}(%r{{[sb]}}p), %zmm0, %zmm6 # 64-byte Folded Reload
; AVX512-FCP-NEXT: vpmovsxbd {{.*#+}} zmm1 = [4,4,2,1,6,5,6,5,12,14,10,11,14,15,14,15]
; AVX512-FCP-NEXT: vpermd {{[-0-9]+}}(%r{{[sb]}}p), %zmm1, %zmm6 {%k1} # 64-byte Folded Reload
; AVX512-FCP-NEXT: vpermd {{[-0-9]+}}(%r{{[sb]}}p), %zmm0, %zmm7 # 64-byte Folded Reload
; AVX512-FCP-NEXT: vpermd {{[-0-9]+}}(%r{{[sb]}}p), %zmm1, %zmm7 {%k1} # 64-byte Folded Reload
; AVX512-FCP-NEXT: vpermd {{[-0-9]+}}(%r{{[sb]}}p), %zmm0, %zmm13 # 64-byte Folded Reload
; AVX512-FCP-NEXT: vpermd {{[-0-9]+}}(%r{{[sb]}}p), %zmm1, %zmm13 {%k1} # 64-byte Folded Reload
; AVX512-FCP-NEXT: vpermd %zmm31, %zmm0, %zmm15
; AVX512-FCP-NEXT: vpermd {{[-0-9]+}}(%r{{[sb]}}p), %zmm1, %zmm15 {%k1} # 64-byte Folded Reload
; AVX512-FCP-NEXT: vpermd %zmm28, %zmm0, %zmm17
; AVX512-FCP-NEXT: vpermd %zmm29, %zmm1, %zmm17 {%k1}
; AVX512-FCP-NEXT: vpermd %zmm9, %zmm0, %zmm9
; AVX512-FCP-NEXT: vpermd %zmm22, %zmm1, %zmm9 {%k1}
; AVX512-FCP-NEXT: vpermd %zmm16, %zmm0, %zmm4
; AVX512-FCP-NEXT: vpermd %zmm20, %zmm1, %zmm4 {%k1}
; AVX512-FCP-NEXT: vpermd %zmm5, %zmm0, %zmm5
; AVX512-FCP-NEXT: vpermd %zmm10, %zmm1, %zmm5 {%k1}
; AVX512-FCP-NEXT: vpmovsxbd {{.*#+}} zmm0 = [0,0,0,0,0,0,1,1,10,10,10,10,0,0,11,11]
; AVX512-FCP-NEXT: vpermd {{[-0-9]+}}(%r{{[sb]}}p), %zmm0, %zmm1 # 64-byte Folded Reload
; AVX512-FCP-NEXT: vpermd {{[-0-9]+}}(%r{{[sb]}}p), %zmm0, %zmm1 {%k2} # 64-byte Folded Reload
; AVX512-FCP-NEXT: vpmovsxbd {{.*#+}} zmm10 = [0,0,0,0,0,0,1,0,10,10,10,10,0,0,11,11]
; AVX512-FCP-NEXT: vpermd {{[-0-9]+}}(%r{{[sb]}}p), %zmm10, %zmm10 # 64-byte Folded Reload
; AVX512-FCP-NEXT: vpermd {{[-0-9]+}}(%r{{[sb]}}p), %zmm0, %zmm10 {%k2} # 64-byte Folded Reload
; AVX512-FCP-NEXT: vpermd {{[-0-9]+}}(%r{{[sb]}}p), %zmm0, %zmm16 # 64-byte Folded Reload
; AVX512-FCP-NEXT: vpermd {{[-0-9]+}}(%r{{[sb]}}p), %zmm0, %zmm16 {%k2} # 64-byte Folded Reload
; AVX512-FCP-NEXT: vpermd {{[-0-9]+}}(%r{{[sb]}}p), %zmm0, %zmm20 # 64-byte Folded Reload
; AVX512-FCP-NEXT: vpermd {{[-0-9]+}}(%r{{[sb]}}p), %zmm0, %zmm20 {%k2} # 64-byte Folded Reload
; AVX512-FCP-NEXT: vpermd {{[-0-9]+}}(%r{{[sb]}}p), %zmm0, %zmm22 # 64-byte Folded Reload
; AVX512-FCP-NEXT: vpermd {{[-0-9]+}}(%r{{[sb]}}p), %zmm0, %zmm22 {%k2} # 64-byte Folded Reload
; AVX512-FCP-NEXT: vpermd %zmm26, %zmm0, %zmm26
; AVX512-FCP-NEXT: vpermd %zmm27, %zmm0, %zmm26 {%k2}
; AVX512-FCP-NEXT: vpermd %zmm21, %zmm0, %zmm21
; AVX512-FCP-NEXT: vpermd %zmm23, %zmm0, %zmm21 {%k2}
; AVX512-FCP-NEXT: vpermd %zmm12, %zmm0, %zmm23
; AVX512-FCP-NEXT: vpermd %zmm14, %zmm0, %zmm23 {%k2}
; AVX512-FCP-NEXT: vinserti32x4 $2, %xmm11, %zmm11, %zmm0
; AVX512-FCP-NEXT: vpmovsxbd {{.*#+}} zmm11 = [0,0,1,1,1,1,0,0,10,0,11,0,11,0,0,0]
; AVX512-FCP-NEXT: vpermd %zmm0, %zmm11, %zmm12
; AVX512-FCP-NEXT: vmovdqu64 {{[-0-9]+}}(%r{{[sb]}}p), %zmm0 # 64-byte Reload
; AVX512-FCP-NEXT: vinserti32x4 $2, %xmm0, %zmm0, %zmm0
; AVX512-FCP-NEXT: vpmovsxbd {{.*#+}} zmm11 = [0,0,1,1,1,1,0,0,10,10,11,11,11,11,0,0]
; AVX512-FCP-NEXT: vpermd %zmm0, %zmm11, %zmm12 {%k1}
; AVX512-FCP-NEXT: vmovdqu64 {{[-0-9]+}}(%r{{[sb]}}p), %zmm0 # 64-byte Reload
; AVX512-FCP-NEXT: vinserti32x4 $2, %xmm0, %zmm0, %zmm0
; AVX512-FCP-NEXT: vpmovsxbd {{.*#+}} zmm14 = [0,0,1,0,1,0,0,0,10,10,11,11,11,11,0,0]
; AVX512-FCP-NEXT: vpermd %zmm0, %zmm14, %zmm0
; AVX512-FCP-NEXT: vmovdqu64 {{[-0-9]+}}(%r{{[sb]}}p), %zmm8 # 64-byte Reload
; AVX512-FCP-NEXT: vinserti32x4 $2, %xmm8, %zmm8, %zmm14
; AVX512-FCP-NEXT: vpermd %zmm14, %zmm11, %zmm0 {%k1}
; AVX512-FCP-NEXT: vmovdqu64 {{[-0-9]+}}(%r{{[sb]}}p), %zmm8 # 64-byte Reload
; AVX512-FCP-NEXT: vinserti32x4 $2, %xmm8, %zmm8, %zmm14
; AVX512-FCP-NEXT: vmovdqu64 {{[-0-9]+}}(%r{{[sb]}}p), %zmm8 # 64-byte Reload
; AVX512-FCP-NEXT: vinserti32x4 $2, %xmm8, %zmm8, %zmm27
; AVX512-FCP-NEXT: vpermd %zmm27, %zmm11, %zmm27
; AVX512-FCP-NEXT: vpermd %zmm14, %zmm11, %zmm27 {%k1}
; AVX512-FCP-NEXT: vmovdqu64 {{[-0-9]+}}(%r{{[sb]}}p), %zmm8 # 64-byte Reload
; AVX512-FCP-NEXT: vinserti32x4 $2, %xmm8, %zmm8, %zmm14
; AVX512-FCP-NEXT: vmovdqu64 {{[-0-9]+}}(%r{{[sb]}}p), %zmm8 # 64-byte Reload
; AVX512-FCP-NEXT: vinserti32x4 $2, %xmm8, %zmm8, %zmm28
; AVX512-FCP-NEXT: vpermd %zmm28, %zmm11, %zmm28
; AVX512-FCP-NEXT: vpermd %zmm14, %zmm11, %zmm28 {%k1}
; AVX512-FCP-NEXT: vmovdqu64 {{[-0-9]+}}(%r{{[sb]}}p), %zmm8 # 64-byte Reload
; AVX512-FCP-NEXT: vinserti32x4 $2, %xmm8, %zmm8, %zmm14
; AVX512-FCP-NEXT: vmovdqu64 {{[-0-9]+}}(%r{{[sb]}}p), %zmm8 # 64-byte Reload
; AVX512-FCP-NEXT: vinserti32x4 $2, %xmm8, %zmm8, %zmm29
; AVX512-FCP-NEXT: vpermd %zmm29, %zmm11, %zmm29
; AVX512-FCP-NEXT: vpermd %zmm14, %zmm11, %zmm29 {%k1}
; AVX512-FCP-NEXT: vmovdqu64 {{[-0-9]+}}(%r{{[sb]}}p), %zmm8 # 64-byte Reload
; AVX512-FCP-NEXT: vinserti32x4 $2, %xmm8, %zmm8, %zmm14
; AVX512-FCP-NEXT: vmovdqu64 {{[-0-9]+}}(%r{{[sb]}}p), %zmm8 # 64-byte Reload
; AVX512-FCP-NEXT: vinserti32x4 $2, %xmm8, %zmm8, %zmm31
; AVX512-FCP-NEXT: vpermd %zmm31, %zmm11, %zmm31
; AVX512-FCP-NEXT: vpermd %zmm14, %zmm11, %zmm31 {%k1}
; AVX512-FCP-NEXT: vmovdqu64 {{[-0-9]+}}(%r{{[sb]}}p), %zmm8 # 64-byte Reload
; AVX512-FCP-NEXT: vinserti32x4 $2, %xmm8, %zmm8, %zmm14
; AVX512-FCP-NEXT: vmovdqu64 {{[-0-9]+}}(%r{{[sb]}}p), %zmm8 # 64-byte Reload
; AVX512-FCP-NEXT: vinserti32x4 $2, %xmm8, %zmm8, %zmm8
; AVX512-FCP-NEXT: vpermd %zmm8, %zmm11, %zmm8
; AVX512-FCP-NEXT: vpermd %zmm14, %zmm11, %zmm8 {%k1}
; AVX512-FCP-NEXT: vmovdqu64 {{[-0-9]+}}(%r{{[sb]}}p), %zmm14 # 64-byte Reload
; AVX512-FCP-NEXT: vinserti32x4 $2, %xmm14, %zmm14, %zmm14
; AVX512-FCP-NEXT: vmovdqu64 {{[-0-9]+}}(%r{{[sb]}}p), %zmm2 # 64-byte Reload
; AVX512-FCP-NEXT: vinserti32x4 $2, %xmm2, %zmm2, %zmm18
; AVX512-FCP-NEXT: vpermd %zmm18, %zmm11, %zmm18
; AVX512-FCP-NEXT: vpermd %zmm14, %zmm11, %zmm18 {%k1}
; AVX512-FCP-NEXT: movb $-86, %al
; AVX512-FCP-NEXT: kmovw %eax, %k1
; AVX512-FCP-NEXT: vmovdqa64 %zmm1, %zmm12 {%k1}
; AVX512-FCP-NEXT: vmovdqu64 (%rsp), %zmm1 # 64-byte Reload
; AVX512-FCP-NEXT: vmovdqa64 %zmm1, %zmm6 {%k1}
; AVX512-FCP-NEXT: vmovdqa64 %zmm3, %zmm7 {%k1}
; AVX512-FCP-NEXT: vmovdqa64 %zmm10, %zmm0 {%k1}
; AVX512-FCP-NEXT: vmovdqa64 %zmm16, %zmm27 {%k1}
; AVX512-FCP-NEXT: vmovdqa64 %zmm24, %zmm13 {%k1}
; AVX512-FCP-NEXT: vmovdqa64 %zmm25, %zmm15 {%k1}
; AVX512-FCP-NEXT: vmovdqa64 %zmm20, %zmm28 {%k1}
; AVX512-FCP-NEXT: vmovdqa64 %zmm22, %zmm29 {%k1}
; AVX512-FCP-NEXT: vmovdqu64 {{[-0-9]+}}(%r{{[sb]}}p), %zmm1 # 64-byte Reload
; AVX512-FCP-NEXT: vmovdqa64 %zmm1, %zmm17 {%k1}
; AVX512-FCP-NEXT: vmovdqa64 %zmm30, %zmm9 {%k1}
; AVX512-FCP-NEXT: vmovdqa64 %zmm26, %zmm31 {%k1}
; AVX512-FCP-NEXT: vmovdqa64 %zmm21, %zmm8 {%k1}
; AVX512-FCP-NEXT: vmovdqu64 {{[-0-9]+}}(%r{{[sb]}}p), %zmm1 # 64-byte Reload
; AVX512-FCP-NEXT: vmovdqa64 %zmm1, %zmm4 {%k1}
; AVX512-FCP-NEXT: vmovdqa64 %zmm19, %zmm5 {%k1}
; AVX512-FCP-NEXT: vmovdqa64 %zmm23, %zmm18 {%k1}
; AVX512-FCP-NEXT: movq {{[0-9]+}}(%rsp), %rax
; AVX512-FCP-NEXT: vmovdqa64 %zmm18, (%rax)
; AVX512-FCP-NEXT: vmovdqa64 %zmm5, 192(%rax)
; AVX512-FCP-NEXT: vmovdqa64 %zmm4, 128(%rax)
; AVX512-FCP-NEXT: vmovdqa64 %zmm8, 320(%rax)
; AVX512-FCP-NEXT: vmovdqa64 %zmm31, 256(%rax)
; AVX512-FCP-NEXT: vmovdqa64 %zmm9, 448(%rax)
; AVX512-FCP-NEXT: vmovdqa64 %zmm17, 384(%rax)
; AVX512-FCP-NEXT: vmovdqa64 %zmm29, 576(%rax)
; AVX512-FCP-NEXT: vmovdqa64 %zmm28, 512(%rax)
; AVX512-FCP-NEXT: vmovdqa64 %zmm15, 704(%rax)
; AVX512-FCP-NEXT: vmovdqa64 %zmm13, 640(%rax)
; AVX512-FCP-NEXT: vmovdqa64 %zmm27, 832(%rax)
; AVX512-FCP-NEXT: vmovdqa64 %zmm0, 768(%rax)
; AVX512-FCP-NEXT: vmovdqa64 %zmm7, 960(%rax)
; AVX512-FCP-NEXT: vmovdqa64 %zmm6, 896(%rax)
; AVX512-FCP-NEXT: vmovdqa64 %zmm12, 64(%rax)
; AVX512-FCP-NEXT: addq $2312, %rsp # imm = 0x908
; AVX512-FCP-NEXT: vzeroupper
; AVX512-FCP-NEXT: retq
;
; AVX512DQ-LABEL: store_i16_stride8_vf64:
; AVX512DQ: # %bb.0:
; AVX512DQ-NEXT: subq $504, %rsp # imm = 0x1F8
; AVX512DQ-NEXT: movq {{[0-9]+}}(%rsp), %rax
; AVX512DQ-NEXT: movq {{[0-9]+}}(%rsp), %r10
; AVX512DQ-NEXT: vmovdqa (%r10), %xmm0
; AVX512DQ-NEXT: vmovdqa %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
; AVX512DQ-NEXT: vmovdqa 64(%r10), %xmm4
; AVX512DQ-NEXT: vmovdqa (%rax), %xmm1
; AVX512DQ-NEXT: vmovdqa %xmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
; AVX512DQ-NEXT: vmovdqa 64(%rax), %xmm3
; AVX512DQ-NEXT: vpunpckhwd {{.*#+}} xmm1 = xmm1[4],xmm0[4],xmm1[5],xmm0[5],xmm1[6],xmm0[6],xmm1[7],xmm0[7]
; AVX512DQ-NEXT: vmovdqa (%r9), %xmm0
; AVX512DQ-NEXT: vmovdqa %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
; AVX512DQ-NEXT: vmovdqa (%r8), %xmm7
; AVX512DQ-NEXT: vpunpckhwd {{.*#+}} xmm2 = xmm7[4],xmm0[4],xmm7[5],xmm0[5],xmm7[6],xmm0[6],xmm7[7],xmm0[7]
; AVX512DQ-NEXT: vpmovsxbd {{.*#+}} zmm30 = [0,0,0,0,0,0,1,0,2,2,2,2,0,0,3,3]
; AVX512DQ-NEXT: vpermd %zmm2, %zmm30, %zmm0
; AVX512DQ-NEXT: vpmovsxbd {{.*#+}} zmm29 = [0,0,0,0,0,0,1,1,2,2,2,2,0,0,3,3]
; AVX512DQ-NEXT: movw $-30584, %r11w # imm = 0x8888
; AVX512DQ-NEXT: kmovw %r11d, %k2
; AVX512DQ-NEXT: vpermd %zmm1, %zmm29, %zmm0 {%k2}
; AVX512DQ-NEXT: vmovdqu64 %zmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 64-byte Spill
; AVX512DQ-NEXT: movw $8738, %r11w # imm = 0x2222
; AVX512DQ-NEXT: kmovw %r11d, %k1
; AVX512DQ-NEXT: vmovdqa 96(%r10), %ymm2
; AVX512DQ-NEXT: vmovdqa 96(%rax), %ymm5
; AVX512DQ-NEXT: vpunpcklwd {{.*#+}} ymm1 = ymm5[0],ymm2[0],ymm5[1],ymm2[1],ymm5[2],ymm2[2],ymm5[3],ymm2[3],ymm5[8],ymm2[8],ymm5[9],ymm2[9],ymm5[10],ymm2[10],ymm5[11],ymm2[11]
; AVX512DQ-NEXT: vmovdqa 96(%r9), %ymm8
; AVX512DQ-NEXT: vmovdqa 96(%r8), %ymm9
; AVX512DQ-NEXT: vpunpcklwd {{.*#+}} ymm10 = ymm9[0],ymm8[0],ymm9[1],ymm8[1],ymm9[2],ymm8[2],ymm9[3],ymm8[3],ymm9[8],ymm8[8],ymm9[9],ymm8[9],ymm9[10],ymm8[10],ymm9[11],ymm8[11]
; AVX512DQ-NEXT: vpmovsxbd {{.*#+}} zmm19 = [0,1,4,5,4,5,5,7,2,1,6,5,6,5,7,7]
; AVX512DQ-NEXT: vpermd %zmm10, %zmm19, %zmm0
; AVX512DQ-NEXT: vpmovsxbd {{.*#+}} zmm18 = [0,0,4,4,4,4,6,5,0,2,4,6,4,6,6,7]
; AVX512DQ-NEXT: vpermd %zmm1, %zmm18, %zmm0 {%k2}
; AVX512DQ-NEXT: vmovdqu64 %zmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 64-byte Spill
; AVX512DQ-NEXT: vmovdqa 96(%rcx), %ymm10
; AVX512DQ-NEXT: vmovdqa 96(%rdx), %ymm11
; AVX512DQ-NEXT: vmovdqa 96(%rsi), %ymm12
; AVX512DQ-NEXT: vmovdqa 96(%rdi), %ymm13
; AVX512DQ-NEXT: vpunpcklwd {{.*#+}} ymm1 = ymm13[0],ymm12[0],ymm13[1],ymm12[1],ymm13[2],ymm12[2],ymm13[3],ymm12[3],ymm13[8],ymm12[8],ymm13[9],ymm12[9],ymm13[10],ymm12[10],ymm13[11],ymm12[11]
; AVX512DQ-NEXT: vpmovsxbd {{.*#+}} zmm16 = [4,5,1,3,5,7,5,7,6,5,3,3,7,7,7,7]
; AVX512DQ-NEXT: vpermd %zmm1, %zmm16, %zmm0
; AVX512DQ-NEXT: vpunpcklwd {{.*#+}} ymm14 = ymm11[0],ymm10[0],ymm11[1],ymm10[1],ymm11[2],ymm10[2],ymm11[3],ymm10[3],ymm11[8],ymm10[8],ymm11[9],ymm10[9],ymm11[10],ymm10[10],ymm11[11],ymm10[11]
; AVX512DQ-NEXT: vpmovsxbd {{.*#+}} zmm17 = [4,4,2,1,6,5,6,5,4,6,2,3,6,7,6,7]
; AVX512DQ-NEXT: vpermd %zmm14, %zmm17, %zmm0 {%k1}
; AVX512DQ-NEXT: vmovdqu64 %zmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 64-byte Spill
; AVX512DQ-NEXT: vpunpckhwd {{.*#+}} ymm2 = ymm5[4],ymm2[4],ymm5[5],ymm2[5],ymm5[6],ymm2[6],ymm5[7],ymm2[7],ymm5[12],ymm2[12],ymm5[13],ymm2[13],ymm5[14],ymm2[14],ymm5[15],ymm2[15]
; AVX512DQ-NEXT: vpunpckhwd {{.*#+}} ymm5 = ymm9[4],ymm8[4],ymm9[5],ymm8[5],ymm9[6],ymm8[6],ymm9[7],ymm8[7],ymm9[12],ymm8[12],ymm9[13],ymm8[13],ymm9[14],ymm8[14],ymm9[15],ymm8[15]
; AVX512DQ-NEXT: vpermd %zmm5, %zmm19, %zmm0
; AVX512DQ-NEXT: vpermd %zmm2, %zmm18, %zmm0 {%k2}
; AVX512DQ-NEXT: vmovdqu64 %zmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 64-byte Spill
; AVX512DQ-NEXT: vpunpckhwd {{.*#+}} ymm2 = ymm11[4],ymm10[4],ymm11[5],ymm10[5],ymm11[6],ymm10[6],ymm11[7],ymm10[7],ymm11[12],ymm10[12],ymm11[13],ymm10[13],ymm11[14],ymm10[14],ymm11[15],ymm10[15]
; AVX512DQ-NEXT: vpunpckhwd {{.*#+}} ymm5 = ymm13[4],ymm12[4],ymm13[5],ymm12[5],ymm13[6],ymm12[6],ymm13[7],ymm12[7],ymm13[12],ymm12[12],ymm13[13],ymm12[13],ymm13[14],ymm12[14],ymm13[15],ymm12[15]
; AVX512DQ-NEXT: vpermd %zmm5, %zmm16, %zmm31
; AVX512DQ-NEXT: vpermd %zmm2, %zmm17, %zmm31 {%k1}
; AVX512DQ-NEXT: vmovdqa 96(%r10), %xmm2
; AVX512DQ-NEXT: vmovdqa 96(%rax), %xmm8
; AVX512DQ-NEXT: vpunpcklwd {{.*#+}} xmm9 = xmm8[0],xmm2[0],xmm8[1],xmm2[1],xmm8[2],xmm2[2],xmm8[3],xmm2[3]
; AVX512DQ-NEXT: vmovdqa 96(%r9), %xmm10
; AVX512DQ-NEXT: vmovdqa 96(%r8), %xmm11
; AVX512DQ-NEXT: vpunpcklwd {{.*#+}} xmm12 = xmm11[0],xmm10[0],xmm11[1],xmm10[1],xmm11[2],xmm10[2],xmm11[3],xmm10[3]
; AVX512DQ-NEXT: vpermd %zmm12, %zmm30, %zmm0
; AVX512DQ-NEXT: vpermd %zmm9, %zmm29, %zmm0 {%k2}
; AVX512DQ-NEXT: vmovdqu64 %zmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 64-byte Spill
; AVX512DQ-NEXT: vpunpckhwd {{.*#+}} xmm2 = xmm8[4],xmm2[4],xmm8[5],xmm2[5],xmm8[6],xmm2[6],xmm8[7],xmm2[7]
; AVX512DQ-NEXT: vpunpckhwd {{.*#+}} xmm8 = xmm11[4],xmm10[4],xmm11[5],xmm10[5],xmm11[6],xmm10[6],xmm11[7],xmm10[7]
; AVX512DQ-NEXT: vpermd %zmm8, %zmm30, %zmm0
; AVX512DQ-NEXT: vpermd %zmm2, %zmm29, %zmm0 {%k2}
; AVX512DQ-NEXT: vmovdqu64 %zmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 64-byte Spill
; AVX512DQ-NEXT: vmovdqa 64(%r10), %ymm2
; AVX512DQ-NEXT: vmovdqa 64(%rax), %ymm9
; AVX512DQ-NEXT: vpunpcklwd {{.*#+}} ymm8 = ymm9[0],ymm2[0],ymm9[1],ymm2[1],ymm9[2],ymm2[2],ymm9[3],ymm2[3],ymm9[8],ymm2[8],ymm9[9],ymm2[9],ymm9[10],ymm2[10],ymm9[11],ymm2[11]
; AVX512DQ-NEXT: vmovdqa 64(%r9), %ymm10
; AVX512DQ-NEXT: vmovdqa 64(%r8), %ymm11
; AVX512DQ-NEXT: vpunpcklwd {{.*#+}} ymm12 = ymm11[0],ymm10[0],ymm11[1],ymm10[1],ymm11[2],ymm10[2],ymm11[3],ymm10[3],ymm11[8],ymm10[8],ymm11[9],ymm10[9],ymm11[10],ymm10[10],ymm11[11],ymm10[11]
; AVX512DQ-NEXT: vpermd %zmm12, %zmm19, %zmm0
; AVX512DQ-NEXT: vpermd %zmm8, %zmm18, %zmm0 {%k2}
; AVX512DQ-NEXT: vmovdqu64 %zmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 64-byte Spill
; AVX512DQ-NEXT: vmovdqa 64(%rcx), %ymm12
; AVX512DQ-NEXT: vmovdqa 64(%rdx), %ymm15
; AVX512DQ-NEXT: vmovdqa 64(%rsi), %ymm1
; AVX512DQ-NEXT: vmovdqa 64(%rdi), %ymm0
; AVX512DQ-NEXT: vpunpcklwd {{.*#+}} ymm8 = ymm0[0],ymm1[0],ymm0[1],ymm1[1],ymm0[2],ymm1[2],ymm0[3],ymm1[3],ymm0[8],ymm1[8],ymm0[9],ymm1[9],ymm0[10],ymm1[10],ymm0[11],ymm1[11]
; AVX512DQ-NEXT: vpermd %zmm8, %zmm16, %zmm26
; AVX512DQ-NEXT: vpunpcklwd {{.*#+}} ymm8 = ymm15[0],ymm12[0],ymm15[1],ymm12[1],ymm15[2],ymm12[2],ymm15[3],ymm12[3],ymm15[8],ymm12[8],ymm15[9],ymm12[9],ymm15[10],ymm12[10],ymm15[11],ymm12[11]
; AVX512DQ-NEXT: vpermd %zmm8, %zmm17, %zmm26 {%k1}
; AVX512DQ-NEXT: vmovdqa 64(%r9), %xmm8
; AVX512DQ-NEXT: vpunpckhwd {{.*#+}} ymm2 = ymm9[4],ymm2[4],ymm9[5],ymm2[5],ymm9[6],ymm2[6],ymm9[7],ymm2[7],ymm9[12],ymm2[12],ymm9[13],ymm2[13],ymm9[14],ymm2[14],ymm9[15],ymm2[15]
; AVX512DQ-NEXT: vmovdqa 64(%r8), %xmm9
; AVX512DQ-NEXT: vpunpckhwd {{.*#+}} ymm10 = ymm11[4],ymm10[4],ymm11[5],ymm10[5],ymm11[6],ymm10[6],ymm11[7],ymm10[7],ymm11[12],ymm10[12],ymm11[13],ymm10[13],ymm11[14],ymm10[14],ymm11[15],ymm10[15]
; AVX512DQ-NEXT: vpermd %zmm10, %zmm19, %zmm5
; AVX512DQ-NEXT: vpermd %zmm2, %zmm18, %zmm5 {%k2}
; AVX512DQ-NEXT: vmovdqu64 %zmm5, {{[-0-9]+}}(%r{{[sb]}}p) # 64-byte Spill
; AVX512DQ-NEXT: vpunpckhwd {{.*#+}} ymm2 = ymm15[4],ymm12[4],ymm15[5],ymm12[5],ymm15[6],ymm12[6],ymm15[7],ymm12[7],ymm15[12],ymm12[12],ymm15[13],ymm12[13],ymm15[14],ymm12[14],ymm15[15],ymm12[15]
; AVX512DQ-NEXT: vpunpckhwd {{.*#+}} ymm0 = ymm0[4],ymm1[4],ymm0[5],ymm1[5],ymm0[6],ymm1[6],ymm0[7],ymm1[7],ymm0[12],ymm1[12],ymm0[13],ymm1[13],ymm0[14],ymm1[14],ymm0[15],ymm1[15]
; AVX512DQ-NEXT: vpermd %zmm0, %zmm16, %zmm24
; AVX512DQ-NEXT: vpermd %zmm2, %zmm17, %zmm24 {%k1}
; AVX512DQ-NEXT: vpunpcklwd {{.*#+}} xmm0 = xmm3[0],xmm4[0],xmm3[1],xmm4[1],xmm3[2],xmm4[2],xmm3[3],xmm4[3]
; AVX512DQ-NEXT: vpunpcklwd {{.*#+}} xmm1 = xmm9[0],xmm8[0],xmm9[1],xmm8[1],xmm9[2],xmm8[2],xmm9[3],xmm8[3]
; AVX512DQ-NEXT: vpermd %zmm1, %zmm30, %zmm1
; AVX512DQ-NEXT: vpermd %zmm0, %zmm29, %zmm1 {%k2}
; AVX512DQ-NEXT: vmovdqu64 %zmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 64-byte Spill
; AVX512DQ-NEXT: vpunpckhwd {{.*#+}} xmm2 = xmm3[4],xmm4[4],xmm3[5],xmm4[5],xmm3[6],xmm4[6],xmm3[7],xmm4[7]
; AVX512DQ-NEXT: vpunpckhwd {{.*#+}} xmm10 = xmm9[4],xmm8[4],xmm9[5],xmm8[5],xmm9[6],xmm8[6],xmm9[7],xmm8[7]
; AVX512DQ-NEXT: vmovdqa 32(%r10), %ymm0
; AVX512DQ-NEXT: vmovdqa 32(%rax), %ymm1
; AVX512DQ-NEXT: vpunpcklwd {{.*#+}} ymm3 = ymm1[0],ymm0[0],ymm1[1],ymm0[1],ymm1[2],ymm0[2],ymm1[3],ymm0[3],ymm1[8],ymm0[8],ymm1[9],ymm0[9],ymm1[10],ymm0[10],ymm1[11],ymm0[11]
; AVX512DQ-NEXT: vmovdqa 32(%r9), %ymm4
; AVX512DQ-NEXT: vmovdqa 32(%r8), %ymm8
; AVX512DQ-NEXT: vpunpcklwd {{.*#+}} ymm9 = ymm8[0],ymm4[0],ymm8[1],ymm4[1],ymm8[2],ymm4[2],ymm8[3],ymm4[3],ymm8[8],ymm4[8],ymm8[9],ymm4[9],ymm8[10],ymm4[10],ymm8[11],ymm4[11]
; AVX512DQ-NEXT: vpermd %zmm9, %zmm19, %zmm28
; AVX512DQ-NEXT: vpermd %zmm3, %zmm18, %zmm28 {%k2}
; AVX512DQ-NEXT: vmovdqa 32(%rsi), %ymm9
; AVX512DQ-NEXT: vmovdqa 32(%rdi), %ymm11
; AVX512DQ-NEXT: vpunpcklwd {{.*#+}} ymm3 = ymm11[0],ymm9[0],ymm11[1],ymm9[1],ymm11[2],ymm9[2],ymm11[3],ymm9[3],ymm11[8],ymm9[8],ymm11[9],ymm9[9],ymm11[10],ymm9[10],ymm11[11],ymm9[11]
; AVX512DQ-NEXT: vpermd %zmm3, %zmm16, %zmm23
; AVX512DQ-NEXT: vmovdqa 32(%rcx), %ymm12
; AVX512DQ-NEXT: vmovdqa 32(%rdx), %ymm3
; AVX512DQ-NEXT: vpunpcklwd {{.*#+}} ymm6 = ymm3[0],ymm12[0],ymm3[1],ymm12[1],ymm3[2],ymm12[2],ymm3[3],ymm12[3],ymm3[8],ymm12[8],ymm3[9],ymm12[9],ymm3[10],ymm12[10],ymm3[11],ymm12[11]
; AVX512DQ-NEXT: vpermd %zmm6, %zmm17, %zmm23 {%k1}
; AVX512DQ-NEXT: vpunpckhwd {{.*#+}} ymm0 = ymm1[4],ymm0[4],ymm1[5],ymm0[5],ymm1[6],ymm0[6],ymm1[7],ymm0[7],ymm1[12],ymm0[12],ymm1[13],ymm0[13],ymm1[14],ymm0[14],ymm1[15],ymm0[15]
; AVX512DQ-NEXT: vpunpckhwd {{.*#+}} ymm1 = ymm8[4],ymm4[4],ymm8[5],ymm4[5],ymm8[6],ymm4[6],ymm8[7],ymm4[7],ymm8[12],ymm4[12],ymm8[13],ymm4[13],ymm8[14],ymm4[14],ymm8[15],ymm4[15]
; AVX512DQ-NEXT: vpermd %zmm1, %zmm19, %zmm25
; AVX512DQ-NEXT: vpermd %zmm0, %zmm18, %zmm25 {%k2}
; AVX512DQ-NEXT: vpunpckhwd {{.*#+}} ymm3 = ymm3[4],ymm12[4],ymm3[5],ymm12[5],ymm3[6],ymm12[6],ymm3[7],ymm12[7],ymm3[12],ymm12[12],ymm3[13],ymm12[13],ymm3[14],ymm12[14],ymm3[15],ymm12[15]
; AVX512DQ-NEXT: vpunpckhwd {{.*#+}} ymm0 = ymm11[4],ymm9[4],ymm11[5],ymm9[5],ymm11[6],ymm9[6],ymm11[7],ymm9[7],ymm11[12],ymm9[12],ymm11[13],ymm9[13],ymm11[14],ymm9[14],ymm11[15],ymm9[15]
; AVX512DQ-NEXT: vpermd %zmm0, %zmm16, %zmm21
; AVX512DQ-NEXT: vpermd %zmm3, %zmm17, %zmm21 {%k1}
; AVX512DQ-NEXT: vmovdqa (%r10), %ymm3
; AVX512DQ-NEXT: vmovdqa (%r9), %ymm4
; AVX512DQ-NEXT: vmovdqa (%r8), %ymm6
; AVX512DQ-NEXT: vpunpcklwd {{.*#+}} ymm8 = ymm6[0],ymm4[0],ymm6[1],ymm4[1],ymm6[2],ymm4[2],ymm6[3],ymm4[3],ymm6[8],ymm4[8],ymm6[9],ymm4[9],ymm6[10],ymm4[10],ymm6[11],ymm4[11]
; AVX512DQ-NEXT: vpermd %zmm8, %zmm19, %zmm27
; AVX512DQ-NEXT: vmovdqa (%rax), %ymm8
; AVX512DQ-NEXT: vpunpcklwd {{.*#+}} ymm9 = ymm8[0],ymm3[0],ymm8[1],ymm3[1],ymm8[2],ymm3[2],ymm8[3],ymm3[3],ymm8[8],ymm3[8],ymm8[9],ymm3[9],ymm8[10],ymm3[10],ymm8[11],ymm3[11]
; AVX512DQ-NEXT: vpermd %zmm9, %zmm18, %zmm27 {%k2}
; AVX512DQ-NEXT: vpunpckhwd {{.*#+}} ymm3 = ymm8[4],ymm3[4],ymm8[5],ymm3[5],ymm8[6],ymm3[6],ymm8[7],ymm3[7],ymm8[12],ymm3[12],ymm8[13],ymm3[13],ymm8[14],ymm3[14],ymm8[15],ymm3[15]
; AVX512DQ-NEXT: vpunpckhwd {{.*#+}} ymm4 = ymm6[4],ymm4[4],ymm6[5],ymm4[5],ymm6[6],ymm4[6],ymm6[7],ymm4[7],ymm6[12],ymm4[12],ymm6[13],ymm4[13],ymm6[14],ymm4[14],ymm6[15],ymm4[15]
; AVX512DQ-NEXT: vmovdqa (%rcx), %ymm6
; AVX512DQ-NEXT: vpermd %zmm4, %zmm19, %zmm20
; AVX512DQ-NEXT: vmovdqa (%rsi), %ymm4
; AVX512DQ-NEXT: vpermd %zmm3, %zmm18, %zmm20 {%k2}
; AVX512DQ-NEXT: vmovdqa (%rdi), %ymm3
; AVX512DQ-NEXT: vpunpcklwd {{.*#+}} ymm8 = ymm3[0],ymm4[0],ymm3[1],ymm4[1],ymm3[2],ymm4[2],ymm3[3],ymm4[3],ymm3[8],ymm4[8],ymm3[9],ymm4[9],ymm3[10],ymm4[10],ymm3[11],ymm4[11]
; AVX512DQ-NEXT: vpermd %zmm8, %zmm16, %zmm18
; AVX512DQ-NEXT: vmovdqa (%rdx), %ymm8
; AVX512DQ-NEXT: vpunpcklwd {{.*#+}} ymm9 = ymm8[0],ymm6[0],ymm8[1],ymm6[1],ymm8[2],ymm6[2],ymm8[3],ymm6[3],ymm8[8],ymm6[8],ymm8[9],ymm6[9],ymm8[10],ymm6[10],ymm8[11],ymm6[11]
; AVX512DQ-NEXT: vpermd %zmm9, %zmm17, %zmm18 {%k1}
; AVX512DQ-NEXT: vpunpckhwd {{.*#+}} ymm6 = ymm8[4],ymm6[4],ymm8[5],ymm6[5],ymm8[6],ymm6[6],ymm8[7],ymm6[7],ymm8[12],ymm6[12],ymm8[13],ymm6[13],ymm8[14],ymm6[14],ymm8[15],ymm6[15]
; AVX512DQ-NEXT: vpunpckhwd {{.*#+}} ymm3 = ymm3[4],ymm4[4],ymm3[5],ymm4[5],ymm3[6],ymm4[6],ymm3[7],ymm4[7],ymm3[12],ymm4[12],ymm3[13],ymm4[13],ymm3[14],ymm4[14],ymm3[15],ymm4[15]
; AVX512DQ-NEXT: vmovdqa 32(%r10), %xmm4
; AVX512DQ-NEXT: vpermd %zmm3, %zmm16, %zmm16
; AVX512DQ-NEXT: vmovdqa 32(%rax), %xmm3
; AVX512DQ-NEXT: vpermd %zmm6, %zmm17, %zmm16 {%k1}
; AVX512DQ-NEXT: vmovdqa 32(%r9), %xmm6
; AVX512DQ-NEXT: vpermd %zmm10, %zmm30, %zmm19
; AVX512DQ-NEXT: vmovdqa 32(%r8), %xmm8
; AVX512DQ-NEXT: vpermd %zmm2, %zmm29, %zmm19 {%k2}
; AVX512DQ-NEXT: vpunpcklwd {{.*#+}} xmm2 = xmm8[0],xmm6[0],xmm8[1],xmm6[1],xmm8[2],xmm6[2],xmm8[3],xmm6[3]
; AVX512DQ-NEXT: vpermd %zmm2, %zmm30, %zmm10
; AVX512DQ-NEXT: vpunpcklwd {{.*#+}} xmm9 = xmm3[0],xmm4[0],xmm3[1],xmm4[1],xmm3[2],xmm4[2],xmm3[3],xmm4[3]
; AVX512DQ-NEXT: vpermd %zmm9, %zmm29, %zmm10 {%k2}
; AVX512DQ-NEXT: vpunpckhwd {{.*#+}} xmm3 = xmm3[4],xmm4[4],xmm3[5],xmm4[5],xmm3[6],xmm4[6],xmm3[7],xmm4[7]
; AVX512DQ-NEXT: vmovdqa (%rcx), %xmm0
; AVX512DQ-NEXT: vpunpckhwd {{.*#+}} xmm4 = xmm8[4],xmm6[4],xmm8[5],xmm6[5],xmm8[6],xmm6[6],xmm8[7],xmm6[7]
; AVX512DQ-NEXT: vmovdqa (%rdx), %xmm13
; AVX512DQ-NEXT: vpermd %zmm4, %zmm30, %zmm17
; AVX512DQ-NEXT: vpermd %zmm3, %zmm29, %zmm17 {%k2}
; AVX512DQ-NEXT: vpunpckhwd {{.*#+}} xmm3 = xmm13[4],xmm0[4],xmm13[5],xmm0[5],xmm13[6],xmm0[6],xmm13[7],xmm0[7]
; AVX512DQ-NEXT: vmovdqa64 %xmm0, %xmm22
; AVX512DQ-NEXT: vmovdqa {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Reload
; AVX512DQ-NEXT: vpunpcklwd {{[-0-9]+}}(%r{{[sb]}}p), %xmm0, %xmm4 # 16-byte Folded Reload
; AVX512DQ-NEXT: # xmm4 = xmm0[0],mem[0],xmm0[1],mem[1],xmm0[2],mem[2],xmm0[3],mem[3]
; AVX512DQ-NEXT: vmovdqa (%rsi), %xmm9
; AVX512DQ-NEXT: vpunpcklwd {{[-0-9]+}}(%r{{[sb]}}p), %xmm7, %xmm6 # 16-byte Folded Reload
; AVX512DQ-NEXT: # xmm6 = xmm7[0],mem[0],xmm7[1],mem[1],xmm7[2],mem[2],xmm7[3],mem[3]
; AVX512DQ-NEXT: vmovdqa (%rdi), %xmm12
; AVX512DQ-NEXT: vpermd %zmm6, %zmm30, %zmm8
; AVX512DQ-NEXT: vpunpckhwd {{.*#+}} xmm6 = xmm12[4],xmm9[4],xmm12[5],xmm9[5],xmm12[6],xmm9[6],xmm12[7],xmm9[7]
; AVX512DQ-NEXT: vpermd %zmm4, %zmm29, %zmm8 {%k2}
; AVX512DQ-NEXT: vpmovsxbd {{.*#+}} zmm29 = [0,0,1,0,1,0,0,0,2,2,3,3,3,3,0,0]
; AVX512DQ-NEXT: vpermd %zmm6, %zmm29, %zmm7
; AVX512DQ-NEXT: vpmovsxbd {{.*#+}} zmm30 = [0,0,1,1,1,1,0,0,2,2,3,3,3,3,0,0]
; AVX512DQ-NEXT: vpermd %zmm3, %zmm30, %zmm7 {%k1}
; AVX512DQ-NEXT: vmovdqa 96(%rsi), %xmm3
; AVX512DQ-NEXT: vmovdqa 96(%rdi), %xmm2
; AVX512DQ-NEXT: vpunpcklwd {{.*#+}} xmm6 = xmm2[0],xmm3[0],xmm2[1],xmm3[1],xmm2[2],xmm3[2],xmm2[3],xmm3[3]
; AVX512DQ-NEXT: vpermd %zmm6, %zmm29, %zmm6
; AVX512DQ-NEXT: vmovdqa 96(%rcx), %xmm1
; AVX512DQ-NEXT: vmovdqa 96(%rdx), %xmm0
; AVX512DQ-NEXT: vpunpcklwd {{.*#+}} xmm14 = xmm0[0],xmm1[0],xmm0[1],xmm1[1],xmm0[2],xmm1[2],xmm0[3],xmm1[3]
; AVX512DQ-NEXT: vpermd %zmm14, %zmm30, %zmm6 {%k1}
; AVX512DQ-NEXT: vpunpckhwd {{.*#+}} xmm0 = xmm0[4],xmm1[4],xmm0[5],xmm1[5],xmm0[6],xmm1[6],xmm0[7],xmm1[7]
; AVX512DQ-NEXT: vpunpckhwd {{.*#+}} xmm1 = xmm2[4],xmm3[4],xmm2[5],xmm3[5],xmm2[6],xmm3[6],xmm2[7],xmm3[7]
; AVX512DQ-NEXT: vpermd %zmm1, %zmm29, %zmm5
; AVX512DQ-NEXT: vpermd %zmm0, %zmm30, %zmm5 {%k1}
; AVX512DQ-NEXT: vmovdqa 64(%rsi), %xmm1
; AVX512DQ-NEXT: vmovdqa 64(%rdi), %xmm2
; AVX512DQ-NEXT: vpunpcklwd {{.*#+}} xmm3 = xmm2[0],xmm1[0],xmm2[1],xmm1[1],xmm2[2],xmm1[2],xmm2[3],xmm1[3]
; AVX512DQ-NEXT: vpermd %zmm3, %zmm29, %zmm4
; AVX512DQ-NEXT: vmovdqa 64(%rcx), %xmm14
; AVX512DQ-NEXT: vmovdqa 64(%rdx), %xmm0
; AVX512DQ-NEXT: vpunpcklwd {{.*#+}} xmm15 = xmm0[0],xmm14[0],xmm0[1],xmm14[1],xmm0[2],xmm14[2],xmm0[3],xmm14[3]
; AVX512DQ-NEXT: vpermd %zmm15, %zmm30, %zmm4 {%k1}
; AVX512DQ-NEXT: vpunpckhwd {{.*#+}} xmm0 = xmm0[4],xmm14[4],xmm0[5],xmm14[5],xmm0[6],xmm14[6],xmm0[7],xmm14[7]
; AVX512DQ-NEXT: vpunpckhwd {{.*#+}} xmm1 = xmm2[4],xmm1[4],xmm2[5],xmm1[5],xmm2[6],xmm1[6],xmm2[7],xmm1[7]
; AVX512DQ-NEXT: vpermd %zmm1, %zmm29, %zmm3
; AVX512DQ-NEXT: vpermd %zmm0, %zmm30, %zmm3 {%k1}
; AVX512DQ-NEXT: vmovdqa 32(%rsi), %xmm1
; AVX512DQ-NEXT: vmovdqa 32(%rdi), %xmm2
; AVX512DQ-NEXT: vpunpcklwd {{.*#+}} xmm14 = xmm2[0],xmm1[0],xmm2[1],xmm1[1],xmm2[2],xmm1[2],xmm2[3],xmm1[3]
; AVX512DQ-NEXT: vpermd %zmm14, %zmm29, %zmm14
; AVX512DQ-NEXT: vmovdqa 32(%rcx), %xmm15
; AVX512DQ-NEXT: vmovdqa 32(%rdx), %xmm0
; AVX512DQ-NEXT: vpunpcklwd {{.*#+}} xmm11 = xmm0[0],xmm15[0],xmm0[1],xmm15[1],xmm0[2],xmm15[2],xmm0[3],xmm15[3]
; AVX512DQ-NEXT: vpermd %zmm11, %zmm30, %zmm14 {%k1}
; AVX512DQ-NEXT: vpunpckhwd {{.*#+}} xmm0 = xmm0[4],xmm15[4],xmm0[5],xmm15[5],xmm0[6],xmm15[6],xmm0[7],xmm15[7]
; AVX512DQ-NEXT: vpunpckhwd {{.*#+}} xmm1 = xmm2[4],xmm1[4],xmm2[5],xmm1[5],xmm2[6],xmm1[6],xmm2[7],xmm1[7]
; AVX512DQ-NEXT: vpermd %zmm1, %zmm29, %zmm1
; AVX512DQ-NEXT: vpermd %zmm0, %zmm30, %zmm1 {%k1}
; AVX512DQ-NEXT: vmovdqa64 %xmm22, %xmm0
; AVX512DQ-NEXT: vpunpcklwd {{.*#+}} xmm0 = xmm13[0],xmm0[0],xmm13[1],xmm0[1],xmm13[2],xmm0[2],xmm13[3],xmm0[3]
; AVX512DQ-NEXT: vpunpcklwd {{.*#+}} xmm2 = xmm12[0],xmm9[0],xmm12[1],xmm9[1],xmm12[2],xmm9[2],xmm12[3],xmm9[3]
; AVX512DQ-NEXT: vpermd %zmm2, %zmm29, %zmm2
; AVX512DQ-NEXT: vpermd %zmm0, %zmm30, %zmm2 {%k1}
; AVX512DQ-NEXT: movb $-86, %al
; AVX512DQ-NEXT: kmovw %eax, %k1
; AVX512DQ-NEXT: vmovdqu64 {{[-0-9]+}}(%r{{[sb]}}p), %zmm0 # 64-byte Reload
; AVX512DQ-NEXT: vmovdqa64 %zmm0, %zmm7 {%k1}
; AVX512DQ-NEXT: vmovdqu64 {{[-0-9]+}}(%r{{[sb]}}p), %zmm0 # 64-byte Reload
; AVX512DQ-NEXT: vmovdqu64 {{[-0-9]+}}(%r{{[sb]}}p), %zmm9 # 64-byte Reload
; AVX512DQ-NEXT: vmovdqa64 %zmm9, %zmm0 {%k1}
; AVX512DQ-NEXT: vmovdqu64 {{[-0-9]+}}(%r{{[sb]}}p), %zmm9 # 64-byte Reload
; AVX512DQ-NEXT: vmovdqa64 %zmm9, %zmm31 {%k1}
; AVX512DQ-NEXT: vmovdqu64 {{[-0-9]+}}(%r{{[sb]}}p), %zmm9 # 64-byte Reload
; AVX512DQ-NEXT: vmovdqa64 %zmm9, %zmm6 {%k1}
; AVX512DQ-NEXT: vmovdqu64 {{[-0-9]+}}(%r{{[sb]}}p), %zmm9 # 64-byte Reload
; AVX512DQ-NEXT: vmovdqa64 %zmm9, %zmm5 {%k1}
; AVX512DQ-NEXT: vmovdqu64 {{[-0-9]+}}(%r{{[sb]}}p), %zmm9 # 64-byte Reload
; AVX512DQ-NEXT: vmovdqa64 %zmm9, %zmm26 {%k1}
; AVX512DQ-NEXT: vmovdqu64 {{[-0-9]+}}(%r{{[sb]}}p), %zmm9 # 64-byte Reload
; AVX512DQ-NEXT: vmovdqa64 %zmm9, %zmm24 {%k1}
; AVX512DQ-NEXT: vmovdqu64 {{[-0-9]+}}(%r{{[sb]}}p), %zmm9 # 64-byte Reload
; AVX512DQ-NEXT: vmovdqa64 %zmm9, %zmm4 {%k1}
; AVX512DQ-NEXT: vmovdqa64 %zmm19, %zmm3 {%k1}
; AVX512DQ-NEXT: vmovdqa64 %zmm28, %zmm23 {%k1}
; AVX512DQ-NEXT: vmovdqa64 %zmm25, %zmm21 {%k1}
; AVX512DQ-NEXT: vmovdqa64 %zmm10, %zmm14 {%k1}
; AVX512DQ-NEXT: vmovdqa64 %zmm17, %zmm1 {%k1}
; AVX512DQ-NEXT: vmovdqa64 %zmm27, %zmm18 {%k1}
; AVX512DQ-NEXT: vmovdqa64 %zmm20, %zmm16 {%k1}
; AVX512DQ-NEXT: vmovdqa64 %zmm8, %zmm2 {%k1}
; AVX512DQ-NEXT: movq {{[0-9]+}}(%rsp), %rax
; AVX512DQ-NEXT: vmovdqa64 %zmm2, (%rax)
; AVX512DQ-NEXT: vmovdqa64 %zmm16, 192(%rax)
; AVX512DQ-NEXT: vmovdqa64 %zmm18, 128(%rax)
; AVX512DQ-NEXT: vmovdqa64 %zmm1, 320(%rax)
; AVX512DQ-NEXT: vmovdqa64 %zmm14, 256(%rax)
; AVX512DQ-NEXT: vmovdqa64 %zmm21, 448(%rax)
; AVX512DQ-NEXT: vmovdqa64 %zmm23, 384(%rax)
; AVX512DQ-NEXT: vmovdqa64 %zmm3, 576(%rax)
; AVX512DQ-NEXT: vmovdqa64 %zmm4, 512(%rax)
; AVX512DQ-NEXT: vmovdqa64 %zmm24, 704(%rax)
; AVX512DQ-NEXT: vmovdqa64 %zmm26, 640(%rax)
; AVX512DQ-NEXT: vmovdqa64 %zmm5, 832(%rax)
; AVX512DQ-NEXT: vmovdqa64 %zmm6, 768(%rax)
; AVX512DQ-NEXT: vmovdqa64 %zmm31, 960(%rax)
; AVX512DQ-NEXT: vmovdqa64 %zmm0, 896(%rax)
; AVX512DQ-NEXT: vmovdqa64 %zmm7, 64(%rax)
; AVX512DQ-NEXT: addq $504, %rsp # imm = 0x1F8
; AVX512DQ-NEXT: vzeroupper
; AVX512DQ-NEXT: retq
;
; AVX512DQ-FCP-LABEL: store_i16_stride8_vf64:
; AVX512DQ-FCP: # %bb.0:
; AVX512DQ-FCP-NEXT: subq $2312, %rsp # imm = 0x908
; AVX512DQ-FCP-NEXT: movq {{[0-9]+}}(%rsp), %rax
; AVX512DQ-FCP-NEXT: movq {{[0-9]+}}(%rsp), %r10
; AVX512DQ-FCP-NEXT: vmovdqa (%r10), %xmm12
; AVX512DQ-FCP-NEXT: vmovdqa 64(%r10), %xmm0
; AVX512DQ-FCP-NEXT: vmovdqa (%rax), %xmm1
; AVX512DQ-FCP-NEXT: vmovdqa %xmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
; AVX512DQ-FCP-NEXT: vpunpckhwd {{.*#+}} xmm1 = xmm1[4],xmm12[4],xmm1[5],xmm12[5],xmm1[6],xmm12[6],xmm1[7],xmm12[7]
; AVX512DQ-FCP-NEXT: vinserti32x4 $2, %xmm1, %zmm1, %zmm1
; AVX512DQ-FCP-NEXT: vmovdqu64 %zmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 64-byte Spill
; AVX512DQ-FCP-NEXT: vmovdqa (%r9), %xmm2
; AVX512DQ-FCP-NEXT: vmovdqa %xmm2, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
; AVX512DQ-FCP-NEXT: vmovdqa (%r8), %xmm1
; AVX512DQ-FCP-NEXT: vmovdqa %xmm1, (%rsp) # 16-byte Spill
; AVX512DQ-FCP-NEXT: vpunpckhwd {{.*#+}} xmm1 = xmm1[4],xmm2[4],xmm1[5],xmm2[5],xmm1[6],xmm2[6],xmm1[7],xmm2[7]
; AVX512DQ-FCP-NEXT: vinserti32x4 $2, %xmm1, %zmm1, %zmm1
; AVX512DQ-FCP-NEXT: vmovdqu64 %zmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 64-byte Spill
; AVX512DQ-FCP-NEXT: vmovdqa 96(%r10), %ymm1
; AVX512DQ-FCP-NEXT: vmovdqa 96(%rax), %ymm2
; AVX512DQ-FCP-NEXT: vpunpcklwd {{.*#+}} ymm3 = ymm2[0],ymm1[0],ymm2[1],ymm1[1],ymm2[2],ymm1[2],ymm2[3],ymm1[3],ymm2[8],ymm1[8],ymm2[9],ymm1[9],ymm2[10],ymm1[10],ymm2[11],ymm1[11]
; AVX512DQ-FCP-NEXT: vinserti64x4 $1, %ymm3, %zmm3, %zmm3
; AVX512DQ-FCP-NEXT: vmovdqu64 %zmm3, {{[-0-9]+}}(%r{{[sb]}}p) # 64-byte Spill
; AVX512DQ-FCP-NEXT: vmovdqa 96(%r9), %ymm3
; AVX512DQ-FCP-NEXT: vmovdqa 96(%r8), %ymm4
; AVX512DQ-FCP-NEXT: vpunpcklwd {{.*#+}} ymm5 = ymm4[0],ymm3[0],ymm4[1],ymm3[1],ymm4[2],ymm3[2],ymm4[3],ymm3[3],ymm4[8],ymm3[8],ymm4[9],ymm3[9],ymm4[10],ymm3[10],ymm4[11],ymm3[11]
; AVX512DQ-FCP-NEXT: vinserti64x4 $1, %ymm5, %zmm5, %zmm5
; AVX512DQ-FCP-NEXT: vmovdqu64 %zmm5, {{[-0-9]+}}(%r{{[sb]}}p) # 64-byte Spill
; AVX512DQ-FCP-NEXT: vmovdqa 96(%rcx), %ymm5
; AVX512DQ-FCP-NEXT: vmovdqa 96(%rdx), %ymm6
; AVX512DQ-FCP-NEXT: vpunpcklwd {{.*#+}} ymm7 = ymm6[0],ymm5[0],ymm6[1],ymm5[1],ymm6[2],ymm5[2],ymm6[3],ymm5[3],ymm6[8],ymm5[8],ymm6[9],ymm5[9],ymm6[10],ymm5[10],ymm6[11],ymm5[11]
; AVX512DQ-FCP-NEXT: vinserti64x4 $1, %ymm7, %zmm7, %zmm7
; AVX512DQ-FCP-NEXT: vmovdqu64 %zmm7, {{[-0-9]+}}(%r{{[sb]}}p) # 64-byte Spill
; AVX512DQ-FCP-NEXT: vmovdqa 96(%rsi), %ymm7
; AVX512DQ-FCP-NEXT: vmovdqa 96(%rdi), %ymm8
; AVX512DQ-FCP-NEXT: vpunpcklwd {{.*#+}} ymm9 = ymm8[0],ymm7[0],ymm8[1],ymm7[1],ymm8[2],ymm7[2],ymm8[3],ymm7[3],ymm8[8],ymm7[8],ymm8[9],ymm7[9],ymm8[10],ymm7[10],ymm8[11],ymm7[11]
; AVX512DQ-FCP-NEXT: vinserti64x4 $1, %ymm9, %zmm9, %zmm9
; AVX512DQ-FCP-NEXT: vmovdqu64 %zmm9, {{[-0-9]+}}(%r{{[sb]}}p) # 64-byte Spill
; AVX512DQ-FCP-NEXT: vpunpckhwd {{.*#+}} ymm1 = ymm2[4],ymm1[4],ymm2[5],ymm1[5],ymm2[6],ymm1[6],ymm2[7],ymm1[7],ymm2[12],ymm1[12],ymm2[13],ymm1[13],ymm2[14],ymm1[14],ymm2[15],ymm1[15]
; AVX512DQ-FCP-NEXT: vinserti64x4 $1, %ymm1, %zmm1, %zmm1
; AVX512DQ-FCP-NEXT: vmovdqu64 %zmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 64-byte Spill
; AVX512DQ-FCP-NEXT: vpunpckhwd {{.*#+}} ymm1 = ymm4[4],ymm3[4],ymm4[5],ymm3[5],ymm4[6],ymm3[6],ymm4[7],ymm3[7],ymm4[12],ymm3[12],ymm4[13],ymm3[13],ymm4[14],ymm3[14],ymm4[15],ymm3[15]
; AVX512DQ-FCP-NEXT: vinserti64x4 $1, %ymm1, %zmm1, %zmm1
; AVX512DQ-FCP-NEXT: vmovdqu64 %zmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 64-byte Spill
; AVX512DQ-FCP-NEXT: vpunpckhwd {{.*#+}} ymm1 = ymm6[4],ymm5[4],ymm6[5],ymm5[5],ymm6[6],ymm5[6],ymm6[7],ymm5[7],ymm6[12],ymm5[12],ymm6[13],ymm5[13],ymm6[14],ymm5[14],ymm6[15],ymm5[15]
; AVX512DQ-FCP-NEXT: vinserti64x4 $1, %ymm1, %zmm1, %zmm1
; AVX512DQ-FCP-NEXT: vmovdqu64 %zmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 64-byte Spill
; AVX512DQ-FCP-NEXT: vpunpckhwd {{.*#+}} ymm1 = ymm8[4],ymm7[4],ymm8[5],ymm7[5],ymm8[6],ymm7[6],ymm8[7],ymm7[7],ymm8[12],ymm7[12],ymm8[13],ymm7[13],ymm8[14],ymm7[14],ymm8[15],ymm7[15]
; AVX512DQ-FCP-NEXT: vinserti64x4 $1, %ymm1, %zmm1, %zmm1
; AVX512DQ-FCP-NEXT: vmovdqu64 %zmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 64-byte Spill
; AVX512DQ-FCP-NEXT: vmovdqa 96(%r10), %xmm1
; AVX512DQ-FCP-NEXT: vmovdqa 96(%rax), %xmm2
; AVX512DQ-FCP-NEXT: vpunpcklwd {{.*#+}} xmm3 = xmm2[0],xmm1[0],xmm2[1],xmm1[1],xmm2[2],xmm1[2],xmm2[3],xmm1[3]
; AVX512DQ-FCP-NEXT: vinserti32x4 $2, %xmm3, %zmm3, %zmm3
; AVX512DQ-FCP-NEXT: vmovdqu64 %zmm3, {{[-0-9]+}}(%r{{[sb]}}p) # 64-byte Spill
; AVX512DQ-FCP-NEXT: vmovdqa 96(%r9), %xmm3
; AVX512DQ-FCP-NEXT: vmovdqa 96(%r8), %xmm4
; AVX512DQ-FCP-NEXT: vpunpcklwd {{.*#+}} xmm5 = xmm4[0],xmm3[0],xmm4[1],xmm3[1],xmm4[2],xmm3[2],xmm4[3],xmm3[3]
; AVX512DQ-FCP-NEXT: vinserti32x4 $2, %xmm5, %zmm5, %zmm5
; AVX512DQ-FCP-NEXT: vmovdqu64 %zmm5, {{[-0-9]+}}(%r{{[sb]}}p) # 64-byte Spill
; AVX512DQ-FCP-NEXT: vmovdqa 96(%rcx), %xmm5
; AVX512DQ-FCP-NEXT: vmovdqa 96(%rdx), %xmm6
; AVX512DQ-FCP-NEXT: vpunpcklwd {{.*#+}} xmm7 = xmm6[0],xmm5[0],xmm6[1],xmm5[1],xmm6[2],xmm5[2],xmm6[3],xmm5[3]
; AVX512DQ-FCP-NEXT: vmovdqu64 %zmm7, {{[-0-9]+}}(%r{{[sb]}}p) # 64-byte Spill
; AVX512DQ-FCP-NEXT: vmovdqa 96(%rsi), %xmm7
; AVX512DQ-FCP-NEXT: vmovdqa 96(%rdi), %xmm8
; AVX512DQ-FCP-NEXT: vpunpcklwd {{.*#+}} xmm9 = xmm8[0],xmm7[0],xmm8[1],xmm7[1],xmm8[2],xmm7[2],xmm8[3],xmm7[3]
; AVX512DQ-FCP-NEXT: vmovdqu64 %zmm9, {{[-0-9]+}}(%r{{[sb]}}p) # 64-byte Spill
; AVX512DQ-FCP-NEXT: vpunpckhwd {{.*#+}} xmm1 = xmm2[4],xmm1[4],xmm2[5],xmm1[5],xmm2[6],xmm1[6],xmm2[7],xmm1[7]
; AVX512DQ-FCP-NEXT: vinserti32x4 $2, %xmm1, %zmm1, %zmm1
; AVX512DQ-FCP-NEXT: vmovdqu64 %zmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 64-byte Spill
; AVX512DQ-FCP-NEXT: vpunpckhwd {{.*#+}} xmm1 = xmm4[4],xmm3[4],xmm4[5],xmm3[5],xmm4[6],xmm3[6],xmm4[7],xmm3[7]
; AVX512DQ-FCP-NEXT: vinserti32x4 $2, %xmm1, %zmm1, %zmm1
; AVX512DQ-FCP-NEXT: vmovdqu64 %zmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 64-byte Spill
; AVX512DQ-FCP-NEXT: vpunpckhwd {{.*#+}} xmm1 = xmm6[4],xmm5[4],xmm6[5],xmm5[5],xmm6[6],xmm5[6],xmm6[7],xmm5[7]
; AVX512DQ-FCP-NEXT: vmovdqu64 %zmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 64-byte Spill
; AVX512DQ-FCP-NEXT: vpunpckhwd {{.*#+}} xmm1 = xmm8[4],xmm7[4],xmm8[5],xmm7[5],xmm8[6],xmm7[6],xmm8[7],xmm7[7]
; AVX512DQ-FCP-NEXT: vmovdqu64 %zmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 64-byte Spill
; AVX512DQ-FCP-NEXT: vmovdqa 64(%r10), %ymm2
; AVX512DQ-FCP-NEXT: vmovdqa 64(%rax), %ymm3
; AVX512DQ-FCP-NEXT: vpunpcklwd {{.*#+}} ymm1 = ymm3[0],ymm2[0],ymm3[1],ymm2[1],ymm3[2],ymm2[2],ymm3[3],ymm2[3],ymm3[8],ymm2[8],ymm3[9],ymm2[9],ymm3[10],ymm2[10],ymm3[11],ymm2[11]
; AVX512DQ-FCP-NEXT: vinserti64x4 $1, %ymm1, %zmm1, %zmm25
; AVX512DQ-FCP-NEXT: vmovdqa 64(%r9), %ymm4
; AVX512DQ-FCP-NEXT: vmovdqa 64(%r8), %ymm5
; AVX512DQ-FCP-NEXT: vpunpcklwd {{.*#+}} ymm1 = ymm5[0],ymm4[0],ymm5[1],ymm4[1],ymm5[2],ymm4[2],ymm5[3],ymm4[3],ymm5[8],ymm4[8],ymm5[9],ymm4[9],ymm5[10],ymm4[10],ymm5[11],ymm4[11]
; AVX512DQ-FCP-NEXT: vinserti64x4 $1, %ymm1, %zmm1, %zmm24
; AVX512DQ-FCP-NEXT: vmovdqa 64(%rcx), %ymm6
; AVX512DQ-FCP-NEXT: vmovdqa 64(%rdx), %ymm7
; AVX512DQ-FCP-NEXT: vpunpcklwd {{.*#+}} ymm1 = ymm7[0],ymm6[0],ymm7[1],ymm6[1],ymm7[2],ymm6[2],ymm7[3],ymm6[3],ymm7[8],ymm6[8],ymm7[9],ymm6[9],ymm7[10],ymm6[10],ymm7[11],ymm6[11]
; AVX512DQ-FCP-NEXT: vpunpckhwd {{.*#+}} ymm2 = ymm3[4],ymm2[4],ymm3[5],ymm2[5],ymm3[6],ymm2[6],ymm3[7],ymm2[7],ymm3[12],ymm2[12],ymm3[13],ymm2[13],ymm3[14],ymm2[14],ymm3[15],ymm2[15]
; AVX512DQ-FCP-NEXT: vmovdqa 64(%rsi), %ymm8
; AVX512DQ-FCP-NEXT: vpunpckhwd {{.*#+}} ymm4 = ymm5[4],ymm4[4],ymm5[5],ymm4[5],ymm5[6],ymm4[6],ymm5[7],ymm4[7],ymm5[12],ymm4[12],ymm5[13],ymm4[13],ymm5[14],ymm4[14],ymm5[15],ymm4[15]
; AVX512DQ-FCP-NEXT: vmovdqa 64(%rdi), %ymm5
; AVX512DQ-FCP-NEXT: vpunpckhwd {{.*#+}} ymm3 = ymm7[4],ymm6[4],ymm7[5],ymm6[5],ymm7[6],ymm6[6],ymm7[7],ymm6[7],ymm7[12],ymm6[12],ymm7[13],ymm6[13],ymm7[14],ymm6[14],ymm7[15],ymm6[15]
; AVX512DQ-FCP-NEXT: vpunpcklwd {{.*#+}} ymm7 = ymm5[0],ymm8[0],ymm5[1],ymm8[1],ymm5[2],ymm8[2],ymm5[3],ymm8[3],ymm5[8],ymm8[8],ymm5[9],ymm8[9],ymm5[10],ymm8[10],ymm5[11],ymm8[11]
; AVX512DQ-FCP-NEXT: vpunpckhwd {{.*#+}} ymm5 = ymm5[4],ymm8[4],ymm5[5],ymm8[5],ymm5[6],ymm8[6],ymm5[7],ymm8[7],ymm5[12],ymm8[12],ymm5[13],ymm8[13],ymm5[14],ymm8[14],ymm5[15],ymm8[15]
; AVX512DQ-FCP-NEXT: vmovdqa 64(%rax), %xmm8
; AVX512DQ-FCP-NEXT: vpunpcklwd {{.*#+}} xmm6 = xmm8[0],xmm0[0],xmm8[1],xmm0[1],xmm8[2],xmm0[2],xmm8[3],xmm0[3]
; AVX512DQ-FCP-NEXT: vpunpckhwd {{.*#+}} xmm0 = xmm8[4],xmm0[4],xmm8[5],xmm0[5],xmm8[6],xmm0[6],xmm8[7],xmm0[7]
; AVX512DQ-FCP-NEXT: vinserti64x4 $1, %ymm1, %zmm1, %zmm1
; AVX512DQ-FCP-NEXT: vmovdqu64 %zmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 64-byte Spill
; AVX512DQ-FCP-NEXT: vinserti64x4 $1, %ymm7, %zmm7, %zmm1
; AVX512DQ-FCP-NEXT: vmovdqu64 %zmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 64-byte Spill
; AVX512DQ-FCP-NEXT: vmovdqa 64(%r9), %xmm1
; AVX512DQ-FCP-NEXT: vmovdqa 64(%r8), %xmm7
; AVX512DQ-FCP-NEXT: vpunpcklwd {{.*#+}} xmm8 = xmm7[0],xmm1[0],xmm7[1],xmm1[1],xmm7[2],xmm1[2],xmm7[3],xmm1[3]
; AVX512DQ-FCP-NEXT: vpunpckhwd {{.*#+}} xmm7 = xmm7[4],xmm1[4],xmm7[5],xmm1[5],xmm7[6],xmm1[6],xmm7[7],xmm1[7]
; AVX512DQ-FCP-NEXT: vinserti64x4 $1, %ymm2, %zmm2, %zmm30
; AVX512DQ-FCP-NEXT: vinserti64x4 $1, %ymm4, %zmm4, %zmm18
; AVX512DQ-FCP-NEXT: vmovdqa 64(%rcx), %xmm2
; AVX512DQ-FCP-NEXT: vmovdqa 64(%rdx), %xmm4
; AVX512DQ-FCP-NEXT: vpunpcklwd {{.*#+}} xmm1 = xmm4[0],xmm2[0],xmm4[1],xmm2[1],xmm4[2],xmm2[2],xmm4[3],xmm2[3]
; AVX512DQ-FCP-NEXT: vmovdqu64 %zmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 64-byte Spill
; AVX512DQ-FCP-NEXT: vpunpckhwd {{.*#+}} xmm1 = xmm4[4],xmm2[4],xmm4[5],xmm2[5],xmm4[6],xmm2[6],xmm4[7],xmm2[7]
; AVX512DQ-FCP-NEXT: vmovdqu64 %zmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 64-byte Spill
; AVX512DQ-FCP-NEXT: vinserti64x4 $1, %ymm3, %zmm3, %zmm1
; AVX512DQ-FCP-NEXT: vmovdqu64 %zmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 64-byte Spill
; AVX512DQ-FCP-NEXT: vinserti64x4 $1, %ymm5, %zmm5, %zmm31
; AVX512DQ-FCP-NEXT: vmovdqa 64(%rsi), %xmm2
; AVX512DQ-FCP-NEXT: vmovdqa 64(%rdi), %xmm3
; AVX512DQ-FCP-NEXT: vpunpcklwd {{.*#+}} xmm1 = xmm3[0],xmm2[0],xmm3[1],xmm2[1],xmm3[2],xmm2[2],xmm3[3],xmm2[3]
; AVX512DQ-FCP-NEXT: vmovdqu64 %zmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 64-byte Spill
; AVX512DQ-FCP-NEXT: vpunpckhwd {{.*#+}} xmm1 = xmm3[4],xmm2[4],xmm3[5],xmm2[5],xmm3[6],xmm2[6],xmm3[7],xmm2[7]
; AVX512DQ-FCP-NEXT: vmovdqu64 %zmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 64-byte Spill
; AVX512DQ-FCP-NEXT: vinserti32x4 $2, %xmm6, %zmm6, %zmm1
; AVX512DQ-FCP-NEXT: vmovdqu64 %zmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 64-byte Spill
; AVX512DQ-FCP-NEXT: vinserti32x4 $2, %xmm8, %zmm8, %zmm1
; AVX512DQ-FCP-NEXT: vmovdqu64 %zmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 64-byte Spill
; AVX512DQ-FCP-NEXT: vinserti32x4 $2, %xmm0, %zmm0, %zmm0
; AVX512DQ-FCP-NEXT: vmovdqu64 %zmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 64-byte Spill
; AVX512DQ-FCP-NEXT: vinserti32x4 $2, %xmm7, %zmm7, %zmm0
; AVX512DQ-FCP-NEXT: vmovdqu64 %zmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 64-byte Spill
; AVX512DQ-FCP-NEXT: vmovdqa 32(%r10), %ymm0
; AVX512DQ-FCP-NEXT: vmovdqa 32(%rax), %ymm2
; AVX512DQ-FCP-NEXT: vpunpcklwd {{.*#+}} ymm3 = ymm2[0],ymm0[0],ymm2[1],ymm0[1],ymm2[2],ymm0[2],ymm2[3],ymm0[3],ymm2[8],ymm0[8],ymm2[9],ymm0[9],ymm2[10],ymm0[10],ymm2[11],ymm0[11]
; AVX512DQ-FCP-NEXT: vinserti64x4 $1, %ymm3, %zmm3, %zmm17
; AVX512DQ-FCP-NEXT: vmovdqa 32(%r9), %ymm3
; AVX512DQ-FCP-NEXT: vmovdqa 32(%r8), %ymm4
; AVX512DQ-FCP-NEXT: vpunpcklwd {{.*#+}} ymm5 = ymm4[0],ymm3[0],ymm4[1],ymm3[1],ymm4[2],ymm3[2],ymm4[3],ymm3[3],ymm4[8],ymm3[8],ymm4[9],ymm3[9],ymm4[10],ymm3[10],ymm4[11],ymm3[11]
; AVX512DQ-FCP-NEXT: vinserti64x4 $1, %ymm5, %zmm5, %zmm15
; AVX512DQ-FCP-NEXT: vmovdqa 32(%rcx), %ymm5
; AVX512DQ-FCP-NEXT: vmovdqa 32(%rdx), %ymm6
; AVX512DQ-FCP-NEXT: vpunpcklwd {{.*#+}} ymm7 = ymm6[0],ymm5[0],ymm6[1],ymm5[1],ymm6[2],ymm5[2],ymm6[3],ymm5[3],ymm6[8],ymm5[8],ymm6[9],ymm5[9],ymm6[10],ymm5[10],ymm6[11],ymm5[11]
; AVX512DQ-FCP-NEXT: vinserti64x4 $1, %ymm7, %zmm7, %zmm29
; AVX512DQ-FCP-NEXT: vmovdqa 32(%rsi), %ymm7
; AVX512DQ-FCP-NEXT: vmovdqa 32(%rdi), %ymm8
; AVX512DQ-FCP-NEXT: vpunpcklwd {{.*#+}} ymm9 = ymm8[0],ymm7[0],ymm8[1],ymm7[1],ymm8[2],ymm7[2],ymm8[3],ymm7[3],ymm8[8],ymm7[8],ymm8[9],ymm7[9],ymm8[10],ymm7[10],ymm8[11],ymm7[11]
; AVX512DQ-FCP-NEXT: vinserti64x4 $1, %ymm9, %zmm9, %zmm28
; AVX512DQ-FCP-NEXT: vpunpckhwd {{.*#+}} ymm9 = ymm2[4],ymm0[4],ymm2[5],ymm0[5],ymm2[6],ymm0[6],ymm2[7],ymm0[7],ymm2[12],ymm0[12],ymm2[13],ymm0[13],ymm2[14],ymm0[14],ymm2[15],ymm0[15]
; AVX512DQ-FCP-NEXT: vpunpckhwd {{.*#+}} ymm3 = ymm4[4],ymm3[4],ymm4[5],ymm3[5],ymm4[6],ymm3[6],ymm4[7],ymm3[7],ymm4[12],ymm3[12],ymm4[13],ymm3[13],ymm4[14],ymm3[14],ymm4[15],ymm3[15]
; AVX512DQ-FCP-NEXT: vpunpckhwd {{.*#+}} ymm0 = ymm6[4],ymm5[4],ymm6[5],ymm5[5],ymm6[6],ymm5[6],ymm6[7],ymm5[7],ymm6[12],ymm5[12],ymm6[13],ymm5[13],ymm6[14],ymm5[14],ymm6[15],ymm5[15]
; AVX512DQ-FCP-NEXT: vpunpckhwd {{.*#+}} ymm2 = ymm8[4],ymm7[4],ymm8[5],ymm7[5],ymm8[6],ymm7[6],ymm8[7],ymm7[7],ymm8[12],ymm7[12],ymm8[13],ymm7[13],ymm8[14],ymm7[14],ymm8[15],ymm7[15]
; AVX512DQ-FCP-NEXT: vinserti64x4 $1, %ymm9, %zmm9, %zmm13
; AVX512DQ-FCP-NEXT: vinserti64x4 $1, %ymm3, %zmm3, %zmm7
; AVX512DQ-FCP-NEXT: vmovdqa 32(%r10), %xmm3
; AVX512DQ-FCP-NEXT: vmovdqa 32(%rax), %xmm4
; AVX512DQ-FCP-NEXT: vpunpcklwd {{.*#+}} xmm5 = xmm4[0],xmm3[0],xmm4[1],xmm3[1],xmm4[2],xmm3[2],xmm4[3],xmm3[3]
; AVX512DQ-FCP-NEXT: vpunpckhwd {{.*#+}} xmm3 = xmm4[4],xmm3[4],xmm4[5],xmm3[5],xmm4[6],xmm3[6],xmm4[7],xmm3[7]
; AVX512DQ-FCP-NEXT: vinserti64x4 $1, %ymm0, %zmm0, %zmm22
; AVX512DQ-FCP-NEXT: vinserti64x4 $1, %ymm2, %zmm2, %zmm9
; AVX512DQ-FCP-NEXT: vmovdqa 32(%r9), %xmm0
; AVX512DQ-FCP-NEXT: vmovdqa 32(%r8), %xmm2
; AVX512DQ-FCP-NEXT: vpunpcklwd {{.*#+}} xmm4 = xmm2[0],xmm0[0],xmm2[1],xmm0[1],xmm2[2],xmm0[2],xmm2[3],xmm0[3]
; AVX512DQ-FCP-NEXT: vpunpckhwd {{.*#+}} xmm0 = xmm2[4],xmm0[4],xmm2[5],xmm0[5],xmm2[6],xmm0[6],xmm2[7],xmm0[7]
; AVX512DQ-FCP-NEXT: vinserti32x4 $2, %xmm5, %zmm5, %zmm27
; AVX512DQ-FCP-NEXT: vinserti32x4 $2, %xmm4, %zmm4, %zmm26
; AVX512DQ-FCP-NEXT: vmovdqa 32(%rcx), %xmm2
; AVX512DQ-FCP-NEXT: vmovdqa 32(%rdx), %xmm4
; AVX512DQ-FCP-NEXT: vpunpcklwd {{.*#+}} xmm1 = xmm4[0],xmm2[0],xmm4[1],xmm2[1],xmm4[2],xmm2[2],xmm4[3],xmm2[3]
; AVX512DQ-FCP-NEXT: vmovdqu64 %zmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 64-byte Spill
; AVX512DQ-FCP-NEXT: vpunpckhwd {{.*#+}} xmm1 = xmm4[4],xmm2[4],xmm4[5],xmm2[5],xmm4[6],xmm2[6],xmm4[7],xmm2[7]
; AVX512DQ-FCP-NEXT: vmovdqu64 %zmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 64-byte Spill
; AVX512DQ-FCP-NEXT: vinserti32x4 $2, %xmm3, %zmm3, %zmm23
; AVX512DQ-FCP-NEXT: vinserti32x4 $2, %xmm0, %zmm0, %zmm21
; AVX512DQ-FCP-NEXT: vmovdqa 32(%rsi), %xmm0
; AVX512DQ-FCP-NEXT: vmovdqa 32(%rdi), %xmm2
; AVX512DQ-FCP-NEXT: vpunpcklwd {{.*#+}} xmm1 = xmm2[0],xmm0[0],xmm2[1],xmm0[1],xmm2[2],xmm0[2],xmm2[3],xmm0[3]
; AVX512DQ-FCP-NEXT: vmovdqu64 %zmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 64-byte Spill
; AVX512DQ-FCP-NEXT: vpunpckhwd {{.*#+}} xmm0 = xmm2[4],xmm0[4],xmm2[5],xmm0[5],xmm2[6],xmm0[6],xmm2[7],xmm0[7]
; AVX512DQ-FCP-NEXT: vmovdqu64 %zmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 64-byte Spill
; AVX512DQ-FCP-NEXT: vmovdqa (%r10), %ymm5
; AVX512DQ-FCP-NEXT: vmovdqa (%rax), %ymm3
; AVX512DQ-FCP-NEXT: vpunpcklwd {{.*#+}} ymm2 = ymm3[0],ymm5[0],ymm3[1],ymm5[1],ymm3[2],ymm5[2],ymm3[3],ymm5[3],ymm3[8],ymm5[8],ymm3[9],ymm5[9],ymm3[10],ymm5[10],ymm3[11],ymm5[11]
; AVX512DQ-FCP-NEXT: vinserti64x4 $1, %ymm2, %zmm2, %zmm6
; AVX512DQ-FCP-NEXT: vmovdqa (%r9), %ymm8
; AVX512DQ-FCP-NEXT: vmovdqa (%r8), %ymm10
; AVX512DQ-FCP-NEXT: vpunpcklwd {{.*#+}} ymm4 = ymm10[0],ymm8[0],ymm10[1],ymm8[1],ymm10[2],ymm8[2],ymm10[3],ymm8[3],ymm10[8],ymm8[8],ymm10[9],ymm8[9],ymm10[10],ymm8[10],ymm10[11],ymm8[11]
; AVX512DQ-FCP-NEXT: vinserti64x4 $1, %ymm4, %zmm4, %zmm19
; AVX512DQ-FCP-NEXT: vmovdqa (%rcx), %ymm11
; AVX512DQ-FCP-NEXT: vmovdqa (%rdx), %ymm14
; AVX512DQ-FCP-NEXT: vpunpcklwd {{.*#+}} ymm4 = ymm14[0],ymm11[0],ymm14[1],ymm11[1],ymm14[2],ymm11[2],ymm14[3],ymm11[3],ymm14[8],ymm11[8],ymm14[9],ymm11[9],ymm14[10],ymm11[10],ymm14[11],ymm11[11]
; AVX512DQ-FCP-NEXT: vinserti64x4 $1, %ymm4, %zmm4, %zmm20
; AVX512DQ-FCP-NEXT: vmovdqa (%rsi), %ymm1
; AVX512DQ-FCP-NEXT: vmovdqa (%rdi), %ymm0
; AVX512DQ-FCP-NEXT: vpunpcklwd {{.*#+}} ymm4 = ymm0[0],ymm1[0],ymm0[1],ymm1[1],ymm0[2],ymm1[2],ymm0[3],ymm1[3],ymm0[8],ymm1[8],ymm0[9],ymm1[9],ymm0[10],ymm1[10],ymm0[11],ymm1[11]
; AVX512DQ-FCP-NEXT: vinserti64x4 $1, %ymm4, %zmm4, %zmm16
; AVX512DQ-FCP-NEXT: vpunpckhwd {{.*#+}} ymm3 = ymm3[4],ymm5[4],ymm3[5],ymm5[5],ymm3[6],ymm5[6],ymm3[7],ymm5[7],ymm3[12],ymm5[12],ymm3[13],ymm5[13],ymm3[14],ymm5[14],ymm3[15],ymm5[15]
; AVX512DQ-FCP-NEXT: vinserti64x4 $1, %ymm3, %zmm3, %zmm4
; AVX512DQ-FCP-NEXT: vpunpckhwd {{.*#+}} ymm3 = ymm10[4],ymm8[4],ymm10[5],ymm8[5],ymm10[6],ymm8[6],ymm10[7],ymm8[7],ymm10[12],ymm8[12],ymm10[13],ymm8[13],ymm10[14],ymm8[14],ymm10[15],ymm8[15]
; AVX512DQ-FCP-NEXT: vinserti64x4 $1, %ymm3, %zmm3, %zmm2
; AVX512DQ-FCP-NEXT: vpunpckhwd {{.*#+}} ymm3 = ymm14[4],ymm11[4],ymm14[5],ymm11[5],ymm14[6],ymm11[6],ymm14[7],ymm11[7],ymm14[12],ymm11[12],ymm14[13],ymm11[13],ymm14[14],ymm11[14],ymm14[15],ymm11[15]
; AVX512DQ-FCP-NEXT: vpunpckhwd {{.*#+}} ymm0 = ymm0[4],ymm1[4],ymm0[5],ymm1[5],ymm0[6],ymm1[6],ymm0[7],ymm1[7],ymm0[12],ymm1[12],ymm0[13],ymm1[13],ymm0[14],ymm1[14],ymm0[15],ymm1[15]
; AVX512DQ-FCP-NEXT: vmovdqa {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 # 16-byte Reload
; AVX512DQ-FCP-NEXT: vpunpcklwd {{.*#+}} xmm1 = xmm1[0],xmm12[0],xmm1[1],xmm12[1],xmm1[2],xmm12[2],xmm1[3],xmm12[3]
; AVX512DQ-FCP-NEXT: vmovdqa (%rsp), %xmm5 # 16-byte Reload
; AVX512DQ-FCP-NEXT: vpunpcklwd {{[-0-9]+}}(%r{{[sb]}}p), %xmm5, %xmm8 # 16-byte Folded Reload
; AVX512DQ-FCP-NEXT: # xmm8 = xmm5[0],mem[0],xmm5[1],mem[1],xmm5[2],mem[2],xmm5[3],mem[3]
; AVX512DQ-FCP-NEXT: vinserti64x4 $1, %ymm3, %zmm3, %zmm10
; AVX512DQ-FCP-NEXT: vinserti64x4 $1, %ymm0, %zmm0, %zmm5
; AVX512DQ-FCP-NEXT: vmovdqa (%rcx), %xmm0
; AVX512DQ-FCP-NEXT: vmovdqa (%rdx), %xmm3
; AVX512DQ-FCP-NEXT: vpunpckhwd {{.*#+}} xmm11 = xmm3[4],xmm0[4],xmm3[5],xmm0[5],xmm3[6],xmm0[6],xmm3[7],xmm0[7]
; AVX512DQ-FCP-NEXT: vmovdqu64 %zmm11, {{[-0-9]+}}(%r{{[sb]}}p) # 64-byte Spill
; AVX512DQ-FCP-NEXT: vpunpcklwd {{.*#+}} xmm0 = xmm3[0],xmm0[0],xmm3[1],xmm0[1],xmm3[2],xmm0[2],xmm3[3],xmm0[3]
; AVX512DQ-FCP-NEXT: vmovdqu64 %zmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 64-byte Spill
; AVX512DQ-FCP-NEXT: vinserti32x4 $2, %xmm1, %zmm1, %zmm14
; AVX512DQ-FCP-NEXT: vinserti32x4 $2, %xmm8, %zmm8, %zmm12
; AVX512DQ-FCP-NEXT: vmovdqa (%rsi), %xmm0
; AVX512DQ-FCP-NEXT: vmovdqa (%rdi), %xmm1
; AVX512DQ-FCP-NEXT: vpunpckhwd {{.*#+}} xmm11 = xmm1[4],xmm0[4],xmm1[5],xmm0[5],xmm1[6],xmm0[6],xmm1[7],xmm0[7]
; AVX512DQ-FCP-NEXT: vpunpcklwd {{.*#+}} xmm0 = xmm1[0],xmm0[0],xmm1[1],xmm0[1],xmm1[2],xmm0[2],xmm1[3],xmm0[3]
; AVX512DQ-FCP-NEXT: vmovdqu64 %zmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 64-byte Spill
; AVX512DQ-FCP-NEXT: movw $-30584, %ax # imm = 0x8888
; AVX512DQ-FCP-NEXT: kmovw %eax, %k2
; AVX512DQ-FCP-NEXT: vpmovsxbd {{.*#+}} zmm0 = [0,1,4,5,4,5,5,7,10,9,14,13,14,13,15,15]
; AVX512DQ-FCP-NEXT: vpermd {{[-0-9]+}}(%r{{[sb]}}p), %zmm0, %zmm3 # 64-byte Folded Reload
; AVX512DQ-FCP-NEXT: vpmovsxbd {{.*#+}} zmm1 = [0,0,4,4,4,4,6,5,8,10,12,14,12,14,14,15]
; AVX512DQ-FCP-NEXT: vpermd {{[-0-9]+}}(%r{{[sb]}}p), %zmm1, %zmm3 {%k2} # 64-byte Folded Reload
; AVX512DQ-FCP-NEXT: vmovdqu64 %zmm3, (%rsp) # 64-byte Spill
; AVX512DQ-FCP-NEXT: vpermd {{[-0-9]+}}(%r{{[sb]}}p), %zmm0, %zmm3 # 64-byte Folded Reload
; AVX512DQ-FCP-NEXT: vpermd {{[-0-9]+}}(%r{{[sb]}}p), %zmm1, %zmm3 {%k2} # 64-byte Folded Reload
; AVX512DQ-FCP-NEXT: vpermd %zmm24, %zmm0, %zmm24
; AVX512DQ-FCP-NEXT: vpermd %zmm25, %zmm1, %zmm24 {%k2}
; AVX512DQ-FCP-NEXT: vpermd %zmm18, %zmm0, %zmm25
; AVX512DQ-FCP-NEXT: vpermd %zmm30, %zmm1, %zmm25 {%k2}
; AVX512DQ-FCP-NEXT: vpermd %zmm15, %zmm0, %zmm8
; AVX512DQ-FCP-NEXT: vpermd %zmm17, %zmm1, %zmm8 {%k2}
; AVX512DQ-FCP-NEXT: vmovdqu64 %zmm8, {{[-0-9]+}}(%r{{[sb]}}p) # 64-byte Spill
; AVX512DQ-FCP-NEXT: vpermd %zmm7, %zmm0, %zmm30
; AVX512DQ-FCP-NEXT: vpermd %zmm13, %zmm1, %zmm30 {%k2}
; AVX512DQ-FCP-NEXT: vpermd %zmm19, %zmm0, %zmm7
; AVX512DQ-FCP-NEXT: vpermd %zmm6, %zmm1, %zmm7 {%k2}
; AVX512DQ-FCP-NEXT: vmovdqu64 %zmm7, {{[-0-9]+}}(%r{{[sb]}}p) # 64-byte Spill
; AVX512DQ-FCP-NEXT: vpermd %zmm2, %zmm0, %zmm19
; AVX512DQ-FCP-NEXT: vpermd %zmm4, %zmm1, %zmm19 {%k2}
; AVX512DQ-FCP-NEXT: movw $8738, %ax # imm = 0x2222
; AVX512DQ-FCP-NEXT: kmovw %eax, %k1
; AVX512DQ-FCP-NEXT: vpmovsxbd {{.*#+}} zmm0 = [4,5,1,3,5,7,5,7,14,13,11,11,15,15,15,15]
; AVX512DQ-FCP-NEXT: vpermd {{[-0-9]+}}(%r{{[sb]}}p), %zmm0, %zmm6 # 64-byte Folded Reload
; AVX512DQ-FCP-NEXT: vpmovsxbd {{.*#+}} zmm1 = [4,4,2,1,6,5,6,5,12,14,10,11,14,15,14,15]
; AVX512DQ-FCP-NEXT: vpermd {{[-0-9]+}}(%r{{[sb]}}p), %zmm1, %zmm6 {%k1} # 64-byte Folded Reload
; AVX512DQ-FCP-NEXT: vpermd {{[-0-9]+}}(%r{{[sb]}}p), %zmm0, %zmm7 # 64-byte Folded Reload
; AVX512DQ-FCP-NEXT: vpermd {{[-0-9]+}}(%r{{[sb]}}p), %zmm1, %zmm7 {%k1} # 64-byte Folded Reload
; AVX512DQ-FCP-NEXT: vpermd {{[-0-9]+}}(%r{{[sb]}}p), %zmm0, %zmm13 # 64-byte Folded Reload
; AVX512DQ-FCP-NEXT: vpermd {{[-0-9]+}}(%r{{[sb]}}p), %zmm1, %zmm13 {%k1} # 64-byte Folded Reload
; AVX512DQ-FCP-NEXT: vpermd %zmm31, %zmm0, %zmm15
; AVX512DQ-FCP-NEXT: vpermd {{[-0-9]+}}(%r{{[sb]}}p), %zmm1, %zmm15 {%k1} # 64-byte Folded Reload
; AVX512DQ-FCP-NEXT: vpermd %zmm28, %zmm0, %zmm17
; AVX512DQ-FCP-NEXT: vpermd %zmm29, %zmm1, %zmm17 {%k1}
; AVX512DQ-FCP-NEXT: vpermd %zmm9, %zmm0, %zmm9
; AVX512DQ-FCP-NEXT: vpermd %zmm22, %zmm1, %zmm9 {%k1}
; AVX512DQ-FCP-NEXT: vpermd %zmm16, %zmm0, %zmm4
; AVX512DQ-FCP-NEXT: vpermd %zmm20, %zmm1, %zmm4 {%k1}
; AVX512DQ-FCP-NEXT: vpermd %zmm5, %zmm0, %zmm5
; AVX512DQ-FCP-NEXT: vpermd %zmm10, %zmm1, %zmm5 {%k1}
; AVX512DQ-FCP-NEXT: vpmovsxbd {{.*#+}} zmm0 = [0,0,0,0,0,0,1,1,10,10,10,10,0,0,11,11]
; AVX512DQ-FCP-NEXT: vpermd {{[-0-9]+}}(%r{{[sb]}}p), %zmm0, %zmm1 # 64-byte Folded Reload
; AVX512DQ-FCP-NEXT: vpermd {{[-0-9]+}}(%r{{[sb]}}p), %zmm0, %zmm1 {%k2} # 64-byte Folded Reload
; AVX512DQ-FCP-NEXT: vpmovsxbd {{.*#+}} zmm10 = [0,0,0,0,0,0,1,0,10,10,10,10,0,0,11,11]
; AVX512DQ-FCP-NEXT: vpermd {{[-0-9]+}}(%r{{[sb]}}p), %zmm10, %zmm10 # 64-byte Folded Reload
; AVX512DQ-FCP-NEXT: vpermd {{[-0-9]+}}(%r{{[sb]}}p), %zmm0, %zmm10 {%k2} # 64-byte Folded Reload
; AVX512DQ-FCP-NEXT: vpermd {{[-0-9]+}}(%r{{[sb]}}p), %zmm0, %zmm16 # 64-byte Folded Reload
; AVX512DQ-FCP-NEXT: vpermd {{[-0-9]+}}(%r{{[sb]}}p), %zmm0, %zmm16 {%k2} # 64-byte Folded Reload
; AVX512DQ-FCP-NEXT: vpermd {{[-0-9]+}}(%r{{[sb]}}p), %zmm0, %zmm20 # 64-byte Folded Reload
; AVX512DQ-FCP-NEXT: vpermd {{[-0-9]+}}(%r{{[sb]}}p), %zmm0, %zmm20 {%k2} # 64-byte Folded Reload
; AVX512DQ-FCP-NEXT: vpermd {{[-0-9]+}}(%r{{[sb]}}p), %zmm0, %zmm22 # 64-byte Folded Reload
; AVX512DQ-FCP-NEXT: vpermd {{[-0-9]+}}(%r{{[sb]}}p), %zmm0, %zmm22 {%k2} # 64-byte Folded Reload
; AVX512DQ-FCP-NEXT: vpermd %zmm26, %zmm0, %zmm26
; AVX512DQ-FCP-NEXT: vpermd %zmm27, %zmm0, %zmm26 {%k2}
; AVX512DQ-FCP-NEXT: vpermd %zmm21, %zmm0, %zmm21
; AVX512DQ-FCP-NEXT: vpermd %zmm23, %zmm0, %zmm21 {%k2}
; AVX512DQ-FCP-NEXT: vpermd %zmm12, %zmm0, %zmm23
; AVX512DQ-FCP-NEXT: vpermd %zmm14, %zmm0, %zmm23 {%k2}
; AVX512DQ-FCP-NEXT: vinserti32x4 $2, %xmm11, %zmm11, %zmm0
; AVX512DQ-FCP-NEXT: vpmovsxbd {{.*#+}} zmm11 = [0,0,1,1,1,1,0,0,10,0,11,0,11,0,0,0]
; AVX512DQ-FCP-NEXT: vpermd %zmm0, %zmm11, %zmm12
; AVX512DQ-FCP-NEXT: vmovdqu64 {{[-0-9]+}}(%r{{[sb]}}p), %zmm0 # 64-byte Reload
; AVX512DQ-FCP-NEXT: vinserti32x4 $2, %xmm0, %zmm0, %zmm0
; AVX512DQ-FCP-NEXT: vpmovsxbd {{.*#+}} zmm11 = [0,0,1,1,1,1,0,0,10,10,11,11,11,11,0,0]
; AVX512DQ-FCP-NEXT: vpermd %zmm0, %zmm11, %zmm12 {%k1}
; AVX512DQ-FCP-NEXT: vmovdqu64 {{[-0-9]+}}(%r{{[sb]}}p), %zmm0 # 64-byte Reload
; AVX512DQ-FCP-NEXT: vinserti32x4 $2, %xmm0, %zmm0, %zmm0
; AVX512DQ-FCP-NEXT: vpmovsxbd {{.*#+}} zmm14 = [0,0,1,0,1,0,0,0,10,10,11,11,11,11,0,0]
; AVX512DQ-FCP-NEXT: vpermd %zmm0, %zmm14, %zmm0
; AVX512DQ-FCP-NEXT: vmovdqu64 {{[-0-9]+}}(%r{{[sb]}}p), %zmm8 # 64-byte Reload
; AVX512DQ-FCP-NEXT: vinserti32x4 $2, %xmm8, %zmm8, %zmm14
; AVX512DQ-FCP-NEXT: vpermd %zmm14, %zmm11, %zmm0 {%k1}
; AVX512DQ-FCP-NEXT: vmovdqu64 {{[-0-9]+}}(%r{{[sb]}}p), %zmm8 # 64-byte Reload
; AVX512DQ-FCP-NEXT: vinserti32x4 $2, %xmm8, %zmm8, %zmm14
; AVX512DQ-FCP-NEXT: vmovdqu64 {{[-0-9]+}}(%r{{[sb]}}p), %zmm8 # 64-byte Reload
; AVX512DQ-FCP-NEXT: vinserti32x4 $2, %xmm8, %zmm8, %zmm27
; AVX512DQ-FCP-NEXT: vpermd %zmm27, %zmm11, %zmm27
; AVX512DQ-FCP-NEXT: vpermd %zmm14, %zmm11, %zmm27 {%k1}
; AVX512DQ-FCP-NEXT: vmovdqu64 {{[-0-9]+}}(%r{{[sb]}}p), %zmm8 # 64-byte Reload
; AVX512DQ-FCP-NEXT: vinserti32x4 $2, %xmm8, %zmm8, %zmm14
; AVX512DQ-FCP-NEXT: vmovdqu64 {{[-0-9]+}}(%r{{[sb]}}p), %zmm8 # 64-byte Reload
; AVX512DQ-FCP-NEXT: vinserti32x4 $2, %xmm8, %zmm8, %zmm28
; AVX512DQ-FCP-NEXT: vpermd %zmm28, %zmm11, %zmm28
; AVX512DQ-FCP-NEXT: vpermd %zmm14, %zmm11, %zmm28 {%k1}
; AVX512DQ-FCP-NEXT: vmovdqu64 {{[-0-9]+}}(%r{{[sb]}}p), %zmm8 # 64-byte Reload
; AVX512DQ-FCP-NEXT: vinserti32x4 $2, %xmm8, %zmm8, %zmm14
; AVX512DQ-FCP-NEXT: vmovdqu64 {{[-0-9]+}}(%r{{[sb]}}p), %zmm8 # 64-byte Reload
; AVX512DQ-FCP-NEXT: vinserti32x4 $2, %xmm8, %zmm8, %zmm29
; AVX512DQ-FCP-NEXT: vpermd %zmm29, %zmm11, %zmm29
; AVX512DQ-FCP-NEXT: vpermd %zmm14, %zmm11, %zmm29 {%k1}
; AVX512DQ-FCP-NEXT: vmovdqu64 {{[-0-9]+}}(%r{{[sb]}}p), %zmm8 # 64-byte Reload
; AVX512DQ-FCP-NEXT: vinserti32x4 $2, %xmm8, %zmm8, %zmm14
; AVX512DQ-FCP-NEXT: vmovdqu64 {{[-0-9]+}}(%r{{[sb]}}p), %zmm8 # 64-byte Reload
; AVX512DQ-FCP-NEXT: vinserti32x4 $2, %xmm8, %zmm8, %zmm31
; AVX512DQ-FCP-NEXT: vpermd %zmm31, %zmm11, %zmm31
; AVX512DQ-FCP-NEXT: vpermd %zmm14, %zmm11, %zmm31 {%k1}
; AVX512DQ-FCP-NEXT: vmovdqu64 {{[-0-9]+}}(%r{{[sb]}}p), %zmm8 # 64-byte Reload
; AVX512DQ-FCP-NEXT: vinserti32x4 $2, %xmm8, %zmm8, %zmm14
; AVX512DQ-FCP-NEXT: vmovdqu64 {{[-0-9]+}}(%r{{[sb]}}p), %zmm8 # 64-byte Reload
; AVX512DQ-FCP-NEXT: vinserti32x4 $2, %xmm8, %zmm8, %zmm8
; AVX512DQ-FCP-NEXT: vpermd %zmm8, %zmm11, %zmm8
; AVX512DQ-FCP-NEXT: vpermd %zmm14, %zmm11, %zmm8 {%k1}
; AVX512DQ-FCP-NEXT: vmovdqu64 {{[-0-9]+}}(%r{{[sb]}}p), %zmm14 # 64-byte Reload
; AVX512DQ-FCP-NEXT: vinserti32x4 $2, %xmm14, %zmm14, %zmm14
; AVX512DQ-FCP-NEXT: vmovdqu64 {{[-0-9]+}}(%r{{[sb]}}p), %zmm2 # 64-byte Reload
; AVX512DQ-FCP-NEXT: vinserti32x4 $2, %xmm2, %zmm2, %zmm18
; AVX512DQ-FCP-NEXT: vpermd %zmm18, %zmm11, %zmm18
; AVX512DQ-FCP-NEXT: vpermd %zmm14, %zmm11, %zmm18 {%k1}
; AVX512DQ-FCP-NEXT: movb $-86, %al
; AVX512DQ-FCP-NEXT: kmovw %eax, %k1
; AVX512DQ-FCP-NEXT: vmovdqa64 %zmm1, %zmm12 {%k1}
; AVX512DQ-FCP-NEXT: vmovdqu64 (%rsp), %zmm1 # 64-byte Reload
; AVX512DQ-FCP-NEXT: vmovdqa64 %zmm1, %zmm6 {%k1}
; AVX512DQ-FCP-NEXT: vmovdqa64 %zmm3, %zmm7 {%k1}
; AVX512DQ-FCP-NEXT: vmovdqa64 %zmm10, %zmm0 {%k1}
; AVX512DQ-FCP-NEXT: vmovdqa64 %zmm16, %zmm27 {%k1}
; AVX512DQ-FCP-NEXT: vmovdqa64 %zmm24, %zmm13 {%k1}
; AVX512DQ-FCP-NEXT: vmovdqa64 %zmm25, %zmm15 {%k1}
; AVX512DQ-FCP-NEXT: vmovdqa64 %zmm20, %zmm28 {%k1}
; AVX512DQ-FCP-NEXT: vmovdqa64 %zmm22, %zmm29 {%k1}
; AVX512DQ-FCP-NEXT: vmovdqu64 {{[-0-9]+}}(%r{{[sb]}}p), %zmm1 # 64-byte Reload
; AVX512DQ-FCP-NEXT: vmovdqa64 %zmm1, %zmm17 {%k1}
; AVX512DQ-FCP-NEXT: vmovdqa64 %zmm30, %zmm9 {%k1}
; AVX512DQ-FCP-NEXT: vmovdqa64 %zmm26, %zmm31 {%k1}
; AVX512DQ-FCP-NEXT: vmovdqa64 %zmm21, %zmm8 {%k1}
; AVX512DQ-FCP-NEXT: vmovdqu64 {{[-0-9]+}}(%r{{[sb]}}p), %zmm1 # 64-byte Reload
; AVX512DQ-FCP-NEXT: vmovdqa64 %zmm1, %zmm4 {%k1}
; AVX512DQ-FCP-NEXT: vmovdqa64 %zmm19, %zmm5 {%k1}
; AVX512DQ-FCP-NEXT: vmovdqa64 %zmm23, %zmm18 {%k1}
; AVX512DQ-FCP-NEXT: movq {{[0-9]+}}(%rsp), %rax
; AVX512DQ-FCP-NEXT: vmovdqa64 %zmm18, (%rax)
; AVX512DQ-FCP-NEXT: vmovdqa64 %zmm5, 192(%rax)
; AVX512DQ-FCP-NEXT: vmovdqa64 %zmm4, 128(%rax)
; AVX512DQ-FCP-NEXT: vmovdqa64 %zmm8, 320(%rax)
; AVX512DQ-FCP-NEXT: vmovdqa64 %zmm31, 256(%rax)
; AVX512DQ-FCP-NEXT: vmovdqa64 %zmm9, 448(%rax)
; AVX512DQ-FCP-NEXT: vmovdqa64 %zmm17, 384(%rax)
; AVX512DQ-FCP-NEXT: vmovdqa64 %zmm29, 576(%rax)
; AVX512DQ-FCP-NEXT: vmovdqa64 %zmm28, 512(%rax)
; AVX512DQ-FCP-NEXT: vmovdqa64 %zmm15, 704(%rax)
; AVX512DQ-FCP-NEXT: vmovdqa64 %zmm13, 640(%rax)
; AVX512DQ-FCP-NEXT: vmovdqa64 %zmm27, 832(%rax)
; AVX512DQ-FCP-NEXT: vmovdqa64 %zmm0, 768(%rax)
; AVX512DQ-FCP-NEXT: vmovdqa64 %zmm7, 960(%rax)
; AVX512DQ-FCP-NEXT: vmovdqa64 %zmm6, 896(%rax)
; AVX512DQ-FCP-NEXT: vmovdqa64 %zmm12, 64(%rax)
; AVX512DQ-FCP-NEXT: addq $2312, %rsp # imm = 0x908
; AVX512DQ-FCP-NEXT: vzeroupper
; AVX512DQ-FCP-NEXT: retq
;
; AVX512BW-LABEL: store_i16_stride8_vf64:
; AVX512BW: # %bb.0:
; AVX512BW-NEXT: subq $2056, %rsp # imm = 0x808
; AVX512BW-NEXT: movq {{[0-9]+}}(%rsp), %rax
; AVX512BW-NEXT: movq {{[0-9]+}}(%rsp), %r10
; AVX512BW-NEXT: vmovdqa64 (%r8), %zmm1
; AVX512BW-NEXT: vmovdqa64 (%r9), %zmm27
; AVX512BW-NEXT: vmovdqa64 (%r10), %zmm2
; AVX512BW-NEXT: vmovdqa64 64(%r10), %zmm0
; AVX512BW-NEXT: vmovdqa64 (%rax), %zmm30
; AVX512BW-NEXT: vmovdqa64 64(%rax), %zmm28
; AVX512BW-NEXT: vpmovsxbw {{.*#+}} zmm3 = [0,0,0,0,0,0,4,36,0,0,0,0,0,0,5,37,0,0,0,0,0,0,6,38,0,0,0,0,0,0,7,39]
; AVX512BW-NEXT: vmovdqa64 %zmm2, %zmm5
; AVX512BW-NEXT: vmovdqa64 %zmm2, %zmm4
; AVX512BW-NEXT: vpermt2w %zmm30, %zmm3, %zmm5
; AVX512BW-NEXT: vmovdqu64 %zmm5, {{[-0-9]+}}(%r{{[sb]}}p) # 64-byte Spill
; AVX512BW-NEXT: vpmovsxbw {{.*#+}} zmm2 = [0,0,0,0,4,36,0,0,0,0,0,0,5,37,0,0,0,0,0,0,6,38,0,0,0,0,0,0,7,39,0,0]
; AVX512BW-NEXT: vmovdqa64 %zmm1, %zmm5
; AVX512BW-NEXT: vpermt2w %zmm27, %zmm2, %zmm5
; AVX512BW-NEXT: vmovdqu64 %zmm5, {{[-0-9]+}}(%r{{[sb]}}p) # 64-byte Spill
; AVX512BW-NEXT: vpmovsxbw {{.*#+}} zmm5 = [0,0,0,0,0,0,0,32,0,0,0,0,0,0,1,33,0,0,0,0,0,0,2,34,0,0,0,0,0,0,3,35]
; AVX512BW-NEXT: vmovdqa64 %zmm4, %zmm6
; AVX512BW-NEXT: vpermt2w %zmm30, %zmm5, %zmm6
; AVX512BW-NEXT: vmovdqu64 %zmm6, {{[-0-9]+}}(%r{{[sb]}}p) # 64-byte Spill
; AVX512BW-NEXT: vpmovsxbw {{.*#+}} zmm6 = [0,0,0,0,0,32,0,0,0,0,0,0,1,33,0,0,0,0,0,0,2,34,0,0,0,0,0,0,3,35,0,0]
; AVX512BW-NEXT: vmovdqa64 %zmm1, %zmm7
; AVX512BW-NEXT: vpermt2w %zmm27, %zmm6, %zmm7
; AVX512BW-NEXT: vmovdqu64 %zmm7, {{[-0-9]+}}(%r{{[sb]}}p) # 64-byte Spill
; AVX512BW-NEXT: vpmovsxbw {{.*#+}} zmm7 = [0,0,0,0,0,0,12,44,0,0,0,0,0,0,13,45,0,0,0,0,0,0,14,46,0,0,0,0,0,0,15,47]
; AVX512BW-NEXT: vmovdqa64 %zmm4, %zmm8
; AVX512BW-NEXT: vpermt2w %zmm30, %zmm7, %zmm8
; AVX512BW-NEXT: vmovdqu64 %zmm8, {{[-0-9]+}}(%r{{[sb]}}p) # 64-byte Spill
; AVX512BW-NEXT: vpmovsxbw {{.*#+}} zmm8 = [0,0,0,0,12,44,0,0,0,0,0,0,13,45,0,0,0,0,0,0,14,46,0,0,0,0,0,0,15,47,0,0]
; AVX512BW-NEXT: vmovdqa64 %zmm1, %zmm9
; AVX512BW-NEXT: vpermt2w %zmm27, %zmm8, %zmm9
; AVX512BW-NEXT: vmovdqu64 %zmm9, {{[-0-9]+}}(%r{{[sb]}}p) # 64-byte Spill
; AVX512BW-NEXT: vpmovsxbw {{.*#+}} zmm9 = [0,0,0,0,0,0,8,40,0,0,0,0,0,0,9,41,0,0,0,0,0,0,10,42,0,0,0,0,0,0,11,43]
; AVX512BW-NEXT: vmovdqa64 %zmm4, %zmm10
; AVX512BW-NEXT: vpermt2w %zmm30, %zmm9, %zmm10
; AVX512BW-NEXT: vmovdqu64 %zmm10, {{[-0-9]+}}(%r{{[sb]}}p) # 64-byte Spill
; AVX512BW-NEXT: vpmovsxbw {{.*#+}} zmm10 = [0,0,0,0,8,40,0,0,0,0,0,0,9,41,0,0,0,0,0,0,10,42,0,0,0,0,0,0,11,43,0,0]
; AVX512BW-NEXT: vmovdqa64 %zmm1, %zmm11
; AVX512BW-NEXT: vpermt2w %zmm27, %zmm10, %zmm11
; AVX512BW-NEXT: vmovdqu64 %zmm11, {{[-0-9]+}}(%r{{[sb]}}p) # 64-byte Spill
; AVX512BW-NEXT: vpmovsxbw {{.*#+}} zmm11 = [0,0,0,0,0,0,20,52,0,0,0,0,0,0,21,53,0,0,0,0,0,0,22,54,0,0,0,0,0,0,23,55]
; AVX512BW-NEXT: vmovdqa64 %zmm4, %zmm12
; AVX512BW-NEXT: vpermt2w %zmm30, %zmm11, %zmm12
; AVX512BW-NEXT: vmovdqu64 %zmm12, {{[-0-9]+}}(%r{{[sb]}}p) # 64-byte Spill
; AVX512BW-NEXT: vpmovsxbw {{.*#+}} zmm12 = [0,0,0,0,20,52,0,0,0,0,0,0,21,53,0,0,0,0,0,0,22,54,0,0,0,0,0,0,23,55,0,0]
; AVX512BW-NEXT: vmovdqa64 %zmm1, %zmm13
; AVX512BW-NEXT: vpermt2w %zmm27, %zmm12, %zmm13
; AVX512BW-NEXT: vmovdqu64 %zmm13, {{[-0-9]+}}(%r{{[sb]}}p) # 64-byte Spill
; AVX512BW-NEXT: vpmovsxbw {{.*#+}} zmm13 = [0,0,0,0,0,0,16,48,0,0,0,0,0,0,17,49,0,0,0,0,0,0,18,50,0,0,0,0,0,0,19,51]
; AVX512BW-NEXT: vmovdqa64 %zmm4, %zmm14
; AVX512BW-NEXT: vpermt2w %zmm30, %zmm13, %zmm14
; AVX512BW-NEXT: vmovdqu64 %zmm14, {{[-0-9]+}}(%r{{[sb]}}p) # 64-byte Spill
; AVX512BW-NEXT: vpmovsxbw {{.*#+}} zmm14 = [0,0,0,0,16,48,0,0,0,0,0,0,17,49,0,0,0,0,0,0,18,50,0,0,0,0,0,0,19,51,0,0]
; AVX512BW-NEXT: vpmovsxbw {{.*#+}} zmm15 = [0,0,0,0,0,0,28,60,0,0,0,0,0,0,29,61,0,0,0,0,0,0,30,62,0,0,0,0,0,0,31,63]
; AVX512BW-NEXT: vmovdqa64 %zmm4, %zmm16
; AVX512BW-NEXT: vpermt2w %zmm30, %zmm15, %zmm16
; AVX512BW-NEXT: vmovdqu64 %zmm16, {{[-0-9]+}}(%r{{[sb]}}p) # 64-byte Spill
; AVX512BW-NEXT: vpmovsxbw {{.*#+}} zmm31 = [0,0,0,0,0,0,24,56,0,0,0,0,0,0,25,57,0,0,0,0,0,0,26,58,0,0,0,0,0,0,27,59]
; AVX512BW-NEXT: vpermt2w %zmm30, %zmm31, %zmm4
; AVX512BW-NEXT: vmovdqu64 %zmm4, {{[-0-9]+}}(%r{{[sb]}}p) # 64-byte Spill
; AVX512BW-NEXT: vmovdqa64 %zmm1, %zmm4
; AVX512BW-NEXT: vpermt2w %zmm27, %zmm14, %zmm4
; AVX512BW-NEXT: vmovdqu64 %zmm4, {{[-0-9]+}}(%r{{[sb]}}p) # 64-byte Spill
; AVX512BW-NEXT: vpermi2w %zmm28, %zmm0, %zmm3
; AVX512BW-NEXT: vmovdqu64 %zmm3, {{[-0-9]+}}(%r{{[sb]}}p) # 64-byte Spill
; AVX512BW-NEXT: vpermi2w %zmm28, %zmm0, %zmm5
; AVX512BW-NEXT: vmovdqu64 %zmm5, {{[-0-9]+}}(%r{{[sb]}}p) # 64-byte Spill
; AVX512BW-NEXT: vpermi2w %zmm28, %zmm0, %zmm7
; AVX512BW-NEXT: vmovdqu64 %zmm7, {{[-0-9]+}}(%r{{[sb]}}p) # 64-byte Spill
; AVX512BW-NEXT: vpermi2w %zmm28, %zmm0, %zmm9
; AVX512BW-NEXT: vmovdqu64 %zmm9, {{[-0-9]+}}(%r{{[sb]}}p) # 64-byte Spill
; AVX512BW-NEXT: vpermi2w %zmm28, %zmm0, %zmm11
; AVX512BW-NEXT: vmovdqu64 %zmm11, {{[-0-9]+}}(%r{{[sb]}}p) # 64-byte Spill
; AVX512BW-NEXT: vpermi2w %zmm28, %zmm0, %zmm13
; AVX512BW-NEXT: vmovdqu64 %zmm13, {{[-0-9]+}}(%r{{[sb]}}p) # 64-byte Spill
; AVX512BW-NEXT: vpermi2w %zmm28, %zmm0, %zmm15
; AVX512BW-NEXT: vmovdqu64 %zmm15, {{[-0-9]+}}(%r{{[sb]}}p) # 64-byte Spill
; AVX512BW-NEXT: vpermt2w %zmm28, %zmm31, %zmm0
; AVX512BW-NEXT: vmovdqu64 %zmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 64-byte Spill
; AVX512BW-NEXT: vpmovsxbw {{.*#+}} zmm28 = [0,0,0,0,28,60,0,0,0,0,0,0,29,61,0,0,0,0,0,0,30,62,0,0,0,0,0,0,31,63,0,0]
; AVX512BW-NEXT: vmovdqa64 %zmm1, %zmm31
; AVX512BW-NEXT: vpermt2w %zmm27, %zmm28, %zmm31
; AVX512BW-NEXT: vpmovsxbw {{.*#+}} zmm0 = [0,0,0,0,24,56,0,0,0,0,0,0,25,57,0,0,0,0,0,0,26,58,0,0,0,0,0,0,27,59,0,0]
; AVX512BW-NEXT: vpermt2w %zmm27, %zmm0, %zmm1
; AVX512BW-NEXT: vmovdqu64 %zmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 64-byte Spill
; AVX512BW-NEXT: vmovdqa64 64(%r8), %zmm27
; AVX512BW-NEXT: vmovdqa64 64(%r9), %zmm1
; AVX512BW-NEXT: vpermi2w %zmm1, %zmm27, %zmm2
; AVX512BW-NEXT: vmovdqu64 %zmm2, {{[-0-9]+}}(%r{{[sb]}}p) # 64-byte Spill
; AVX512BW-NEXT: vpermi2w %zmm1, %zmm27, %zmm6
; AVX512BW-NEXT: vmovdqu64 %zmm6, {{[-0-9]+}}(%r{{[sb]}}p) # 64-byte Spill
; AVX512BW-NEXT: vpermi2w %zmm1, %zmm27, %zmm8
; AVX512BW-NEXT: vmovdqu64 %zmm8, {{[-0-9]+}}(%r{{[sb]}}p) # 64-byte Spill
; AVX512BW-NEXT: vpermi2w %zmm1, %zmm27, %zmm10
; AVX512BW-NEXT: vmovdqu64 %zmm10, {{[-0-9]+}}(%r{{[sb]}}p) # 64-byte Spill
; AVX512BW-NEXT: vpermi2w %zmm1, %zmm27, %zmm12
; AVX512BW-NEXT: vmovdqu64 %zmm12, {{[-0-9]+}}(%r{{[sb]}}p) # 64-byte Spill
; AVX512BW-NEXT: vpermi2w %zmm1, %zmm27, %zmm14
; AVX512BW-NEXT: vmovdqu64 %zmm14, {{[-0-9]+}}(%r{{[sb]}}p) # 64-byte Spill
; AVX512BW-NEXT: vpermi2w %zmm1, %zmm27, %zmm28
; AVX512BW-NEXT: vpermt2w %zmm1, %zmm0, %zmm27
; AVX512BW-NEXT: vmovdqa64 (%rdx), %zmm16
; AVX512BW-NEXT: vmovdqa64 (%rcx), %zmm0
; AVX512BW-NEXT: vpmovsxbw {{.*#+}} zmm1 = [0,0,4,36,0,0,0,0,0,0,5,37,0,0,0,0,0,0,6,38,0,0,0,0,0,0,7,39,0,0,0,0]
; AVX512BW-NEXT: vmovdqa64 %zmm16, %zmm20
; AVX512BW-NEXT: vpermt2w %zmm0, %zmm1, %zmm20
; AVX512BW-NEXT: vmovdqa64 %zmm1, %zmm2
; AVX512BW-NEXT: vpmovsxbw {{.*#+}} zmm1 = [0,0,0,32,0,0,0,0,0,0,1,33,0,0,0,0,0,0,2,34,0,0,0,0,0,0,3,35,0,0,0,0]
; AVX512BW-NEXT: vmovdqa64 %zmm16, %zmm21
; AVX512BW-NEXT: vpermt2w %zmm0, %zmm1, %zmm21
; AVX512BW-NEXT: vmovdqa64 %zmm1, %zmm3
; AVX512BW-NEXT: vpmovsxbw {{.*#+}} zmm1 = [0,0,12,44,0,0,0,0,0,0,13,45,0,0,0,0,0,0,14,46,0,0,0,0,0,0,15,47,0,0,0,0]
; AVX512BW-NEXT: vmovdqa64 %zmm16, %zmm22
; AVX512BW-NEXT: vpermt2w %zmm0, %zmm1, %zmm22
; AVX512BW-NEXT: vmovdqa64 %zmm1, %zmm4
; AVX512BW-NEXT: vpmovsxbw {{.*#+}} zmm1 = [0,0,8,40,0,0,0,0,0,0,9,41,0,0,0,0,0,0,10,42,0,0,0,0,0,0,11,43,0,0,0,0]
; AVX512BW-NEXT: vmovdqa64 %zmm16, %zmm23
; AVX512BW-NEXT: vpermt2w %zmm0, %zmm1, %zmm23
; AVX512BW-NEXT: vmovdqa64 %zmm1, %zmm6
; AVX512BW-NEXT: vpmovsxbw {{.*#+}} zmm1 = [0,0,20,52,0,0,0,0,0,0,21,53,0,0,0,0,0,0,22,54,0,0,0,0,0,0,23,55,0,0,0,0]
; AVX512BW-NEXT: vmovdqa64 %zmm16, %zmm24
; AVX512BW-NEXT: vpermt2w %zmm0, %zmm1, %zmm24
; AVX512BW-NEXT: vmovdqa64 %zmm1, %zmm7
; AVX512BW-NEXT: vpmovsxbw {{.*#+}} zmm29 = [0,0,16,48,0,0,0,0,0,0,17,49,0,0,0,0,0,0,18,50,0,0,0,0,0,0,19,51,0,0,0,0]
; AVX512BW-NEXT: vmovdqa64 %zmm16, %zmm25
; AVX512BW-NEXT: vpermt2w %zmm0, %zmm29, %zmm25
; AVX512BW-NEXT: vpmovsxbw {{.*#+}} zmm30 = [0,0,28,60,0,0,0,0,0,0,29,61,0,0,0,0,0,0,30,62,0,0,0,0,0,0,31,63,0,0,0,0]
; AVX512BW-NEXT: vmovdqa64 %zmm16, %zmm26
; AVX512BW-NEXT: vpermt2w %zmm0, %zmm30, %zmm26
; AVX512BW-NEXT: vpmovsxbw {{.*#+}} zmm1 = [0,0,24,56,0,0,0,0,0,0,25,57,0,0,0,0,0,0,26,58,0,0,0,0,0,0,27,59,0,0,0,0]
; AVX512BW-NEXT: vpermt2w %zmm0, %zmm1, %zmm16
; AVX512BW-NEXT: vmovdqa64 64(%rdx), %zmm5
; AVX512BW-NEXT: vmovdqa64 64(%rcx), %zmm0
; AVX512BW-NEXT: vpermi2w %zmm0, %zmm5, %zmm2
; AVX512BW-NEXT: vmovdqu64 %zmm2, {{[-0-9]+}}(%r{{[sb]}}p) # 64-byte Spill
; AVX512BW-NEXT: vpermi2w %zmm0, %zmm5, %zmm3
; AVX512BW-NEXT: vmovdqu64 %zmm3, {{[-0-9]+}}(%r{{[sb]}}p) # 64-byte Spill
; AVX512BW-NEXT: vpermi2w %zmm0, %zmm5, %zmm4
; AVX512BW-NEXT: vmovdqu64 %zmm4, (%rsp) # 64-byte Spill
; AVX512BW-NEXT: vpermi2w %zmm0, %zmm5, %zmm6
; AVX512BW-NEXT: vmovdqu64 %zmm6, {{[-0-9]+}}(%r{{[sb]}}p) # 64-byte Spill
; AVX512BW-NEXT: vpermi2w %zmm0, %zmm5, %zmm7
; AVX512BW-NEXT: vmovdqu64 %zmm7, {{[-0-9]+}}(%r{{[sb]}}p) # 64-byte Spill
; AVX512BW-NEXT: vpermi2w %zmm0, %zmm5, %zmm29
; AVX512BW-NEXT: vpermi2w %zmm0, %zmm5, %zmm30
; AVX512BW-NEXT: vpermt2w %zmm0, %zmm1, %zmm5
; AVX512BW-NEXT: vmovdqa64 (%rdi), %zmm3
; AVX512BW-NEXT: vmovdqa64 (%rsi), %zmm0
; AVX512BW-NEXT: vpmovsxbw {{.*#+}} zmm12 = [4,36,0,0,0,0,0,0,5,37,0,0,0,0,0,0,6,38,0,0,0,0,0,0,7,39,0,0,0,0,0,0]
; AVX512BW-NEXT: vmovdqa64 %zmm3, %zmm18
; AVX512BW-NEXT: vpermt2w %zmm0, %zmm12, %zmm18
; AVX512BW-NEXT: vpmovsxbw {{.*#+}} zmm10 = [0,32,0,0,0,0,0,0,1,33,0,0,0,0,0,0,2,34,0,0,0,0,0,0,3,35,0,0,0,0,0,0]
; AVX512BW-NEXT: vmovdqa64 %zmm3, %zmm17
; AVX512BW-NEXT: vpermt2w %zmm0, %zmm10, %zmm17
; AVX512BW-NEXT: vpmovsxbw {{.*#+}} zmm8 = [12,44,0,0,0,0,0,0,13,45,0,0,0,0,0,0,14,46,0,0,0,0,0,0,15,47,0,0,0,0,0,0]
; AVX512BW-NEXT: vmovdqa64 %zmm3, %zmm15
; AVX512BW-NEXT: vpermt2w %zmm0, %zmm8, %zmm15
; AVX512BW-NEXT: vpmovsxbw {{.*#+}} zmm7 = [8,40,0,0,0,0,0,0,9,41,0,0,0,0,0,0,10,42,0,0,0,0,0,0,11,43,0,0,0,0,0,0]
; AVX512BW-NEXT: vmovdqa64 %zmm3, %zmm14
; AVX512BW-NEXT: vpermt2w %zmm0, %zmm7, %zmm14
; AVX512BW-NEXT: vpmovsxbw {{.*#+}} zmm6 = [20,52,0,0,0,0,0,0,21,53,0,0,0,0,0,0,22,54,0,0,0,0,0,0,23,55,0,0,0,0,0,0]
; AVX512BW-NEXT: vmovdqa64 %zmm3, %zmm13
; AVX512BW-NEXT: vpermt2w %zmm0, %zmm6, %zmm13
; AVX512BW-NEXT: vpmovsxbw {{.*#+}} zmm4 = [16,48,0,0,0,0,0,0,17,49,0,0,0,0,0,0,18,50,0,0,0,0,0,0,19,51,0,0,0,0,0,0]
; AVX512BW-NEXT: vmovdqa64 %zmm3, %zmm11
; AVX512BW-NEXT: vpermt2w %zmm0, %zmm4, %zmm11
; AVX512BW-NEXT: vpmovsxbw {{.*#+}} zmm2 = [28,60,0,0,0,0,0,0,29,61,0,0,0,0,0,0,30,62,0,0,0,0,0,0,31,63,0,0,0,0,0,0]
; AVX512BW-NEXT: vmovdqa64 %zmm3, %zmm9
; AVX512BW-NEXT: vpermt2w %zmm0, %zmm2, %zmm9
; AVX512BW-NEXT: vpmovsxbw {{.*#+}} zmm19 = [24,56,0,0,0,0,0,0,25,57,0,0,0,0,0,0,26,58,0,0,0,0,0,0,27,59,0,0,0,0,0,0]
; AVX512BW-NEXT: vpermt2w %zmm0, %zmm19, %zmm3
; AVX512BW-NEXT: vmovdqa64 64(%rdi), %zmm1
; AVX512BW-NEXT: vmovdqa64 64(%rsi), %zmm0
; AVX512BW-NEXT: vpermi2w %zmm0, %zmm1, %zmm12
; AVX512BW-NEXT: vpermi2w %zmm0, %zmm1, %zmm10
; AVX512BW-NEXT: vpermi2w %zmm0, %zmm1, %zmm8
; AVX512BW-NEXT: vpermi2w %zmm0, %zmm1, %zmm7
; AVX512BW-NEXT: vpermi2w %zmm0, %zmm1, %zmm6
; AVX512BW-NEXT: vpermi2w %zmm0, %zmm1, %zmm4
; AVX512BW-NEXT: vpermi2w %zmm0, %zmm1, %zmm2
; AVX512BW-NEXT: vpermt2w %zmm0, %zmm19, %zmm1
; AVX512BW-NEXT: movw $-30584, %ax # imm = 0x8888
; AVX512BW-NEXT: kmovd %eax, %k1
; AVX512BW-NEXT: vmovdqu64 {{[-0-9]+}}(%r{{[sb]}}p), %zmm0 # 64-byte Reload
; AVX512BW-NEXT: vmovdqu64 {{[-0-9]+}}(%r{{[sb]}}p), %zmm19 # 64-byte Reload
; AVX512BW-NEXT: vmovdqa32 %zmm19, %zmm0 {%k1}
; AVX512BW-NEXT: movw $8738, %ax # imm = 0x2222
; AVX512BW-NEXT: kmovd %eax, %k2
; AVX512BW-NEXT: vmovdqa32 %zmm20, %zmm18 {%k2}
; AVX512BW-NEXT: movb $-86, %al
; AVX512BW-NEXT: kmovd %eax, %k3
; AVX512BW-NEXT: vmovdqa64 %zmm0, %zmm18 {%k3}
; AVX512BW-NEXT: vmovdqu64 {{[-0-9]+}}(%r{{[sb]}}p), %zmm0 # 64-byte Reload
; AVX512BW-NEXT: vmovdqu64 {{[-0-9]+}}(%r{{[sb]}}p), %zmm19 # 64-byte Reload
; AVX512BW-NEXT: vmovdqa32 %zmm0, %zmm19 {%k1}
; AVX512BW-NEXT: vmovdqa32 %zmm21, %zmm17 {%k2}
; AVX512BW-NEXT: vmovdqa64 %zmm19, %zmm17 {%k3}
; AVX512BW-NEXT: vmovdqu64 {{[-0-9]+}}(%r{{[sb]}}p), %zmm0 # 64-byte Reload
; AVX512BW-NEXT: vmovdqu64 {{[-0-9]+}}(%r{{[sb]}}p), %zmm19 # 64-byte Reload
; AVX512BW-NEXT: vmovdqa32 %zmm0, %zmm19 {%k1}
; AVX512BW-NEXT: vmovdqa32 %zmm22, %zmm15 {%k2}
; AVX512BW-NEXT: vmovdqa64 %zmm19, %zmm15 {%k3}
; AVX512BW-NEXT: vmovdqu64 {{[-0-9]+}}(%r{{[sb]}}p), %zmm0 # 64-byte Reload
; AVX512BW-NEXT: vmovdqu64 {{[-0-9]+}}(%r{{[sb]}}p), %zmm19 # 64-byte Reload
; AVX512BW-NEXT: vmovdqa32 %zmm0, %zmm19 {%k1}
; AVX512BW-NEXT: vmovdqa32 %zmm23, %zmm14 {%k2}
; AVX512BW-NEXT: vmovdqa64 %zmm19, %zmm14 {%k3}
; AVX512BW-NEXT: vmovdqu64 {{[-0-9]+}}(%r{{[sb]}}p), %zmm0 # 64-byte Reload
; AVX512BW-NEXT: vmovdqu64 {{[-0-9]+}}(%r{{[sb]}}p), %zmm19 # 64-byte Reload
; AVX512BW-NEXT: vmovdqa32 %zmm0, %zmm19 {%k1}
; AVX512BW-NEXT: vmovdqa32 %zmm24, %zmm13 {%k2}
; AVX512BW-NEXT: vmovdqa64 %zmm19, %zmm13 {%k3}
; AVX512BW-NEXT: vmovdqu64 {{[-0-9]+}}(%r{{[sb]}}p), %zmm0 # 64-byte Reload
; AVX512BW-NEXT: vmovdqu64 {{[-0-9]+}}(%r{{[sb]}}p), %zmm19 # 64-byte Reload
; AVX512BW-NEXT: vmovdqa32 %zmm0, %zmm19 {%k1}
; AVX512BW-NEXT: vmovdqa32 %zmm25, %zmm11 {%k2}
; AVX512BW-NEXT: vmovdqa64 %zmm19, %zmm11 {%k3}
; AVX512BW-NEXT: vmovdqu64 {{[-0-9]+}}(%r{{[sb]}}p), %zmm0 # 64-byte Reload
; AVX512BW-NEXT: vmovdqa32 %zmm0, %zmm31 {%k1}
; AVX512BW-NEXT: vmovdqa32 %zmm26, %zmm9 {%k2}
; AVX512BW-NEXT: vmovdqa64 %zmm31, %zmm9 {%k3}
; AVX512BW-NEXT: vmovdqu64 {{[-0-9]+}}(%r{{[sb]}}p), %zmm0 # 64-byte Reload
; AVX512BW-NEXT: vmovdqu64 {{[-0-9]+}}(%r{{[sb]}}p), %zmm19 # 64-byte Reload
; AVX512BW-NEXT: vmovdqa32 %zmm19, %zmm0 {%k1}
; AVX512BW-NEXT: vmovdqa32 %zmm16, %zmm3 {%k2}
; AVX512BW-NEXT: vmovdqa64 %zmm0, %zmm3 {%k3}
; AVX512BW-NEXT: vmovdqu64 {{[-0-9]+}}(%r{{[sb]}}p), %zmm0 # 64-byte Reload
; AVX512BW-NEXT: vmovdqu64 {{[-0-9]+}}(%r{{[sb]}}p), %zmm16 # 64-byte Reload
; AVX512BW-NEXT: vmovdqa32 %zmm16, %zmm0 {%k1}
; AVX512BW-NEXT: vmovdqu64 {{[-0-9]+}}(%r{{[sb]}}p), %zmm16 # 64-byte Reload
; AVX512BW-NEXT: vmovdqa32 %zmm16, %zmm12 {%k2}
; AVX512BW-NEXT: vmovdqa64 %zmm0, %zmm12 {%k3}
; AVX512BW-NEXT: vmovdqu64 {{[-0-9]+}}(%r{{[sb]}}p), %zmm0 # 64-byte Reload
; AVX512BW-NEXT: vmovdqu64 {{[-0-9]+}}(%r{{[sb]}}p), %zmm16 # 64-byte Reload
; AVX512BW-NEXT: vmovdqa32 %zmm16, %zmm0 {%k1}
; AVX512BW-NEXT: vmovdqu64 {{[-0-9]+}}(%r{{[sb]}}p), %zmm16 # 64-byte Reload
; AVX512BW-NEXT: vmovdqa32 %zmm16, %zmm10 {%k2}
; AVX512BW-NEXT: vmovdqa64 %zmm0, %zmm10 {%k3}
; AVX512BW-NEXT: vmovdqu64 {{[-0-9]+}}(%r{{[sb]}}p), %zmm0 # 64-byte Reload
; AVX512BW-NEXT: vmovdqu64 {{[-0-9]+}}(%r{{[sb]}}p), %zmm16 # 64-byte Reload
; AVX512BW-NEXT: vmovdqa32 %zmm16, %zmm0 {%k1}
; AVX512BW-NEXT: vmovdqu64 (%rsp), %zmm16 # 64-byte Reload
; AVX512BW-NEXT: vmovdqa32 %zmm16, %zmm8 {%k2}
; AVX512BW-NEXT: vmovdqa64 %zmm0, %zmm8 {%k3}
; AVX512BW-NEXT: vmovdqu64 {{[-0-9]+}}(%r{{[sb]}}p), %zmm0 # 64-byte Reload
; AVX512BW-NEXT: vmovdqu64 {{[-0-9]+}}(%r{{[sb]}}p), %zmm16 # 64-byte Reload
; AVX512BW-NEXT: vmovdqa32 %zmm16, %zmm0 {%k1}
; AVX512BW-NEXT: vmovdqu64 {{[-0-9]+}}(%r{{[sb]}}p), %zmm16 # 64-byte Reload
; AVX512BW-NEXT: vmovdqa32 %zmm16, %zmm7 {%k2}
; AVX512BW-NEXT: vmovdqa64 %zmm0, %zmm7 {%k3}
; AVX512BW-NEXT: vmovdqu64 {{[-0-9]+}}(%r{{[sb]}}p), %zmm0 # 64-byte Reload
; AVX512BW-NEXT: vmovdqu64 {{[-0-9]+}}(%r{{[sb]}}p), %zmm16 # 64-byte Reload
; AVX512BW-NEXT: vmovdqa32 %zmm16, %zmm0 {%k1}
; AVX512BW-NEXT: vmovdqu64 {{[-0-9]+}}(%r{{[sb]}}p), %zmm16 # 64-byte Reload
; AVX512BW-NEXT: vmovdqa32 %zmm16, %zmm6 {%k2}
; AVX512BW-NEXT: vmovdqa64 %zmm0, %zmm6 {%k3}
; AVX512BW-NEXT: vmovdqu64 {{[-0-9]+}}(%r{{[sb]}}p), %zmm0 # 64-byte Reload
; AVX512BW-NEXT: vmovdqu64 {{[-0-9]+}}(%r{{[sb]}}p), %zmm16 # 64-byte Reload
; AVX512BW-NEXT: vmovdqa32 %zmm16, %zmm0 {%k1}
; AVX512BW-NEXT: vmovdqa32 %zmm29, %zmm4 {%k2}
; AVX512BW-NEXT: vmovdqa64 %zmm0, %zmm4 {%k3}
; AVX512BW-NEXT: vmovdqu64 {{[-0-9]+}}(%r{{[sb]}}p), %zmm0 # 64-byte Reload
; AVX512BW-NEXT: vmovdqa32 %zmm0, %zmm28 {%k1}
; AVX512BW-NEXT: vmovdqa32 %zmm30, %zmm2 {%k2}
; AVX512BW-NEXT: vmovdqa64 %zmm28, %zmm2 {%k3}
; AVX512BW-NEXT: vmovdqu64 {{[-0-9]+}}(%r{{[sb]}}p), %zmm0 # 64-byte Reload
; AVX512BW-NEXT: vmovdqa32 %zmm0, %zmm27 {%k1}
; AVX512BW-NEXT: vmovdqa32 %zmm5, %zmm1 {%k2}
; AVX512BW-NEXT: vmovdqa64 %zmm27, %zmm1 {%k3}
; AVX512BW-NEXT: movq {{[0-9]+}}(%rsp), %rax
; AVX512BW-NEXT: vmovdqa64 %zmm1, 896(%rax)
; AVX512BW-NEXT: vmovdqa64 %zmm2, 960(%rax)
; AVX512BW-NEXT: vmovdqa64 %zmm4, 768(%rax)
; AVX512BW-NEXT: vmovdqa64 %zmm6, 832(%rax)
; AVX512BW-NEXT: vmovdqa64 %zmm7, 640(%rax)
; AVX512BW-NEXT: vmovdqa64 %zmm8, 704(%rax)
; AVX512BW-NEXT: vmovdqa64 %zmm10, 512(%rax)
; AVX512BW-NEXT: vmovdqa64 %zmm12, 576(%rax)
; AVX512BW-NEXT: vmovdqa64 %zmm3, 384(%rax)
; AVX512BW-NEXT: vmovdqa64 %zmm9, 448(%rax)
; AVX512BW-NEXT: vmovdqa64 %zmm11, 256(%rax)
; AVX512BW-NEXT: vmovdqa64 %zmm13, 320(%rax)
; AVX512BW-NEXT: vmovdqa64 %zmm14, 128(%rax)
; AVX512BW-NEXT: vmovdqa64 %zmm15, 192(%rax)
; AVX512BW-NEXT: vmovdqa64 %zmm17, (%rax)
; AVX512BW-NEXT: vmovdqa64 %zmm18, 64(%rax)
; AVX512BW-NEXT: addq $2056, %rsp # imm = 0x808
; AVX512BW-NEXT: vzeroupper
; AVX512BW-NEXT: retq
;
; AVX512BW-FCP-LABEL: store_i16_stride8_vf64:
; AVX512BW-FCP: # %bb.0:
; AVX512BW-FCP-NEXT: subq $2056, %rsp # imm = 0x808
; AVX512BW-FCP-NEXT: movq {{[0-9]+}}(%rsp), %rax
; AVX512BW-FCP-NEXT: movq {{[0-9]+}}(%rsp), %r10
; AVX512BW-FCP-NEXT: vmovdqa64 (%r8), %zmm1
; AVX512BW-FCP-NEXT: vmovdqa64 (%r9), %zmm27
; AVX512BW-FCP-NEXT: vmovdqa64 (%r10), %zmm2
; AVX512BW-FCP-NEXT: vmovdqa64 64(%r10), %zmm0
; AVX512BW-FCP-NEXT: vmovdqa64 (%rax), %zmm30
; AVX512BW-FCP-NEXT: vmovdqa64 64(%rax), %zmm28
; AVX512BW-FCP-NEXT: vpmovsxbw {{.*#+}} zmm3 = [0,0,0,0,0,0,4,36,0,0,0,0,0,0,5,37,0,0,0,0,0,0,6,38,0,0,0,0,0,0,7,39]
; AVX512BW-FCP-NEXT: vmovdqa64 %zmm2, %zmm5
; AVX512BW-FCP-NEXT: vmovdqa64 %zmm2, %zmm4
; AVX512BW-FCP-NEXT: vpermt2w %zmm30, %zmm3, %zmm5
; AVX512BW-FCP-NEXT: vmovdqu64 %zmm5, {{[-0-9]+}}(%r{{[sb]}}p) # 64-byte Spill
; AVX512BW-FCP-NEXT: vpmovsxbw {{.*#+}} zmm2 = [0,0,0,0,4,36,0,0,0,0,0,0,5,37,0,0,0,0,0,0,6,38,0,0,0,0,0,0,7,39,0,0]
; AVX512BW-FCP-NEXT: vmovdqa64 %zmm1, %zmm5
; AVX512BW-FCP-NEXT: vpermt2w %zmm27, %zmm2, %zmm5
; AVX512BW-FCP-NEXT: vmovdqu64 %zmm5, {{[-0-9]+}}(%r{{[sb]}}p) # 64-byte Spill
; AVX512BW-FCP-NEXT: vpmovsxbw {{.*#+}} zmm5 = [0,0,0,0,0,0,0,32,0,0,0,0,0,0,1,33,0,0,0,0,0,0,2,34,0,0,0,0,0,0,3,35]
; AVX512BW-FCP-NEXT: vmovdqa64 %zmm4, %zmm6
; AVX512BW-FCP-NEXT: vpermt2w %zmm30, %zmm5, %zmm6
; AVX512BW-FCP-NEXT: vmovdqu64 %zmm6, {{[-0-9]+}}(%r{{[sb]}}p) # 64-byte Spill
; AVX512BW-FCP-NEXT: vpmovsxbw {{.*#+}} zmm6 = [0,0,0,0,0,32,0,0,0,0,0,0,1,33,0,0,0,0,0,0,2,34,0,0,0,0,0,0,3,35,0,0]
; AVX512BW-FCP-NEXT: vmovdqa64 %zmm1, %zmm7
; AVX512BW-FCP-NEXT: vpermt2w %zmm27, %zmm6, %zmm7
; AVX512BW-FCP-NEXT: vmovdqu64 %zmm7, {{[-0-9]+}}(%r{{[sb]}}p) # 64-byte Spill
; AVX512BW-FCP-NEXT: vpmovsxbw {{.*#+}} zmm7 = [0,0,0,0,0,0,12,44,0,0,0,0,0,0,13,45,0,0,0,0,0,0,14,46,0,0,0,0,0,0,15,47]
; AVX512BW-FCP-NEXT: vmovdqa64 %zmm4, %zmm8
; AVX512BW-FCP-NEXT: vpermt2w %zmm30, %zmm7, %zmm8
; AVX512BW-FCP-NEXT: vmovdqu64 %zmm8, {{[-0-9]+}}(%r{{[sb]}}p) # 64-byte Spill
; AVX512BW-FCP-NEXT: vpmovsxbw {{.*#+}} zmm8 = [0,0,0,0,12,44,0,0,0,0,0,0,13,45,0,0,0,0,0,0,14,46,0,0,0,0,0,0,15,47,0,0]
; AVX512BW-FCP-NEXT: vmovdqa64 %zmm1, %zmm9
; AVX512BW-FCP-NEXT: vpermt2w %zmm27, %zmm8, %zmm9
; AVX512BW-FCP-NEXT: vmovdqu64 %zmm9, {{[-0-9]+}}(%r{{[sb]}}p) # 64-byte Spill
; AVX512BW-FCP-NEXT: vpmovsxbw {{.*#+}} zmm9 = [0,0,0,0,0,0,8,40,0,0,0,0,0,0,9,41,0,0,0,0,0,0,10,42,0,0,0,0,0,0,11,43]
; AVX512BW-FCP-NEXT: vmovdqa64 %zmm4, %zmm10
; AVX512BW-FCP-NEXT: vpermt2w %zmm30, %zmm9, %zmm10
; AVX512BW-FCP-NEXT: vmovdqu64 %zmm10, {{[-0-9]+}}(%r{{[sb]}}p) # 64-byte Spill
; AVX512BW-FCP-NEXT: vpmovsxbw {{.*#+}} zmm10 = [0,0,0,0,8,40,0,0,0,0,0,0,9,41,0,0,0,0,0,0,10,42,0,0,0,0,0,0,11,43,0,0]
; AVX512BW-FCP-NEXT: vmovdqa64 %zmm1, %zmm11
; AVX512BW-FCP-NEXT: vpermt2w %zmm27, %zmm10, %zmm11
; AVX512BW-FCP-NEXT: vmovdqu64 %zmm11, {{[-0-9]+}}(%r{{[sb]}}p) # 64-byte Spill
; AVX512BW-FCP-NEXT: vpmovsxbw {{.*#+}} zmm11 = [0,0,0,0,0,0,20,52,0,0,0,0,0,0,21,53,0,0,0,0,0,0,22,54,0,0,0,0,0,0,23,55]
; AVX512BW-FCP-NEXT: vmovdqa64 %zmm4, %zmm12
; AVX512BW-FCP-NEXT: vpermt2w %zmm30, %zmm11, %zmm12
; AVX512BW-FCP-NEXT: vmovdqu64 %zmm12, {{[-0-9]+}}(%r{{[sb]}}p) # 64-byte Spill
; AVX512BW-FCP-NEXT: vpmovsxbw {{.*#+}} zmm12 = [0,0,0,0,20,52,0,0,0,0,0,0,21,53,0,0,0,0,0,0,22,54,0,0,0,0,0,0,23,55,0,0]
; AVX512BW-FCP-NEXT: vmovdqa64 %zmm1, %zmm13
; AVX512BW-FCP-NEXT: vpermt2w %zmm27, %zmm12, %zmm13
; AVX512BW-FCP-NEXT: vmovdqu64 %zmm13, {{[-0-9]+}}(%r{{[sb]}}p) # 64-byte Spill
; AVX512BW-FCP-NEXT: vpmovsxbw {{.*#+}} zmm13 = [0,0,0,0,0,0,16,48,0,0,0,0,0,0,17,49,0,0,0,0,0,0,18,50,0,0,0,0,0,0,19,51]
; AVX512BW-FCP-NEXT: vmovdqa64 %zmm4, %zmm14
; AVX512BW-FCP-NEXT: vpermt2w %zmm30, %zmm13, %zmm14
; AVX512BW-FCP-NEXT: vmovdqu64 %zmm14, {{[-0-9]+}}(%r{{[sb]}}p) # 64-byte Spill
; AVX512BW-FCP-NEXT: vpmovsxbw {{.*#+}} zmm14 = [0,0,0,0,16,48,0,0,0,0,0,0,17,49,0,0,0,0,0,0,18,50,0,0,0,0,0,0,19,51,0,0]
; AVX512BW-FCP-NEXT: vpmovsxbw {{.*#+}} zmm15 = [0,0,0,0,0,0,28,60,0,0,0,0,0,0,29,61,0,0,0,0,0,0,30,62,0,0,0,0,0,0,31,63]
; AVX512BW-FCP-NEXT: vmovdqa64 %zmm4, %zmm16
; AVX512BW-FCP-NEXT: vpermt2w %zmm30, %zmm15, %zmm16
; AVX512BW-FCP-NEXT: vmovdqu64 %zmm16, {{[-0-9]+}}(%r{{[sb]}}p) # 64-byte Spill
; AVX512BW-FCP-NEXT: vpmovsxbw {{.*#+}} zmm31 = [0,0,0,0,0,0,24,56,0,0,0,0,0,0,25,57,0,0,0,0,0,0,26,58,0,0,0,0,0,0,27,59]
; AVX512BW-FCP-NEXT: vpermt2w %zmm30, %zmm31, %zmm4
; AVX512BW-FCP-NEXT: vmovdqu64 %zmm4, {{[-0-9]+}}(%r{{[sb]}}p) # 64-byte Spill
; AVX512BW-FCP-NEXT: vmovdqa64 %zmm1, %zmm4
; AVX512BW-FCP-NEXT: vpermt2w %zmm27, %zmm14, %zmm4
; AVX512BW-FCP-NEXT: vmovdqu64 %zmm4, {{[-0-9]+}}(%r{{[sb]}}p) # 64-byte Spill
; AVX512BW-FCP-NEXT: vpermi2w %zmm28, %zmm0, %zmm3
; AVX512BW-FCP-NEXT: vmovdqu64 %zmm3, {{[-0-9]+}}(%r{{[sb]}}p) # 64-byte Spill
; AVX512BW-FCP-NEXT: vpermi2w %zmm28, %zmm0, %zmm5
; AVX512BW-FCP-NEXT: vmovdqu64 %zmm5, {{[-0-9]+}}(%r{{[sb]}}p) # 64-byte Spill
; AVX512BW-FCP-NEXT: vpermi2w %zmm28, %zmm0, %zmm7
; AVX512BW-FCP-NEXT: vmovdqu64 %zmm7, {{[-0-9]+}}(%r{{[sb]}}p) # 64-byte Spill
; AVX512BW-FCP-NEXT: vpermi2w %zmm28, %zmm0, %zmm9
; AVX512BW-FCP-NEXT: vmovdqu64 %zmm9, {{[-0-9]+}}(%r{{[sb]}}p) # 64-byte Spill
; AVX512BW-FCP-NEXT: vpermi2w %zmm28, %zmm0, %zmm11
; AVX512BW-FCP-NEXT: vmovdqu64 %zmm11, {{[-0-9]+}}(%r{{[sb]}}p) # 64-byte Spill
; AVX512BW-FCP-NEXT: vpermi2w %zmm28, %zmm0, %zmm13
; AVX512BW-FCP-NEXT: vmovdqu64 %zmm13, {{[-0-9]+}}(%r{{[sb]}}p) # 64-byte Spill
; AVX512BW-FCP-NEXT: vpermi2w %zmm28, %zmm0, %zmm15
; AVX512BW-FCP-NEXT: vmovdqu64 %zmm15, {{[-0-9]+}}(%r{{[sb]}}p) # 64-byte Spill
; AVX512BW-FCP-NEXT: vpermt2w %zmm28, %zmm31, %zmm0
; AVX512BW-FCP-NEXT: vmovdqu64 %zmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 64-byte Spill
; AVX512BW-FCP-NEXT: vpmovsxbw {{.*#+}} zmm28 = [0,0,0,0,28,60,0,0,0,0,0,0,29,61,0,0,0,0,0,0,30,62,0,0,0,0,0,0,31,63,0,0]
; AVX512BW-FCP-NEXT: vmovdqa64 %zmm1, %zmm31
; AVX512BW-FCP-NEXT: vpermt2w %zmm27, %zmm28, %zmm31
; AVX512BW-FCP-NEXT: vpmovsxbw {{.*#+}} zmm0 = [0,0,0,0,24,56,0,0,0,0,0,0,25,57,0,0,0,0,0,0,26,58,0,0,0,0,0,0,27,59,0,0]
; AVX512BW-FCP-NEXT: vpermt2w %zmm27, %zmm0, %zmm1
; AVX512BW-FCP-NEXT: vmovdqu64 %zmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 64-byte Spill
; AVX512BW-FCP-NEXT: vmovdqa64 64(%r8), %zmm27
; AVX512BW-FCP-NEXT: vmovdqa64 64(%r9), %zmm1
; AVX512BW-FCP-NEXT: vpermi2w %zmm1, %zmm27, %zmm2
; AVX512BW-FCP-NEXT: vmovdqu64 %zmm2, {{[-0-9]+}}(%r{{[sb]}}p) # 64-byte Spill
; AVX512BW-FCP-NEXT: vpermi2w %zmm1, %zmm27, %zmm6
; AVX512BW-FCP-NEXT: vmovdqu64 %zmm6, {{[-0-9]+}}(%r{{[sb]}}p) # 64-byte Spill
; AVX512BW-FCP-NEXT: vpermi2w %zmm1, %zmm27, %zmm8
; AVX512BW-FCP-NEXT: vmovdqu64 %zmm8, {{[-0-9]+}}(%r{{[sb]}}p) # 64-byte Spill
; AVX512BW-FCP-NEXT: vpermi2w %zmm1, %zmm27, %zmm10
; AVX512BW-FCP-NEXT: vmovdqu64 %zmm10, {{[-0-9]+}}(%r{{[sb]}}p) # 64-byte Spill
; AVX512BW-FCP-NEXT: vpermi2w %zmm1, %zmm27, %zmm12
; AVX512BW-FCP-NEXT: vmovdqu64 %zmm12, {{[-0-9]+}}(%r{{[sb]}}p) # 64-byte Spill
; AVX512BW-FCP-NEXT: vpermi2w %zmm1, %zmm27, %zmm14
; AVX512BW-FCP-NEXT: vmovdqu64 %zmm14, {{[-0-9]+}}(%r{{[sb]}}p) # 64-byte Spill
; AVX512BW-FCP-NEXT: vpermi2w %zmm1, %zmm27, %zmm28
; AVX512BW-FCP-NEXT: vpermt2w %zmm1, %zmm0, %zmm27
; AVX512BW-FCP-NEXT: vmovdqa64 (%rdx), %zmm16
; AVX512BW-FCP-NEXT: vmovdqa64 (%rcx), %zmm0
; AVX512BW-FCP-NEXT: vpmovsxbw {{.*#+}} zmm1 = [0,0,4,36,0,0,0,0,0,0,5,37,0,0,0,0,0,0,6,38,0,0,0,0,0,0,7,39,0,0,0,0]
; AVX512BW-FCP-NEXT: vmovdqa64 %zmm16, %zmm20
; AVX512BW-FCP-NEXT: vpermt2w %zmm0, %zmm1, %zmm20
; AVX512BW-FCP-NEXT: vmovdqa64 %zmm1, %zmm2
; AVX512BW-FCP-NEXT: vpmovsxbw {{.*#+}} zmm1 = [0,0,0,32,0,0,0,0,0,0,1,33,0,0,0,0,0,0,2,34,0,0,0,0,0,0,3,35,0,0,0,0]
; AVX512BW-FCP-NEXT: vmovdqa64 %zmm16, %zmm21
; AVX512BW-FCP-NEXT: vpermt2w %zmm0, %zmm1, %zmm21
; AVX512BW-FCP-NEXT: vmovdqa64 %zmm1, %zmm3
; AVX512BW-FCP-NEXT: vpmovsxbw {{.*#+}} zmm1 = [0,0,12,44,0,0,0,0,0,0,13,45,0,0,0,0,0,0,14,46,0,0,0,0,0,0,15,47,0,0,0,0]
; AVX512BW-FCP-NEXT: vmovdqa64 %zmm16, %zmm22
; AVX512BW-FCP-NEXT: vpermt2w %zmm0, %zmm1, %zmm22
; AVX512BW-FCP-NEXT: vmovdqa64 %zmm1, %zmm4
; AVX512BW-FCP-NEXT: vpmovsxbw {{.*#+}} zmm1 = [0,0,8,40,0,0,0,0,0,0,9,41,0,0,0,0,0,0,10,42,0,0,0,0,0,0,11,43,0,0,0,0]
; AVX512BW-FCP-NEXT: vmovdqa64 %zmm16, %zmm23
; AVX512BW-FCP-NEXT: vpermt2w %zmm0, %zmm1, %zmm23
; AVX512BW-FCP-NEXT: vmovdqa64 %zmm1, %zmm6
; AVX512BW-FCP-NEXT: vpmovsxbw {{.*#+}} zmm1 = [0,0,20,52,0,0,0,0,0,0,21,53,0,0,0,0,0,0,22,54,0,0,0,0,0,0,23,55,0,0,0,0]
; AVX512BW-FCP-NEXT: vmovdqa64 %zmm16, %zmm24
; AVX512BW-FCP-NEXT: vpermt2w %zmm0, %zmm1, %zmm24
; AVX512BW-FCP-NEXT: vmovdqa64 %zmm1, %zmm7
; AVX512BW-FCP-NEXT: vpmovsxbw {{.*#+}} zmm29 = [0,0,16,48,0,0,0,0,0,0,17,49,0,0,0,0,0,0,18,50,0,0,0,0,0,0,19,51,0,0,0,0]
; AVX512BW-FCP-NEXT: vmovdqa64 %zmm16, %zmm25
; AVX512BW-FCP-NEXT: vpermt2w %zmm0, %zmm29, %zmm25
; AVX512BW-FCP-NEXT: vpmovsxbw {{.*#+}} zmm30 = [0,0,28,60,0,0,0,0,0,0,29,61,0,0,0,0,0,0,30,62,0,0,0,0,0,0,31,63,0,0,0,0]
; AVX512BW-FCP-NEXT: vmovdqa64 %zmm16, %zmm26
; AVX512BW-FCP-NEXT: vpermt2w %zmm0, %zmm30, %zmm26
; AVX512BW-FCP-NEXT: vpmovsxbw {{.*#+}} zmm1 = [0,0,24,56,0,0,0,0,0,0,25,57,0,0,0,0,0,0,26,58,0,0,0,0,0,0,27,59,0,0,0,0]
; AVX512BW-FCP-NEXT: vpermt2w %zmm0, %zmm1, %zmm16
; AVX512BW-FCP-NEXT: vmovdqa64 64(%rdx), %zmm5
; AVX512BW-FCP-NEXT: vmovdqa64 64(%rcx), %zmm0
; AVX512BW-FCP-NEXT: vpermi2w %zmm0, %zmm5, %zmm2
; AVX512BW-FCP-NEXT: vmovdqu64 %zmm2, {{[-0-9]+}}(%r{{[sb]}}p) # 64-byte Spill
; AVX512BW-FCP-NEXT: vpermi2w %zmm0, %zmm5, %zmm3
; AVX512BW-FCP-NEXT: vmovdqu64 %zmm3, {{[-0-9]+}}(%r{{[sb]}}p) # 64-byte Spill
; AVX512BW-FCP-NEXT: vpermi2w %zmm0, %zmm5, %zmm4
; AVX512BW-FCP-NEXT: vmovdqu64 %zmm4, (%rsp) # 64-byte Spill
; AVX512BW-FCP-NEXT: vpermi2w %zmm0, %zmm5, %zmm6
; AVX512BW-FCP-NEXT: vmovdqu64 %zmm6, {{[-0-9]+}}(%r{{[sb]}}p) # 64-byte Spill
; AVX512BW-FCP-NEXT: vpermi2w %zmm0, %zmm5, %zmm7
; AVX512BW-FCP-NEXT: vmovdqu64 %zmm7, {{[-0-9]+}}(%r{{[sb]}}p) # 64-byte Spill
; AVX512BW-FCP-NEXT: vpermi2w %zmm0, %zmm5, %zmm29
; AVX512BW-FCP-NEXT: vpermi2w %zmm0, %zmm5, %zmm30
; AVX512BW-FCP-NEXT: vpermt2w %zmm0, %zmm1, %zmm5
; AVX512BW-FCP-NEXT: vmovdqa64 (%rdi), %zmm3
; AVX512BW-FCP-NEXT: vmovdqa64 (%rsi), %zmm0
; AVX512BW-FCP-NEXT: vpmovsxbw {{.*#+}} zmm12 = [4,36,0,0,0,0,0,0,5,37,0,0,0,0,0,0,6,38,0,0,0,0,0,0,7,39,0,0,0,0,0,0]
; AVX512BW-FCP-NEXT: vmovdqa64 %zmm3, %zmm18
; AVX512BW-FCP-NEXT: vpermt2w %zmm0, %zmm12, %zmm18
; AVX512BW-FCP-NEXT: vpmovsxbw {{.*#+}} zmm10 = [0,32,0,0,0,0,0,0,1,33,0,0,0,0,0,0,2,34,0,0,0,0,0,0,3,35,0,0,0,0,0,0]
; AVX512BW-FCP-NEXT: vmovdqa64 %zmm3, %zmm17
; AVX512BW-FCP-NEXT: vpermt2w %zmm0, %zmm10, %zmm17
; AVX512BW-FCP-NEXT: vpmovsxbw {{.*#+}} zmm8 = [12,44,0,0,0,0,0,0,13,45,0,0,0,0,0,0,14,46,0,0,0,0,0,0,15,47,0,0,0,0,0,0]
; AVX512BW-FCP-NEXT: vmovdqa64 %zmm3, %zmm15
; AVX512BW-FCP-NEXT: vpermt2w %zmm0, %zmm8, %zmm15
; AVX512BW-FCP-NEXT: vpmovsxbw {{.*#+}} zmm7 = [8,40,0,0,0,0,0,0,9,41,0,0,0,0,0,0,10,42,0,0,0,0,0,0,11,43,0,0,0,0,0,0]
; AVX512BW-FCP-NEXT: vmovdqa64 %zmm3, %zmm14
; AVX512BW-FCP-NEXT: vpermt2w %zmm0, %zmm7, %zmm14
; AVX512BW-FCP-NEXT: vpmovsxbw {{.*#+}} zmm6 = [20,52,0,0,0,0,0,0,21,53,0,0,0,0,0,0,22,54,0,0,0,0,0,0,23,55,0,0,0,0,0,0]
; AVX512BW-FCP-NEXT: vmovdqa64 %zmm3, %zmm13
; AVX512BW-FCP-NEXT: vpermt2w %zmm0, %zmm6, %zmm13
; AVX512BW-FCP-NEXT: vpmovsxbw {{.*#+}} zmm4 = [16,48,0,0,0,0,0,0,17,49,0,0,0,0,0,0,18,50,0,0,0,0,0,0,19,51,0,0,0,0,0,0]
; AVX512BW-FCP-NEXT: vmovdqa64 %zmm3, %zmm11
; AVX512BW-FCP-NEXT: vpermt2w %zmm0, %zmm4, %zmm11
; AVX512BW-FCP-NEXT: vpmovsxbw {{.*#+}} zmm2 = [28,60,0,0,0,0,0,0,29,61,0,0,0,0,0,0,30,62,0,0,0,0,0,0,31,63,0,0,0,0,0,0]
; AVX512BW-FCP-NEXT: vmovdqa64 %zmm3, %zmm9
; AVX512BW-FCP-NEXT: vpermt2w %zmm0, %zmm2, %zmm9
; AVX512BW-FCP-NEXT: vpmovsxbw {{.*#+}} zmm19 = [24,56,0,0,0,0,0,0,25,57,0,0,0,0,0,0,26,58,0,0,0,0,0,0,27,59,0,0,0,0,0,0]
; AVX512BW-FCP-NEXT: vpermt2w %zmm0, %zmm19, %zmm3
; AVX512BW-FCP-NEXT: vmovdqa64 64(%rdi), %zmm1
; AVX512BW-FCP-NEXT: vmovdqa64 64(%rsi), %zmm0
; AVX512BW-FCP-NEXT: vpermi2w %zmm0, %zmm1, %zmm12
; AVX512BW-FCP-NEXT: vpermi2w %zmm0, %zmm1, %zmm10
; AVX512BW-FCP-NEXT: vpermi2w %zmm0, %zmm1, %zmm8
; AVX512BW-FCP-NEXT: vpermi2w %zmm0, %zmm1, %zmm7
; AVX512BW-FCP-NEXT: vpermi2w %zmm0, %zmm1, %zmm6
; AVX512BW-FCP-NEXT: vpermi2w %zmm0, %zmm1, %zmm4
; AVX512BW-FCP-NEXT: vpermi2w %zmm0, %zmm1, %zmm2
; AVX512BW-FCP-NEXT: vpermt2w %zmm0, %zmm19, %zmm1
; AVX512BW-FCP-NEXT: movw $-30584, %ax # imm = 0x8888
; AVX512BW-FCP-NEXT: kmovd %eax, %k1
; AVX512BW-FCP-NEXT: vmovdqu64 {{[-0-9]+}}(%r{{[sb]}}p), %zmm0 # 64-byte Reload
; AVX512BW-FCP-NEXT: vmovdqu64 {{[-0-9]+}}(%r{{[sb]}}p), %zmm19 # 64-byte Reload
; AVX512BW-FCP-NEXT: vmovdqa32 %zmm19, %zmm0 {%k1}
; AVX512BW-FCP-NEXT: movw $8738, %ax # imm = 0x2222
; AVX512BW-FCP-NEXT: kmovd %eax, %k2
; AVX512BW-FCP-NEXT: vmovdqa32 %zmm20, %zmm18 {%k2}
; AVX512BW-FCP-NEXT: movb $-86, %al
; AVX512BW-FCP-NEXT: kmovd %eax, %k3
; AVX512BW-FCP-NEXT: vmovdqa64 %zmm0, %zmm18 {%k3}
; AVX512BW-FCP-NEXT: vmovdqu64 {{[-0-9]+}}(%r{{[sb]}}p), %zmm0 # 64-byte Reload
; AVX512BW-FCP-NEXT: vmovdqu64 {{[-0-9]+}}(%r{{[sb]}}p), %zmm19 # 64-byte Reload
; AVX512BW-FCP-NEXT: vmovdqa32 %zmm0, %zmm19 {%k1}
; AVX512BW-FCP-NEXT: vmovdqa32 %zmm21, %zmm17 {%k2}
; AVX512BW-FCP-NEXT: vmovdqa64 %zmm19, %zmm17 {%k3}
; AVX512BW-FCP-NEXT: vmovdqu64 {{[-0-9]+}}(%r{{[sb]}}p), %zmm0 # 64-byte Reload
; AVX512BW-FCP-NEXT: vmovdqu64 {{[-0-9]+}}(%r{{[sb]}}p), %zmm19 # 64-byte Reload
; AVX512BW-FCP-NEXT: vmovdqa32 %zmm0, %zmm19 {%k1}
; AVX512BW-FCP-NEXT: vmovdqa32 %zmm22, %zmm15 {%k2}
; AVX512BW-FCP-NEXT: vmovdqa64 %zmm19, %zmm15 {%k3}
; AVX512BW-FCP-NEXT: vmovdqu64 {{[-0-9]+}}(%r{{[sb]}}p), %zmm0 # 64-byte Reload
; AVX512BW-FCP-NEXT: vmovdqu64 {{[-0-9]+}}(%r{{[sb]}}p), %zmm19 # 64-byte Reload
; AVX512BW-FCP-NEXT: vmovdqa32 %zmm0, %zmm19 {%k1}
; AVX512BW-FCP-NEXT: vmovdqa32 %zmm23, %zmm14 {%k2}
; AVX512BW-FCP-NEXT: vmovdqa64 %zmm19, %zmm14 {%k3}
; AVX512BW-FCP-NEXT: vmovdqu64 {{[-0-9]+}}(%r{{[sb]}}p), %zmm0 # 64-byte Reload
; AVX512BW-FCP-NEXT: vmovdqu64 {{[-0-9]+}}(%r{{[sb]}}p), %zmm19 # 64-byte Reload
; AVX512BW-FCP-NEXT: vmovdqa32 %zmm0, %zmm19 {%k1}
; AVX512BW-FCP-NEXT: vmovdqa32 %zmm24, %zmm13 {%k2}
; AVX512BW-FCP-NEXT: vmovdqa64 %zmm19, %zmm13 {%k3}
; AVX512BW-FCP-NEXT: vmovdqu64 {{[-0-9]+}}(%r{{[sb]}}p), %zmm0 # 64-byte Reload
; AVX512BW-FCP-NEXT: vmovdqu64 {{[-0-9]+}}(%r{{[sb]}}p), %zmm19 # 64-byte Reload
; AVX512BW-FCP-NEXT: vmovdqa32 %zmm0, %zmm19 {%k1}
; AVX512BW-FCP-NEXT: vmovdqa32 %zmm25, %zmm11 {%k2}
; AVX512BW-FCP-NEXT: vmovdqa64 %zmm19, %zmm11 {%k3}
; AVX512BW-FCP-NEXT: vmovdqu64 {{[-0-9]+}}(%r{{[sb]}}p), %zmm0 # 64-byte Reload
; AVX512BW-FCP-NEXT: vmovdqa32 %zmm0, %zmm31 {%k1}
; AVX512BW-FCP-NEXT: vmovdqa32 %zmm26, %zmm9 {%k2}
; AVX512BW-FCP-NEXT: vmovdqa64 %zmm31, %zmm9 {%k3}
; AVX512BW-FCP-NEXT: vmovdqu64 {{[-0-9]+}}(%r{{[sb]}}p), %zmm0 # 64-byte Reload
; AVX512BW-FCP-NEXT: vmovdqu64 {{[-0-9]+}}(%r{{[sb]}}p), %zmm19 # 64-byte Reload
; AVX512BW-FCP-NEXT: vmovdqa32 %zmm19, %zmm0 {%k1}
; AVX512BW-FCP-NEXT: vmovdqa32 %zmm16, %zmm3 {%k2}
; AVX512BW-FCP-NEXT: vmovdqa64 %zmm0, %zmm3 {%k3}
; AVX512BW-FCP-NEXT: vmovdqu64 {{[-0-9]+}}(%r{{[sb]}}p), %zmm0 # 64-byte Reload
; AVX512BW-FCP-NEXT: vmovdqu64 {{[-0-9]+}}(%r{{[sb]}}p), %zmm16 # 64-byte Reload
; AVX512BW-FCP-NEXT: vmovdqa32 %zmm16, %zmm0 {%k1}
; AVX512BW-FCP-NEXT: vmovdqu64 {{[-0-9]+}}(%r{{[sb]}}p), %zmm16 # 64-byte Reload
; AVX512BW-FCP-NEXT: vmovdqa32 %zmm16, %zmm12 {%k2}
; AVX512BW-FCP-NEXT: vmovdqa64 %zmm0, %zmm12 {%k3}
; AVX512BW-FCP-NEXT: vmovdqu64 {{[-0-9]+}}(%r{{[sb]}}p), %zmm0 # 64-byte Reload
; AVX512BW-FCP-NEXT: vmovdqu64 {{[-0-9]+}}(%r{{[sb]}}p), %zmm16 # 64-byte Reload
; AVX512BW-FCP-NEXT: vmovdqa32 %zmm16, %zmm0 {%k1}
; AVX512BW-FCP-NEXT: vmovdqu64 {{[-0-9]+}}(%r{{[sb]}}p), %zmm16 # 64-byte Reload
; AVX512BW-FCP-NEXT: vmovdqa32 %zmm16, %zmm10 {%k2}
; AVX512BW-FCP-NEXT: vmovdqa64 %zmm0, %zmm10 {%k3}
; AVX512BW-FCP-NEXT: vmovdqu64 {{[-0-9]+}}(%r{{[sb]}}p), %zmm0 # 64-byte Reload
; AVX512BW-FCP-NEXT: vmovdqu64 {{[-0-9]+}}(%r{{[sb]}}p), %zmm16 # 64-byte Reload
; AVX512BW-FCP-NEXT: vmovdqa32 %zmm16, %zmm0 {%k1}
; AVX512BW-FCP-NEXT: vmovdqu64 (%rsp), %zmm16 # 64-byte Reload
; AVX512BW-FCP-NEXT: vmovdqa32 %zmm16, %zmm8 {%k2}
; AVX512BW-FCP-NEXT: vmovdqa64 %zmm0, %zmm8 {%k3}
; AVX512BW-FCP-NEXT: vmovdqu64 {{[-0-9]+}}(%r{{[sb]}}p), %zmm0 # 64-byte Reload
; AVX512BW-FCP-NEXT: vmovdqu64 {{[-0-9]+}}(%r{{[sb]}}p), %zmm16 # 64-byte Reload
; AVX512BW-FCP-NEXT: vmovdqa32 %zmm16, %zmm0 {%k1}
; AVX512BW-FCP-NEXT: vmovdqu64 {{[-0-9]+}}(%r{{[sb]}}p), %zmm16 # 64-byte Reload
; AVX512BW-FCP-NEXT: vmovdqa32 %zmm16, %zmm7 {%k2}
; AVX512BW-FCP-NEXT: vmovdqa64 %zmm0, %zmm7 {%k3}
; AVX512BW-FCP-NEXT: vmovdqu64 {{[-0-9]+}}(%r{{[sb]}}p), %zmm0 # 64-byte Reload
; AVX512BW-FCP-NEXT: vmovdqu64 {{[-0-9]+}}(%r{{[sb]}}p), %zmm16 # 64-byte Reload
; AVX512BW-FCP-NEXT: vmovdqa32 %zmm16, %zmm0 {%k1}
; AVX512BW-FCP-NEXT: vmovdqu64 {{[-0-9]+}}(%r{{[sb]}}p), %zmm16 # 64-byte Reload
; AVX512BW-FCP-NEXT: vmovdqa32 %zmm16, %zmm6 {%k2}
; AVX512BW-FCP-NEXT: vmovdqa64 %zmm0, %zmm6 {%k3}
; AVX512BW-FCP-NEXT: vmovdqu64 {{[-0-9]+}}(%r{{[sb]}}p), %zmm0 # 64-byte Reload
; AVX512BW-FCP-NEXT: vmovdqu64 {{[-0-9]+}}(%r{{[sb]}}p), %zmm16 # 64-byte Reload
; AVX512BW-FCP-NEXT: vmovdqa32 %zmm16, %zmm0 {%k1}
; AVX512BW-FCP-NEXT: vmovdqa32 %zmm29, %zmm4 {%k2}
; AVX512BW-FCP-NEXT: vmovdqa64 %zmm0, %zmm4 {%k3}
; AVX512BW-FCP-NEXT: vmovdqu64 {{[-0-9]+}}(%r{{[sb]}}p), %zmm0 # 64-byte Reload
; AVX512BW-FCP-NEXT: vmovdqa32 %zmm0, %zmm28 {%k1}
; AVX512BW-FCP-NEXT: vmovdqa32 %zmm30, %zmm2 {%k2}
; AVX512BW-FCP-NEXT: vmovdqa64 %zmm28, %zmm2 {%k3}
; AVX512BW-FCP-NEXT: vmovdqu64 {{[-0-9]+}}(%r{{[sb]}}p), %zmm0 # 64-byte Reload
; AVX512BW-FCP-NEXT: vmovdqa32 %zmm0, %zmm27 {%k1}
; AVX512BW-FCP-NEXT: vmovdqa32 %zmm5, %zmm1 {%k2}
; AVX512BW-FCP-NEXT: vmovdqa64 %zmm27, %zmm1 {%k3}
; AVX512BW-FCP-NEXT: movq {{[0-9]+}}(%rsp), %rax
; AVX512BW-FCP-NEXT: vmovdqa64 %zmm1, 896(%rax)
; AVX512BW-FCP-NEXT: vmovdqa64 %zmm2, 960(%rax)
; AVX512BW-FCP-NEXT: vmovdqa64 %zmm4, 768(%rax)
; AVX512BW-FCP-NEXT: vmovdqa64 %zmm6, 832(%rax)
; AVX512BW-FCP-NEXT: vmovdqa64 %zmm7, 640(%rax)
; AVX512BW-FCP-NEXT: vmovdqa64 %zmm8, 704(%rax)
; AVX512BW-FCP-NEXT: vmovdqa64 %zmm10, 512(%rax)
; AVX512BW-FCP-NEXT: vmovdqa64 %zmm12, 576(%rax)
; AVX512BW-FCP-NEXT: vmovdqa64 %zmm3, 384(%rax)
; AVX512BW-FCP-NEXT: vmovdqa64 %zmm9, 448(%rax)
; AVX512BW-FCP-NEXT: vmovdqa64 %zmm11, 256(%rax)
; AVX512BW-FCP-NEXT: vmovdqa64 %zmm13, 320(%rax)
; AVX512BW-FCP-NEXT: vmovdqa64 %zmm14, 128(%rax)
; AVX512BW-FCP-NEXT: vmovdqa64 %zmm15, 192(%rax)
; AVX512BW-FCP-NEXT: vmovdqa64 %zmm17, (%rax)
; AVX512BW-FCP-NEXT: vmovdqa64 %zmm18, 64(%rax)
; AVX512BW-FCP-NEXT: addq $2056, %rsp # imm = 0x808
; AVX512BW-FCP-NEXT: vzeroupper
; AVX512BW-FCP-NEXT: retq
;
; AVX512DQ-BW-LABEL: store_i16_stride8_vf64:
; AVX512DQ-BW: # %bb.0:
; AVX512DQ-BW-NEXT: subq $2056, %rsp # imm = 0x808
; AVX512DQ-BW-NEXT: movq {{[0-9]+}}(%rsp), %rax
; AVX512DQ-BW-NEXT: movq {{[0-9]+}}(%rsp), %r10
; AVX512DQ-BW-NEXT: vmovdqa64 (%r8), %zmm1
; AVX512DQ-BW-NEXT: vmovdqa64 (%r9), %zmm27
; AVX512DQ-BW-NEXT: vmovdqa64 (%r10), %zmm2
; AVX512DQ-BW-NEXT: vmovdqa64 64(%r10), %zmm0
; AVX512DQ-BW-NEXT: vmovdqa64 (%rax), %zmm30
; AVX512DQ-BW-NEXT: vmovdqa64 64(%rax), %zmm28
; AVX512DQ-BW-NEXT: vpmovsxbw {{.*#+}} zmm3 = [0,0,0,0,0,0,4,36,0,0,0,0,0,0,5,37,0,0,0,0,0,0,6,38,0,0,0,0,0,0,7,39]
; AVX512DQ-BW-NEXT: vmovdqa64 %zmm2, %zmm5
; AVX512DQ-BW-NEXT: vmovdqa64 %zmm2, %zmm4
; AVX512DQ-BW-NEXT: vpermt2w %zmm30, %zmm3, %zmm5
; AVX512DQ-BW-NEXT: vmovdqu64 %zmm5, {{[-0-9]+}}(%r{{[sb]}}p) # 64-byte Spill
; AVX512DQ-BW-NEXT: vpmovsxbw {{.*#+}} zmm2 = [0,0,0,0,4,36,0,0,0,0,0,0,5,37,0,0,0,0,0,0,6,38,0,0,0,0,0,0,7,39,0,0]
; AVX512DQ-BW-NEXT: vmovdqa64 %zmm1, %zmm5
; AVX512DQ-BW-NEXT: vpermt2w %zmm27, %zmm2, %zmm5
; AVX512DQ-BW-NEXT: vmovdqu64 %zmm5, {{[-0-9]+}}(%r{{[sb]}}p) # 64-byte Spill
; AVX512DQ-BW-NEXT: vpmovsxbw {{.*#+}} zmm5 = [0,0,0,0,0,0,0,32,0,0,0,0,0,0,1,33,0,0,0,0,0,0,2,34,0,0,0,0,0,0,3,35]
; AVX512DQ-BW-NEXT: vmovdqa64 %zmm4, %zmm6
; AVX512DQ-BW-NEXT: vpermt2w %zmm30, %zmm5, %zmm6
; AVX512DQ-BW-NEXT: vmovdqu64 %zmm6, {{[-0-9]+}}(%r{{[sb]}}p) # 64-byte Spill
; AVX512DQ-BW-NEXT: vpmovsxbw {{.*#+}} zmm6 = [0,0,0,0,0,32,0,0,0,0,0,0,1,33,0,0,0,0,0,0,2,34,0,0,0,0,0,0,3,35,0,0]
; AVX512DQ-BW-NEXT: vmovdqa64 %zmm1, %zmm7
; AVX512DQ-BW-NEXT: vpermt2w %zmm27, %zmm6, %zmm7
; AVX512DQ-BW-NEXT: vmovdqu64 %zmm7, {{[-0-9]+}}(%r{{[sb]}}p) # 64-byte Spill
; AVX512DQ-BW-NEXT: vpmovsxbw {{.*#+}} zmm7 = [0,0,0,0,0,0,12,44,0,0,0,0,0,0,13,45,0,0,0,0,0,0,14,46,0,0,0,0,0,0,15,47]
; AVX512DQ-BW-NEXT: vmovdqa64 %zmm4, %zmm8
; AVX512DQ-BW-NEXT: vpermt2w %zmm30, %zmm7, %zmm8
; AVX512DQ-BW-NEXT: vmovdqu64 %zmm8, {{[-0-9]+}}(%r{{[sb]}}p) # 64-byte Spill
; AVX512DQ-BW-NEXT: vpmovsxbw {{.*#+}} zmm8 = [0,0,0,0,12,44,0,0,0,0,0,0,13,45,0,0,0,0,0,0,14,46,0,0,0,0,0,0,15,47,0,0]
; AVX512DQ-BW-NEXT: vmovdqa64 %zmm1, %zmm9
; AVX512DQ-BW-NEXT: vpermt2w %zmm27, %zmm8, %zmm9
; AVX512DQ-BW-NEXT: vmovdqu64 %zmm9, {{[-0-9]+}}(%r{{[sb]}}p) # 64-byte Spill
; AVX512DQ-BW-NEXT: vpmovsxbw {{.*#+}} zmm9 = [0,0,0,0,0,0,8,40,0,0,0,0,0,0,9,41,0,0,0,0,0,0,10,42,0,0,0,0,0,0,11,43]
; AVX512DQ-BW-NEXT: vmovdqa64 %zmm4, %zmm10
; AVX512DQ-BW-NEXT: vpermt2w %zmm30, %zmm9, %zmm10
; AVX512DQ-BW-NEXT: vmovdqu64 %zmm10, {{[-0-9]+}}(%r{{[sb]}}p) # 64-byte Spill
; AVX512DQ-BW-NEXT: vpmovsxbw {{.*#+}} zmm10 = [0,0,0,0,8,40,0,0,0,0,0,0,9,41,0,0,0,0,0,0,10,42,0,0,0,0,0,0,11,43,0,0]
; AVX512DQ-BW-NEXT: vmovdqa64 %zmm1, %zmm11
; AVX512DQ-BW-NEXT: vpermt2w %zmm27, %zmm10, %zmm11
; AVX512DQ-BW-NEXT: vmovdqu64 %zmm11, {{[-0-9]+}}(%r{{[sb]}}p) # 64-byte Spill
; AVX512DQ-BW-NEXT: vpmovsxbw {{.*#+}} zmm11 = [0,0,0,0,0,0,20,52,0,0,0,0,0,0,21,53,0,0,0,0,0,0,22,54,0,0,0,0,0,0,23,55]
; AVX512DQ-BW-NEXT: vmovdqa64 %zmm4, %zmm12
; AVX512DQ-BW-NEXT: vpermt2w %zmm30, %zmm11, %zmm12
; AVX512DQ-BW-NEXT: vmovdqu64 %zmm12, {{[-0-9]+}}(%r{{[sb]}}p) # 64-byte Spill
; AVX512DQ-BW-NEXT: vpmovsxbw {{.*#+}} zmm12 = [0,0,0,0,20,52,0,0,0,0,0,0,21,53,0,0,0,0,0,0,22,54,0,0,0,0,0,0,23,55,0,0]
; AVX512DQ-BW-NEXT: vmovdqa64 %zmm1, %zmm13
; AVX512DQ-BW-NEXT: vpermt2w %zmm27, %zmm12, %zmm13
; AVX512DQ-BW-NEXT: vmovdqu64 %zmm13, {{[-0-9]+}}(%r{{[sb]}}p) # 64-byte Spill
; AVX512DQ-BW-NEXT: vpmovsxbw {{.*#+}} zmm13 = [0,0,0,0,0,0,16,48,0,0,0,0,0,0,17,49,0,0,0,0,0,0,18,50,0,0,0,0,0,0,19,51]
; AVX512DQ-BW-NEXT: vmovdqa64 %zmm4, %zmm14
; AVX512DQ-BW-NEXT: vpermt2w %zmm30, %zmm13, %zmm14
; AVX512DQ-BW-NEXT: vmovdqu64 %zmm14, {{[-0-9]+}}(%r{{[sb]}}p) # 64-byte Spill
; AVX512DQ-BW-NEXT: vpmovsxbw {{.*#+}} zmm14 = [0,0,0,0,16,48,0,0,0,0,0,0,17,49,0,0,0,0,0,0,18,50,0,0,0,0,0,0,19,51,0,0]
; AVX512DQ-BW-NEXT: vpmovsxbw {{.*#+}} zmm15 = [0,0,0,0,0,0,28,60,0,0,0,0,0,0,29,61,0,0,0,0,0,0,30,62,0,0,0,0,0,0,31,63]
; AVX512DQ-BW-NEXT: vmovdqa64 %zmm4, %zmm16
; AVX512DQ-BW-NEXT: vpermt2w %zmm30, %zmm15, %zmm16
; AVX512DQ-BW-NEXT: vmovdqu64 %zmm16, {{[-0-9]+}}(%r{{[sb]}}p) # 64-byte Spill
; AVX512DQ-BW-NEXT: vpmovsxbw {{.*#+}} zmm31 = [0,0,0,0,0,0,24,56,0,0,0,0,0,0,25,57,0,0,0,0,0,0,26,58,0,0,0,0,0,0,27,59]
; AVX512DQ-BW-NEXT: vpermt2w %zmm30, %zmm31, %zmm4
; AVX512DQ-BW-NEXT: vmovdqu64 %zmm4, {{[-0-9]+}}(%r{{[sb]}}p) # 64-byte Spill
; AVX512DQ-BW-NEXT: vmovdqa64 %zmm1, %zmm4
; AVX512DQ-BW-NEXT: vpermt2w %zmm27, %zmm14, %zmm4
; AVX512DQ-BW-NEXT: vmovdqu64 %zmm4, {{[-0-9]+}}(%r{{[sb]}}p) # 64-byte Spill
; AVX512DQ-BW-NEXT: vpermi2w %zmm28, %zmm0, %zmm3
; AVX512DQ-BW-NEXT: vmovdqu64 %zmm3, {{[-0-9]+}}(%r{{[sb]}}p) # 64-byte Spill
; AVX512DQ-BW-NEXT: vpermi2w %zmm28, %zmm0, %zmm5
; AVX512DQ-BW-NEXT: vmovdqu64 %zmm5, {{[-0-9]+}}(%r{{[sb]}}p) # 64-byte Spill
; AVX512DQ-BW-NEXT: vpermi2w %zmm28, %zmm0, %zmm7
; AVX512DQ-BW-NEXT: vmovdqu64 %zmm7, {{[-0-9]+}}(%r{{[sb]}}p) # 64-byte Spill
; AVX512DQ-BW-NEXT: vpermi2w %zmm28, %zmm0, %zmm9
; AVX512DQ-BW-NEXT: vmovdqu64 %zmm9, {{[-0-9]+}}(%r{{[sb]}}p) # 64-byte Spill
; AVX512DQ-BW-NEXT: vpermi2w %zmm28, %zmm0, %zmm11
; AVX512DQ-BW-NEXT: vmovdqu64 %zmm11, {{[-0-9]+}}(%r{{[sb]}}p) # 64-byte Spill
; AVX512DQ-BW-NEXT: vpermi2w %zmm28, %zmm0, %zmm13
; AVX512DQ-BW-NEXT: vmovdqu64 %zmm13, {{[-0-9]+}}(%r{{[sb]}}p) # 64-byte Spill
; AVX512DQ-BW-NEXT: vpermi2w %zmm28, %zmm0, %zmm15
; AVX512DQ-BW-NEXT: vmovdqu64 %zmm15, {{[-0-9]+}}(%r{{[sb]}}p) # 64-byte Spill
; AVX512DQ-BW-NEXT: vpermt2w %zmm28, %zmm31, %zmm0
; AVX512DQ-BW-NEXT: vmovdqu64 %zmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 64-byte Spill
; AVX512DQ-BW-NEXT: vpmovsxbw {{.*#+}} zmm28 = [0,0,0,0,28,60,0,0,0,0,0,0,29,61,0,0,0,0,0,0,30,62,0,0,0,0,0,0,31,63,0,0]
; AVX512DQ-BW-NEXT: vmovdqa64 %zmm1, %zmm31
; AVX512DQ-BW-NEXT: vpermt2w %zmm27, %zmm28, %zmm31
; AVX512DQ-BW-NEXT: vpmovsxbw {{.*#+}} zmm0 = [0,0,0,0,24,56,0,0,0,0,0,0,25,57,0,0,0,0,0,0,26,58,0,0,0,0,0,0,27,59,0,0]
; AVX512DQ-BW-NEXT: vpermt2w %zmm27, %zmm0, %zmm1
; AVX512DQ-BW-NEXT: vmovdqu64 %zmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 64-byte Spill
; AVX512DQ-BW-NEXT: vmovdqa64 64(%r8), %zmm27
; AVX512DQ-BW-NEXT: vmovdqa64 64(%r9), %zmm1
; AVX512DQ-BW-NEXT: vpermi2w %zmm1, %zmm27, %zmm2
; AVX512DQ-BW-NEXT: vmovdqu64 %zmm2, {{[-0-9]+}}(%r{{[sb]}}p) # 64-byte Spill
; AVX512DQ-BW-NEXT: vpermi2w %zmm1, %zmm27, %zmm6
; AVX512DQ-BW-NEXT: vmovdqu64 %zmm6, {{[-0-9]+}}(%r{{[sb]}}p) # 64-byte Spill
; AVX512DQ-BW-NEXT: vpermi2w %zmm1, %zmm27, %zmm8
; AVX512DQ-BW-NEXT: vmovdqu64 %zmm8, {{[-0-9]+}}(%r{{[sb]}}p) # 64-byte Spill
; AVX512DQ-BW-NEXT: vpermi2w %zmm1, %zmm27, %zmm10
; AVX512DQ-BW-NEXT: vmovdqu64 %zmm10, {{[-0-9]+}}(%r{{[sb]}}p) # 64-byte Spill
; AVX512DQ-BW-NEXT: vpermi2w %zmm1, %zmm27, %zmm12
; AVX512DQ-BW-NEXT: vmovdqu64 %zmm12, {{[-0-9]+}}(%r{{[sb]}}p) # 64-byte Spill
; AVX512DQ-BW-NEXT: vpermi2w %zmm1, %zmm27, %zmm14
; AVX512DQ-BW-NEXT: vmovdqu64 %zmm14, {{[-0-9]+}}(%r{{[sb]}}p) # 64-byte Spill
; AVX512DQ-BW-NEXT: vpermi2w %zmm1, %zmm27, %zmm28
; AVX512DQ-BW-NEXT: vpermt2w %zmm1, %zmm0, %zmm27
; AVX512DQ-BW-NEXT: vmovdqa64 (%rdx), %zmm16
; AVX512DQ-BW-NEXT: vmovdqa64 (%rcx), %zmm0
; AVX512DQ-BW-NEXT: vpmovsxbw {{.*#+}} zmm1 = [0,0,4,36,0,0,0,0,0,0,5,37,0,0,0,0,0,0,6,38,0,0,0,0,0,0,7,39,0,0,0,0]
; AVX512DQ-BW-NEXT: vmovdqa64 %zmm16, %zmm20
; AVX512DQ-BW-NEXT: vpermt2w %zmm0, %zmm1, %zmm20
; AVX512DQ-BW-NEXT: vmovdqa64 %zmm1, %zmm2
; AVX512DQ-BW-NEXT: vpmovsxbw {{.*#+}} zmm1 = [0,0,0,32,0,0,0,0,0,0,1,33,0,0,0,0,0,0,2,34,0,0,0,0,0,0,3,35,0,0,0,0]
; AVX512DQ-BW-NEXT: vmovdqa64 %zmm16, %zmm21
; AVX512DQ-BW-NEXT: vpermt2w %zmm0, %zmm1, %zmm21
; AVX512DQ-BW-NEXT: vmovdqa64 %zmm1, %zmm3
; AVX512DQ-BW-NEXT: vpmovsxbw {{.*#+}} zmm1 = [0,0,12,44,0,0,0,0,0,0,13,45,0,0,0,0,0,0,14,46,0,0,0,0,0,0,15,47,0,0,0,0]
; AVX512DQ-BW-NEXT: vmovdqa64 %zmm16, %zmm22
; AVX512DQ-BW-NEXT: vpermt2w %zmm0, %zmm1, %zmm22
; AVX512DQ-BW-NEXT: vmovdqa64 %zmm1, %zmm4
; AVX512DQ-BW-NEXT: vpmovsxbw {{.*#+}} zmm1 = [0,0,8,40,0,0,0,0,0,0,9,41,0,0,0,0,0,0,10,42,0,0,0,0,0,0,11,43,0,0,0,0]
; AVX512DQ-BW-NEXT: vmovdqa64 %zmm16, %zmm23
; AVX512DQ-BW-NEXT: vpermt2w %zmm0, %zmm1, %zmm23
; AVX512DQ-BW-NEXT: vmovdqa64 %zmm1, %zmm6
; AVX512DQ-BW-NEXT: vpmovsxbw {{.*#+}} zmm1 = [0,0,20,52,0,0,0,0,0,0,21,53,0,0,0,0,0,0,22,54,0,0,0,0,0,0,23,55,0,0,0,0]
; AVX512DQ-BW-NEXT: vmovdqa64 %zmm16, %zmm24
; AVX512DQ-BW-NEXT: vpermt2w %zmm0, %zmm1, %zmm24
; AVX512DQ-BW-NEXT: vmovdqa64 %zmm1, %zmm7
; AVX512DQ-BW-NEXT: vpmovsxbw {{.*#+}} zmm29 = [0,0,16,48,0,0,0,0,0,0,17,49,0,0,0,0,0,0,18,50,0,0,0,0,0,0,19,51,0,0,0,0]
; AVX512DQ-BW-NEXT: vmovdqa64 %zmm16, %zmm25
; AVX512DQ-BW-NEXT: vpermt2w %zmm0, %zmm29, %zmm25
; AVX512DQ-BW-NEXT: vpmovsxbw {{.*#+}} zmm30 = [0,0,28,60,0,0,0,0,0,0,29,61,0,0,0,0,0,0,30,62,0,0,0,0,0,0,31,63,0,0,0,0]
; AVX512DQ-BW-NEXT: vmovdqa64 %zmm16, %zmm26
; AVX512DQ-BW-NEXT: vpermt2w %zmm0, %zmm30, %zmm26
; AVX512DQ-BW-NEXT: vpmovsxbw {{.*#+}} zmm1 = [0,0,24,56,0,0,0,0,0,0,25,57,0,0,0,0,0,0,26,58,0,0,0,0,0,0,27,59,0,0,0,0]
; AVX512DQ-BW-NEXT: vpermt2w %zmm0, %zmm1, %zmm16
; AVX512DQ-BW-NEXT: vmovdqa64 64(%rdx), %zmm5
; AVX512DQ-BW-NEXT: vmovdqa64 64(%rcx), %zmm0
; AVX512DQ-BW-NEXT: vpermi2w %zmm0, %zmm5, %zmm2
; AVX512DQ-BW-NEXT: vmovdqu64 %zmm2, {{[-0-9]+}}(%r{{[sb]}}p) # 64-byte Spill
; AVX512DQ-BW-NEXT: vpermi2w %zmm0, %zmm5, %zmm3
; AVX512DQ-BW-NEXT: vmovdqu64 %zmm3, {{[-0-9]+}}(%r{{[sb]}}p) # 64-byte Spill
; AVX512DQ-BW-NEXT: vpermi2w %zmm0, %zmm5, %zmm4
; AVX512DQ-BW-NEXT: vmovdqu64 %zmm4, (%rsp) # 64-byte Spill
; AVX512DQ-BW-NEXT: vpermi2w %zmm0, %zmm5, %zmm6
; AVX512DQ-BW-NEXT: vmovdqu64 %zmm6, {{[-0-9]+}}(%r{{[sb]}}p) # 64-byte Spill
; AVX512DQ-BW-NEXT: vpermi2w %zmm0, %zmm5, %zmm7
; AVX512DQ-BW-NEXT: vmovdqu64 %zmm7, {{[-0-9]+}}(%r{{[sb]}}p) # 64-byte Spill
; AVX512DQ-BW-NEXT: vpermi2w %zmm0, %zmm5, %zmm29
; AVX512DQ-BW-NEXT: vpermi2w %zmm0, %zmm5, %zmm30
; AVX512DQ-BW-NEXT: vpermt2w %zmm0, %zmm1, %zmm5
; AVX512DQ-BW-NEXT: vmovdqa64 (%rdi), %zmm3
; AVX512DQ-BW-NEXT: vmovdqa64 (%rsi), %zmm0
; AVX512DQ-BW-NEXT: vpmovsxbw {{.*#+}} zmm12 = [4,36,0,0,0,0,0,0,5,37,0,0,0,0,0,0,6,38,0,0,0,0,0,0,7,39,0,0,0,0,0,0]
; AVX512DQ-BW-NEXT: vmovdqa64 %zmm3, %zmm18
; AVX512DQ-BW-NEXT: vpermt2w %zmm0, %zmm12, %zmm18
; AVX512DQ-BW-NEXT: vpmovsxbw {{.*#+}} zmm10 = [0,32,0,0,0,0,0,0,1,33,0,0,0,0,0,0,2,34,0,0,0,0,0,0,3,35,0,0,0,0,0,0]
; AVX512DQ-BW-NEXT: vmovdqa64 %zmm3, %zmm17
; AVX512DQ-BW-NEXT: vpermt2w %zmm0, %zmm10, %zmm17
; AVX512DQ-BW-NEXT: vpmovsxbw {{.*#+}} zmm8 = [12,44,0,0,0,0,0,0,13,45,0,0,0,0,0,0,14,46,0,0,0,0,0,0,15,47,0,0,0,0,0,0]
; AVX512DQ-BW-NEXT: vmovdqa64 %zmm3, %zmm15
; AVX512DQ-BW-NEXT: vpermt2w %zmm0, %zmm8, %zmm15
; AVX512DQ-BW-NEXT: vpmovsxbw {{.*#+}} zmm7 = [8,40,0,0,0,0,0,0,9,41,0,0,0,0,0,0,10,42,0,0,0,0,0,0,11,43,0,0,0,0,0,0]
; AVX512DQ-BW-NEXT: vmovdqa64 %zmm3, %zmm14
; AVX512DQ-BW-NEXT: vpermt2w %zmm0, %zmm7, %zmm14
; AVX512DQ-BW-NEXT: vpmovsxbw {{.*#+}} zmm6 = [20,52,0,0,0,0,0,0,21,53,0,0,0,0,0,0,22,54,0,0,0,0,0,0,23,55,0,0,0,0,0,0]
; AVX512DQ-BW-NEXT: vmovdqa64 %zmm3, %zmm13
; AVX512DQ-BW-NEXT: vpermt2w %zmm0, %zmm6, %zmm13
; AVX512DQ-BW-NEXT: vpmovsxbw {{.*#+}} zmm4 = [16,48,0,0,0,0,0,0,17,49,0,0,0,0,0,0,18,50,0,0,0,0,0,0,19,51,0,0,0,0,0,0]
; AVX512DQ-BW-NEXT: vmovdqa64 %zmm3, %zmm11
; AVX512DQ-BW-NEXT: vpermt2w %zmm0, %zmm4, %zmm11
; AVX512DQ-BW-NEXT: vpmovsxbw {{.*#+}} zmm2 = [28,60,0,0,0,0,0,0,29,61,0,0,0,0,0,0,30,62,0,0,0,0,0,0,31,63,0,0,0,0,0,0]
; AVX512DQ-BW-NEXT: vmovdqa64 %zmm3, %zmm9
; AVX512DQ-BW-NEXT: vpermt2w %zmm0, %zmm2, %zmm9
; AVX512DQ-BW-NEXT: vpmovsxbw {{.*#+}} zmm19 = [24,56,0,0,0,0,0,0,25,57,0,0,0,0,0,0,26,58,0,0,0,0,0,0,27,59,0,0,0,0,0,0]
; AVX512DQ-BW-NEXT: vpermt2w %zmm0, %zmm19, %zmm3
; AVX512DQ-BW-NEXT: vmovdqa64 64(%rdi), %zmm1
; AVX512DQ-BW-NEXT: vmovdqa64 64(%rsi), %zmm0
; AVX512DQ-BW-NEXT: vpermi2w %zmm0, %zmm1, %zmm12
; AVX512DQ-BW-NEXT: vpermi2w %zmm0, %zmm1, %zmm10
; AVX512DQ-BW-NEXT: vpermi2w %zmm0, %zmm1, %zmm8
; AVX512DQ-BW-NEXT: vpermi2w %zmm0, %zmm1, %zmm7
; AVX512DQ-BW-NEXT: vpermi2w %zmm0, %zmm1, %zmm6
; AVX512DQ-BW-NEXT: vpermi2w %zmm0, %zmm1, %zmm4
; AVX512DQ-BW-NEXT: vpermi2w %zmm0, %zmm1, %zmm2
; AVX512DQ-BW-NEXT: vpermt2w %zmm0, %zmm19, %zmm1
; AVX512DQ-BW-NEXT: movw $-30584, %ax # imm = 0x8888
; AVX512DQ-BW-NEXT: kmovd %eax, %k1
; AVX512DQ-BW-NEXT: vmovdqu64 {{[-0-9]+}}(%r{{[sb]}}p), %zmm0 # 64-byte Reload
; AVX512DQ-BW-NEXT: vmovdqu64 {{[-0-9]+}}(%r{{[sb]}}p), %zmm19 # 64-byte Reload
; AVX512DQ-BW-NEXT: vmovdqa32 %zmm19, %zmm0 {%k1}
; AVX512DQ-BW-NEXT: movw $8738, %ax # imm = 0x2222
; AVX512DQ-BW-NEXT: kmovd %eax, %k2
; AVX512DQ-BW-NEXT: vmovdqa32 %zmm20, %zmm18 {%k2}
; AVX512DQ-BW-NEXT: movb $-86, %al
; AVX512DQ-BW-NEXT: kmovd %eax, %k3
; AVX512DQ-BW-NEXT: vmovdqa64 %zmm0, %zmm18 {%k3}
; AVX512DQ-BW-NEXT: vmovdqu64 {{[-0-9]+}}(%r{{[sb]}}p), %zmm0 # 64-byte Reload
; AVX512DQ-BW-NEXT: vmovdqu64 {{[-0-9]+}}(%r{{[sb]}}p), %zmm19 # 64-byte Reload
; AVX512DQ-BW-NEXT: vmovdqa32 %zmm0, %zmm19 {%k1}
; AVX512DQ-BW-NEXT: vmovdqa32 %zmm21, %zmm17 {%k2}
; AVX512DQ-BW-NEXT: vmovdqa64 %zmm19, %zmm17 {%k3}
; AVX512DQ-BW-NEXT: vmovdqu64 {{[-0-9]+}}(%r{{[sb]}}p), %zmm0 # 64-byte Reload
; AVX512DQ-BW-NEXT: vmovdqu64 {{[-0-9]+}}(%r{{[sb]}}p), %zmm19 # 64-byte Reload
; AVX512DQ-BW-NEXT: vmovdqa32 %zmm0, %zmm19 {%k1}
; AVX512DQ-BW-NEXT: vmovdqa32 %zmm22, %zmm15 {%k2}
; AVX512DQ-BW-NEXT: vmovdqa64 %zmm19, %zmm15 {%k3}
; AVX512DQ-BW-NEXT: vmovdqu64 {{[-0-9]+}}(%r{{[sb]}}p), %zmm0 # 64-byte Reload
; AVX512DQ-BW-NEXT: vmovdqu64 {{[-0-9]+}}(%r{{[sb]}}p), %zmm19 # 64-byte Reload
; AVX512DQ-BW-NEXT: vmovdqa32 %zmm0, %zmm19 {%k1}
; AVX512DQ-BW-NEXT: vmovdqa32 %zmm23, %zmm14 {%k2}
; AVX512DQ-BW-NEXT: vmovdqa64 %zmm19, %zmm14 {%k3}
; AVX512DQ-BW-NEXT: vmovdqu64 {{[-0-9]+}}(%r{{[sb]}}p), %zmm0 # 64-byte Reload
; AVX512DQ-BW-NEXT: vmovdqu64 {{[-0-9]+}}(%r{{[sb]}}p), %zmm19 # 64-byte Reload
; AVX512DQ-BW-NEXT: vmovdqa32 %zmm0, %zmm19 {%k1}
; AVX512DQ-BW-NEXT: vmovdqa32 %zmm24, %zmm13 {%k2}
; AVX512DQ-BW-NEXT: vmovdqa64 %zmm19, %zmm13 {%k3}
; AVX512DQ-BW-NEXT: vmovdqu64 {{[-0-9]+}}(%r{{[sb]}}p), %zmm0 # 64-byte Reload
; AVX512DQ-BW-NEXT: vmovdqu64 {{[-0-9]+}}(%r{{[sb]}}p), %zmm19 # 64-byte Reload
; AVX512DQ-BW-NEXT: vmovdqa32 %zmm0, %zmm19 {%k1}
; AVX512DQ-BW-NEXT: vmovdqa32 %zmm25, %zmm11 {%k2}
; AVX512DQ-BW-NEXT: vmovdqa64 %zmm19, %zmm11 {%k3}
; AVX512DQ-BW-NEXT: vmovdqu64 {{[-0-9]+}}(%r{{[sb]}}p), %zmm0 # 64-byte Reload
; AVX512DQ-BW-NEXT: vmovdqa32 %zmm0, %zmm31 {%k1}
; AVX512DQ-BW-NEXT: vmovdqa32 %zmm26, %zmm9 {%k2}
; AVX512DQ-BW-NEXT: vmovdqa64 %zmm31, %zmm9 {%k3}
; AVX512DQ-BW-NEXT: vmovdqu64 {{[-0-9]+}}(%r{{[sb]}}p), %zmm0 # 64-byte Reload
; AVX512DQ-BW-NEXT: vmovdqu64 {{[-0-9]+}}(%r{{[sb]}}p), %zmm19 # 64-byte Reload
; AVX512DQ-BW-NEXT: vmovdqa32 %zmm19, %zmm0 {%k1}
; AVX512DQ-BW-NEXT: vmovdqa32 %zmm16, %zmm3 {%k2}
; AVX512DQ-BW-NEXT: vmovdqa64 %zmm0, %zmm3 {%k3}
; AVX512DQ-BW-NEXT: vmovdqu64 {{[-0-9]+}}(%r{{[sb]}}p), %zmm0 # 64-byte Reload
; AVX512DQ-BW-NEXT: vmovdqu64 {{[-0-9]+}}(%r{{[sb]}}p), %zmm16 # 64-byte Reload
; AVX512DQ-BW-NEXT: vmovdqa32 %zmm16, %zmm0 {%k1}
; AVX512DQ-BW-NEXT: vmovdqu64 {{[-0-9]+}}(%r{{[sb]}}p), %zmm16 # 64-byte Reload
; AVX512DQ-BW-NEXT: vmovdqa32 %zmm16, %zmm12 {%k2}
; AVX512DQ-BW-NEXT: vmovdqa64 %zmm0, %zmm12 {%k3}
; AVX512DQ-BW-NEXT: vmovdqu64 {{[-0-9]+}}(%r{{[sb]}}p), %zmm0 # 64-byte Reload
; AVX512DQ-BW-NEXT: vmovdqu64 {{[-0-9]+}}(%r{{[sb]}}p), %zmm16 # 64-byte Reload
; AVX512DQ-BW-NEXT: vmovdqa32 %zmm16, %zmm0 {%k1}
; AVX512DQ-BW-NEXT: vmovdqu64 {{[-0-9]+}}(%r{{[sb]}}p), %zmm16 # 64-byte Reload
; AVX512DQ-BW-NEXT: vmovdqa32 %zmm16, %zmm10 {%k2}
; AVX512DQ-BW-NEXT: vmovdqa64 %zmm0, %zmm10 {%k3}
; AVX512DQ-BW-NEXT: vmovdqu64 {{[-0-9]+}}(%r{{[sb]}}p), %zmm0 # 64-byte Reload
; AVX512DQ-BW-NEXT: vmovdqu64 {{[-0-9]+}}(%r{{[sb]}}p), %zmm16 # 64-byte Reload
; AVX512DQ-BW-NEXT: vmovdqa32 %zmm16, %zmm0 {%k1}
; AVX512DQ-BW-NEXT: vmovdqu64 (%rsp), %zmm16 # 64-byte Reload
; AVX512DQ-BW-NEXT: vmovdqa32 %zmm16, %zmm8 {%k2}
; AVX512DQ-BW-NEXT: vmovdqa64 %zmm0, %zmm8 {%k3}
; AVX512DQ-BW-NEXT: vmovdqu64 {{[-0-9]+}}(%r{{[sb]}}p), %zmm0 # 64-byte Reload
; AVX512DQ-BW-NEXT: vmovdqu64 {{[-0-9]+}}(%r{{[sb]}}p), %zmm16 # 64-byte Reload
; AVX512DQ-BW-NEXT: vmovdqa32 %zmm16, %zmm0 {%k1}
; AVX512DQ-BW-NEXT: vmovdqu64 {{[-0-9]+}}(%r{{[sb]}}p), %zmm16 # 64-byte Reload
; AVX512DQ-BW-NEXT: vmovdqa32 %zmm16, %zmm7 {%k2}
; AVX512DQ-BW-NEXT: vmovdqa64 %zmm0, %zmm7 {%k3}
; AVX512DQ-BW-NEXT: vmovdqu64 {{[-0-9]+}}(%r{{[sb]}}p), %zmm0 # 64-byte Reload
; AVX512DQ-BW-NEXT: vmovdqu64 {{[-0-9]+}}(%r{{[sb]}}p), %zmm16 # 64-byte Reload
; AVX512DQ-BW-NEXT: vmovdqa32 %zmm16, %zmm0 {%k1}
; AVX512DQ-BW-NEXT: vmovdqu64 {{[-0-9]+}}(%r{{[sb]}}p), %zmm16 # 64-byte Reload
; AVX512DQ-BW-NEXT: vmovdqa32 %zmm16, %zmm6 {%k2}
; AVX512DQ-BW-NEXT: vmovdqa64 %zmm0, %zmm6 {%k3}
; AVX512DQ-BW-NEXT: vmovdqu64 {{[-0-9]+}}(%r{{[sb]}}p), %zmm0 # 64-byte Reload
; AVX512DQ-BW-NEXT: vmovdqu64 {{[-0-9]+}}(%r{{[sb]}}p), %zmm16 # 64-byte Reload
; AVX512DQ-BW-NEXT: vmovdqa32 %zmm16, %zmm0 {%k1}
; AVX512DQ-BW-NEXT: vmovdqa32 %zmm29, %zmm4 {%k2}
; AVX512DQ-BW-NEXT: vmovdqa64 %zmm0, %zmm4 {%k3}
; AVX512DQ-BW-NEXT: vmovdqu64 {{[-0-9]+}}(%r{{[sb]}}p), %zmm0 # 64-byte Reload
; AVX512DQ-BW-NEXT: vmovdqa32 %zmm0, %zmm28 {%k1}
; AVX512DQ-BW-NEXT: vmovdqa32 %zmm30, %zmm2 {%k2}
; AVX512DQ-BW-NEXT: vmovdqa64 %zmm28, %zmm2 {%k3}
; AVX512DQ-BW-NEXT: vmovdqu64 {{[-0-9]+}}(%r{{[sb]}}p), %zmm0 # 64-byte Reload
; AVX512DQ-BW-NEXT: vmovdqa32 %zmm0, %zmm27 {%k1}
; AVX512DQ-BW-NEXT: vmovdqa32 %zmm5, %zmm1 {%k2}
; AVX512DQ-BW-NEXT: vmovdqa64 %zmm27, %zmm1 {%k3}
; AVX512DQ-BW-NEXT: movq {{[0-9]+}}(%rsp), %rax
; AVX512DQ-BW-NEXT: vmovdqa64 %zmm1, 896(%rax)
; AVX512DQ-BW-NEXT: vmovdqa64 %zmm2, 960(%rax)
; AVX512DQ-BW-NEXT: vmovdqa64 %zmm4, 768(%rax)
; AVX512DQ-BW-NEXT: vmovdqa64 %zmm6, 832(%rax)
; AVX512DQ-BW-NEXT: vmovdqa64 %zmm7, 640(%rax)
; AVX512DQ-BW-NEXT: vmovdqa64 %zmm8, 704(%rax)
; AVX512DQ-BW-NEXT: vmovdqa64 %zmm10, 512(%rax)
; AVX512DQ-BW-NEXT: vmovdqa64 %zmm12, 576(%rax)
; AVX512DQ-BW-NEXT: vmovdqa64 %zmm3, 384(%rax)
; AVX512DQ-BW-NEXT: vmovdqa64 %zmm9, 448(%rax)
; AVX512DQ-BW-NEXT: vmovdqa64 %zmm11, 256(%rax)
; AVX512DQ-BW-NEXT: vmovdqa64 %zmm13, 320(%rax)
; AVX512DQ-BW-NEXT: vmovdqa64 %zmm14, 128(%rax)
; AVX512DQ-BW-NEXT: vmovdqa64 %zmm15, 192(%rax)
; AVX512DQ-BW-NEXT: vmovdqa64 %zmm17, (%rax)
; AVX512DQ-BW-NEXT: vmovdqa64 %zmm18, 64(%rax)
; AVX512DQ-BW-NEXT: addq $2056, %rsp # imm = 0x808
; AVX512DQ-BW-NEXT: vzeroupper
; AVX512DQ-BW-NEXT: retq
;
; AVX512DQ-BW-FCP-LABEL: store_i16_stride8_vf64:
; AVX512DQ-BW-FCP: # %bb.0:
; AVX512DQ-BW-FCP-NEXT: subq $2056, %rsp # imm = 0x808
; AVX512DQ-BW-FCP-NEXT: movq {{[0-9]+}}(%rsp), %rax
; AVX512DQ-BW-FCP-NEXT: movq {{[0-9]+}}(%rsp), %r10
; AVX512DQ-BW-FCP-NEXT: vmovdqa64 (%r8), %zmm1
; AVX512DQ-BW-FCP-NEXT: vmovdqa64 (%r9), %zmm27
; AVX512DQ-BW-FCP-NEXT: vmovdqa64 (%r10), %zmm2
; AVX512DQ-BW-FCP-NEXT: vmovdqa64 64(%r10), %zmm0
; AVX512DQ-BW-FCP-NEXT: vmovdqa64 (%rax), %zmm30
; AVX512DQ-BW-FCP-NEXT: vmovdqa64 64(%rax), %zmm28
; AVX512DQ-BW-FCP-NEXT: vpmovsxbw {{.*#+}} zmm3 = [0,0,0,0,0,0,4,36,0,0,0,0,0,0,5,37,0,0,0,0,0,0,6,38,0,0,0,0,0,0,7,39]
; AVX512DQ-BW-FCP-NEXT: vmovdqa64 %zmm2, %zmm5
; AVX512DQ-BW-FCP-NEXT: vmovdqa64 %zmm2, %zmm4
; AVX512DQ-BW-FCP-NEXT: vpermt2w %zmm30, %zmm3, %zmm5
; AVX512DQ-BW-FCP-NEXT: vmovdqu64 %zmm5, {{[-0-9]+}}(%r{{[sb]}}p) # 64-byte Spill
; AVX512DQ-BW-FCP-NEXT: vpmovsxbw {{.*#+}} zmm2 = [0,0,0,0,4,36,0,0,0,0,0,0,5,37,0,0,0,0,0,0,6,38,0,0,0,0,0,0,7,39,0,0]
; AVX512DQ-BW-FCP-NEXT: vmovdqa64 %zmm1, %zmm5
; AVX512DQ-BW-FCP-NEXT: vpermt2w %zmm27, %zmm2, %zmm5
; AVX512DQ-BW-FCP-NEXT: vmovdqu64 %zmm5, {{[-0-9]+}}(%r{{[sb]}}p) # 64-byte Spill
; AVX512DQ-BW-FCP-NEXT: vpmovsxbw {{.*#+}} zmm5 = [0,0,0,0,0,0,0,32,0,0,0,0,0,0,1,33,0,0,0,0,0,0,2,34,0,0,0,0,0,0,3,35]
; AVX512DQ-BW-FCP-NEXT: vmovdqa64 %zmm4, %zmm6
; AVX512DQ-BW-FCP-NEXT: vpermt2w %zmm30, %zmm5, %zmm6
; AVX512DQ-BW-FCP-NEXT: vmovdqu64 %zmm6, {{[-0-9]+}}(%r{{[sb]}}p) # 64-byte Spill
; AVX512DQ-BW-FCP-NEXT: vpmovsxbw {{.*#+}} zmm6 = [0,0,0,0,0,32,0,0,0,0,0,0,1,33,0,0,0,0,0,0,2,34,0,0,0,0,0,0,3,35,0,0]
; AVX512DQ-BW-FCP-NEXT: vmovdqa64 %zmm1, %zmm7
; AVX512DQ-BW-FCP-NEXT: vpermt2w %zmm27, %zmm6, %zmm7
; AVX512DQ-BW-FCP-NEXT: vmovdqu64 %zmm7, {{[-0-9]+}}(%r{{[sb]}}p) # 64-byte Spill
; AVX512DQ-BW-FCP-NEXT: vpmovsxbw {{.*#+}} zmm7 = [0,0,0,0,0,0,12,44,0,0,0,0,0,0,13,45,0,0,0,0,0,0,14,46,0,0,0,0,0,0,15,47]
; AVX512DQ-BW-FCP-NEXT: vmovdqa64 %zmm4, %zmm8
; AVX512DQ-BW-FCP-NEXT: vpermt2w %zmm30, %zmm7, %zmm8
; AVX512DQ-BW-FCP-NEXT: vmovdqu64 %zmm8, {{[-0-9]+}}(%r{{[sb]}}p) # 64-byte Spill
; AVX512DQ-BW-FCP-NEXT: vpmovsxbw {{.*#+}} zmm8 = [0,0,0,0,12,44,0,0,0,0,0,0,13,45,0,0,0,0,0,0,14,46,0,0,0,0,0,0,15,47,0,0]
; AVX512DQ-BW-FCP-NEXT: vmovdqa64 %zmm1, %zmm9
; AVX512DQ-BW-FCP-NEXT: vpermt2w %zmm27, %zmm8, %zmm9
; AVX512DQ-BW-FCP-NEXT: vmovdqu64 %zmm9, {{[-0-9]+}}(%r{{[sb]}}p) # 64-byte Spill
; AVX512DQ-BW-FCP-NEXT: vpmovsxbw {{.*#+}} zmm9 = [0,0,0,0,0,0,8,40,0,0,0,0,0,0,9,41,0,0,0,0,0,0,10,42,0,0,0,0,0,0,11,43]
; AVX512DQ-BW-FCP-NEXT: vmovdqa64 %zmm4, %zmm10
; AVX512DQ-BW-FCP-NEXT: vpermt2w %zmm30, %zmm9, %zmm10
; AVX512DQ-BW-FCP-NEXT: vmovdqu64 %zmm10, {{[-0-9]+}}(%r{{[sb]}}p) # 64-byte Spill
; AVX512DQ-BW-FCP-NEXT: vpmovsxbw {{.*#+}} zmm10 = [0,0,0,0,8,40,0,0,0,0,0,0,9,41,0,0,0,0,0,0,10,42,0,0,0,0,0,0,11,43,0,0]
; AVX512DQ-BW-FCP-NEXT: vmovdqa64 %zmm1, %zmm11
; AVX512DQ-BW-FCP-NEXT: vpermt2w %zmm27, %zmm10, %zmm11
; AVX512DQ-BW-FCP-NEXT: vmovdqu64 %zmm11, {{[-0-9]+}}(%r{{[sb]}}p) # 64-byte Spill
; AVX512DQ-BW-FCP-NEXT: vpmovsxbw {{.*#+}} zmm11 = [0,0,0,0,0,0,20,52,0,0,0,0,0,0,21,53,0,0,0,0,0,0,22,54,0,0,0,0,0,0,23,55]
; AVX512DQ-BW-FCP-NEXT: vmovdqa64 %zmm4, %zmm12
; AVX512DQ-BW-FCP-NEXT: vpermt2w %zmm30, %zmm11, %zmm12
; AVX512DQ-BW-FCP-NEXT: vmovdqu64 %zmm12, {{[-0-9]+}}(%r{{[sb]}}p) # 64-byte Spill
; AVX512DQ-BW-FCP-NEXT: vpmovsxbw {{.*#+}} zmm12 = [0,0,0,0,20,52,0,0,0,0,0,0,21,53,0,0,0,0,0,0,22,54,0,0,0,0,0,0,23,55,0,0]
; AVX512DQ-BW-FCP-NEXT: vmovdqa64 %zmm1, %zmm13
; AVX512DQ-BW-FCP-NEXT: vpermt2w %zmm27, %zmm12, %zmm13
; AVX512DQ-BW-FCP-NEXT: vmovdqu64 %zmm13, {{[-0-9]+}}(%r{{[sb]}}p) # 64-byte Spill
; AVX512DQ-BW-FCP-NEXT: vpmovsxbw {{.*#+}} zmm13 = [0,0,0,0,0,0,16,48,0,0,0,0,0,0,17,49,0,0,0,0,0,0,18,50,0,0,0,0,0,0,19,51]
; AVX512DQ-BW-FCP-NEXT: vmovdqa64 %zmm4, %zmm14
; AVX512DQ-BW-FCP-NEXT: vpermt2w %zmm30, %zmm13, %zmm14
; AVX512DQ-BW-FCP-NEXT: vmovdqu64 %zmm14, {{[-0-9]+}}(%r{{[sb]}}p) # 64-byte Spill
; AVX512DQ-BW-FCP-NEXT: vpmovsxbw {{.*#+}} zmm14 = [0,0,0,0,16,48,0,0,0,0,0,0,17,49,0,0,0,0,0,0,18,50,0,0,0,0,0,0,19,51,0,0]
; AVX512DQ-BW-FCP-NEXT: vpmovsxbw {{.*#+}} zmm15 = [0,0,0,0,0,0,28,60,0,0,0,0,0,0,29,61,0,0,0,0,0,0,30,62,0,0,0,0,0,0,31,63]
; AVX512DQ-BW-FCP-NEXT: vmovdqa64 %zmm4, %zmm16
; AVX512DQ-BW-FCP-NEXT: vpermt2w %zmm30, %zmm15, %zmm16
; AVX512DQ-BW-FCP-NEXT: vmovdqu64 %zmm16, {{[-0-9]+}}(%r{{[sb]}}p) # 64-byte Spill
; AVX512DQ-BW-FCP-NEXT: vpmovsxbw {{.*#+}} zmm31 = [0,0,0,0,0,0,24,56,0,0,0,0,0,0,25,57,0,0,0,0,0,0,26,58,0,0,0,0,0,0,27,59]
; AVX512DQ-BW-FCP-NEXT: vpermt2w %zmm30, %zmm31, %zmm4
; AVX512DQ-BW-FCP-NEXT: vmovdqu64 %zmm4, {{[-0-9]+}}(%r{{[sb]}}p) # 64-byte Spill
; AVX512DQ-BW-FCP-NEXT: vmovdqa64 %zmm1, %zmm4
; AVX512DQ-BW-FCP-NEXT: vpermt2w %zmm27, %zmm14, %zmm4
; AVX512DQ-BW-FCP-NEXT: vmovdqu64 %zmm4, {{[-0-9]+}}(%r{{[sb]}}p) # 64-byte Spill
; AVX512DQ-BW-FCP-NEXT: vpermi2w %zmm28, %zmm0, %zmm3
; AVX512DQ-BW-FCP-NEXT: vmovdqu64 %zmm3, {{[-0-9]+}}(%r{{[sb]}}p) # 64-byte Spill
; AVX512DQ-BW-FCP-NEXT: vpermi2w %zmm28, %zmm0, %zmm5
; AVX512DQ-BW-FCP-NEXT: vmovdqu64 %zmm5, {{[-0-9]+}}(%r{{[sb]}}p) # 64-byte Spill
; AVX512DQ-BW-FCP-NEXT: vpermi2w %zmm28, %zmm0, %zmm7
; AVX512DQ-BW-FCP-NEXT: vmovdqu64 %zmm7, {{[-0-9]+}}(%r{{[sb]}}p) # 64-byte Spill
; AVX512DQ-BW-FCP-NEXT: vpermi2w %zmm28, %zmm0, %zmm9
; AVX512DQ-BW-FCP-NEXT: vmovdqu64 %zmm9, {{[-0-9]+}}(%r{{[sb]}}p) # 64-byte Spill
; AVX512DQ-BW-FCP-NEXT: vpermi2w %zmm28, %zmm0, %zmm11
; AVX512DQ-BW-FCP-NEXT: vmovdqu64 %zmm11, {{[-0-9]+}}(%r{{[sb]}}p) # 64-byte Spill
; AVX512DQ-BW-FCP-NEXT: vpermi2w %zmm28, %zmm0, %zmm13
; AVX512DQ-BW-FCP-NEXT: vmovdqu64 %zmm13, {{[-0-9]+}}(%r{{[sb]}}p) # 64-byte Spill
; AVX512DQ-BW-FCP-NEXT: vpermi2w %zmm28, %zmm0, %zmm15
; AVX512DQ-BW-FCP-NEXT: vmovdqu64 %zmm15, {{[-0-9]+}}(%r{{[sb]}}p) # 64-byte Spill
; AVX512DQ-BW-FCP-NEXT: vpermt2w %zmm28, %zmm31, %zmm0
; AVX512DQ-BW-FCP-NEXT: vmovdqu64 %zmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 64-byte Spill
; AVX512DQ-BW-FCP-NEXT: vpmovsxbw {{.*#+}} zmm28 = [0,0,0,0,28,60,0,0,0,0,0,0,29,61,0,0,0,0,0,0,30,62,0,0,0,0,0,0,31,63,0,0]
; AVX512DQ-BW-FCP-NEXT: vmovdqa64 %zmm1, %zmm31
; AVX512DQ-BW-FCP-NEXT: vpermt2w %zmm27, %zmm28, %zmm31
; AVX512DQ-BW-FCP-NEXT: vpmovsxbw {{.*#+}} zmm0 = [0,0,0,0,24,56,0,0,0,0,0,0,25,57,0,0,0,0,0,0,26,58,0,0,0,0,0,0,27,59,0,0]
; AVX512DQ-BW-FCP-NEXT: vpermt2w %zmm27, %zmm0, %zmm1
; AVX512DQ-BW-FCP-NEXT: vmovdqu64 %zmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 64-byte Spill
; AVX512DQ-BW-FCP-NEXT: vmovdqa64 64(%r8), %zmm27
; AVX512DQ-BW-FCP-NEXT: vmovdqa64 64(%r9), %zmm1
; AVX512DQ-BW-FCP-NEXT: vpermi2w %zmm1, %zmm27, %zmm2
; AVX512DQ-BW-FCP-NEXT: vmovdqu64 %zmm2, {{[-0-9]+}}(%r{{[sb]}}p) # 64-byte Spill
; AVX512DQ-BW-FCP-NEXT: vpermi2w %zmm1, %zmm27, %zmm6
; AVX512DQ-BW-FCP-NEXT: vmovdqu64 %zmm6, {{[-0-9]+}}(%r{{[sb]}}p) # 64-byte Spill
; AVX512DQ-BW-FCP-NEXT: vpermi2w %zmm1, %zmm27, %zmm8
; AVX512DQ-BW-FCP-NEXT: vmovdqu64 %zmm8, {{[-0-9]+}}(%r{{[sb]}}p) # 64-byte Spill
; AVX512DQ-BW-FCP-NEXT: vpermi2w %zmm1, %zmm27, %zmm10
; AVX512DQ-BW-FCP-NEXT: vmovdqu64 %zmm10, {{[-0-9]+}}(%r{{[sb]}}p) # 64-byte Spill
; AVX512DQ-BW-FCP-NEXT: vpermi2w %zmm1, %zmm27, %zmm12
; AVX512DQ-BW-FCP-NEXT: vmovdqu64 %zmm12, {{[-0-9]+}}(%r{{[sb]}}p) # 64-byte Spill
; AVX512DQ-BW-FCP-NEXT: vpermi2w %zmm1, %zmm27, %zmm14
; AVX512DQ-BW-FCP-NEXT: vmovdqu64 %zmm14, {{[-0-9]+}}(%r{{[sb]}}p) # 64-byte Spill
; AVX512DQ-BW-FCP-NEXT: vpermi2w %zmm1, %zmm27, %zmm28
; AVX512DQ-BW-FCP-NEXT: vpermt2w %zmm1, %zmm0, %zmm27
; AVX512DQ-BW-FCP-NEXT: vmovdqa64 (%rdx), %zmm16
; AVX512DQ-BW-FCP-NEXT: vmovdqa64 (%rcx), %zmm0
; AVX512DQ-BW-FCP-NEXT: vpmovsxbw {{.*#+}} zmm1 = [0,0,4,36,0,0,0,0,0,0,5,37,0,0,0,0,0,0,6,38,0,0,0,0,0,0,7,39,0,0,0,0]
; AVX512DQ-BW-FCP-NEXT: vmovdqa64 %zmm16, %zmm20
; AVX512DQ-BW-FCP-NEXT: vpermt2w %zmm0, %zmm1, %zmm20
; AVX512DQ-BW-FCP-NEXT: vmovdqa64 %zmm1, %zmm2
; AVX512DQ-BW-FCP-NEXT: vpmovsxbw {{.*#+}} zmm1 = [0,0,0,32,0,0,0,0,0,0,1,33,0,0,0,0,0,0,2,34,0,0,0,0,0,0,3,35,0,0,0,0]
; AVX512DQ-BW-FCP-NEXT: vmovdqa64 %zmm16, %zmm21
; AVX512DQ-BW-FCP-NEXT: vpermt2w %zmm0, %zmm1, %zmm21
; AVX512DQ-BW-FCP-NEXT: vmovdqa64 %zmm1, %zmm3
; AVX512DQ-BW-FCP-NEXT: vpmovsxbw {{.*#+}} zmm1 = [0,0,12,44,0,0,0,0,0,0,13,45,0,0,0,0,0,0,14,46,0,0,0,0,0,0,15,47,0,0,0,0]
; AVX512DQ-BW-FCP-NEXT: vmovdqa64 %zmm16, %zmm22
; AVX512DQ-BW-FCP-NEXT: vpermt2w %zmm0, %zmm1, %zmm22
; AVX512DQ-BW-FCP-NEXT: vmovdqa64 %zmm1, %zmm4
; AVX512DQ-BW-FCP-NEXT: vpmovsxbw {{.*#+}} zmm1 = [0,0,8,40,0,0,0,0,0,0,9,41,0,0,0,0,0,0,10,42,0,0,0,0,0,0,11,43,0,0,0,0]
; AVX512DQ-BW-FCP-NEXT: vmovdqa64 %zmm16, %zmm23
; AVX512DQ-BW-FCP-NEXT: vpermt2w %zmm0, %zmm1, %zmm23
; AVX512DQ-BW-FCP-NEXT: vmovdqa64 %zmm1, %zmm6
; AVX512DQ-BW-FCP-NEXT: vpmovsxbw {{.*#+}} zmm1 = [0,0,20,52,0,0,0,0,0,0,21,53,0,0,0,0,0,0,22,54,0,0,0,0,0,0,23,55,0,0,0,0]
; AVX512DQ-BW-FCP-NEXT: vmovdqa64 %zmm16, %zmm24
; AVX512DQ-BW-FCP-NEXT: vpermt2w %zmm0, %zmm1, %zmm24
; AVX512DQ-BW-FCP-NEXT: vmovdqa64 %zmm1, %zmm7
; AVX512DQ-BW-FCP-NEXT: vpmovsxbw {{.*#+}} zmm29 = [0,0,16,48,0,0,0,0,0,0,17,49,0,0,0,0,0,0,18,50,0,0,0,0,0,0,19,51,0,0,0,0]
; AVX512DQ-BW-FCP-NEXT: vmovdqa64 %zmm16, %zmm25
; AVX512DQ-BW-FCP-NEXT: vpermt2w %zmm0, %zmm29, %zmm25
; AVX512DQ-BW-FCP-NEXT: vpmovsxbw {{.*#+}} zmm30 = [0,0,28,60,0,0,0,0,0,0,29,61,0,0,0,0,0,0,30,62,0,0,0,0,0,0,31,63,0,0,0,0]
; AVX512DQ-BW-FCP-NEXT: vmovdqa64 %zmm16, %zmm26
; AVX512DQ-BW-FCP-NEXT: vpermt2w %zmm0, %zmm30, %zmm26
; AVX512DQ-BW-FCP-NEXT: vpmovsxbw {{.*#+}} zmm1 = [0,0,24,56,0,0,0,0,0,0,25,57,0,0,0,0,0,0,26,58,0,0,0,0,0,0,27,59,0,0,0,0]
; AVX512DQ-BW-FCP-NEXT: vpermt2w %zmm0, %zmm1, %zmm16
; AVX512DQ-BW-FCP-NEXT: vmovdqa64 64(%rdx), %zmm5
; AVX512DQ-BW-FCP-NEXT: vmovdqa64 64(%rcx), %zmm0
; AVX512DQ-BW-FCP-NEXT: vpermi2w %zmm0, %zmm5, %zmm2
; AVX512DQ-BW-FCP-NEXT: vmovdqu64 %zmm2, {{[-0-9]+}}(%r{{[sb]}}p) # 64-byte Spill
; AVX512DQ-BW-FCP-NEXT: vpermi2w %zmm0, %zmm5, %zmm3
; AVX512DQ-BW-FCP-NEXT: vmovdqu64 %zmm3, {{[-0-9]+}}(%r{{[sb]}}p) # 64-byte Spill
; AVX512DQ-BW-FCP-NEXT: vpermi2w %zmm0, %zmm5, %zmm4
; AVX512DQ-BW-FCP-NEXT: vmovdqu64 %zmm4, (%rsp) # 64-byte Spill
; AVX512DQ-BW-FCP-NEXT: vpermi2w %zmm0, %zmm5, %zmm6
; AVX512DQ-BW-FCP-NEXT: vmovdqu64 %zmm6, {{[-0-9]+}}(%r{{[sb]}}p) # 64-byte Spill
; AVX512DQ-BW-FCP-NEXT: vpermi2w %zmm0, %zmm5, %zmm7
; AVX512DQ-BW-FCP-NEXT: vmovdqu64 %zmm7, {{[-0-9]+}}(%r{{[sb]}}p) # 64-byte Spill
; AVX512DQ-BW-FCP-NEXT: vpermi2w %zmm0, %zmm5, %zmm29
; AVX512DQ-BW-FCP-NEXT: vpermi2w %zmm0, %zmm5, %zmm30
; AVX512DQ-BW-FCP-NEXT: vpermt2w %zmm0, %zmm1, %zmm5
; AVX512DQ-BW-FCP-NEXT: vmovdqa64 (%rdi), %zmm3
; AVX512DQ-BW-FCP-NEXT: vmovdqa64 (%rsi), %zmm0
; AVX512DQ-BW-FCP-NEXT: vpmovsxbw {{.*#+}} zmm12 = [4,36,0,0,0,0,0,0,5,37,0,0,0,0,0,0,6,38,0,0,0,0,0,0,7,39,0,0,0,0,0,0]
; AVX512DQ-BW-FCP-NEXT: vmovdqa64 %zmm3, %zmm18
; AVX512DQ-BW-FCP-NEXT: vpermt2w %zmm0, %zmm12, %zmm18
; AVX512DQ-BW-FCP-NEXT: vpmovsxbw {{.*#+}} zmm10 = [0,32,0,0,0,0,0,0,1,33,0,0,0,0,0,0,2,34,0,0,0,0,0,0,3,35,0,0,0,0,0,0]
; AVX512DQ-BW-FCP-NEXT: vmovdqa64 %zmm3, %zmm17
; AVX512DQ-BW-FCP-NEXT: vpermt2w %zmm0, %zmm10, %zmm17
; AVX512DQ-BW-FCP-NEXT: vpmovsxbw {{.*#+}} zmm8 = [12,44,0,0,0,0,0,0,13,45,0,0,0,0,0,0,14,46,0,0,0,0,0,0,15,47,0,0,0,0,0,0]
; AVX512DQ-BW-FCP-NEXT: vmovdqa64 %zmm3, %zmm15
; AVX512DQ-BW-FCP-NEXT: vpermt2w %zmm0, %zmm8, %zmm15
; AVX512DQ-BW-FCP-NEXT: vpmovsxbw {{.*#+}} zmm7 = [8,40,0,0,0,0,0,0,9,41,0,0,0,0,0,0,10,42,0,0,0,0,0,0,11,43,0,0,0,0,0,0]
; AVX512DQ-BW-FCP-NEXT: vmovdqa64 %zmm3, %zmm14
; AVX512DQ-BW-FCP-NEXT: vpermt2w %zmm0, %zmm7, %zmm14
; AVX512DQ-BW-FCP-NEXT: vpmovsxbw {{.*#+}} zmm6 = [20,52,0,0,0,0,0,0,21,53,0,0,0,0,0,0,22,54,0,0,0,0,0,0,23,55,0,0,0,0,0,0]
; AVX512DQ-BW-FCP-NEXT: vmovdqa64 %zmm3, %zmm13
; AVX512DQ-BW-FCP-NEXT: vpermt2w %zmm0, %zmm6, %zmm13
; AVX512DQ-BW-FCP-NEXT: vpmovsxbw {{.*#+}} zmm4 = [16,48,0,0,0,0,0,0,17,49,0,0,0,0,0,0,18,50,0,0,0,0,0,0,19,51,0,0,0,0,0,0]
; AVX512DQ-BW-FCP-NEXT: vmovdqa64 %zmm3, %zmm11
; AVX512DQ-BW-FCP-NEXT: vpermt2w %zmm0, %zmm4, %zmm11
; AVX512DQ-BW-FCP-NEXT: vpmovsxbw {{.*#+}} zmm2 = [28,60,0,0,0,0,0,0,29,61,0,0,0,0,0,0,30,62,0,0,0,0,0,0,31,63,0,0,0,0,0,0]
; AVX512DQ-BW-FCP-NEXT: vmovdqa64 %zmm3, %zmm9
; AVX512DQ-BW-FCP-NEXT: vpermt2w %zmm0, %zmm2, %zmm9
; AVX512DQ-BW-FCP-NEXT: vpmovsxbw {{.*#+}} zmm19 = [24,56,0,0,0,0,0,0,25,57,0,0,0,0,0,0,26,58,0,0,0,0,0,0,27,59,0,0,0,0,0,0]
; AVX512DQ-BW-FCP-NEXT: vpermt2w %zmm0, %zmm19, %zmm3
; AVX512DQ-BW-FCP-NEXT: vmovdqa64 64(%rdi), %zmm1
; AVX512DQ-BW-FCP-NEXT: vmovdqa64 64(%rsi), %zmm0
; AVX512DQ-BW-FCP-NEXT: vpermi2w %zmm0, %zmm1, %zmm12
; AVX512DQ-BW-FCP-NEXT: vpermi2w %zmm0, %zmm1, %zmm10
; AVX512DQ-BW-FCP-NEXT: vpermi2w %zmm0, %zmm1, %zmm8
; AVX512DQ-BW-FCP-NEXT: vpermi2w %zmm0, %zmm1, %zmm7
; AVX512DQ-BW-FCP-NEXT: vpermi2w %zmm0, %zmm1, %zmm6
; AVX512DQ-BW-FCP-NEXT: vpermi2w %zmm0, %zmm1, %zmm4
; AVX512DQ-BW-FCP-NEXT: vpermi2w %zmm0, %zmm1, %zmm2
; AVX512DQ-BW-FCP-NEXT: vpermt2w %zmm0, %zmm19, %zmm1
; AVX512DQ-BW-FCP-NEXT: movw $-30584, %ax # imm = 0x8888
; AVX512DQ-BW-FCP-NEXT: kmovd %eax, %k1
; AVX512DQ-BW-FCP-NEXT: vmovdqu64 {{[-0-9]+}}(%r{{[sb]}}p), %zmm0 # 64-byte Reload
; AVX512DQ-BW-FCP-NEXT: vmovdqu64 {{[-0-9]+}}(%r{{[sb]}}p), %zmm19 # 64-byte Reload
; AVX512DQ-BW-FCP-NEXT: vmovdqa32 %zmm19, %zmm0 {%k1}
; AVX512DQ-BW-FCP-NEXT: movw $8738, %ax # imm = 0x2222
; AVX512DQ-BW-FCP-NEXT: kmovd %eax, %k2
; AVX512DQ-BW-FCP-NEXT: vmovdqa32 %zmm20, %zmm18 {%k2}
; AVX512DQ-BW-FCP-NEXT: movb $-86, %al
; AVX512DQ-BW-FCP-NEXT: kmovd %eax, %k3
; AVX512DQ-BW-FCP-NEXT: vmovdqa64 %zmm0, %zmm18 {%k3}
; AVX512DQ-BW-FCP-NEXT: vmovdqu64 {{[-0-9]+}}(%r{{[sb]}}p), %zmm0 # 64-byte Reload
; AVX512DQ-BW-FCP-NEXT: vmovdqu64 {{[-0-9]+}}(%r{{[sb]}}p), %zmm19 # 64-byte Reload
; AVX512DQ-BW-FCP-NEXT: vmovdqa32 %zmm0, %zmm19 {%k1}
; AVX512DQ-BW-FCP-NEXT: vmovdqa32 %zmm21, %zmm17 {%k2}
; AVX512DQ-BW-FCP-NEXT: vmovdqa64 %zmm19, %zmm17 {%k3}
; AVX512DQ-BW-FCP-NEXT: vmovdqu64 {{[-0-9]+}}(%r{{[sb]}}p), %zmm0 # 64-byte Reload
; AVX512DQ-BW-FCP-NEXT: vmovdqu64 {{[-0-9]+}}(%r{{[sb]}}p), %zmm19 # 64-byte Reload
; AVX512DQ-BW-FCP-NEXT: vmovdqa32 %zmm0, %zmm19 {%k1}
; AVX512DQ-BW-FCP-NEXT: vmovdqa32 %zmm22, %zmm15 {%k2}
; AVX512DQ-BW-FCP-NEXT: vmovdqa64 %zmm19, %zmm15 {%k3}
; AVX512DQ-BW-FCP-NEXT: vmovdqu64 {{[-0-9]+}}(%r{{[sb]}}p), %zmm0 # 64-byte Reload
; AVX512DQ-BW-FCP-NEXT: vmovdqu64 {{[-0-9]+}}(%r{{[sb]}}p), %zmm19 # 64-byte Reload
; AVX512DQ-BW-FCP-NEXT: vmovdqa32 %zmm0, %zmm19 {%k1}
; AVX512DQ-BW-FCP-NEXT: vmovdqa32 %zmm23, %zmm14 {%k2}
; AVX512DQ-BW-FCP-NEXT: vmovdqa64 %zmm19, %zmm14 {%k3}
; AVX512DQ-BW-FCP-NEXT: vmovdqu64 {{[-0-9]+}}(%r{{[sb]}}p), %zmm0 # 64-byte Reload
; AVX512DQ-BW-FCP-NEXT: vmovdqu64 {{[-0-9]+}}(%r{{[sb]}}p), %zmm19 # 64-byte Reload
; AVX512DQ-BW-FCP-NEXT: vmovdqa32 %zmm0, %zmm19 {%k1}
; AVX512DQ-BW-FCP-NEXT: vmovdqa32 %zmm24, %zmm13 {%k2}
; AVX512DQ-BW-FCP-NEXT: vmovdqa64 %zmm19, %zmm13 {%k3}
; AVX512DQ-BW-FCP-NEXT: vmovdqu64 {{[-0-9]+}}(%r{{[sb]}}p), %zmm0 # 64-byte Reload
; AVX512DQ-BW-FCP-NEXT: vmovdqu64 {{[-0-9]+}}(%r{{[sb]}}p), %zmm19 # 64-byte Reload
; AVX512DQ-BW-FCP-NEXT: vmovdqa32 %zmm0, %zmm19 {%k1}
; AVX512DQ-BW-FCP-NEXT: vmovdqa32 %zmm25, %zmm11 {%k2}
; AVX512DQ-BW-FCP-NEXT: vmovdqa64 %zmm19, %zmm11 {%k3}
; AVX512DQ-BW-FCP-NEXT: vmovdqu64 {{[-0-9]+}}(%r{{[sb]}}p), %zmm0 # 64-byte Reload
; AVX512DQ-BW-FCP-NEXT: vmovdqa32 %zmm0, %zmm31 {%k1}
; AVX512DQ-BW-FCP-NEXT: vmovdqa32 %zmm26, %zmm9 {%k2}
; AVX512DQ-BW-FCP-NEXT: vmovdqa64 %zmm31, %zmm9 {%k3}
; AVX512DQ-BW-FCP-NEXT: vmovdqu64 {{[-0-9]+}}(%r{{[sb]}}p), %zmm0 # 64-byte Reload
; AVX512DQ-BW-FCP-NEXT: vmovdqu64 {{[-0-9]+}}(%r{{[sb]}}p), %zmm19 # 64-byte Reload
; AVX512DQ-BW-FCP-NEXT: vmovdqa32 %zmm19, %zmm0 {%k1}
; AVX512DQ-BW-FCP-NEXT: vmovdqa32 %zmm16, %zmm3 {%k2}
; AVX512DQ-BW-FCP-NEXT: vmovdqa64 %zmm0, %zmm3 {%k3}
; AVX512DQ-BW-FCP-NEXT: vmovdqu64 {{[-0-9]+}}(%r{{[sb]}}p), %zmm0 # 64-byte Reload
; AVX512DQ-BW-FCP-NEXT: vmovdqu64 {{[-0-9]+}}(%r{{[sb]}}p), %zmm16 # 64-byte Reload
; AVX512DQ-BW-FCP-NEXT: vmovdqa32 %zmm16, %zmm0 {%k1}
; AVX512DQ-BW-FCP-NEXT: vmovdqu64 {{[-0-9]+}}(%r{{[sb]}}p), %zmm16 # 64-byte Reload
; AVX512DQ-BW-FCP-NEXT: vmovdqa32 %zmm16, %zmm12 {%k2}
; AVX512DQ-BW-FCP-NEXT: vmovdqa64 %zmm0, %zmm12 {%k3}
; AVX512DQ-BW-FCP-NEXT: vmovdqu64 {{[-0-9]+}}(%r{{[sb]}}p), %zmm0 # 64-byte Reload
; AVX512DQ-BW-FCP-NEXT: vmovdqu64 {{[-0-9]+}}(%r{{[sb]}}p), %zmm16 # 64-byte Reload
; AVX512DQ-BW-FCP-NEXT: vmovdqa32 %zmm16, %zmm0 {%k1}
; AVX512DQ-BW-FCP-NEXT: vmovdqu64 {{[-0-9]+}}(%r{{[sb]}}p), %zmm16 # 64-byte Reload
; AVX512DQ-BW-FCP-NEXT: vmovdqa32 %zmm16, %zmm10 {%k2}
; AVX512DQ-BW-FCP-NEXT: vmovdqa64 %zmm0, %zmm10 {%k3}
; AVX512DQ-BW-FCP-NEXT: vmovdqu64 {{[-0-9]+}}(%r{{[sb]}}p), %zmm0 # 64-byte Reload
; AVX512DQ-BW-FCP-NEXT: vmovdqu64 {{[-0-9]+}}(%r{{[sb]}}p), %zmm16 # 64-byte Reload
; AVX512DQ-BW-FCP-NEXT: vmovdqa32 %zmm16, %zmm0 {%k1}
; AVX512DQ-BW-FCP-NEXT: vmovdqu64 (%rsp), %zmm16 # 64-byte Reload
; AVX512DQ-BW-FCP-NEXT: vmovdqa32 %zmm16, %zmm8 {%k2}
; AVX512DQ-BW-FCP-NEXT: vmovdqa64 %zmm0, %zmm8 {%k3}
; AVX512DQ-BW-FCP-NEXT: vmovdqu64 {{[-0-9]+}}(%r{{[sb]}}p), %zmm0 # 64-byte Reload
; AVX512DQ-BW-FCP-NEXT: vmovdqu64 {{[-0-9]+}}(%r{{[sb]}}p), %zmm16 # 64-byte Reload
; AVX512DQ-BW-FCP-NEXT: vmovdqa32 %zmm16, %zmm0 {%k1}
; AVX512DQ-BW-FCP-NEXT: vmovdqu64 {{[-0-9]+}}(%r{{[sb]}}p), %zmm16 # 64-byte Reload
; AVX512DQ-BW-FCP-NEXT: vmovdqa32 %zmm16, %zmm7 {%k2}
; AVX512DQ-BW-FCP-NEXT: vmovdqa64 %zmm0, %zmm7 {%k3}
; AVX512DQ-BW-FCP-NEXT: vmovdqu64 {{[-0-9]+}}(%r{{[sb]}}p), %zmm0 # 64-byte Reload
; AVX512DQ-BW-FCP-NEXT: vmovdqu64 {{[-0-9]+}}(%r{{[sb]}}p), %zmm16 # 64-byte Reload
; AVX512DQ-BW-FCP-NEXT: vmovdqa32 %zmm16, %zmm0 {%k1}
; AVX512DQ-BW-FCP-NEXT: vmovdqu64 {{[-0-9]+}}(%r{{[sb]}}p), %zmm16 # 64-byte Reload
; AVX512DQ-BW-FCP-NEXT: vmovdqa32 %zmm16, %zmm6 {%k2}
; AVX512DQ-BW-FCP-NEXT: vmovdqa64 %zmm0, %zmm6 {%k3}
; AVX512DQ-BW-FCP-NEXT: vmovdqu64 {{[-0-9]+}}(%r{{[sb]}}p), %zmm0 # 64-byte Reload
; AVX512DQ-BW-FCP-NEXT: vmovdqu64 {{[-0-9]+}}(%r{{[sb]}}p), %zmm16 # 64-byte Reload
; AVX512DQ-BW-FCP-NEXT: vmovdqa32 %zmm16, %zmm0 {%k1}
; AVX512DQ-BW-FCP-NEXT: vmovdqa32 %zmm29, %zmm4 {%k2}
; AVX512DQ-BW-FCP-NEXT: vmovdqa64 %zmm0, %zmm4 {%k3}
; AVX512DQ-BW-FCP-NEXT: vmovdqu64 {{[-0-9]+}}(%r{{[sb]}}p), %zmm0 # 64-byte Reload
; AVX512DQ-BW-FCP-NEXT: vmovdqa32 %zmm0, %zmm28 {%k1}
; AVX512DQ-BW-FCP-NEXT: vmovdqa32 %zmm30, %zmm2 {%k2}
; AVX512DQ-BW-FCP-NEXT: vmovdqa64 %zmm28, %zmm2 {%k3}
; AVX512DQ-BW-FCP-NEXT: vmovdqu64 {{[-0-9]+}}(%r{{[sb]}}p), %zmm0 # 64-byte Reload
; AVX512DQ-BW-FCP-NEXT: vmovdqa32 %zmm0, %zmm27 {%k1}
; AVX512DQ-BW-FCP-NEXT: vmovdqa32 %zmm5, %zmm1 {%k2}
; AVX512DQ-BW-FCP-NEXT: vmovdqa64 %zmm27, %zmm1 {%k3}
; AVX512DQ-BW-FCP-NEXT: movq {{[0-9]+}}(%rsp), %rax
; AVX512DQ-BW-FCP-NEXT: vmovdqa64 %zmm1, 896(%rax)
; AVX512DQ-BW-FCP-NEXT: vmovdqa64 %zmm2, 960(%rax)
; AVX512DQ-BW-FCP-NEXT: vmovdqa64 %zmm4, 768(%rax)
; AVX512DQ-BW-FCP-NEXT: vmovdqa64 %zmm6, 832(%rax)
; AVX512DQ-BW-FCP-NEXT: vmovdqa64 %zmm7, 640(%rax)
; AVX512DQ-BW-FCP-NEXT: vmovdqa64 %zmm8, 704(%rax)
; AVX512DQ-BW-FCP-NEXT: vmovdqa64 %zmm10, 512(%rax)
; AVX512DQ-BW-FCP-NEXT: vmovdqa64 %zmm12, 576(%rax)
; AVX512DQ-BW-FCP-NEXT: vmovdqa64 %zmm3, 384(%rax)
; AVX512DQ-BW-FCP-NEXT: vmovdqa64 %zmm9, 448(%rax)
; AVX512DQ-BW-FCP-NEXT: vmovdqa64 %zmm11, 256(%rax)
; AVX512DQ-BW-FCP-NEXT: vmovdqa64 %zmm13, 320(%rax)
; AVX512DQ-BW-FCP-NEXT: vmovdqa64 %zmm14, 128(%rax)
; AVX512DQ-BW-FCP-NEXT: vmovdqa64 %zmm15, 192(%rax)
; AVX512DQ-BW-FCP-NEXT: vmovdqa64 %zmm17, (%rax)
; AVX512DQ-BW-FCP-NEXT: vmovdqa64 %zmm18, 64(%rax)
; AVX512DQ-BW-FCP-NEXT: addq $2056, %rsp # imm = 0x808
; AVX512DQ-BW-FCP-NEXT: vzeroupper
; AVX512DQ-BW-FCP-NEXT: retq
%in.vec0 = load <64 x i16>, ptr %in.vecptr0, align 64
%in.vec1 = load <64 x i16>, ptr %in.vecptr1, align 64
%in.vec2 = load <64 x i16>, ptr %in.vecptr2, align 64
%in.vec3 = load <64 x i16>, ptr %in.vecptr3, align 64
%in.vec4 = load <64 x i16>, ptr %in.vecptr4, align 64
%in.vec5 = load <64 x i16>, ptr %in.vecptr5, align 64
%in.vec6 = load <64 x i16>, ptr %in.vecptr6, align 64
%in.vec7 = load <64 x i16>, ptr %in.vecptr7, align 64
%1 = shufflevector <64 x i16> %in.vec0, <64 x i16> %in.vec1, <128 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27, i32 28, i32 29, i32 30, i32 31, i32 32, i32 33, i32 34, i32 35, i32 36, i32 37, i32 38, i32 39, i32 40, i32 41, i32 42, i32 43, i32 44, i32 45, i32 46, i32 47, i32 48, i32 49, i32 50, i32 51, i32 52, i32 53, i32 54, i32 55, i32 56, i32 57, i32 58, i32 59, i32 60, i32 61, i32 62, i32 63, i32 64, i32 65, i32 66, i32 67, i32 68, i32 69, i32 70, i32 71, i32 72, i32 73, i32 74, i32 75, i32 76, i32 77, i32 78, i32 79, i32 80, i32 81, i32 82, i32 83, i32 84, i32 85, i32 86, i32 87, i32 88, i32 89, i32 90, i32 91, i32 92, i32 93, i32 94, i32 95, i32 96, i32 97, i32 98, i32 99, i32 100, i32 101, i32 102, i32 103, i32 104, i32 105, i32 106, i32 107, i32 108, i32 109, i32 110, i32 111, i32 112, i32 113, i32 114, i32 115, i32 116, i32 117, i32 118, i32 119, i32 120, i32 121, i32 122, i32 123, i32 124, i32 125, i32 126, i32 127>
%2 = shufflevector <64 x i16> %in.vec2, <64 x i16> %in.vec3, <128 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27, i32 28, i32 29, i32 30, i32 31, i32 32, i32 33, i32 34, i32 35, i32 36, i32 37, i32 38, i32 39, i32 40, i32 41, i32 42, i32 43, i32 44, i32 45, i32 46, i32 47, i32 48, i32 49, i32 50, i32 51, i32 52, i32 53, i32 54, i32 55, i32 56, i32 57, i32 58, i32 59, i32 60, i32 61, i32 62, i32 63, i32 64, i32 65, i32 66, i32 67, i32 68, i32 69, i32 70, i32 71, i32 72, i32 73, i32 74, i32 75, i32 76, i32 77, i32 78, i32 79, i32 80, i32 81, i32 82, i32 83, i32 84, i32 85, i32 86, i32 87, i32 88, i32 89, i32 90, i32 91, i32 92, i32 93, i32 94, i32 95, i32 96, i32 97, i32 98, i32 99, i32 100, i32 101, i32 102, i32 103, i32 104, i32 105, i32 106, i32 107, i32 108, i32 109, i32 110, i32 111, i32 112, i32 113, i32 114, i32 115, i32 116, i32 117, i32 118, i32 119, i32 120, i32 121, i32 122, i32 123, i32 124, i32 125, i32 126, i32 127>
%3 = shufflevector <64 x i16> %in.vec4, <64 x i16> %in.vec5, <128 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27, i32 28, i32 29, i32 30, i32 31, i32 32, i32 33, i32 34, i32 35, i32 36, i32 37, i32 38, i32 39, i32 40, i32 41, i32 42, i32 43, i32 44, i32 45, i32 46, i32 47, i32 48, i32 49, i32 50, i32 51, i32 52, i32 53, i32 54, i32 55, i32 56, i32 57, i32 58, i32 59, i32 60, i32 61, i32 62, i32 63, i32 64, i32 65, i32 66, i32 67, i32 68, i32 69, i32 70, i32 71, i32 72, i32 73, i32 74, i32 75, i32 76, i32 77, i32 78, i32 79, i32 80, i32 81, i32 82, i32 83, i32 84, i32 85, i32 86, i32 87, i32 88, i32 89, i32 90, i32 91, i32 92, i32 93, i32 94, i32 95, i32 96, i32 97, i32 98, i32 99, i32 100, i32 101, i32 102, i32 103, i32 104, i32 105, i32 106, i32 107, i32 108, i32 109, i32 110, i32 111, i32 112, i32 113, i32 114, i32 115, i32 116, i32 117, i32 118, i32 119, i32 120, i32 121, i32 122, i32 123, i32 124, i32 125, i32 126, i32 127>
%4 = shufflevector <64 x i16> %in.vec6, <64 x i16> %in.vec7, <128 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27, i32 28, i32 29, i32 30, i32 31, i32 32, i32 33, i32 34, i32 35, i32 36, i32 37, i32 38, i32 39, i32 40, i32 41, i32 42, i32 43, i32 44, i32 45, i32 46, i32 47, i32 48, i32 49, i32 50, i32 51, i32 52, i32 53, i32 54, i32 55, i32 56, i32 57, i32 58, i32 59, i32 60, i32 61, i32 62, i32 63, i32 64, i32 65, i32 66, i32 67, i32 68, i32 69, i32 70, i32 71, i32 72, i32 73, i32 74, i32 75, i32 76, i32 77, i32 78, i32 79, i32 80, i32 81, i32 82, i32 83, i32 84, i32 85, i32 86, i32 87, i32 88, i32 89, i32 90, i32 91, i32 92, i32 93, i32 94, i32 95, i32 96, i32 97, i32 98, i32 99, i32 100, i32 101, i32 102, i32 103, i32 104, i32 105, i32 106, i32 107, i32 108, i32 109, i32 110, i32 111, i32 112, i32 113, i32 114, i32 115, i32 116, i32 117, i32 118, i32 119, i32 120, i32 121, i32 122, i32 123, i32 124, i32 125, i32 126, i32 127>
%5 = shufflevector <128 x i16> %1, <128 x i16> %2, <256 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27, i32 28, i32 29, i32 30, i32 31, i32 32, i32 33, i32 34, i32 35, i32 36, i32 37, i32 38, i32 39, i32 40, i32 41, i32 42, i32 43, i32 44, i32 45, i32 46, i32 47, i32 48, i32 49, i32 50, i32 51, i32 52, i32 53, i32 54, i32 55, i32 56, i32 57, i32 58, i32 59, i32 60, i32 61, i32 62, i32 63, i32 64, i32 65, i32 66, i32 67, i32 68, i32 69, i32 70, i32 71, i32 72, i32 73, i32 74, i32 75, i32 76, i32 77, i32 78, i32 79, i32 80, i32 81, i32 82, i32 83, i32 84, i32 85, i32 86, i32 87, i32 88, i32 89, i32 90, i32 91, i32 92, i32 93, i32 94, i32 95, i32 96, i32 97, i32 98, i32 99, i32 100, i32 101, i32 102, i32 103, i32 104, i32 105, i32 106, i32 107, i32 108, i32 109, i32 110, i32 111, i32 112, i32 113, i32 114, i32 115, i32 116, i32 117, i32 118, i32 119, i32 120, i32 121, i32 122, i32 123, i32 124, i32 125, i32 126, i32 127, i32 128, i32 129, i32 130, i32 131, i32 132, i32 133, i32 134, i32 135, i32 136, i32 137, i32 138, i32 139, i32 140, i32 141, i32 142, i32 143, i32 144, i32 145, i32 146, i32 147, i32 148, i32 149, i32 150, i32 151, i32 152, i32 153, i32 154, i32 155, i32 156, i32 157, i32 158, i32 159, i32 160, i32 161, i32 162, i32 163, i32 164, i32 165, i32 166, i32 167, i32 168, i32 169, i32 170, i32 171, i32 172, i32 173, i32 174, i32 175, i32 176, i32 177, i32 178, i32 179, i32 180, i32 181, i32 182, i32 183, i32 184, i32 185, i32 186, i32 187, i32 188, i32 189, i32 190, i32 191, i32 192, i32 193, i32 194, i32 195, i32 196, i32 197, i32 198, i32 199, i32 200, i32 201, i32 202, i32 203, i32 204, i32 205, i32 206, i32 207, i32 208, i32 209, i32 210, i32 211, i32 212, i32 213, i32 214, i32 215, i32 216, i32 217, i32 218, i32 219, i32 220, i32 221, i32 222, i32 223, i32 224, i32 225, i32 226, i32 227, i32 228, i32 229, i32 230, i32 231, i32 232, i32 233, i32 234, i32 235, i32 236, i32 237, i32 238, i32 239, i32 240, i32 241, i32 242, i32 243, i32 244, i32 245, i32 246, i32 247, i32 248, i32 249, i32 250, i32 251, i32 252, i32 253, i32 254, i32 255>
%6 = shufflevector <128 x i16> %3, <128 x i16> %4, <256 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27, i32 28, i32 29, i32 30, i32 31, i32 32, i32 33, i32 34, i32 35, i32 36, i32 37, i32 38, i32 39, i32 40, i32 41, i32 42, i32 43, i32 44, i32 45, i32 46, i32 47, i32 48, i32 49, i32 50, i32 51, i32 52, i32 53, i32 54, i32 55, i32 56, i32 57, i32 58, i32 59, i32 60, i32 61, i32 62, i32 63, i32 64, i32 65, i32 66, i32 67, i32 68, i32 69, i32 70, i32 71, i32 72, i32 73, i32 74, i32 75, i32 76, i32 77, i32 78, i32 79, i32 80, i32 81, i32 82, i32 83, i32 84, i32 85, i32 86, i32 87, i32 88, i32 89, i32 90, i32 91, i32 92, i32 93, i32 94, i32 95, i32 96, i32 97, i32 98, i32 99, i32 100, i32 101, i32 102, i32 103, i32 104, i32 105, i32 106, i32 107, i32 108, i32 109, i32 110, i32 111, i32 112, i32 113, i32 114, i32 115, i32 116, i32 117, i32 118, i32 119, i32 120, i32 121, i32 122, i32 123, i32 124, i32 125, i32 126, i32 127, i32 128, i32 129, i32 130, i32 131, i32 132, i32 133, i32 134, i32 135, i32 136, i32 137, i32 138, i32 139, i32 140, i32 141, i32 142, i32 143, i32 144, i32 145, i32 146, i32 147, i32 148, i32 149, i32 150, i32 151, i32 152, i32 153, i32 154, i32 155, i32 156, i32 157, i32 158, i32 159, i32 160, i32 161, i32 162, i32 163, i32 164, i32 165, i32 166, i32 167, i32 168, i32 169, i32 170, i32 171, i32 172, i32 173, i32 174, i32 175, i32 176, i32 177, i32 178, i32 179, i32 180, i32 181, i32 182, i32 183, i32 184, i32 185, i32 186, i32 187, i32 188, i32 189, i32 190, i32 191, i32 192, i32 193, i32 194, i32 195, i32 196, i32 197, i32 198, i32 199, i32 200, i32 201, i32 202, i32 203, i32 204, i32 205, i32 206, i32 207, i32 208, i32 209, i32 210, i32 211, i32 212, i32 213, i32 214, i32 215, i32 216, i32 217, i32 218, i32 219, i32 220, i32 221, i32 222, i32 223, i32 224, i32 225, i32 226, i32 227, i32 228, i32 229, i32 230, i32 231, i32 232, i32 233, i32 234, i32 235, i32 236, i32 237, i32 238, i32 239, i32 240, i32 241, i32 242, i32 243, i32 244, i32 245, i32 246, i32 247, i32 248, i32 249, i32 250, i32 251, i32 252, i32 253, i32 254, i32 255>
%7 = shufflevector <256 x i16> %5, <256 x i16> %6, <512 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27, i32 28, i32 29, i32 30, i32 31, i32 32, i32 33, i32 34, i32 35, i32 36, i32 37, i32 38, i32 39, i32 40, i32 41, i32 42, i32 43, i32 44, i32 45, i32 46, i32 47, i32 48, i32 49, i32 50, i32 51, i32 52, i32 53, i32 54, i32 55, i32 56, i32 57, i32 58, i32 59, i32 60, i32 61, i32 62, i32 63, i32 64, i32 65, i32 66, i32 67, i32 68, i32 69, i32 70, i32 71, i32 72, i32 73, i32 74, i32 75, i32 76, i32 77, i32 78, i32 79, i32 80, i32 81, i32 82, i32 83, i32 84, i32 85, i32 86, i32 87, i32 88, i32 89, i32 90, i32 91, i32 92, i32 93, i32 94, i32 95, i32 96, i32 97, i32 98, i32 99, i32 100, i32 101, i32 102, i32 103, i32 104, i32 105, i32 106, i32 107, i32 108, i32 109, i32 110, i32 111, i32 112, i32 113, i32 114, i32 115, i32 116, i32 117, i32 118, i32 119, i32 120, i32 121, i32 122, i32 123, i32 124, i32 125, i32 126, i32 127, i32 128, i32 129, i32 130, i32 131, i32 132, i32 133, i32 134, i32 135, i32 136, i32 137, i32 138, i32 139, i32 140, i32 141, i32 142, i32 143, i32 144, i32 145, i32 146, i32 147, i32 148, i32 149, i32 150, i32 151, i32 152, i32 153, i32 154, i32 155, i32 156, i32 157, i32 158, i32 159, i32 160, i32 161, i32 162, i32 163, i32 164, i32 165, i32 166, i32 167, i32 168, i32 169, i32 170, i32 171, i32 172, i32 173, i32 174, i32 175, i32 176, i32 177, i32 178, i32 179, i32 180, i32 181, i32 182, i32 183, i32 184, i32 185, i32 186, i32 187, i32 188, i32 189, i32 190, i32 191, i32 192, i32 193, i32 194, i32 195, i32 196, i32 197, i32 198, i32 199, i32 200, i32 201, i32 202, i32 203, i32 204, i32 205, i32 206, i32 207, i32 208, i32 209, i32 210, i32 211, i32 212, i32 213, i32 214, i32 215, i32 216, i32 217, i32 218, i32 219, i32 220, i32 221, i32 222, i32 223, i32 224, i32 225, i32 226, i32 227, i32 228, i32 229, i32 230, i32 231, i32 232, i32 233, i32 234, i32 235, i32 236, i32 237, i32 238, i32 239, i32 240, i32 241, i32 242, i32 243, i32 244, i32 245, i32 246, i32 247, i32 248, i32 249, i32 250, i32 251, i32 252, i32 253, i32 254, i32 255, i32 256, i32 257, i32 258, i32 259, i32 260, i32 261, i32 262, i32 263, i32 264, i32 265, i32 266, i32 267, i32 268, i32 269, i32 270, i32 271, i32 272, i32 273, i32 274, i32 275, i32 276, i32 277, i32 278, i32 279, i32 280, i32 281, i32 282, i32 283, i32 284, i32 285, i32 286, i32 287, i32 288, i32 289, i32 290, i32 291, i32 292, i32 293, i32 294, i32 295, i32 296, i32 297, i32 298, i32 299, i32 300, i32 301, i32 302, i32 303, i32 304, i32 305, i32 306, i32 307, i32 308, i32 309, i32 310, i32 311, i32 312, i32 313, i32 314, i32 315, i32 316, i32 317, i32 318, i32 319, i32 320, i32 321, i32 322, i32 323, i32 324, i32 325, i32 326, i32 327, i32 328, i32 329, i32 330, i32 331, i32 332, i32 333, i32 334, i32 335, i32 336, i32 337, i32 338, i32 339, i32 340, i32 341, i32 342, i32 343, i32 344, i32 345, i32 346, i32 347, i32 348, i32 349, i32 350, i32 351, i32 352, i32 353, i32 354, i32 355, i32 356, i32 357, i32 358, i32 359, i32 360, i32 361, i32 362, i32 363, i32 364, i32 365, i32 366, i32 367, i32 368, i32 369, i32 370, i32 371, i32 372, i32 373, i32 374, i32 375, i32 376, i32 377, i32 378, i32 379, i32 380, i32 381, i32 382, i32 383, i32 384, i32 385, i32 386, i32 387, i32 388, i32 389, i32 390, i32 391, i32 392, i32 393, i32 394, i32 395, i32 396, i32 397, i32 398, i32 399, i32 400, i32 401, i32 402, i32 403, i32 404, i32 405, i32 406, i32 407, i32 408, i32 409, i32 410, i32 411, i32 412, i32 413, i32 414, i32 415, i32 416, i32 417, i32 418, i32 419, i32 420, i32 421, i32 422, i32 423, i32 424, i32 425, i32 426, i32 427, i32 428, i32 429, i32 430, i32 431, i32 432, i32 433, i32 434, i32 435, i32 436, i32 437, i32 438, i32 439, i32 440, i32 441, i32 442, i32 443, i32 444, i32 445, i32 446, i32 447, i32 448, i32 449, i32 450, i32 451, i32 452, i32 453, i32 454, i32 455, i32 456, i32 457, i32 458, i32 459, i32 460, i32 461, i32 462, i32 463, i32 464, i32 465, i32 466, i32 467, i32 468, i32 469, i32 470, i32 471, i32 472, i32 473, i32 474, i32 475, i32 476, i32 477, i32 478, i32 479, i32 480, i32 481, i32 482, i32 483, i32 484, i32 485, i32 486, i32 487, i32 488, i32 489, i32 490, i32 491, i32 492, i32 493, i32 494, i32 495, i32 496, i32 497, i32 498, i32 499, i32 500, i32 501, i32 502, i32 503, i32 504, i32 505, i32 506, i32 507, i32 508, i32 509, i32 510, i32 511>
%interleaved.vec = shufflevector <512 x i16> %7, <512 x i16> poison, <512 x i32> <i32 0, i32 64, i32 128, i32 192, i32 256, i32 320, i32 384, i32 448, i32 1, i32 65, i32 129, i32 193, i32 257, i32 321, i32 385, i32 449, i32 2, i32 66, i32 130, i32 194, i32 258, i32 322, i32 386, i32 450, i32 3, i32 67, i32 131, i32 195, i32 259, i32 323, i32 387, i32 451, i32 4, i32 68, i32 132, i32 196, i32 260, i32 324, i32 388, i32 452, i32 5, i32 69, i32 133, i32 197, i32 261, i32 325, i32 389, i32 453, i32 6, i32 70, i32 134, i32 198, i32 262, i32 326, i32 390, i32 454, i32 7, i32 71, i32 135, i32 199, i32 263, i32 327, i32 391, i32 455, i32 8, i32 72, i32 136, i32 200, i32 264, i32 328, i32 392, i32 456, i32 9, i32 73, i32 137, i32 201, i32 265, i32 329, i32 393, i32 457, i32 10, i32 74, i32 138, i32 202, i32 266, i32 330, i32 394, i32 458, i32 11, i32 75, i32 139, i32 203, i32 267, i32 331, i32 395, i32 459, i32 12, i32 76, i32 140, i32 204, i32 268, i32 332, i32 396, i32 460, i32 13, i32 77, i32 141, i32 205, i32 269, i32 333, i32 397, i32 461, i32 14, i32 78, i32 142, i32 206, i32 270, i32 334, i32 398, i32 462, i32 15, i32 79, i32 143, i32 207, i32 271, i32 335, i32 399, i32 463, i32 16, i32 80, i32 144, i32 208, i32 272, i32 336, i32 400, i32 464, i32 17, i32 81, i32 145, i32 209, i32 273, i32 337, i32 401, i32 465, i32 18, i32 82, i32 146, i32 210, i32 274, i32 338, i32 402, i32 466, i32 19, i32 83, i32 147, i32 211, i32 275, i32 339, i32 403, i32 467, i32 20, i32 84, i32 148, i32 212, i32 276, i32 340, i32 404, i32 468, i32 21, i32 85, i32 149, i32 213, i32 277, i32 341, i32 405, i32 469, i32 22, i32 86, i32 150, i32 214, i32 278, i32 342, i32 406, i32 470, i32 23, i32 87, i32 151, i32 215, i32 279, i32 343, i32 407, i32 471, i32 24, i32 88, i32 152, i32 216, i32 280, i32 344, i32 408, i32 472, i32 25, i32 89, i32 153, i32 217, i32 281, i32 345, i32 409, i32 473, i32 26, i32 90, i32 154, i32 218, i32 282, i32 346, i32 410, i32 474, i32 27, i32 91, i32 155, i32 219, i32 283, i32 347, i32 411, i32 475, i32 28, i32 92, i32 156, i32 220, i32 284, i32 348, i32 412, i32 476, i32 29, i32 93, i32 157, i32 221, i32 285, i32 349, i32 413, i32 477, i32 30, i32 94, i32 158, i32 222, i32 286, i32 350, i32 414, i32 478, i32 31, i32 95, i32 159, i32 223, i32 287, i32 351, i32 415, i32 479, i32 32, i32 96, i32 160, i32 224, i32 288, i32 352, i32 416, i32 480, i32 33, i32 97, i32 161, i32 225, i32 289, i32 353, i32 417, i32 481, i32 34, i32 98, i32 162, i32 226, i32 290, i32 354, i32 418, i32 482, i32 35, i32 99, i32 163, i32 227, i32 291, i32 355, i32 419, i32 483, i32 36, i32 100, i32 164, i32 228, i32 292, i32 356, i32 420, i32 484, i32 37, i32 101, i32 165, i32 229, i32 293, i32 357, i32 421, i32 485, i32 38, i32 102, i32 166, i32 230, i32 294, i32 358, i32 422, i32 486, i32 39, i32 103, i32 167, i32 231, i32 295, i32 359, i32 423, i32 487, i32 40, i32 104, i32 168, i32 232, i32 296, i32 360, i32 424, i32 488, i32 41, i32 105, i32 169, i32 233, i32 297, i32 361, i32 425, i32 489, i32 42, i32 106, i32 170, i32 234, i32 298, i32 362, i32 426, i32 490, i32 43, i32 107, i32 171, i32 235, i32 299, i32 363, i32 427, i32 491, i32 44, i32 108, i32 172, i32 236, i32 300, i32 364, i32 428, i32 492, i32 45, i32 109, i32 173, i32 237, i32 301, i32 365, i32 429, i32 493, i32 46, i32 110, i32 174, i32 238, i32 302, i32 366, i32 430, i32 494, i32 47, i32 111, i32 175, i32 239, i32 303, i32 367, i32 431, i32 495, i32 48, i32 112, i32 176, i32 240, i32 304, i32 368, i32 432, i32 496, i32 49, i32 113, i32 177, i32 241, i32 305, i32 369, i32 433, i32 497, i32 50, i32 114, i32 178, i32 242, i32 306, i32 370, i32 434, i32 498, i32 51, i32 115, i32 179, i32 243, i32 307, i32 371, i32 435, i32 499, i32 52, i32 116, i32 180, i32 244, i32 308, i32 372, i32 436, i32 500, i32 53, i32 117, i32 181, i32 245, i32 309, i32 373, i32 437, i32 501, i32 54, i32 118, i32 182, i32 246, i32 310, i32 374, i32 438, i32 502, i32 55, i32 119, i32 183, i32 247, i32 311, i32 375, i32 439, i32 503, i32 56, i32 120, i32 184, i32 248, i32 312, i32 376, i32 440, i32 504, i32 57, i32 121, i32 185, i32 249, i32 313, i32 377, i32 441, i32 505, i32 58, i32 122, i32 186, i32 250, i32 314, i32 378, i32 442, i32 506, i32 59, i32 123, i32 187, i32 251, i32 315, i32 379, i32 443, i32 507, i32 60, i32 124, i32 188, i32 252, i32 316, i32 380, i32 444, i32 508, i32 61, i32 125, i32 189, i32 253, i32 317, i32 381, i32 445, i32 509, i32 62, i32 126, i32 190, i32 254, i32 318, i32 382, i32 446, i32 510, i32 63, i32 127, i32 191, i32 255, i32 319, i32 383, i32 447, i32 511>
store <512 x i16> %interleaved.vec, ptr %out.vec, align 64
ret void
}
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llvm