llvm/llvm/test/MC/Disassembler/Mips/micromips32r3/valid-fp64.txt

# RUN: llvm-mc --disassemble -triple=mips -mcpu=mips32r3 -mattr=+micromips,+fp64 %s \
# RUN: | FileCheck %s

0x54 0x0c 0x0a 0x3b # CHECK: sqrt.s $f0, $f12
0x54 0x0c 0x03 0x7b # CHECK: abs.s  $f0, $f12
0x54 0x0c 0x4a 0x3b # CHECK: sqrt.d $f0, $f12
0x54 0x0c 0x23 0x7b # CHECK: abs.d  $f0, $f12
0x54 0x80 0x38 0x3b # CHECK: mthc1 $4, $f0
0x54 0x80 0x30 0x3b # CHECK: mfhc1 $4, $f0
0x54 0x82 0x01 0x30 # CHECK: add.d $f0, $f2, $f4
0x54 0x82 0x01 0x70 # CHECK: sub.d $f0, $f2, $f4
0x54 0x82 0x01 0xb0 # CHECK: mul.d $f0, $f2, $f4
0x54 0x82 0x01 0xf0 # CHECK: div.d $f0, $f2, $f4
0x54 0x02 0x20 0x7b # CHECK: mov.d $f0, $f2
0x54 0x02 0x2b 0x7b # CHECK: neg.d $f0, $f2
0x54 0x02 0x49 0x3b # CHECK: cvt.w.d $f0, $f2
0x54 0x02 0x13 0x7b # CHECK: cvt.d.s $f0, $f2
0x54 0x02 0x33 0x7b # CHECK: cvt.d.w $f0, $f2
0x54 0x02 0x1b 0x7b # CHECK: cvt.s.d $f0, $f2
0x54 0x82 0x01 0x3b # CHECK: cvt.l.s $f4, $f2
0x54 0x82 0x41 0x3b # CHECK: cvt.l.d $f4, $f2
0x54 0x85 0x21 0x48 # CHECK: luxc1 $f4, $4($5)
0x54 0x85 0x21 0x88 # CHECK: suxc1 $f4, $4($5)
0x54 0x86 0x28 0x3b # CHECK: mtc1  $4, $f6
0x54 0x86 0x20 0x3b # CHECK: mfc1  $4, $f6
0x54 0x86 0x38 0x3b # CHECK: mthc1 $4, $f6
0x54 0x86 0x30 0x3b # CHECK: mfhc1 $4, $f6