Thunks.cpp | Explore in Territory

//===- Thunks.cpp --------------------------------------------------------===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===---------------------------------------------------------------------===//
//
// This file contains Thunk subclasses.
//
// A thunk is a small piece of code written after an input section
// which is used to jump between "incompatible" functions
// such as MIPS PIC and non-PIC or ARM non-Thumb and Thumb functions.
//
// If a jump target is too far and its address doesn't fit to a
// short jump instruction, we need to create a thunk too, but we
// haven't supported it yet.
//
// i386 and x86-64 don't need thunks.
//
//===---------------------------------------------------------------------===//

#include "Thunks.h"
#include "Config.h"
#include "InputFiles.h"
#include "InputSection.h"
#include "OutputSections.h"
#include "Symbols.h"
#include "SyntheticSections.h"
#include "Target.h"
#include "lld/Common/CommonLinkerContext.h"
#include "llvm/BinaryFormat/ELF.h"
#include "llvm/Support/Casting.h"
#include "llvm/Support/ErrorHandling.h"
#include "llvm/Support/MathExtras.h"
#include <cstdint>
#include <cstring>

usingnamespacellvm;
usingnamespacellvm::object;
usingnamespacellvm::ELF;
usingnamespacelld;
usingnamespacelld::elf;

namespace {

// Base class for AArch64 thunks.
//
// An AArch64 thunk may be either short or long. A short thunk is simply a
// branch (B) instruction, and it may be used to call AArch64 functions when the
// distance from the thunk to the target is less than 128MB. Long thunks can
// branch to any virtual address and they are implemented in the derived
// classes. This class tries to create a short thunk if the target is in range,
// otherwise it creates a long thunk. When BTI is enabled indirect branches
// must land on a BTI instruction. If the destination does not have a BTI
// instruction mayNeedLandingPad is set to true and Thunk::landingPad points
// to an alternative entry point with a BTI.
class AArch64Thunk : public Thunk { … };

// AArch64 long range Thunks.
class AArch64ABSLongThunk final : public AArch64Thunk { … };

class AArch64ADRPThunk final : public AArch64Thunk { … };

// AArch64 BTI Landing Pad
// When BTI is enabled indirect branches must land on a BTI
// compatible instruction. When the destination does not have a
// BTI compatible instruction a Thunk doing an indirect branch
// targets a Landing Pad Thunk that direct branches to the target.
class AArch64BTILandingPadThunk final : public Thunk { … };

// Base class for ARM thunks.
//
// An ARM thunk may be either short or long. A short thunk is simply a branch
// (B) instruction, and it may be used to call ARM functions when the distance
// from the thunk to the target is less than 32MB. Long thunks can branch to any
// virtual address and can switch between ARM and Thumb, and they are
// implemented in the derived classes. This class tries to create a short thunk
// if the target is in range, otherwise it creates a long thunk.
class ARMThunk : public Thunk { … };

// Base class for Thumb-2 thunks.
//
// This class is similar to ARMThunk, but it uses the Thumb-2 B.W instruction
// which has a range of 16MB.
class ThumbThunk : public Thunk { … };

// Specific ARM Thunk implementations. The naming convention is:
// Source State, TargetState, Target Requirement, ABS or PI, Range
class ARMV7ABSLongThunk final : public ARMThunk { … };

class ARMV7PILongThunk final : public ARMThunk { … };

class ThumbV7ABSLongThunk final : public ThumbThunk { … };

class ThumbV7PILongThunk final : public ThumbThunk { … };

// Implementations of Thunks for Arm v6-M. Only Thumb instructions are permitted
class ThumbV6MABSLongThunk final : public ThumbThunk { … };

class ThumbV6MABSXOLongThunk final : public ThumbThunk { … };

class ThumbV6MPILongThunk final : public ThumbThunk { … };

// Architectures v4, v5 and v6 do not support the movt/movw instructions. v5 and
// v6 support BLX to which BL instructions can be rewritten inline. There are no
// Thumb entrypoints for v5 and v6 as there is no Thumb branch instruction on
// these architecture that can result in a thunk.

// LDR on v5 and v6 can switch processor state, so for v5 and v6,
// ARMV5LongLdrPcThunk can be used for both Arm->Arm and Arm->Thumb calls. v4
// can also use this thunk, but only for Arm->Arm calls.
class ARMV5LongLdrPcThunk final : public ARMThunk { … };

// Implementations of Thunks for v4. BLX is not supported, and loads
// will not invoke Arm/Thumb state changes.
class ARMV4PILongBXThunk final : public ARMThunk { … };

class ARMV4PILongThunk final : public ARMThunk { … };

class ThumbV4PILongBXThunk final : public ThumbThunk { … };

class ThumbV4PILongThunk final : public ThumbThunk { … };

class ARMV4ABSLongBXThunk final : public ARMThunk { … };

class ThumbV4ABSLongBXThunk final : public ThumbThunk { … };

class ThumbV4ABSLongThunk final : public ThumbThunk { … };

// The AVR devices need thunks for R_AVR_LO8_LDI_GS/R_AVR_HI8_LDI_GS
// when their destination is out of range [0, 0x1ffff].
class AVRThunk : public Thunk { … };

// MIPS LA25 thunk
class MipsThunk final : public Thunk { … };

// microMIPS R2-R5 LA25 thunk
class MicroMipsThunk final : public Thunk { … };

// microMIPS R6 LA25 thunk
class MicroMipsR6Thunk final : public Thunk { … };

class PPC32PltCallStub final : public Thunk { … };

class PPC32LongThunk final : public Thunk { … };

// PPC64 Plt call stubs.
// Any call site that needs to call through a plt entry needs a call stub in
// the .text section. The call stub is responsible for:
// 1) Saving the toc-pointer to the stack.
// 2) Loading the target functions address from the procedure linkage table into
//    r12 for use by the target functions global entry point, and into the count
//    register.
// 3) Transferring control to the target function through an indirect branch.
class PPC64PltCallStub final : public Thunk { … };

// PPC64 R2 Save Stub
// When the caller requires a valid R2 TOC pointer but the callee does not
// require a TOC pointer and the callee cannot guarantee that it doesn't
// clobber R2 then we need to save R2. This stub:
// 1) Saves the TOC pointer to the stack.
// 2) Tail calls the callee.
class PPC64R2SaveStub final : public Thunk { … };

// PPC64 R12 Setup Stub
// When a caller that does not maintain TOC calls a target which may possibly
// use TOC (either non-preemptible with localentry>1 or preemptible), we need to
// set r12 to satisfy the requirement of the global entry point.
class PPC64R12SetupStub final : public Thunk { … };

// A bl instruction uses a signed 24 bit offset, with an implicit 4 byte
// alignment. This gives a possible 26 bits of 'reach'. If the call offset is
// larger than that we need to emit a long-branch thunk. The target address
// of the callee is stored in a table to be accessed TOC-relative. Since the
// call must be local (a non-local call will have a PltCallStub instead) the
// table stores the address of the callee's local entry point. For
// position-independent code a corresponding relative dynamic relocation is
// used.
class PPC64LongBranchThunk : public Thunk { … };

class PPC64PILongBranchThunk final : public PPC64LongBranchThunk { … };

class PPC64PDLongBranchThunk final : public PPC64LongBranchThunk { … };

} // end anonymous namespace

Defined *Thunk::addSymbol(StringRef name, uint8_t type, uint64_t value,
                          InputSectionBase &section) { … }

void Thunk::setOffset(uint64_t newOffset) { … }

// AArch64 Thunk base class.
static uint64_t getAArch64ThunkDestVA(const Symbol &s, int64_t a) { … }

bool AArch64Thunk::getMayUseShortThunk() { … }

void AArch64Thunk::writeTo(uint8_t *buf) { … }

bool AArch64Thunk::needsSyntheticLandingPad() { … }

// AArch64 long range Thunks.
void AArch64ABSLongThunk::writeLong(uint8_t *buf) { … }

void AArch64ABSLongThunk::addSymbols(ThunkSection &isec) { … }

// This Thunk has a maximum range of 4Gb, this is sufficient for all programs
// using the small code model, including pc-relative ones. At time of writing
// clang and gcc do not support the large code model for position independent
// code so it is safe to use this for position independent thunks without
// worrying about the destination being more than 4Gb away.
void AArch64ADRPThunk::writeLong(uint8_t *buf) { … }

void AArch64ADRPThunk::addSymbols(ThunkSection &isec) { … }

void AArch64BTILandingPadThunk::addSymbols(ThunkSection &isec) { … }

void AArch64BTILandingPadThunk::writeTo(uint8_t *buf) { … }

bool AArch64BTILandingPadThunk::getMayUseShortThunk() { … }

void AArch64BTILandingPadThunk::writeLong(uint8_t *buf) { … }

// ARM Target Thunks
static uint64_t getARMThunkDestVA(const Symbol &s) { … }

// This function returns true if the target is not Thumb and is within 2^26, and
// it has not previously returned false (see comment for mayUseShortThunk).
bool ARMThunk::getMayUseShortThunk() { … }

void ARMThunk::writeTo(uint8_t *buf) { … }

bool ARMThunk::isCompatibleWith(const InputSection &isec,
                                const Relocation &rel) const { … }

// This function returns true if:
// the target is Thumb
// && is within branch range
// && this function has not previously returned false
//    (see comment for mayUseShortThunk)
// && the arch supports Thumb branch range extension.
bool ThumbThunk::getMayUseShortThunk() { … }

void ThumbThunk::writeTo(uint8_t *buf) { … }

bool ThumbThunk::isCompatibleWith(const InputSection &isec,
                                  const Relocation &rel) const { … }

void ARMV7ABSLongThunk::writeLong(uint8_t *buf) { … }

void ARMV7ABSLongThunk::addSymbols(ThunkSection &isec) { … }

void ThumbV7ABSLongThunk::writeLong(uint8_t *buf) { … }

void ThumbV7ABSLongThunk::addSymbols(ThunkSection &isec) { … }

void ARMV7PILongThunk::writeLong(uint8_t *buf) { … }

void ARMV7PILongThunk::addSymbols(ThunkSection &isec) { … }

void ThumbV7PILongThunk::writeLong(uint8_t *buf) { … }

void ThumbV7PILongThunk::addSymbols(ThunkSection &isec) { … }

void ThumbV6MABSLongThunk::writeLong(uint8_t *buf) { … }

void ThumbV6MABSLongThunk::addSymbols(ThunkSection &isec) { … }

void ThumbV6MABSXOLongThunk::writeLong(uint8_t *buf) { … }

void ThumbV6MABSXOLongThunk::addSymbols(ThunkSection &isec) { … }

void ThumbV6MPILongThunk::writeLong(uint8_t *buf) { … }

void ThumbV6MPILongThunk::addSymbols(ThunkSection &isec) { … }

void ARMV5LongLdrPcThunk::writeLong(uint8_t *buf) { … }

void ARMV5LongLdrPcThunk::addSymbols(ThunkSection &isec) { … }

void ARMV4ABSLongBXThunk::writeLong(uint8_t *buf) { … }

void ARMV4ABSLongBXThunk::addSymbols(ThunkSection &isec) { … }

void ThumbV4ABSLongBXThunk::writeLong(uint8_t *buf) { … }

void ThumbV4ABSLongBXThunk::addSymbols(ThunkSection &isec) { … }

void ThumbV4ABSLongThunk::writeLong(uint8_t *buf) { … }

void ThumbV4ABSLongThunk::addSymbols(ThunkSection &isec) { … }

void ARMV4PILongBXThunk::writeLong(uint8_t *buf) { … }

void ARMV4PILongBXThunk::addSymbols(ThunkSection &isec) { … }

void ARMV4PILongThunk::writeLong(uint8_t *buf) { … }

void ARMV4PILongThunk::addSymbols(ThunkSection &isec) { … }

void ThumbV4PILongBXThunk::writeLong(uint8_t *buf) { … }

void ThumbV4PILongBXThunk::addSymbols(ThunkSection &isec) { … }

void ThumbV4PILongThunk::writeLong(uint8_t *buf) { … }

void ThumbV4PILongThunk::addSymbols(ThunkSection &isec) { … }

// Use the long jump which covers a range up to 8MiB.
void AVRThunk::writeTo(uint8_t *buf) { … }

void AVRThunk::addSymbols(ThunkSection &isec) { … }

// Write MIPS LA25 thunk code to call PIC function from the non-PIC one.
void MipsThunk::writeTo(uint8_t *buf) { … }

void MipsThunk::addSymbols(ThunkSection &isec) { … }

InputSection *MipsThunk::getTargetInputSection() const { … }

// Write microMIPS R2-R5 LA25 thunk code
// to call PIC function from the non-PIC one.
void MicroMipsThunk::writeTo(uint8_t *buf) { … }

void MicroMipsThunk::addSymbols(ThunkSection &isec) { … }

InputSection *MicroMipsThunk::getTargetInputSection() const { … }

// Write microMIPS R6 LA25 thunk code
// to call PIC function from the non-PIC one.
void MicroMipsR6Thunk::writeTo(uint8_t *buf) { … }

void MicroMipsR6Thunk::addSymbols(ThunkSection &isec) { … }

InputSection *MicroMipsR6Thunk::getTargetInputSection() const { … }

void elf::writePPC32PltCallStub(Ctx &ctx, uint8_t *buf, uint64_t gotPltVA,
                                const InputFile *file, int64_t addend) { … }

void PPC32PltCallStub::writeTo(uint8_t *buf) { … }

void PPC32PltCallStub::addSymbols(ThunkSection &isec) { … }

bool PPC32PltCallStub::isCompatibleWith(const InputSection &isec,
                                        const Relocation &rel) const { … }

void PPC32LongThunk::addSymbols(ThunkSection &isec) { … }

void PPC32LongThunk::writeTo(uint8_t *buf) { … }

void elf::writePPC64LoadAndBranch(uint8_t *buf, int64_t offset) { … }

void PPC64PltCallStub::writeTo(uint8_t *buf) { … }

void PPC64PltCallStub::addSymbols(ThunkSection &isec) { … }

bool PPC64PltCallStub::isCompatibleWith(const InputSection &isec,
                                        const Relocation &rel) const { … }

void PPC64R2SaveStub::writeTo(uint8_t *buf) { … }

void PPC64R2SaveStub::addSymbols(ThunkSection &isec) { … }

bool PPC64R2SaveStub::isCompatibleWith(const InputSection &isec,
                                       const Relocation &rel) const { … }

void PPC64R12SetupStub::writeTo(uint8_t *buf) { … }

void PPC64R12SetupStub::addSymbols(ThunkSection &isec) { … }

bool PPC64R12SetupStub::isCompatibleWith(const InputSection &isec,
                                         const Relocation &rel) const { … }

void PPC64LongBranchThunk::writeTo(uint8_t *buf) { … }

void PPC64LongBranchThunk::addSymbols(ThunkSection &isec) { … }

bool PPC64LongBranchThunk::isCompatibleWith(const InputSection &isec,
                                            const Relocation &rel) const { … }

Thunk::Thunk(Ctx &ctx, Symbol &d, int64_t a)
    : … { … }

Thunk::~Thunk() = default;

static Thunk *addThunkAArch64(Ctx &ctx, RelType type, Symbol &s, int64_t a) { … }

// Creates a thunk for long branches or Thumb-ARM interworking.
// Arm Architectures v4t does not support Thumb2 technology, and does not
// support BLX or LDR Arm/Thumb state switching. This means that
// - MOVT and MOVW instructions cannot be used.
// - We can't rewrite BL in place to BLX. We will need thunks.
//
// TODO: use B for short Thumb->Arm thunks instead of LDR (this doesn't work for
//       Arm->Thumb, as in Arm state no BX PC trick; it doesn't switch state).
static Thunk *addThunkArmv4(Ctx &ctx, RelType reloc, Symbol &s, int64_t a) { … }

// Creates a thunk for Thumb-ARM interworking compatible with Armv5 and Armv6.
// Arm Architectures v5 and v6 do not support Thumb2 technology. This means that
// - MOVT and MOVW instructions cannot be used
// - Only Thumb relocation that can generate a Thunk is a BL, this can always
//   be transformed into a BLX
static Thunk *addThunkArmv5v6(Ctx &ctx, RelType reloc, Symbol &s, int64_t a) { … }

// Create a thunk for Thumb long branch on V6-M.
// Arm Architecture v6-M only supports Thumb instructions. This means
// - MOVT and MOVW instructions cannot be used.
// - Only a limited number of instructions can access registers r8 and above
// - No interworking support is needed (all Thumb).
static Thunk *addThunkV6M(Ctx &ctx, const InputSection &isec, RelType reloc,
                          Symbol &s, int64_t a) { … }

// Creates a thunk for Thumb-ARM interworking or branch range extension.
static Thunk *addThunkArm(Ctx &ctx, const InputSection &isec, RelType reloc,
                          Symbol &s, int64_t a) { … }

static Thunk *addThunkAVR(Ctx &ctx, RelType type, Symbol &s, int64_t a) { … }

static Thunk *addThunkMips(Ctx &ctx, RelType type, Symbol &s) { … }

static Thunk *addThunkPPC32(Ctx &ctx, const InputSection &isec,
                            const Relocation &rel, Symbol &s) { … }

static Thunk *addThunkPPC64(Ctx &ctx, RelType type, Symbol &s, int64_t a) { … }

Thunk *elf::addThunk(Ctx &ctx, const InputSection &isec, Relocation &rel) { … }

Thunk *elf::addLandingPadThunk(Ctx &ctx, Symbol &s, int64_t a) { … }
llvm/lld/ELF/Thunks.cpp
