# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 5
# RUN: llc -mtriple x86_64-unknown-unknown %s \
# RUN: -verify-coalescing -enable-subreg-liveness \
# RUN: --run-pass=register-coalescer -o - | FileCheck %s
# Check that the register coalescer correctly handles merging live ranges over
# SUBREG_TO_REG on X86. The -verify-coalescing option will give an error if
# this is incorrect.
---
name: test1
alignment: 16
tracksRegLiveness: true
body: |
bb.0:
; CHECK-LABEL: name: test1
; CHECK: undef [[MOV32rm:%[0-9]+]].sub_32bit:gr64_nosp = MOV32rm undef %1:gr64, 1, $noreg, 0, $noreg :: (volatile load (s32) from `ptr undef`)
; CHECK-NEXT: undef [[MOV32rm1:%[0-9]+]].sub_32bit:gr64_with_sub_8bit = MOV32rm undef %4:gr64, 1, $noreg, 0, $noreg :: (volatile load (s32) from `ptr undef`)
; CHECK-NEXT: [[MOV32rm1:%[0-9]+]]:gr64_with_sub_8bit = SHL64ri [[MOV32rm1]], 32, implicit-def dead $eflags
; CHECK-NEXT: [[LEA64r:%[0-9]+]]:gr64_with_sub_8bit = LEA64r [[MOV32rm1]], 1, [[MOV32rm]], 256, $noreg
; CHECK-NEXT: [[LEA64r:%[0-9]+]]:gr64_with_sub_8bit = SHR64ri [[LEA64r]], 8, implicit-def dead $eflags
; CHECK-NEXT: MOV32mr undef %10:gr64, 1, $noreg, 0, $noreg, [[LEA64r]].sub_32bit :: (volatile store (s32) into `ptr undef`)
; CHECK-NEXT: RET 0, undef $eax
%0:gr32 = MOV32rm undef %1:gr64, 1, $noreg, 0, $noreg :: (volatile load (s32) from `ptr undef`)
%2:gr64_nosp = SUBREG_TO_REG 0, killed %0, %subreg.sub_32bit
%3:gr32 = MOV32rm undef %4:gr64, 1, $noreg, 0, $noreg :: (volatile load (s32) from `ptr undef`)
%5:gr64 = SUBREG_TO_REG 0, killed %3, %subreg.sub_32bit
%6:gr64 = COPY killed %5
%6:gr64 = SHL64ri %6, 32, implicit-def dead $eflags
%7:gr64 = LEA64r killed %6, 1, killed %2, 256, $noreg
%8:gr64 = COPY killed %7
%8:gr64 = SHR64ri %8, 8, implicit-def dead $eflags
%9:gr32 = COPY killed %8.sub_32bit
MOV32mr undef %10:gr64, 1, $noreg, 0, $noreg, killed %9 :: (volatile store (s32) into `ptr undef`)
RET 0, undef $eax
...
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